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DEPARTMENT OF ELECTRONICS AND COMMUNIATION

LAB MANUAL

VLSI DESIGN LAB II LAB CODE: VL9225 SEM/Branch ME VLSI (II nd SEM)

List of Experiments Lab code: VL9225 Lab Name: VLSI Design Lab II

1. Implementation of 8 bit ALU in FPGA/CPLD. 2. Implementation of 4 bit sliced processor in FPGA/CPLD. 3. Implementation of elevator controller using embedded microcontroller. 4. Implementation of alarm clock controller using embedded microcontroller. 5. Implementation of model train controller using embedded microcontroller. 6. System design using PLL.

INDEX
S.No. Name of the Experiment Page no.

1. 2. 3. 4. 5. 6.

8 bit ALU 4 bit sliced processor Elevator controller Alarm clock controller Model train controller System design using PLL

4-7 8-11 12-15 16-19 20-32 33-38

Exp. No. 1 AIM: Implementation of 8 bit ALU in FPGA/CPLD. Software used: XILINX9.1, FPGA kit.

Algorithm: 1. Start. 2. Declare the input and output ports. 3. Perform the calculations and assign the result to output port. 4. Create the test bench waveform. 5. Simulate and verify the output. 6. Stop. 7. Implement of FPGA kit.

Verilog Module: module alu8(z,read,data,s); output reg [7:0]z; input[7:0]data; input read; input[1:0]s; reg[7:0]y[1:0]; integer i; always@(data or s) begin y[read]=data; case(s) 2'b00:z=y[0]&y[1]; 2'b01:z=y[0]|y[1]; 2'b10:z=y[0]^y[1]; 2'b11:z=y[0]-y[1]; endcase end endmodule

Output waveform

RTL SCHEMATIC

UCF (user constraint file) #PACE: Start of Constraints generated by PACE #PACE: Start of PACE I/O Pin Assignments NET "data<0>" LOC = "p74" ; NET "data<1>" LOC = "p76" ; NET "data<2>" LOC = "p77" ; NET "data<3>" LOC = "p79" ; NET "data<4>" LOC = "p78" ; NET "data<5>" LOC = "p82" ; NET "data<6>" LOC = "p80" ; NET "data<7>" LOC = "p87" ; NET "read" LOC = "p84" ; NET "s<0>" LOC = "p85" ; NET "s<1>" LOC = "p86" ; NET "z<0>" LOC = "p100" ; NET "z<1>" LOC = "p102" ; NET "z<2>" LOC = "p124" ; NET "z<3>" LOC = "p103" ; NET "z<4>" LOC = "p105" ; NET "z<5>" LOC = "p107" ;

NET "z<6>" LOC = "p108" ; NET "z<7>" LOC = "p113" ; #PACE: Start of PACE Area Constraints #PACE: Start of PACE Prohibit Constraints #PACE: End of Constraints generated by PACE Result: 8bit ALU successfully implemented on FPGA kit.

Exp. No. 2 AIM: Implementation of 4 bit sliced processor in FPGA/CPLD. Software used: XILINX9.1, FPGA kit. Algorithm: 1.Start. 2.Declare the input and output ports. 3.Perform the calculations and assign the result to output port. 4.Create the test bench waveform. 5.Simulate and verify the output. 6.Stop. 7.Implement of FPGA kit. VHDL Module library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; ---- Uncomment the following library declaration if instantiating ---- any Xilinx primitives in this code. --library UNISIM; --use UNISIM.VComponents.all; entity slicealu is Port ( aa : in STD_LOGIC_VECTOR (7 downto 0); ab : in STD_LOGIC_VECTOR (7 downto 0); c : in STD_LOGIC; operation : in STD_LOGIC_VECTOR (1 downto 0); ssum : out STD_LOGIC_VECTOR (15 downto 0)); end slicealu; architecture arcf_slicealu of slicealu is component slice1alu is Port ( aa : in STD_LOGIC_VECTOR (3 downto 0); ab : in STD_LOGIC_VECTOR (3 downto 0); c : in STD_LOGIC; operation : in STD_LOGIC_VECTOR (1 downto 0); ssum : out STD_LOGIC_VECTOR (7 downto 0)); end component; component slice2alu is

Port ( aa : in STD_LOGIC_VECTOR (3 downto 0); ab : in STD_LOGIC_VECTOR (3 downto 0); c : in STD_LOGIC; operation : in STD_LOGIC_VECTOR (1 downto 0); ssum : out STD_LOGIC_VECTOR (7 downto 0)); end component; signal s:std_logic_vector(7 downto 0):="00000000"; signal s1:std_logic_vector(7 downto 0):="00000000"; signal s2:std_logic_vector(6 downto 0):="0000000"; begin a2:slice1alu port map(aa(3 downto 0),ab(3 downto 0),c,operation,s(7 downto 0)); a3:slice1alu port map(aa(7 downto 4),ab(7 downto 4),s(4),operation,s1(7 downto 0)); ssum(15 downto 0)<=s2(6 downto 0)&s1(4 downto 0)&s(3 downto 0); end arcf_slicealu; library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; ---- Uncomment the following library declaration if instantiating ---- any Xilinx primitives in this code. --library UNISIM; --use UNISIM.VComponents.all; entity slice1alu is Port ( aa : in STD_LOGIC_VECTOR (3 downto 0); ab : in STD_LOGIC_VECTOR (3 downto 0); c : in STD_LOGIC; operation : in STD_LOGIC_VECTOR (1 downto 0); ssum : out STD_LOGIC_VECTOR (7 downto 0)); function addition(A,B:std_logic_vector(3 downto 0); carry:std_logic) return std_logic_vector is variable cout:std_logic; variable cin:std_logic:=carry; variable sum:std_logic_vector(7 downto 0):="00000000"; begin for i in 0 to 3 loop cout:=(A(i) and B(i)) or (A(i) and cin) or(B(i) and cin); sum(i):=A(i) xor B(i) xor cin; cin:=cout; end loop;

sum(4):=cout; return sum; end; function subtraction(A,B:std_logic_vector(3 downto 0); carry:std_logic) return std_logic_vector is variable cout:std_logic; variable cin:std_logic:=carry; variable sum:std_logic_vector(7 downto 0):="00000000"; begin for i in 0 to 3 loop cout:=(not A(i) and B(i)) or (not A(i) and cin) or(B(i) and cin); sum(i):=A(i) xor B(i) xor cin; cin:=cout; end loop; sum(4):=cout; return sum; end; end; architecture arch_alu of slice1alu is begin ssum<=addition(aa,ab,c)when(operation<="00") else subtraction(aa,ab,c)when(operation<="01"); end;

OUTPUT WAVEFORM

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RTL SCHEMATIC

Result: 4 bit sliced processor successfully simulated.

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Exp. No. 3 AIM: Implementation of elevator controller using embedded microcontroller.

Tools used: Basic Microcontroller kit, Interface Elevator kit VBMB 022 Steps: 1. 2. 3. 4. Connect VBMB022 board to 8051 microcontroller kit. Enter the following program from user RAM address 4100 H. After checking the program, execute the same. We can see the movement of lift 1 from ground floor to 4th floor.

Program:

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ADDRESS

OPCODE

MNEUMONICS

COMMENTS

4100 4102 4105 4106 4109 410B 410C 410E 4111 4112 4114 4117 4118 411B 411E 4120 4121 4124 4126 4127 412A 412C 412D 4130 4132 4133 4135 4138

74 03 F0 12 41 41 74 02 F0 74 80 90 FF C0 F0 74 01 90 FF C4 F0 12 41 41 90 FF C0 74 40 F0 12 41 41 74 20 F0 12 41 41 74 10 F0 12 41 41 74 08 F0 74 0B F0

Mov a,#03h Movx @dptr,a Lcall delay Mov a,#02h Movx @dptr,a Mov a,#80h Mov dptr,#lift1 Movx @dptr,a Mov a,#01h Mov dptr,#lift2 Movx @dptr,a Lcall delay Mov dptr,#lift1 Mov a,#40h Movx @dptr,a Lcall delay Mov a,#20h Movx @dptr,a Lcall delay Mov a,#10h Movx @dptr,a Lcall delay Mov a,#08h Movx @dptr,a Mov a,#0bh Movx @dptr,a

default open doors

90 FF CC Mov dptr,#stat_ou of lift1 & lift2

Close door of lift1 Indicates lift1 is in gnd floor

Indicates lift2 is in 7th floor

Beep for door open

90 FF CC Mov dptr,#stat_ou

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14

4139
ADDRESS

12 41 41
OPCODE

Lcall delay
MNEUMONICS COMMENTS

413C 413E 413F 413F 4141 4141 4144 4144 4147 4147 414A 414D 4150 4151 4151 4154 4157 415A 415B 415B 415D 415F 4161 4163 4165 4168 416A 416C

74 03 F0 80 FE 75 31 0A 75 30 64 12 41 51 D5 30 FA D5 31 F4 22 75 8A 17 12 41 5B 22 E5 89 54 F0 44 01 F5 89 D2 8C 30 8D FD C2 8C C2 8D 22

Mov a,#03h Movx @dptr,a Here: Sjmp here Delay: Mov count1,#0A Mov count,#64 Dl2: Lcall delay 1ms D2: Djnz count,d2 Djnz count1,dl2 Ret Delay 1ms: Mov t10,#017h Lcall t0 delay Ret T0 delay Mov a,tmod Anl a,#0F0h Orl a,#t0_ml Mov tmod,a Setb 8C Jnb 8D,4165 Clr 8C Clr tf0 8D ret

door open

For 1second delay

1 millisecond TL0=17h, the low byte of timer0 TH0=FCh., the high byte of timer0 Activate the timer0 & wait upto Timer overflow occurs

75 8C FC Mov th0,#0FCh

2 timer0, mode1 1 start the timer0 0FFFF-(16 bit timer value)+1; monitor timer flag 0 1 stop the timer0 1 clear the flag0 1 stop the timer0 15

4165 4168

30 8D FD Jnb 8D,4165 0FFFF-(16 bit timer value)+1; monitor timer flag 0 C2 8C Clr 8C Clr tf0 8D ret 1 stop the timer0 1 clear the flag0 1 stop the timer0

416A C2 8D 416C 22

Result: Successfully implemented elevator on microcontroller kit.

Exp. No. 4 16

AIM: Implementation of alarm clock controller using embedded microcontroller. Tools used: Universal embedded trainer kit Steps: 1. Open MPLAB IDE on your system. 2. Select device. PIC 16f877A. 3. Select CCS C compiler. Select language tool suite.(CCS C Compiler (ccsc.exe)) 4. Create project using project wizard. Chose project>project wizard. 5. Give project name and directory. 6. Create new file and save as (file name.c) 7. Add file to project by right clicking source file. 8. Then Go for compilation. (project>compile F10) 9. Check the output window and simulation. If any error will be there, it will show in output window. 10. Got to debugger>settings. See the output will come. 11. Open PIC ISP. 12. Select COM port and download file name.hex.GO for download. (While downloading switch should be in programming mode.) 13. Download successful. 14. After that switch position is changed to exec mode and then reset the CPU code. Code will be executed. PROGRAM FOR ALARM CLOCK //This Program is for Serial Real time Clock with alarm //SCL - RC3 //SDA - RC4 //DEVICE ADDRESS - 0XA0 - 0XA1 #include <16F877A.H> #use delay(clock=20000000) #use rs232(baud=19200, xmit=PIN_C6, rcv=PIN_C7) #use I2C(MASTER,sda=PIN_C4,scl=PIN_C3) unsigned int time[]={0x30,0x55,0x12}; unsigned int readtime[0x03]; unsigned long int hour,second,minute; int i,j; void set_rtc_time() {

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for (i=2;i<=4;i++) { i2c_start(); i2c_write(0xa0 | 0x00); i2c_write(i); i2c_write(time[(i-2)]); i2c_stop(); } } void get_rtc_time() { for (i=2;i<=4;i++) { i2c_start(); i2c_write(0xa0); i2c_write(i); i2c_start(); i2c_write(0xa0 | 0x01); readtime[(i-2)]=i2c_read(0); i2c_stop(); } } void alarm_set() { output_b(0xff); if(minute==0x57) { if((second>=0x10)&&(second<=0x14)) { printf("\n"); printf("ALARM SET!!!"); } } } void main() { set_rtc_time(); while(1) { get_rtc_time(); hour = readtime[2];

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minute= readtime[1]; second=readtime[0]; printf(" Time : %x : %x : %x \n\r",readtime[2],readtime[1],readtime[0]); alarm_set(); } } OUTPUT Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 09 Time : 12 : 57 : 10 ALARM SET!!! Time : 12 : 57 : 10

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ALARM SET!!! Time : 12 : 57 : 10 ALARM SET!!! Time : 12 : 57 : 10 ALARM SET!!! Time : 12 : 57 : 10 ALARM SET!!! Time : 12 : 57 : 10

Result: Successfully implemented model train on embedded microcontroller kit.

Exp. No. 5

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AIM: Implementation of model train controller using embedded microcontroller. Tools used: Universal embedded trainer kit, Model trainer kit. Steps: 1. Connect Model train kit to PIC. 2. PIC connected to PC. 3. Open MPLAB IDE on your system. 4. Select device. PIC 16f877A. 5. Select CCS C compiler. Select language tool suite. (CCS C Compiler (ccsc.exe)) 6. Create project using project wizard. Chose project>project wizard. 7. Give project name and directory. 8. Create new file and save as (file name.c) 9. Add file to project by right clicking source file. 10. Then Go for compilation. (Project>compile F10) 11. Check the output window and simulation. If any error will be there, it will show in output window. 12. Go to debugger>settings. See the output will come. 13. Open PIC ISP. 14. Select COM port and download file name.hex.GO for download. (While downloading switch should be in programming mode.) 15. Download successful. 16. After that switch position is changed to exec mode and then reset the CPU code. Code will be executed. Program: This program get the data from the sw1 (up for on, down for off) & sw2 (up for forward, down for Reverse) and rotate the train. Also get the data from the sensor and put the signals. #include <16F877.H> #include <stdio.h> #use delay(clock=20000000) #use rs232(baud=19200, xmit=PIN_C6, rcv=PIN_C7) #use I2C(MASTER,sda=PIN_C4,scl=PIN_C3) unsigned char data,a,b,c; unsigned char ls0[]={0x55,0x54,0x50,0x40,0x00,0x00,0x01,0x05,0x15,0x55}; //led0-led3 selector for forward direction.

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unsigned char ls1[]={0x55,0x15,0x05,0x01,0x00,0x00,0x40,0x50,0x54,0x55}; //led0-led3 selector for reverse direction. unsigned char sel[]={0x0c0,0x0c2,0xc4,0xc6,0xc8,0xca,0xcc,0xce,0x0c0}; unsigned char sel1[]={0x0ce,0xcc,0xca,0xc8,0xc6,0xc4,0xc2,0x0c0,0xce}; unsigned char i,i1,j,k=0x15,senout=0x00,senout1=0x00,senout2,senout3,buzzon=0; void crossingon(); void crossingoff(); void init(); void initbuf(); void sensor(); void sensor1(); void station1forward(); void station2forward(); void station1reverse(); void station2reverse(); void sw(); void sw1(); void reverse(); void forward(); void main() { init(); initbuf(); while(1) { start1: for(j=0x00;j<0x09;j++) { i1=0x05; for(i=0x00;i<0x09;i++) { start: if(i<=0x04) { i2c_start(); i2c_write(sel[j]); address for the device selection. i2c_write(k); register address. i2c_write(ls0[i]); for lso register.

//write the //write the //write the data

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i2c_write(ls0[i1]); for ls1 register.

//write the data

i1++; printf("Rotate one movement here\n"); } if(j==0x08) rotation in the train. goto start1; stoptrain: sw(); the buffer. // high. // if(c != 0x0) goto stoptrain; if(i>=0x05) { i2c_start(); i2c_write(sel[j]); i2c_write(k+1); i2c_write(ls0[i-0x04]); i2c_stop(); i2c_start(); i2c_write(sel[j+1]); i2c_write(k); i2c_write(ls0[i1-0x04]); i1++; printf("Rotate one movement here\n"); } i2c_stop(); stoptrain1: sw(); the buffer. // high. // if((c != 0x0)) goto stoptrain1; sensor(); if(senout == 0x00) goto stop1; senout++; if(senout < 0x06) delay_ms(200); //read the data from //check for sw1 & sw2 is //read the data from //check for sw1 & sw2 is //start the next

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else if(senout == 0x06) station1. { delay_ms(0x2000); delay in station1. initbuf(); output_d(0x10); the yellow led for station1 in forward. output_low(PIN_E2); output_high(PIN_E2); delay_ms(1000); initbuf(); output_d(0x08); the green led for station1 in forward. output_low(PIN_E2); output_high(PIN_E2); delay_ms(100); } if((senout > 0x06) && (senout <=0x0a)) delay_ms(200); stop1: if(senout1 == 0x00) goto stop2; senout1++; if(senout1 < 0x06) delay_ms(200); else if(senout1 == 0x06) station2. { delay_ms(0x2000); delay in station2. initbuf(); output_d(0x04); the yellow led for station2 in forward. output_low(PIN_E1); output_high(PIN_E1); delay_ms(1000); initbuf();

//check the //wait some

//glow

//glow

//check the //wait some

//glow

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output_d(0x02); the green led for station2 in forward. output_low(PIN_E1); output_high(PIN_E1); delay_ms(100); } if((senout1 > 0x06) && (senout1 <=0x0a)) delay_ms(200); stop2: /* if(i != 0x08) delay_ms(200); if(buzzon == 0x01) { output_low(PIN_E0); delay_ms(10); output_high(PIN_E0); delay_ms(10); }*/ } } } } void init() { for(i=0;i<0x08;i++) { i2c_start(); i2c_write(sel[i]); i2c_write(0x15); i2c_write(0x00); i2c_write(0x00); i2c_stop(); printf("Clear the display here\n"); } } void sensor() { output_low(PIN_B4); a=input_d(); output_high(PIN_B4); b = a; b = b & 0x02;

//glow

//get the data from the buffer.

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if(b == 0x02) level crossing. { do{

//sensor3 is set to low(enable) for close the

output_low(PIN_B4); a=input_d(); output_high(PIN_B4); c = a; c = (c & 0x80); }while(c != 0x0); crossingon(); } b = a; b = b & 0x04; if(b == 0x04) level crossing. crossingoff(); b = a; b = b & 0x08; if(b == 0x08) station2forward(); b = a; b = b & 0x20; if(b == 0x20) station1forward(); } void crossingon() { output_d(0xF0); output_low(PIN_E1); output_high(PIN_E1); output_d(0xFF); output_low(PIN_E0); output_high(PIN_E0); output_d(0x00); output_low(PIN_E2); output_high(PIN_E2); buzzon = 0x01;

//get the data from the buffer.

//sensor4 is set to low(enable) for open the

//sensor5 is set to low(enable).

//sensor1 is set to low(enable).

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} void crossingoff() { initbuf(); buzzon = 0x0; } void station1forward() { initbuf(); output_d(0x20); forward. output_low(PIN_E2); output_high(PIN_E2); delay_ms(100); train in station1. senout=0x01; } void station2forward() { initbuf(); output_d(0x08); forward. output_low(PIN_E1); output_high(PIN_E1); delay_ms(100); train in station1. senout1 = 0x01; } void sw() { output_low(PIN_B4); a=input_d(); output_high(PIN_B4); b=a; b= b & 0x40; //glow the red led for station1 in

//decrement the speed for stop the

//glow the red led for statio2 in

//decrement the speed for stop the

//get the data from the buffer.

//check for switch1.

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c=a; c= (c & 0x80); if(b == 0x40) reverse(); }

//check for switch2.

void reverse() { senout2 = 0x00, senout3 = 0x00; init(); initbuf(); buzzon = 0x0; while(1) { start3: for(j=0x00;j<0x09;j++) { i1=0x05; for(i=0x00;i<0x09;i++) { start4: if(i<=0x04) { i2c_start(); i2c_write(sel1[j]); address for the device selection. i2c_write(0x06); register address. i2c_write(ls1[i]); for lso register. i2c_start(); i2c_write(sel1[j]); address for the device selection. i2c_write(0x05); the register address. i2c_write(ls1[i1]); for ls1 register.

//write the //write the //write the data

//write the //write //write the data

i1++; printf("Rotate one movement here\n"); } if(j==0x08) rotation in the train. goto start3; stoptrain2: //start the next

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sw1(); the buffer. // high. // if(c != 0x0) goto stoptrain2;

//read the data from //check for sw1 & sw2 is

if(i>=0x05) { i2c_start(); i2c_write(sel1[j]); i2c_write(0x05); i2c_write(ls1[i-0x04]); i2c_stop(); i2c_start(); i2c_write(sel1[j+1]); i2c_write(0x06); i2c_write(ls1[i1-0x04]); i1++; printf("Rotate one movement here\n"); } stoptrain3: sw1(); the buffer. // high. // if((c != 0x0)) goto stoptrain3; sensor1(); if(senout2 == 0x00) goto stop3; senout2++; if(senout2 < 0x06) delay_ms(200); else if(senout2 == 0x06) reverse dircetion. { delay_ms(0x2000); delay in station2 in reverse dirction. initbuf(); output_d(0x80); the yellow led for station2 in reverse. output_low(PIN_E2); output_high(PIN_E2); //glow //wait some //read the data from //check for sw1 & sw2 is

//check the station2 in

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delay_ms(1000); initbuf(); output_d(0x40); the green led for station2 in reverse. output_low(PIN_E2); output_high(PIN_E2); delay_ms(100); } if((senout2 > 0x06) && (senout2 <=0x0a)) delay_ms(200); stop3: if(senout3 == 0x00) goto stop4; senout3++; if(senout3 < 0x06) delay_ms(200); else if(senout3 == 0x06) station1. { delay_ms(0x2000); delay in station1. initbuf(); output_d(0x02); the yellow led for station1 in reverse. output_low(PIN_E2); output_high(PIN_E2); delay_ms(1000); initbuf(); output_d(0x01); the green led for station1 in reverse. output_low(PIN_E2); output_high(PIN_E2); delay_ms(100); } if((senout3 > 0x06) && (senout3 <=0x0a)) delay_ms(200); stop4: if(i != 0x08) delay_ms(200); //glow //glow //wait some //glow

//check the

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/*

if(buzzon == 0x01) { output_low(PIN_E0); delay_ms(10); output_high(PIN_E0); delay_ms(10); }*/ } } }

} void sensor1() { output_low(PIN_B4); a=input_d(); output_high(PIN_B4); b = a; b = b & 0x10; if(b == 0x10) station2reverse(); b = a; b = b & 0x04; if(b == 0x04) level crossing. { do{

//get the data from the buffer.

//sensor6 is set to low(enable).

//sensor3 is set to low(enable) for close the

output_low(PIN_B4); a=input_d(); output_high(PIN_B4); c = a; c = (c & 0x80); }while(c != 0x0); crossingon(); } b = a; b = b & 0x02; if(b == 0x02) level crossing. crossingoff(); b = a;

//get the data from the buffer.

//sensor4 is set to low(enable) for open the

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b = b & 0x01; if(b == 0x01) station1reverse(); } void station1reverse() { initbuf(); output_d(0x04); forward. output_low(PIN_E2); output_high(PIN_E2); delay_ms(100); train in station1. senout3=0x01; } void station2reverse() { initbuf(); output_d(0x01); forward. output_low(PIN_E1); output_high(PIN_E1); delay_ms(100); train in station1. senout2=0x01; } void sw1() { output_low(PIN_B4); a=input_d(); output_high(PIN_B4); b=a; b= b & 0x40; c=a; c= c & 0x80; }

//sensor2 is set to low(enable).

//glow the red led for station1 in

//decrement the speed for stop the

//glow the red led for statio2 in

//decrement the speed for stop the

//get the data from the buffer.

//check for switch1. //check for switch2.

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void initbuf() { output_d(0x00); output_low(PIN_E1); output_high(PIN_E1); output_d(0x00); output_low(PIN_E2); output_high(PIN_E2); output_d(0x00); output_low(PIN_E0); output_high(PIN_E0); }

//noy glow the station2 signal.

//noy glow the station2 signal.

//noy glow the station2 signal.

Result: Successfully implemented model train on embedded microcontroller kit.

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Exp. 6 AIM: System design using PLL. Software used: XILINX 9.1 Algorithm: 1. Start. 2. Declare the input and output ports. 3. Perform the calculations and assign the result to output port. 4. Create the test bench waveform. 5. Simulate and verify the output. 6. Stop. Verilog Module module pll(u1,u2,ID_clock,reset); input u1,ID_clock,reset; output u2; parameter M=32; parameter K=8; parameter N=16; parameter PHASE_DETECTOR_SELECT=1;//1 for xor,2 for JK FF parameter M2=5;//log base 2 of M parameter K2=3;//log base 2 of K parameter N2=4;//log base 2 of N wire reset,XOR_out,JK_out,DN_UP,K_clock,u2,u2_prime; reg[(K2-1):0]Kup,Kdn; reg carry_new,Borrow,Toggle_FF,carry_pulse,Borrow_pulse,advanced,delayed; reg ID_out,ID_out_2,ID_out_4,ID_out_8,ID_out_16; reg Borrow_new,toggle_FF,Carry_pulse,Carry_new,Carry; assign K_clock=ID_clock; jk jk1 (Q,J,K); assign XOR_out=u1^u2_prime; assign DN_UP=PHASE_DETECTOR_SELECT?XOR_out:JK_out; //*******KCOUNTER*******// always@(negedge K_clock or negedge reset) begin if(!reset) begin

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Kup<=0; Kdn<=0; Carry<=0; Borrow<=0; end else begin if(DN_UP)Kdn<=Kdn+1; else begin if(DN_UP)Kdn<=Kdn+1; Carry<=Kup[K2-1]; Borrow<=Kdn[K2-1]; end end end ///**ID COUNTER****/// always@(posedge ID_clock) begin if(!Carry) begin Carry_new<=1; Carry_pulse<=0; end else if(Carry_pulse) begin Carry_pulse<=0; Carry_new<=0; end else if(Carry && Carry_new) begin Carry_pulse<=1; Carry_new<=0; end else begin Carry_pulse<=0; Carry_new<=0; end end //always@(posedge Borrow or posedge ID_clock) always@(posedge ID_clock) begin

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if(!Borrow) begin Borrow_new<=1; Borrow_pulse<=0; end else if(Borrow_pulse) begin Borrow_pulse<=0; Borrow_new<=0; end else if(Borrow && Borrow_new) begin Borrow_pulse<=1; Borrow_new<=0; end else begin Borrow_pulse<=0; Borrow_new<=0; end end always@(posedge ID_clock or negedge reset) begin if(!reset) begin Toggle_FF<=0; delayed<=1; advanced<=1; end else begin if(Carry_pulse) begin advanced<=1; Toggle_FF<=!Toggle_FF; end else if(Borrow_pulse) begin delayed<=1; Toggle_FF<=!Toggle_FF; end else if(Toggle_FF==0) begin if(!advanced)Toggle_FF<=!toggle_FF; else if(advanced) begin

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Toggle_FF<=Toggle_FF; advanced<=0; end end else begin if(!delayed)Toggle_FF<=!Toggle_FF; else if(delayed) begin Toggle_FF<=Toggle_FF; delayed<=0; end end end end //always@(ID_clock) always@(ID_clock or Toggle_FF) begin if(Toggle_FF)ID_out<=0; else begin if(ID_clock)ID_out<=0; else ID_out<=1; end end assign u2=ID_out; ///***N COUNTER***/// always@(negedge ID_out or negedge reset) begin if(!reset)ID_out_2<=0; else ID_out_2<=!ID_out_2; end always@(negedge ID_out_2 or negedge reset) begin if(!reset)ID_out_4<=0; else ID_out_4<=!ID_out_4; end always@(negedge ID_out_4 or negedge reset) begin if(!reset)ID_out_8<=0; else ID_out_8<=!ID_out_8; end always@(negedge ID_out_8 or negedge reset) begin

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if(!reset)ID_out_16<=0; else ID_out_16<=!ID_out_16; end assign u2_prime=ID_out_8; endmodule ///////////////////////// module jk(Q,J,K); input J,K; output Q; reg Q; always@(posedge J) begin if(K==1) Q<=!Q; else Q<=1; end always@(posedge K) begin if(J==1) Q<=!Q; else Q<=0; end endmodule OUTPUT WAVEFORM

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RTL SCHEMATIC:

Result: System was designed using PLL.

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