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Therefore, although we give a few helping examples, this article is not about binary numerals. The main interactive circuit at the top of this page is an arithmetic circuit capable of performing both addition and subtraction on any two 4-bit binary numbers. The circuit has a Mode switch that allows you to choose between adding (M=0) and subtracting (M=1). To understand why this circuit works, lets review binary addition and binary subtraction. We use 4-bit numbers in the examples because the main interactive circuit is a 4-bit addersubtractor. Binary addition is certainly easier than decimal addition. You just add 0s and 1s. For example to add the numbers five (0101) and six (0110) together, we just add the respective bits: Decimal numerals 6 +5 11 Binary numerals 0110 +0101 1011

For binary subtraction, we use 2s complement to keep things simple. For instance, to perform the operation six (0110) minus five (0101), we first obtain the 2s complement of five and then add it to six: Step one: Getting the 2s complement of 5 1. Flip every bit in five to get 1010. 2. Add one to 1010 to get: 1010 + 1 = 1011. Step two: Adding the 2s complement of 5 to 6: 1. Decimal numerals 6 +(-5) 1 Binary numerals 0110 +1011 10001.

We show the carry bit in green because normally it does not count towards the result. Design Now that we have reviewed our binary addition and subtraction skills, lets look at what the circuit is doing. If you fix your gaze on the fulladders while you play around with the input switches, you will see that no matter what operation you think you are doing, the fulladders job never changes: the fulladder adds up the signals that appear at its inputs. This is surely not a strange behavior. In reality, whether you are doing binary addition or binary subtraction, the last thing you always do is add the numbers (e.g. Step two above tells you to add). So how does the circuit know whether you want to add or subtract? The XOR gates and the Mode switch, of course! The circuit assumes that your subtraction will always be in the form A B. So because one input of each XOR gate is attached to the Mode switch while the other input of each XOR gate is attached to a B bit, when the Mode switch is equal to 1, the output of the XOR is the complement of B. This is because B 0 = B and B 1 = B. In addition to going into the XOR gates, the Mode signal also goes into the carry input of the least significant fulladder (C0), which basically adds a 1 to B when the Mode switch is ON. Hence, when the Mode switch is equal to 1, the XOR gates and the Mode switch take the 2s complement of B and pass it to the fulladders. ***To recap, here is a brief summary of how the circuit works: When M = 0, the fulladders see A + B because B 0 = B. However, when M = 1, the fulladders see A + B + 1 because B 1 = B and C0 = M. And, yes, (B + 1) is the 2s complement of B. Although our presentation focuses on a 4bit addersubtractor, the circuit can be extended to any arbitrary size by simply incorporating more XOR gates and fulladders. Using the AdderSubtractor The following four tables show you how to use the adder-subtractor to perform different type of arithmetic operations. At the time of publication no similar breakdown exists in the literature. Hence, we advice that you pay attention to the distinctions. Operation Unsigned addition Ignore the V-bit Note A3 calculation A2 A1 A0

B3 C Operation

B2 S2

B1 S1

B0 S0

S3

Note The addends A & B and the sum S are all 2s complements. Ignore C & V A3 B3 S3 A2 B2 S2

calculation A1 B1 S1 A0 B0 S0

Signed addition

Note The minuend A, the subtrahend B, and the difference S are all 2s complements. Ignore C A3 B3 S3

calculation A2 B2 S2 A1 B1 S1 calculation A3 B3 C S3 A2 B2 S2 A1 B1 S1 A0 B0 S0 A0 B0 S0

Operation

Note

Subtraction with The minuend A, the subtrahend B, and the overflow difference S are all 2s complements. (V=1) 2s Complement Table Binary 01111 01110 01101 01100 01011 01010 01001 01000 00111 00110 00101 00100 00011 00010 00001 00000 +15 +14 +13 +12 +11 +10 +9 +8 +7 +6 +5 +4 +3 +2 +1 +0 2s complement Binary 10000 10001 10010 10011 10100 10101 10110 10111 11000 11001 11010 11011 11100 11101 11110 11111

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