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IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 60, NO. 4, APRIL 2011

**Design of Impedance Measuring Circuits Based on Phase-Sensitive Demodulation Technique
**

Dixiang Chen, Wuqiang Yang, Senior Member, IEEE, and Mengchun Pan

Abstract—Impedance measuring circuits play a crucial role in an electrical impedance tomography system, in which capacitance and resistance need to be measured accurately at a high speed. Several impedance measuring circuits based on phase-sensitive demodulation (PSD) have been designed, tested, and presented in this paper. The measurement error is analyzed, and the mismatch of the measured capacitance and resistance is considered to be the main cause of the measurement error. A new impedance measuring circuit with dual-frequency PSD has been designed to solve this problem. It has been proven by experiment that this circuit can be used to measure both capacitance and resistance with an uncertainty of less than 0.5%. Index Terms—Analog multiplier, dual frequency, dual mode, electrical impedance tomography (EIT), phase-sensitive demodulation (PSD).

Fig. 1.

Basic impedance measuring circuit.

Several multimode EIT systems have been reported with two sets of single-mode electrodes and their combinations [10]–[13]. Some drawbacks for a simple combination of singlemode electrodes are as follows [14]. 1) Two sets of single-mode electrodes result in complicated measurement channels and additional errors by the multiplexer. 2) If the capacitance electrodes used for ECT and the resistance electrodes used for ERT are positioned on the same cross section, the information of capacitance and resistance must be obtained sequentially since the coupling effect between two excitation signals has to be avoided by time sharing. 3) If the capacitance electrodes and resistance electrodes are positioned on two different cross sections, the information on details of a fast ﬂow, which is obtained by the tomography system, may be invalid because of the time difference. An analytical model of sensors has been proposed for EIT [14], which can be used to obtain the information of both the conductivity distribution and permittivity distribution of a cross section of a pipe. In that paper, some details of the measuring circuit were given. Although phase-sensitive demodulation (PSD) circuits have been widely used in ECT and ERT systems [15]–[17], they have not been applied to achieve a dual-mode EIT system. This paper presents a new design of a dual-mode EIT system based on a PSD circuit, which should measure capacitance and resistance from an EIT sensor accurately at a high speed. Note that the primary objective of the work presented in this paper is to measure the capacitance and loss conductance. II. M EASUREMENT P RINCIPLES Fig. 1 shows a basic impedance measuring circuit, in which the measured capacitance Cx and resistance Rx are in parallel, Rf is a feedback resistance, Vi is a sine-wave input voltage, and Vo is the output of the measuring circuit.

I. I NTRODUCTION LECTRICAL impedance tomography (EIT) has been developed for industrial and clinical applications during the past decades as a visualization and measurement technique [1]–[6]. It can be used to reconstruct images of an industry process or part of a human body by determining the permittivity and/or conductivity distribution and, hence, material distribution over a cross section based on the electrical measurements. Compared with traditional tomography techniques, such as X-ray and γ -ray, EIT has several advantages, e.g., low cost, rapid response, portability, nonradiation, nonintrusiveness, and robustness [7], [8]. In most cases, EIT is based on the measurement of a single electrical property, i.e., permittivity for electrical capacitance tomography (ECT) or conductivity for electrical resistance tomography (ERT). However, the need for real-time imaging of complex processes involving multiphase components has motivated the development of tomography systems to exploit multiple electrical properties, resulting in multimode tomography systems [4], [9].

E

Manuscript received June 6, 2010; revised July 20, 2010; accepted August 21, 2010. Date of publication November 9, 2010; date of current version March 8, 2011. The work of D. Chen was fully supported by the China Scholarship Council for the academic visit at The University of Manchester in the U.K. The Associate Editor coordinating the review process for this paper was Dr. Theodore Laopoulos. D. Chen and M. Pan are with the School of Mechatronics Engineering and Automation, National University of Defense Technology, Changsha 410073, China. W. Yang is with the School of Electrical and Electronic Engineering, The University of Manchester, M13 9PL Manchester, U.K. Color versions of one or more of the ﬁgures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identiﬁer 10.1109/TIM.2010.2084770

0018-9456/$26.00 © 2010 IEEE

Because stray capacitance Cs2 is kept as virtual earth by the op-amp with no potential difference across it. The driving TTL signal is synchronized to the input signal Vi . Switching-Based PSD There are basically two types of PSD circuits. the stray capacitance has been grouped together as Cs1 and Cs2 . 1. the output of the op-amp Vo can be described by Vo = Vi = A sin(ωt + φ). 2 shows a detailed circuit of switching-based PSD. Fig. The op-amp is conﬁgured as a differential ampliﬁer. Rf + jωRf Cx Vi = Vin-phase + jVquad-phase Rx (1) two complementary square-wave signals from a single square wave. 2.g. This is equivalent to multiplying the input signal by −1. i. Fig. When the input voltage Vi is a sine wave. If Vin-phase and Vquad-phase can be measured by a PSD unit. The output of the circuit Vo consists of two components. When S1 and S4 are closed (on) and S2 and S3 are open (off). it will not affect the impedance measurement. it also has no effect on the impedance measurement. this measuring circuit is stray immune [9]. π (7) A. with 90◦ phase shift [18] Vo = − where Vin-phase Vquad-phase Rf =− Vi Rx = − ωRf Cx Vi . It consists of an op-amp and a switch-driving circuit. with a very small output impedance. Therefore. π < ωt < 2π . ωRf Vi Vi (4) (5) When a low-pass ﬁlter (LPF) with a sufﬁciently low cutoff frequency is used.CHEN et al.. It consists of a TTL buffer and an inverter. 3 shows the overall diagram of an impedance measurement circuit with switching-based PSD.: DESIGN OF IMPEDANCE MEASURING CIRCUITS BASED ON PSD TECHNIQUE 1277 Fig.e.. This is equivalent to multiplying the input signal by +1. The switch-driving circuit is used to provide This result indicates that the output of the PSD circuit is a function of not only the amplitude of the input sine-wave signal A but also the phase φ between the input sine-wave signal and the reference square wave. In Fig. switching-based PSD and analog multiplier-based PSD. namely. An optimally designed . then Rx and Cx can be determined by Rx = − Rf Vin-phase Vquadrature-phase Cx = − . Switching-based PSD circuit. one being in-phase and the other being quadrature-phase. the in-phase component Vin-phase represents the unknown resistance Rx . the PSD circuit functions as an inverting ampliﬁer. 3. The two complementary square-wave signals drive either switches S2 and S3 to be closed (on) and switches S1 and S4 to be open (off) or switches S2 and S3 to be open (off) and switches S1 and S4 to be closed (on). ADG412) are used to control the demodulation process. The phase shifter can be adjusted to produce 0◦ and 90◦ phase shifts alternatively. (6) (2) (3) Obviously. In Fig. the average output of the PSD circuit can be calculated by ⎛ π ⎞ 2π 1 ¯o = ⎝ Vo dωt + Vo dωt⎠ V 2π ⎡ 1 ⎣ = 2π = 0 π π 2π ⎤ A sin(ωt + φ)dωt⎦ A sin(ωt + φ)dωt − 0 π 2A cos φ. When S2 and S3 are closed (on) and S1 and S4 are open (off). the PSD circuit functions as a unity-gain noninverting ampliﬁer. the basic impedance measuring circuit is the same as in Fig. 1. Four CMOS switches in a single IC (e. 0 < ωt < π −Vi = −A sin(ωt + φ). and the quadrature-phase component Vquad-phase represents the unknown capacitance Cx . Because stray capacitance Cs1 is driven directly by the voltage source.

Impedance measuring circuit with switching-based PSD. (12) (13) . The in-phase reference voltage signal with angular frequency ω2 is sent to the upper analog multiplier to produce the resistive component.1278 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT. and thus. in which two function generators are used to generate sine waves with different angular frequencies ω1 and ω2 . 4. 5 shows a new impedance measuring circuit with dualfrequency PSD. 4. Analog Multiplier-Based PSD Although the switching-based PSD can be used to measure the impedance. Rx and Cx can be determined by Rx = Cx = kA2 Rf ¯oR 2V ¯oC 2V kA2 ωRf (18) . The input of the basic impedance measuring circuit in Fig. 3. 60. In some measurement systems. 2AωRf (8) (9) (16) (17) ¯oR represents the unknown resistance Rx and V ¯oC where V represents the unknown capacitance Cx . Fig. the basic impedance measuring circuit is the same as in Fig. Fig. When the phase shift is 90◦ . A quadrature-phase reference voltage signal with angular frequency ω1 is sent to the lower analog multiplier to produce the reactive component. Impedance measuring circuit with analog multiplier-based PSD. NO. 4 shows the overall diagram of the impedance measuring circuit with analog multiplier-based PSD. it is difﬁcult to obtain accurate measurements of both the reactive and resistive components at a single frequency. The output is sent to two analog multipliers at the same time. When the phase shift is 0◦ . Dual-Frequency PSD Due to the diversity and variability of the measured object. respectively Vf R = A sin(ωt) Vf C = A cos(ωt). VOL. In Fig. An adder is used to produce a composite waveform and then send it to the basic impedance measuring circuit. which will affect the accuracy of the impedance measurement. the CMOS switches have a time delay when they switch from on to off or from off to on. To achieve accurate measurements. the output of the analog multiplier can be expressed by VoR = kVo Vf R kA2 Rf kA2 ωRf Cx sin(2ωt) =− [1 − cos(2ωt)] − 2Rx 2 (14) VoC = kVo Vf C kA2 Rf 1 =− sin(2ωt) − kA2 ωRf Cx [cos(2ωt) + 1] 2Rx 2 (15) where k is the proportional coefﬁcient of the analog multiplier. Rx (11) The other input signal as a reference signal of the analog multiplier can be expressed by (12) and (13) when the phase shifter is adjusted to produce 0◦ and 90◦ phase shifts. 4. the dc output of the measuring circuit is the quadrature-phase component Vquad-phase . the output of the impedance measuring circuit can be expressed by Vo = − ARf sin(ωt) − AωRf Cx cos(ωt). The phase shifter can be adjusted to produce 0◦ and 90◦ phase shifts alternatively. (10) C. Let us assume that the output of the function generator is Vi = A sin(ωt). only the resistive part of the impedance is recovered [19]. Thus. fourth-order Butterworth LPF can provide 60-dB attenuation with 14-μs settling time when the frequency of the sine-wave input is 500 kHz. (19) B. and some useful information is lost. When the passband gain of the LPF is −1. the measured resistance Rx and capacitance Cx would change in a large range. Because the impedance of a capacitor will change with frequency. Inevitably. Fig. the dc output of the measuring circuit is the in-phase component Vin-phase . Rx and Cx can be determined by Rx = Cx = 2ARf πVin-phase πVquadrature-phase . 5 can be expressed by Vi = A1 sin(ω1 t) + A2 sin(ω2 t + θ). only the dc component is remained. When the passband gain of the LPF is −1. APRIL 2011 Thus. (20) According to (1). where θ is the initial phase. it is sensitive to the phase error. 1. the dc output of the impedance measuring circuit can be expressed by ¯oR = kA Rf V 2Rx 2 ¯oC = kA ωRf Cx V 2 2 Fig. This circuit can be used to measure the capacitance and resistance in parallel at the same time. An analog multiplier-based PSD unit usually has better performance than a switching-based PSD unit. a dualfrequency approach has been adopted [19]–[21].

+ (24) 2 Fig. The reference voltage signal of two analog multipliers can be expressed by Vf R = A2 sin(ω2 t + θ) Vf C = A1 cos(ω1 t). 5. The output of the upper analog multiplier is VoR = kVo Vf R kA2 Rf =− Rx (22) (23) A1 cos(ω1 t − ω2 t − θ) 2 A1 cos(ω1 t + ω2 t + θ) − 2 A2 A2 − cos(2ω2 t + 2θ) + 2 2 ω1 A1 sin(ω1 t + ω2 t + θ) − kA2 Rf Cx 2 ω1 A1 + sin(ω1 t − ω2 t − θ) 2 ω2 A2 sin(2ω2 t + 2θ) . circuit. Experimental Results With Switching-Based PSD and Analog Multiplier-Based PSD ω1 A1 ω1 A1 cos(2ω1 t) + 2 2 + ω2 A2 cos(ω1 t + ω2 t + θ) 2 ω2 A2 cos(ω1 t − ω2 t − θ) . + 2 (26) The impedance measuring circuits with switching-based PSD and analog multiplier-based PSD were tested under the . (29) The output of the lower analog multiplier is VoC = kVo Vf C =− kA1 Rf Rx A1 A2 sin(2ω1 t) + sin(ω1 t + ω2 t + θ) 2 2 − − kA1 Rf Cx A2 sin(ω1 t − ω2 t − θ) 2 It can be seen from (28) and (29) that the measurement results are independent to either the initial phase θ or the angular frequency ω2 . Input and output voltage waveforms of the analog multiplier. V 2 (27) ¯oR can be obtained by an LPF with the Its dc component V passband gain of −1 ¯oR V kA2 2 Rf = .CHEN et al.: DESIGN OF IMPEDANCE MEASURING CIRCUITS BASED ON PSD TECHNIQUE 1279 Fig. III. the output of the basic impedance measuring circuit can be expressed by Vo = − Rf [A1 sin(ω1 t) + A2 sin(ω2 t + θ)] Rx (21) Fig. E XPERIMENTAL R ESULTS AND E RROR A NALYSIS Several combinations of capacitors and resistors were measured by the impedance measuring circuits. Input and output voltage waveforms of the switching-based PSD − Rf Cx [ω1 A1 cos(ω1 t) + ω2 A2 cos(ω2 t + θ)] . Impedance measuring circuit with dual-frequency PSD. 2Rx (25) Thus. ¯oC can be obtained by another LPF with Its dc component V the passband gain of −1 2 ¯oC = kA1 ω1 Rf Cx . 6. Their true values were calibrated by an impedance analyzer HP4192A. the unknown resistance Rx and capacitance Cx can be determined by Rx = Cx = kA2 2 Rf ¯oR 2V ¯oC 2V kA2 1 ω1 R f (28) . 7. A. According to (1)–(3).

input sine-wave voltage A1 and A2 are 1 and 5 V. Rm and Cm are the measured values. which are dc signals. APRIL 2011 TABLE I E XPERIMENTAL R ESULTS W ITH S WITCHING -BASED PSD TABLE II E XPERIMENTAL R ESULTS W ITH A NALOG M ULTIPLIER -BASED PSD following conditions. 1) The peak value of the input sine-wave voltage A is 5 V. which is mainly caused by the time delay . B. 4) The proportional coefﬁcient of the analog multiplier k is 0. The experimental results of the two impedance measuring circuits are shown in Tables I and II. respectively.1. respectively. The input and output voltage waveforms (before the LPF) of the switching-based PSD circuit and the analog multiplier are shown in Figs. in which Rx and Cx are the true values of the measured resistance and capacitance. and the following is the output). 8. Output voltage waveforms of two multipliers. respectively (the above is the input. NO. Their full amplitude range is 10 Vp-p with a frequency range from 1 kHz to 1 MHz. LPFs are designed to extract their average. and Er and Ec are the relative errors of the resistance and capacitance. respectively. The full-scale output range of the measuring circuit is dc 10 V. The dc output voltage of the impedance measuring circuit is measured by a multimeter HP34401A. Experimental Results With Dual-Frequency PSD The resistance Rx and capacitance Cx with the true values of 9.93 kΩ and 0.93 nF were measured by the impedance measuring circuit with dual-frequency PSD when the feedback resistance Rf is 1 kΩ. 6 and 7. the accuracy of the impedance measuring circuit with switching-based PSD is inﬂuenced by the phase error. Table IV shows the experimental results when both A1 and A2 are 5 V. C. 3) The feedback resistance Rf is 10 kΩ. Fig. 2) The frequency f is 1 kHz.1280 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT. respectively. 4. VOL. The input signals are generated by two function generators HP33120A. Error Analysis As commonly understood. 8 shows the output voltage waveforms of two multipliers when the frequencies of two input signals f1 and f2 are 10 and 1 kHz. The dynamic range of this impedance measuring circuit is determined by the amplitude and frequency of two sine-wave input signals. which should be adjusted according to the measured impedance. 60. Table III shows the experimental results when the peak values of the Fig.

10. then. 9 and 10. and it will increase sharply with this ratio. a simulation of the impedance measuring circuit with switching-based PSD reveals that the main reason of the impedance measuring error is the mismatch of the measured resistance and capacitance in parallel. The dual-frequency PSD can be used to overcome this problem by changing frequency f1 (used for the measurement of the capacitance) to adjust the ratio of resistance and capacitance. Relative measurement error of the capacitance. of the CMOS switches and the inﬂuence of the input capacitance of the op-amp in the basic impedance measuring circuit. f2 should be larger than 1 kHz. Although frequency f2 (used for the measurement of the resistance) can be as low as 5 Hz in this impedance measuring circuit. However. in which R and XC are the impedances of the resistor and capacitor. an LPF with a lower cutoff frequency should be designed to eliminate the harmonics and measure the dc component. The relative measurement errors of the resistance (Er ) and capacitance (Ec ) are shown in Figs. Because the data acquisition rate of an impedance measuring system is affected by the time constant of the LPF. respectively. 9 and 10 that the relative measurement errors of the resistance and capacitance reach the minimum at the same time when the ratio of resistance and capacitance is one. .: DESIGN OF IMPEDANCE MEASURING CIRCUITS BASED ON PSD TECHNIQUE 1281 TABLE III E XPERIMENTAL R ESULTS W ITH D UAL -F REQUENCY PSD AND F IXED f1 TABLE IV E XPERIMENTAL R ESULTS W ITH D UAL -F REQUENCY PSD AND F IXED f2 Fig.CHEN et al. Relative measurement error of the resistance. Because the resistor and capacitor are in parallel. there will be a bigger error because of the nonideality of the opamp. a smaller current will ﬂow through the bigger impedance. 9. respectively. Fig. It can be seen from Figs. The accuracy of the impedance measuring circuit with analog multiplier-based PSD is inﬂuenced by the nonlinearity and accuracy of the analog multiplier.

[15] R. H. Buxton. X. degrees from the National University of Defense Technology. pp. Yang. no. vol. H. Aug. and the 2000 IEE Ayrton Premium and was a 2009 IET Innovation Award Finalist. Wang. S. 2008. pp. His main research interests include industrial process tomography. Korjenevsky and T.” Flow Meas. Fan. Yang. vol. After being a Lecturer for three years at Tsinghua University. including review articles. Meas. A. [17] A. Dec. Q. Johansen.” Ind. Jul. pp.” in Proc. Nov.” in Proc. Meas. Phys. vol. S. pp. Eng. 1996. 2001. Technol. vol. intelligent instruments.. Cusick. 133–139. 13. L. and Y. no.” Physiol. When the capacitance is measured..Sc. no. 183–191. He is a Referee for over 30 professional journals. Having analyzed their measurement errors. L. IEEE EMBS.. Apr.. no. Li. Warsito. Jan. W. . a Subject Advisor to the British Council Advisers College. Conf. pp.” Meas. Actuators A. image reconstruction. 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U. no. sensing and data acquisition systems. 21. a Visiting Professor at four universities. 1995. Froystein. [19] A. K. Changsha. and nondestructive testing. “Static characterization of a dual sensor ﬂow imaging system. 2007.” Meas. Ind. 11. 2010. Primrose and C. 1066–1069. “Precision constant current source for electrical impedance tomography.” Physiol. Schlaberg. “A dual sensor ﬂow imaging tomographic system. 4. Sci. no.. B. in 1992.K.. Smith. S. no. Phys. a Science Advisor to the Chinese Academy of Sciences. Mexico.. M. APRIL 2011 IV. pp. “Design of high-speed ECT and ERT system. J. Sci. Z. Woo. “Analysis of non-ideal characteristics of an ac-based capacitance transducer for tomography. 2010. He was the recipient of the 1997 IEE Measurement Prize. Holder. Sep. Technol. Oh. and H. 1999. J. L. 1–7. 156–161. “Application and data fusion of different sensor modalities in tomographic imaging. 909–915. 147 . 124. 297–307. E. Q. Lee. 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Wuqiang Yang (SM’05) received the B. Yan. vol. Oh. and a Qualiﬁed Expert in Intota (USA). Yang became a member of the Institution of Electrical Engineers (IEE) in 1997 and a fellow of IEE in 2004. Int. in 1992 and 2009. T. 1992. vol. and W. S183–S196.5% as conﬁrmed by experiment. Dixiang Chen received the B. H. J. He is currently an Associate Professor with the National University of Defense Technology. S197– S215. Meas. Technol. pp. He is currently a Vice Director of the Department of Instrument Science and Technology. He has published over 100 scientiﬁc papers. 1054–1062. a suitable impedance ratio between the resistor and capacitor can be achieved. Koo. He is recognized by the International Center for Scientiﬁc Research (France) as one of the top 30 technology researchers in the world. pp. vol. M. vol. J. Physiol. degrees from Tsinghua University. He is currently an IEEE Instrumentation and Measurement Society Distinguished Lecturer. vol. 9. Du. Aug. which can improve the measurement accuracy of the resistance. Jul. no. and H. Tech. Wang.” Meas. 232– 239. respectively. Koukourlis. Sci. no. vol. “Teaching phase-sensitive demodulation for signal conditioning in lab to 2nd year undergraduate students. no. Sep. pp. it has been found that the mismatch of the measured resistance and capacitance is the main source of impedance measurement error. 7/8.. and 1988. 4.. Lee.” Meas. M.1282 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT. Woo. “Calibration methods for a multi-channel multi-frequency EIT system.D. vol.. U. 2009. 3. no. VOL.. Boone and D. no.” Physiol. Cancun. York. which can improve the measurement accuracy of the capacitance. 1st World Congr. Freeston. He has published over 250 scientiﬁc papers. E. no. Sep. and a Panel Member of the Natural Science Foundation of China. Symp. 184–190. Prof. Technol. 10. 28.. Wang. vol. China. “Differential synchronous demodulation for electrical impedance tomography. Holder. Jia. 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