Patch Antenna Design Using Ansoft Designer

Tony Donisi Ansoft Corporation

Slide 1

Goal: To introduce a more effective and streamlined design flow for systems with patch antennas that leverage Parameterization, Solver-OnDemand and Co-Simulation

Overview Single Patch Element Design Linear Patch Array Corporate Fed Patch Array System and Circuit Integration Conclusion

Slide 2

Designer Capability Overview
Designer can accurately simulate very large structures, quickly!
SVD fastsolve Low memory requirements

Geometries can be drawn or imported
User friendly GUI Dxf, iges, and popular geometry imports Ansoft Links for Allegro and other CAD tools

Full Parameterization Solver on Demand
The ability of designer that lets the user decide which solver to use on an element by element basis

The capability of designer to seamlessly integrate circuit, system and EM simulations

Slide 3

Single Patch Design
Designer allows easy design of single patches
Patch estimator tool gives a good first approximation

Fully parameterized single patch will be created
Solution for a range of geometries

Patch characteristics will be plotted
Functions of geometry, Frequency Current and field distributions Plots can be animated

Real time tuning Both 2D and 3D plotting available

Slide 4

Patch Estimator Tool
Integral patch estimator tool

Slide 5

Single Patch: Recessed feed Rin = π 1 Cos 2 ( L slot ) 2(G1 ± G12 ) LPatch π 2 WPatch  Sin(k 0 WpatchCosθ )  Sin3θdθ   ∫ Cosθ  G1 = 0  2 120π π  Sin(k 0 Wpatch Cosθ )  1 3 G12 =  J0 (k 0L patch Sinθ )Sin θdθ 2 ∫ 120π 0  Cosθ  2 LPatch WSlot LSlot Wf1 Lfeed Wfeed Zin ThisPatch Patchcan canbe beused usedas aseither eitheraafull full This planarEM EMmodel modelor oraa“Solver “Solveron on planar Demand”component component Demand” Slide 6 .

Single Patch Design Procedure Use Patch Estimator to get starting point 10mil Duroid 5880 Frequency 10GHz Resulting Width and length 393 mil Also gives a starting point for Lslot Nominal patch frequency response Lslot and Wslot will have minimal effect on center frequency Adjust Wpatch if necessary Vary Lslot and Wslot to get Best VSWR Assume 100Ω Lslot from 10mil to 100 mil Wslot from 30mil to 150mil Edge meshed to concentrate at Edges Slide 7 .

As As the Wpatch. Frequency response is Frequency response is not centered at 10GHz not centered at 10GHz Sweep of Frequency and Sweep of Frequency and Wpatch. itit is obvious that LSlot will is obvious that LSlot will need further adjustment need further adjustment Slide 8 . Note Note and LSlot. frequency increases.Single Patch Frequency Sweep Sweep of Frequency Sweep of Frequency and LSlot. the frequency increases.

Slide 9 .Single Patch Optimization Designer allows the user to optimize with respect to any variable. Including field quantities.

width Optimal Match Optimal Match (100 Ω at (100 Ω )) at Wslot = 50mil Wslot = 50mil Lslot=127mil Lslot=127mil Slide 10 .Single Patch Parameter Results Smithplot plotof ofinput inputMatch MatchVersus VersusSlot Slot Smith widthand andlength. length.

Single Patch Scalar Return Loss Parametricsweep sweepof ofreturn returnloss loss Parametric withrespect respectto toWslot Wslotand andLslot Lslot with Slide 11 .

Single Patch Real Time Tuning Slide 12 .

Single Patch Far Field & Near Field Slide 13 .

Patch Arrays Patches can be arranged various Arrays Two examples will be shown “Linear” array Both x.patches variable Corporate Array Arrays will be built with previous patches 100Ω impedance Feed networks will be considered Feeds have impact on antenna performance Many.and y. many feed designs Slide 14 .

Patch Array Feed Networks Co-linear feed network Straightforward Extension to other feed styles Patch Patch Patch Patch Vias Designer has no restrictions on vias This presentation will not take into effect vias Vias and feeds on other layers are simple to add Input Matching Matching Matching Matching Patch Patch Ω)) (100Ω (100 λ /4 /4 λ Transformer Transformer Patch Patch (100Ω Ω)) (100 λ /4 /4 λ Transformer Transformer Patch Patch (100Ω Ω)) (100 100Ω Ω Line Line 100 Input Slide 15 100Ω Ω Line Line 100 .

Linear Array “Patch” antenna with feed Patch dimensions as previously outlined Quarter wave transformers The number of patches can be large nx Set as “number of x-dimension” Patches ny Set as “number of x-dimension” Patches Quarter Wave transformer sections. Width and length parameterized for user optimization dx Lf1 dy W01 Lf1 Lambda4 Slide 16 .

Analysis Overview One structure can represent Circuit Planar EM Circuit provides quick analysis Match and VSWR information Planar EM provides Fields Full match and VSWR information Near field and far field information Current Distributions A sample patch array is built to utilize: Solver on demand Equivalent Circuit modeling Full parameterization Parameter passing Slide 17 .

Component Description The Patch Array will consist of: Component Represents the overall patch Contains parameters. circuit equivalent Footprint Contains geometry information Can be scripted in VB or Java Full script of patch can be found in appendix Symbol Schematic representation of patch Circuit equivalent Slide 18 .

6.Design Procedure 1. design. 2. Determine Geometry and parameters Create parameterized footprint Standard drawing of polygons or shapes VBscript or JavaScript 3. or Slide 19 . 5. 4. Create circuit equivalent Create symbol Generate component Optional: Create circuit equivalent Once this this is is done done the the user user has has a a flexible flexible ““ Solver on on Once Solver Demand component that that can can be be used used as as a a versatile versatile Demand ”” component stand alone alone design or or as as part part of of a a larger larger scale scale circuit circuit ““ stand ”” design orsystem systemdesign.

50Ω. 8 mil. 17mil. 30mil Contains parameters. 70.2 RT Duroid 50Ω. circuit equivalent λ/4 = 218 mil The spacing between elements is important “Orthogonal” pattern Normal to x-y plane Patch elements must be fed in phase Feeding the patches in phase will make the pattern orthogonal to the x-y plane.7Ω. nx = 4 (4 elements) nominal Same “patch” as previously designed 10mil. This will occur when the separation is an integral multiple of a wavelength Slide 20 . ε2.Patch Array Design One row.

dx= dx=600mil 600mil N=4.Performance Plots ReturnLoss Loss Return GainVs Vsdx dx Gain Slide 21 N=4. Nominal Nominal .

Swept Plots Effect of of varying varying “dx” “dx” on on the the 3D 3D gain gain pattern. Effect from 500mil 500mil to to 1200mil. pattern. 1200mil. The The optimal optimal from gain/direction occurs between 800mil and 100mil gain/direction occurs between 800mil and 100mil Effect of varying “dx” versus frequency Effect of varying “dx” versus frequency Slide 22 .

beset setto tovariables variablesto to be allowfor forany anydesired desiredfeed feed allow pattern pattern Slide 23 .4-Element Phased Array Previously designed recessed patch Array of 4 elements Fully parameterized Input Phase and amplitude can be set to variables These can be modified to observe field patterns Designerallows allowsthe theuser user Designer tofeed feedthe theports portswith with to differentphases phasesand and different amplitudes. These Thesecan can amplitudes.

Slide 24 .Small Phased Array Animation Variables are set up for the four ports. based on the variable FeedControl. In this simple example. the ports toggle between 0 and 135¶ in a set pattern.

Corporate Fed Array A “corporate” array is a popular configuration Feed structure can affect performance Methods of analysis Infinite array Finite array without feed Finite array with feed Slide 25 .

Corporate Feed Patch Geometry Assume 4-Unit Cell Recessed Slot Patch Patch dimensions Calculated previously Wpatch dx Variable number of patches Lf1 dy WSlot LSlot W100 (0.0) Slide 26 .

Corporate Array Dimensions Fully Parameterized n 2 Unit Cells Square Array Single Feed Point Patch may be any dimension VBScript Generation Slide 27 .

Width and length parameterized for user optimization Slide 28 . located in appendix Quarter Wave transformer sections.Patch Geometry This patch was created with a VB script.

267 Unknowns 343M Ram 13 Minutes Slide 29 .Corporate Fed 8X8 Array Solution Details 21.

Corporate Fed 8X8 Array Details Solution Plots Slide 30 .

Corporate Fed 16X16 Array Solution Details 86. 54 Minutes Slide 31 .428 Unknowns 121M Ram 2 Hours.

Corporate Fed 16X16 Solutions Slide 32 .

Patch as an Infinite array Slide 33 .

System Co-simulation Slide 34 .

Circuit. System and EM Cosimulation Slide 35 .

Conclusion An improved design flow for systems with patch antennas has been presented Advanced features Parameterization Solver On Demand Co-Simulation Optimization Graphics and plotting Field and geometry plots and animations Integration with system and circuit tool Slide 36 .

Appendix: Patch Arrays Patches can be arranged various Arrays Two examples will be shown “Linear” array Both x.and y.patches variable Corporate Array Arrays will be built with previous patches 100Ω impedance Slide 37 .

Appendix: Linear Array “Patch” antenna with feed The “wide” sections are “patches”. narrow sections are the feeds The lengths of the patches are equal The lengths of the feeds are equal The widths of the patches can vary to form a “beam” The number of patches can be large Up to 16 patches Patch “n” W03 dx W01 W02 Wn Wfeed Lpatch Slide 38 .

3. Slide 39 . 4. design. 2. Determine Geometry and parameters Create parameterized footprint Create circuit equivalent Create symbol Generate component Once this this is is done done the the user user has has a a Once flexible ““ Solver on on Demand Demand flexible Solver ”” component that that can can be be used used as as a a component versatile ““ stand alone alone design or or as as versatile stand ”” design part of of a a larger larger scale scale circuit circuit or or system system part design. 5.Appendix: Design Procedure 1.

Appendix: Important Linear Patch Parameters A component can be set up with the following parameters: Lpatch W1 to W16 WFeed dx n These parameters fully define the patch element Slide 40 .

circuit equivalent Footprint Contains geometry information Can be scripted in VB or Java Symbol Schematic representation of patch Slide 41 .Appendix: Component Description The Linear Patch will consist of: Component Represents the overall patch Contains parameters.

A B C D E F Y Z Center “x” Point Chart Reference.0) Lfeed/2+Lpatch/2 Lfeed+Lpatch (3/2)*Lfeed+(3/2)*Lpatch 2*Lfeed+2*Lpatch (5/2)*Lfeed+(5/2)*Lpatch (n-. width and height. the centers of each of the patches/feeds will be determined. (0.Appendix: Determine Footprint Geometry Variables Since “rectangle” objects are determined by their center.5)*(Lfeed+Lpatch) n*(Lfeed+Lpatch) Lpatch dx B A Lfeed = dx-Lpatch C D E F Y Z Slide 42 .

Appendix: Creating a Footprint dx Slide 43 .

Appendix: Create Footprint Script Part 1 The script is broken into two parts for clarity The first part sets up variables The second part is the actual code Note that the code section is only a few lines One loop ‘Script Part 1 Defining all Variables Dim W1. W6.Pars.Item("n") Lpatch = LayoutHost. W10. x.Pars.Item("W07") Width(8) = LayoutHost. W15. pointsvar. pi.Item("W14") Width(15) = LayoutHost.Pars. width(20) set Pointsvar = LayoutHost.Item("Lfeed") idnum = LayoutHost.Item("W11") Width(12) = LayoutHost.Item("W16") Lfeed = LayoutHost. W3. W2.Pars. W13. W8 Dim W9.Pars.Pars.Item("W10") Width(11) = LayoutHost.Pars.Item("W09") Width(10) = LayoutHost.Pars.GetLayerID("anywhere") Slide 44 .Item("W13") Width(14) = LayoutHost.Pars.LayoutPars.Item("W04") Width(5) = LayoutHost. W4.Item("W01") Width(2) = LayoutHost.Item("W02") Width(3) = LayoutHost.Pars. W5.Item("dx") Width(1) = LayoutHost. W12.Item("W06") Width(7) = LayoutHost.Item("W03") Width(4) = LayoutHost.Pars. W11.Pars.Pars.Pars. W14.Pars.Item("Wfeed") dx= LayoutHost.Item("W12") Width(13) = LayoutHost.Item("W08") Width(9) = LayoutHost.Pars.Item("W15") Width(16) = LayoutHost. W7.Pars.Pars. Lfeed.Item("W05") Width(6) = LayoutHost.1415926535 n = LayoutHost.CreatePointsObject() pi = 3. idnum.Pars.Item("Lpatch") Wfeed = LayoutHost. W16 Dim Lpatch. n.Pars.

Wfeed. "n2".0.0 Lfeed.MovePort"n2".width(x). (x-.5)*(Lpatch+Lfeed). n*(Lpatch+Lfeed)+lfeed/2.0.width(x).0.Lpatch.0.pi pi LayoutHost.MovePort Slide 45 .Add ‘DrawFirst Firstline line ‘Draw layouthost.0.(Width(1)) pointsvar. "n1".(Width(1)) (n*(Lpatch+Lfeed)+lfeed/2).NewRect ‘MainLoop Loop ‘Main forxx= =11to tonn for ‘DrawPatches Patches ‘Draw layouthost.-1*lfeed/2.Add (n*(Lpatch+Lfeed)+lfeed/2).0 Lpatch.0.NewRect next next ‘ManipulatPorts Ports ‘Manipulat LayoutHost. idnum.(x-.00 LayoutHost.NewRectidnum.(x)*(Lpatch+Lfeed).Add (-1*lfeed/2).0.Lfeed.Wfeed.Appendix: Create Footprint Script part 2 ‘MainVB VBScript ScriptJust Justaafor/ for/Next NextLoop Loopwith withincremental incrementalParameters! Parameters! ‘Main ‘Createaa“Points” “Points”object objectto toDraw DrawFirst Firstline line ‘Create pointsvar.00 layouthost.(width(1)) pointsvar.Wfeed. (x)*(Lpatch+Lfeed). 0.0.5)*(Lpatch+Lfeed). idnum.NewRectidnum.MovePort"n1".0 layouthost. idnum.NewRectidnum. 0.Lfeed.n*(Lpatch+Lfeed)+lfeed/2. Lfeed.NewRect ‘DrawFeeds Feeds ‘Draw layouthost.0.(width(1)) (-1*lfeed/2).Wfeed. -1*lfeed/2.0.0 layouthost.Add pointsvar.MovePort LayoutHost.

Appendix: Create Circuit Equivalent A simple circuit equivalent could be made Electromagnetic simulation is very fast Largest problems SVD Fast Solve Low memory requirements Geometries may get very large Circuit equivalent is a good method to speed solution Gives S-parameter equivalents Demonstrates Designer’s flexibility Slide 46 .

Appendix: Equivalent Circuit Purely optional Some designers prefer electromagnetic analysis only May consist of any circuit element Can be as simple as a single resistor Can be as complex as user can describe Is formed as a “Netist” line Slide 47 .

Appendix: Netlist Basics To complete the component. a Netlist line will be added Circuit simulations run much faster than Planar EM simulations It is desirable to have a circuit equivalent even if its just an approximation Designer is a “Netlist” based program All simulations run the engine through a netlist This netlist is Spice compatible where applicable The circuit geometry is similar to 3 to 33 “microstrip” transmission lines Transmission lines are well characterized within the circuit solver Between each transmission line. there may be a “step discontinuity” The “circuit equivalent would look like: Slide 48 .

2 feed lines. and 3 steps Provisions must be made in the netlist to “remove” components that are not used Accomplished by setting “lengths” of the unused lines to Lpatch/1000 “Widths” of the Unused transmission lines set to Wfeed “Unused” transitions take care of themselves “Worst case” (n=1) Total of 30 lines “hanging” off end of the model Total length of Lpatch *30/1000 This is an insignificant amount Slide 49 .Appendix: Geometric Variable Setup The “largest” structure (n=16) contains 16 patches and 17 Feeds : Total 33 Transmission lines One “step discontinuity between each line Total 32 Steps The smallest Structure (n=1) contains: 1 patch.

or set to a small value. Lpatch/1000 as discussed “If” statements will be used to define the lengths and widths Slide 50 .Appendix: Geometric Variable Setup Variables We1 through we33 represent widths of each line The “odd” numbers represent feeds They will all have the width “wfeed” The “even” numbers of Wexx represent patch widths Dependent on the number of sections 16 sections. these transmission lines will be set to a length corresponding to the length of the patches & feeds. possibly 16 different width values Case 1: n = 1 Second line (first patch) set to width We1 Remaining sections set to a width of Wfeed Lengths are set to Lpatch/1000 Case 2: 1 < n <16 sections after the nth section are set to width Wfeed Therefore Transmission line 2 (first patch) will always be set to We1 Lengths of the lines will be defined as L1 through L33 Depending on the value of n.

so In order to netlist correctly. the backslash character must be put in front of the bracket or any other special character. @wfeed . wfeed. such as parenthesis. false) or We32= if(n<16. w16) The variable We32 The @ character preceding a variable name means that the variable is a “passed parameter” directly from the component We32@id= \{ if \( @n < 16 . true. Designer uses brackets for special functions. . @w16 \) \} The variable We32@id (no space) is the syntax that tells designer to assign a unique identifier to the variable We32 Slide 51 Open and closed brackets surround an expression in the netlist. This tells designer to netlist this character directly.Appendix: Typical Variable Property The if statement in the netlist line will have the syntax If (expression.

Line.Appendix: Component Setup Shown are the lines in the component and the netlist line In the component. Designer assigned a unique ID to it. and as explained. The underscore following the @ID tells designer to assign it a unique ID. To reference that variable in the netlist line. @id must follow the variable name MSTRL:1 Port1 inet_101 w= 10mil p= { 150mil . carriage .50mil } Sub=Alumina MSSTEP: inet_101 inet_1 W1= 10mil W2= 50mil sub=Alumina 62 more “lines” MSSTEP: inet_132 inet_32 W1= { We321 } W2= 10mil sub=Alumina MSTRL: inet_32 Port2 w=10mil p= { 150mil . The \n tells Designer to put carriage returns in the netlist Designer puts the carriage returns in the netlist Since it is a “multiple line” component. returns. and each element must have unique characters following the underscore. they will not be in the component. We32 was defined previously. text. each component must have a unique ID. Note Notethat that Netlist Designerputs putsin in Designer carriagereturns. Note Note Component thatthere therewill willbe beno no that carriagereturns. carriage The syntax for “defined” variables is different that that of the passed parameters.@Lpatch \} Sub=@sub Componenttext. carriage returns are for visuals in this presentation. These can be alpha-numeric MSTRL:@ID %0 %_101 w= @Wfeed p= \{ @dx . returns.50mil } Sub=Alumina Slide 52 NetlistLine.@Lpatch \} Sub=@sub \n MSSTEP:@ID_ca %_101 %_1 W1= @Wfeed W2= @W01 sub=@sub \n 61 more “lines” MSSTEP:@ID_bf %_132 %_32 W1= \{ We32@id \} W2= @wfeed sub=@sub \n MSTRL:@ID_af %_32 %1 w=@Wfeed p= \{ @dx .

feedline2. feedline2.Item("nx") Feedline2.(cy-lf1) Feedline2.CreatePointsObject() end if line build Set Feedline2= LayoutHost. "n1".feedline3 Dim width(20) if x=nx-2 then Feedline2.Add (cx-Wpatch/2).LayoutPars. "flat" n = LayoutHost.Pars.Add (-1*lambda4-w100-lf2+w70/2).(cy+Lcutout) wf2= LayoutHost.Add (-1*lambda4-w100).Pars.(-lf1-w100/2+w50/2) end if LayoutHost.Pars.Item("Linput") 'LayoutHost. Patchoutline Lcutout= LayoutHost.Add (-1*lambda4-w100-lf2+w100/2).(cy) lf2= LayoutHost. "corner".Item("Lpatch") Feedline2.Item("n") Feedline2.Add (cx-W100/2).Item("dy") if y<>0 then PatchOutline.((y-1)*dy-lf1+w100/2) PatchOutline.MovePort "n1".NewLine idnum. x.Pars.SetPortWidth idnum.(y*dy-lf1-w100/2) PatchOutline.Item("WSlot") end if LayoutHost.CreatePointsObject() end Sub 'Draw patch ….Item("wf2") call clearlines PatchOutline. feedline2.Add (cx+W100/2). feedline2.Add (-1*lambda4-w100-lf2+w100/2)-linput-w100/2.(cy-lf1) Feedline2.GetLayerID("anywhere") '***Draw input Feed .W50. "flat" PatchOutline.Add (cx-W100/2). Set Feedline3= LayoutHost.feedline2.(-lf1w100/2+w50/2). "corner".(cy) W100= LayoutHost.(cy) next ‘nx Lfeed = LayoutHost. "flat" PatchOutline.Add (cx).NewLine Qwave.(cy+Lpatch) dy= LayoutHost. (-1*lambda4-w100-lf2+w100/2)-linput-w100/2.Pars. n. feedline2.Add (cx-Wpatch/2).Pars.CreatePointsObject() End Sub ' Clearlines Set PatchOutline=LayoutHost.Add (cx).W70.Item("lf2") Feedline2.Item("lf1") Feedline2. W50 if x<>nx-1 then Feedline2.W100.Add (cx+Wpatch/2).cy.. "corner".W70.Appendix Linear Patch Script Dim Lpatch.Pars. "corner".Pars. pi.Item("W100") PatchOutline.Add (-1*lambda4-w100-lf2+w70/2).(cy) Wcutout= LayoutHost.Pars.NewLine FeedL.Pars.(y*dy-lambda4-lf1-w100/2) PatchOutline.(y*dy-lf1) PatchOutline.Pars. "corner".Item("Lambda4") LayoutHost.Add (cx+WCutout/2).CenterZY) pi = 3.Add (-1*lambda4-w100-lf2+w100/2)-w100/2.W100.1415926535 Feedline2.Add (cx-Wcutout/2).Item("W70") Feedline2. feedline2.Pars.(cy+Lcutout) W70= LayoutHost.Item("WPatch") '*** Draw Horiz Feeds Call drawpatch(dx*x.(cy-lf1) LayoutHost. W50 Slide 53 .Item("W50") Feedline2.NewLine FeedL.Add (cx+dx+w100/2). Lfeed. "flat" LayoutHost.Add (cx+dx-w100/2-lambda4).(-lf1-w100/2+w50/2) Feedline2. "corner".Item("Lfeed") Feedline2.Add (cx+dx-w100/2-lambda4). feedline2.Add (cx-Wcutout/2).dy*y) Linput= LayoutHost.CreatePointsObject() for y = 0 to ny-1 '*****Draw Vertical Feeds Sub DrawPatch( (w100/2). Cx and Cy are the coords Lpatch = LayoutHost.Pars.(cy+Lpatch) dx= LayoutHost.CreatePointsObject() call 'This routine will clear all feedlines and isclearlines to be used after each Set Feedline1= LayoutHost.(y*dy-lf1+(w70-w100)/2) Cx =CenterZX nx = LayoutHost.Pars.(cy-lf1) Next 'ny idnum = LayoutHost. "flat" call clearlines ' Manipulate Port LayoutHost.(y*dy-lf1) 'Patch Drawing Subroutine.NewLine Qwave.Pars.Pars.Add (-1*lambda4-w100-lf2).Add (-1*lambda4-w100).(y*dy-lambda4-lf1-w100/2) PatchOutline.Item("dx") PatchOutline.NewCircle idnum.Add (cx+WCutout/2).Add (-1*lambda4-w100-lf2+w100/2).(Wpatch/4) Feedline2.Item("ny") LayoutHost. pointsvar.(cy+Lcutout) wf1= LayoutHost. idnum.NewLine FeedL.(cy) lf1= LayoutHost.W100.Item("Wfeed") LayoutHost.Newpoly idnum. pi LayoutHost. "flat" Sub ClearLines Set Pointsvar = LayoutHost.(y*dy-lf1+(w70-w100)/2) Cy =CenterZy ny = LayoutHost. "flat" PatchOutline.(cy) W50= LayoutHost.feedline1.Add (cx+W100/2).Add (cx+Wpatch/2).(cy) Wfeed = LayoutHost.Item("wf1") LayoutHost.Item("LSlot") for x = 0 to nx-1 WPatch= LayoutHost.(cy+Lcutout) Lambda4= LayoutHost.NewLine FeedL. "corner".Pars.Pars.

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