ESR & low resistance test meter

As electrolytic capacitors age, their internal resistance, also known as "equivalent series resistance" (ESR), gradually increases. This can eventually lead to equipment failure. Using this design, you can measure the ESR of suspect capacitors as well as other small resistances.

Two elements of a 4066 quad bilateral switch (IC3c & IC3d) are alternately switched on by the complementary outputs of the J-K flipflop. etc. which is applied to the capacitor via a pair of probes. . Finally. the circuit generates a low-voltage 100kHz test signal. momentarily short the test probes together and adjust VR4 for 0mV at pin 6 of IC4. These switches direct alternate half cycles to two 1μF capacitors. Once again.Basically. with the result being a ±5V 100kHz square wave. Len Cox. One switch input (pin 11) is connected to +5V. removing most of the AC component of the signal and providing a simple "sample and hold" mechanism. The outputs (pins 9 & 10) of these two switches are connected together. Transfer the -5V from TP2 to TP1 and adjust VR2 until the same current (ignore sign) is obtained. Again. In more detail. ensure that all capacitors to be tested are always fully discharged before connecting the probes. the signal is limited by diodes (D3 & D4) before begin applied to the remaining two inputs of the 4066 switch (pins 2 & 3 of IC3a & IC3b). Remove the -5V from TP1. which divides the oscillator signal in half to ensure an equal mark/space ratio. Next. Series resistance is included to current-limit the signal before it is applied to the capacitor under test via a pair of test probes. set your meter to read milliamps and connect it between TP4 and the negative (-) DMM output. Its output drives a 4027 J-K flipflop. Forest Hill. Diodes D1 and D2 limit the signal swing and protect the 4066 outputs in case the capacitor is charged. That done. This is differentially amplified by op amp IC4 so that it can be displayed on a digital multimeter – 10Ω will be represented by 100mV. which should be around 2. An op amp then amplifies the voltage dropped across the capacitor’s series resistance and this can be displayed on a standard multimeter. Apply the probes to a 10W resistor and adjust VR3 for a reading of 100mV. To calibrate the circuit.1mA. inverter IC1d is configured as a 200kHz oscillator. A second pair of leads sense the signal developed across the probe tips. Vic. The 1μF capacitors charge to a DC level that is proportional to the test capacitor’s ESR. first adjust VR1 to obtain 100kHz at TP3. whereas the other (pin 8) is connected to -5V. set to your meter to read volts and connect it to the DMM outputs. 1Ω by 10mV. Apply -5V to TP2 and note the current flow.

3kHz free-running oscillator acts as the timebase.Bare bones ESR tester When teamed up with an oscilloscope. Transistor Q2 discharges the test capacitor during the "off" portion of the test cycle. ensuring a zero average DC component.6V. despite building this circuit. I did invest in the ESR meter described in the March and April 2004 issues of SILICON CHIP! . If accuracy is not critical. which means that an oscilloscope with a vertical sensitivity of 5mV can measure ESR down to 0. Therefore.1Ω or less. Finally. an ESR of 1Ω will produce pulses across the test capacitor of 50mV. A 555 timer (IC1) configured as a 2. Diodes D1 and D2 limit the maximum output voltage to approximately 0. this simple circuit provides a means of measuring capacitor ESR. which is adequate for most uses.7µs) pulses to the capacitor under test via a NAND Schmitt trigger (IC2) and transistor Q1. then the circuit could be powered from four AA batteries rather than from a regulated 5V supply. corresponding to an ESR of 12Ω. A 100Ω resistor in series with Q1 limits current flow to about 50mA. It provides narrow (7.

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