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ivt" Semester [B.Tech.] ETEC-203 PaperCode: Time:I YzHrs.

FIRST-TERM E XAI\{INATION SePt.r2007 Sub: Analog Electronics-- I Max. Marks: 30

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**EXAMINATION SECOND-TERM
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[B.Tech'] IIIRD Semester Paper Code:ETEC-207 Time: I VzHrs. Note: AttemptQ.No.l and any two more' Not'., 2001 -Sub: Analog Electronics I Mar. Marks:30

(2)

Q.1(a)Explainthea.c.andd.c.loadlinesofaCEamplifier. Au andR"' of cE, cc and cB amplifiersin ternrsof Ai, Ri, ) comparethe performance values' Give aPProximate :1-h"l ( c ) S h o w t h a t h r c :- ( 1 + h r c ) ;h l . : h i . ; h . . tb': h''

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**ExenalNATloN END'TERM DrcsrutunR-2001
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PaperCode:ETEC-207 PaperlD: 28207

Maximum Marks 75 (5) (5) ( 5) (5) ( 5)

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breakdown and comparethem' Define zenerbreakdown and avalanche for in a p-n junction diode- Derive an expression narrier potential Explain the formaiion of contactPotential. Wntiit'early effect?Explainbase width modulation' identifyA and B' toporigi"f i"i"".h of the four topologies feed back ampgtier List the fou.r a JFET' O"tiuu the relationbetweenVos and Vo of U N IT.I

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and explain' (3) for transistor Drawthe Ebers-Moll for a transistor. equation write the Ebers-Moll dividerbias voltage a in improved is how stability Definettrreedifferentsiauiiitvfactors.Explain (s.5) circuit. OR (5) for input impedance' derivethe equatiotr pair and Darlington of Draw the circuit (7.5) Derivethe necessaryequations' DetermineAV and R, of tne cilruit uno*n in Fig.3.

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(4) of UJT. theworking of UJT.Explain giving structure basic the diagram Draw source For trigger 150. of line_slo.pe hasa straight characteristics Fora SCR,tne ga[e-caihode of 0.5W, computethe gate source gate powerdissipation voltageof 20V and allowable v (5'5) resistance ************

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