You are on page 1of 3

Birla Institute of Technology and Science, Pilani Work-Integrated Learning Programmes Division First Semester 2011-2012 Course Handout

Course Number Course Title Instructors : SS ZG516 : Computer Organization and Software Systems : S P Vimal, Avinash Gautam, Naveen Goyal

Course Description: Programmer model of CPU; Basic concept of buses and interrupts; Memory subsystem organization; I/O organization; Concept of assembler, linker & loader; Types of operating systems; Concept of process; OS functions: Process scheduling, Memory Management, I/O management and related issues.

Scope and Learning Objectives Of The Course: This course introduces the students to systems aspects involved in software development. In particular, it focuses on basic hardware architectural issues that affect the nature and performance of software as well as those features of an operating system with which most systems software have to interact. At the end of this course, a student must not only be aware of various aspects of architecture and operating systems but also must be in a position to evaluate the effects of the same on high level software. In particular, students must be able to correlate environmental and performance related issues of high-level software with system level features of the architecture or an operating system.

Prescribed Text Book (S) T1. T2. Stallings William, Computer Organization & Architecture, Pearson Education, 8th Ed., 2010 A. Silberschatz, Abraham and others, Operating Systems Concepts, Wiley Student Edition, 8th Edition, 2008.

Reference Book (S) R1. J. Hennessy and D. Patterson. Computer Architecture A Quantitative Approach, Morgan Kaufman, 1990. William Stallings, Operating Systems Internals and Design Principles. Prentice Hall of India, 2001. Ida M Flynn and Ann M Mctoes, Understanding Operating Systems, Thomson Learning, 2006

R2. R3.

SS ZG516

(Course Handout)

First Semester 2011-2012

Page 2

Plan of Self-Study

Week Topics No. 1


Introduction: Computer Components, Functions, Interconnection Structures Computer Memory System Overview, Cache Memory Principles, Cache memory Design Considerations, Pentium 4 Cache Organization Internal Memory, External Memory Input/Output: I/O Modules, Programmed I/O, Interrupt driven I/O, DMA Instruction Sets Characteristics and Functions: Types of operands, x86 Data Types, Type of Operations, x86 Operation Types Instruction Sets Addressing modes and Formats: Addressing, x86 Addressing modes, Instruction formats, x86 instruction formats Control Unit

Learning Objectives

To understand a general purpose computers organization and architecture and the interconnection among those components this facilitates the information and control exchange. Learn the hierarchy of memory subsystems with an overview of type, technology, performance and cost factors. Cache, Internal and External memory are discussed in sequence.

Chapter/Section Reference to Text Book(s) T1. Ch. 1, T1. Ch 3.1-3.5

T1. Ch. 4.1-4.4

3 4

T1. Ch.5, 6 Learn various I/O Techniques, along with the interface requirements from OS and the external world Learn the designers and programmers view of the computer system with the help of machines instruction set and to discuss characteristics of instruction sets. Types of possible operations, addressing modes are discussed here. x86 Operation Types and Addressing modes will serve as an example. T1. Ch.7

T1. Ch. 10, 11

7-8

9 10

To understand the sequence of substeps (known T1. Ch 15,16 as cycles) that the computer go through in executing an instruction and to get into details of implementing them using hardwired and micro programmed approaches. Processor Structure and Learn the processor organization in detail with T1. Ch.12 Function: Processor and details register organization, instruction cycle. Register Organization, Learn the common technique used in the speed Instruction Cycle, Instruction up of execution known as Instruction pipelining Pipelining along with the associated issues w.r.t implementation Syllabus for Mid-Semester Test (Closed Book): Topics covered in Week No. 1 to 8 Structure of an Operating To understand the basic structure of a system, T2. Ch. 1 and 2 System need of operating system for a computing machine and the structure of an OS. Processes & Multithreaded To understand the notion of a process and to T2. Ch. 3 & 4 Programming understand the view of the system as if consisting of OS processes. Also benefits of having Multithreaded process and various multi threading models, issues are discussed

SS ZG516

(Course Handout)

First Semester 2011-2012

Page 3

Plan of Self-Study

Week Topics No. 11 12


Process Scheduling

Learning Objectives

13 14

15 16

Basic concepts in CPU scheduling, and algorithms are discussed Process Synchronization To learn various mechanisms to ensure the T2. Ch. 6 orderly execution of cooperating processes that share logical address space. Critical section problem and various software and hardware solutions to it are discussed here. Deadlocks Various methods to deal with deadlock viz T2. Ch. 7 deadlock prevention, deadlock avoidance & deadlock detection are discussed. Memory Management & To understand various ways of managing the T2. Ch. 8 and 9 Virtual Memory memory along with the hardware support and to understand virtual memory systems which allows the execution of a process which is completely not in the memory. File System Interface To learn various aspects of files, directory T2. Ch.10 structures, techniques to handle file protection, files sharing among processes I/O Systems and Mass To understand the physical structure of mass T2. Ch.12 and 13 Storage storage, disk scheduling mechanisms and its management, I/O hardware, I/O services provided by an OS. Syllabus for Comprehensive Exam (Open Book): All topics given in the Plan of Self Study

Chapter/Section Reference to Text Book(s) T2. Ch. 5

Evaluation Scheme: EC Evaluation Component & No. Type of Examination EC-1 Assignment/Quiz EC-2 Mid-Semester Test (Closed Book)* EC-3 Comprehensive Exam (Open Book)*

Duration TBA 2 Hours 3 Hours

Weightage 10% 30% 60%

Day, Date, Session, Time TBA Sunday, 04/09/2011 (AN)* 2 PM 4 PM Sunday, 30/10/2011 (AN)* 2 PM 5 PM

* Legend: AN: AfterNoon Session; FN: ForeNoon Session; TBA : To be announced Closed Book Test: No reference material of any kind will be permitted inside the exam hall. Open Book Exam: Use of any printed / written reference material (books and notebooks) will be permitted inside the exam hall. Loose sheets of paper will not be permitted. Computers of any kind will not be allowed inside the exam hall. Use of calculators will be allowed in all exams. No exchange of any material will be allowed.

Note:
It shall be the responsibility of the individual student to be regular in maintaining the self study schedule as given in the course handout, attend the online/on demand lectures as per details that would be put up in the BITS WILP website www.bits-pilani.ac.in/dlp-home and take all the prescribed components of the evaluation such as Mid Semester Test and Comprehensive Examination according to the Evaluation Scheme given in the respective Course Handout. If the student is unable to appear for the Regular Test/Examination due to genuine exigencies, the student must refer to the procedure for applying for Make-up Test/Examination, which will be available through the Important Information link on the BITS WILP website on the date of the Regular Test/Examination. The Make-up Tests/Exams will be conducted only at selected exam centres on the dates to be announced later.

Instructor-in-charge

You might also like