Six Leg DVR Topology for Compensation of Balanced Linear
Loads in Three Phase Four wire System
Pradeep Kumar Niranjan Kumar A.K.Akella
kumarcs08@gmail.com nknitjsr@gmail.com akakella@indiatimes.com
+919905205302 +918002857194 +919431952816
Department of Electrical Engineering, National Institute of Technology Jamshedpur, Jharkhand 831014(India)
Abstract  This paper presents Dynamic Voltage Restorer (DVR) as a new compensation scheme for power quality
improvements in terms of power factor correction and harmonic mitigation for a threephase fourwire distribution
system, supplying a star (Y) connected balanced RL load. The Dynamic Voltage Restorer (DVR) is a custom power
device used to protect sensitive loads in power distribution systems from the most frequent voltage disturbances,
such as sags, swells, imbalances, harmonics and low power factor. Indirect Proportional Integral Controller (IPIC)
and Synchronous Reference Frame Controller (SRFC) are used to generate switching patterns for the Pulse Width
Modulated (PWM) controlled Voltage Source Converter (VSC). The DVR system is implemented through extensive
simulation using MATLAB software with its Simulink and Power System Blockset (PSB) toolboxes. The proposed
Synchronous Reference Frame Controller (SRFC) is compared with the Indirect Proportional Integral controller
(IPIC) scheme and the superior features of this novel approach are established in this research work.
Keywords
Voltage source converter (VSC); Dynamic voltage restorer (DVR); Power quality (PQ); Custom power devices
(CPD); Synchronous reference frame controller (SRFC); Indirect proportional integral controller (IPIC).
1. Introduction
Industrial and commercial consumers of electrical power are becoming increasingly sensitive to the quality of
electrical power supply. When interruptions occur due to poor power quality problems, costs, including downtime,
defects, and loss of production may occur. This would result in losses, in term of money to both commercial and
domestic consumers. Therefore, the study of power quality problem is becoming a popular research topic. It has
already been shown that for customers of large loads (from a high kVA to the low MVA range) good solutions are the
installation of custom power devices (Ghosh and Ledwich,2002;Hingorani,1995). Dynamic voltage restorer (DVR) is
one of the custom power devices for the power factor correction and harmonic mitigation. The DVR injects three
phase compensating voltages in series to the power line through a threephase series transformer or three singlephase
series transformers. The energy required for the compensation is taken from the dc capacitor (AlHadidi et al. 2008;
Gole et al. 2008) or another energystorage element such as a doublelayer capacitor, a superconducting magnet
(Lamoree et al. 1994) , or a leadacid battery (Ramachandaramurthy et al. 2002) . Otherwise it may be taken from the
power system by the shunt converter (Wang and Venkataramanan, 2009; Saleh et al. 2008). There are many control
techniques that are used to compute the command voltage component, such as in (Vilathgamuwa et al. 2002) showed
the open loop control strategy, closedloop control (EtxeberriaOtadui et al. 2002; Ghosh and Joshi, 2002; Liu et al.
2002) , multiloop feedback control (Nielsen et al. 2001), selective harmonic closed loop control (Newman et al.
2003) and vector control (Awad et al. 2003). This paper proposes the Indirect Proportional Integral and Synchronous
Reference Frame control scheme for improving dynamic performance of dynamic voltage restorer (DVR) specially
power factor improvement. The performance of dynamic voltage restorer is illustrated with the help of case study
2
comprising a three phase source supplied to the three phase star (Y) connected balanced RL load (Padiyar, 2007) . A
new topology of dynamic voltage restorer is proposed for a threephase fourwire distribution system, which is based
on threeleg voltage source converter and sixleg voltage source converter for the Indirect Proportional Integral (PI)
and synchronous reference frame control scheme respectively. The voltage source converter compensates the
harmonic voltage, reactive power, and improves the power factor on source side. The insulated gate bipolar transistor
(IGBT) based voltage source converter is selfsupported with a dc bus capacitor. Comparative assessments of the
performance of dynamic voltage restorer (DVR) feeding linear loads, without DVR and with DVR are presented.
After giving introduction in this section 1, section 2 describes different components of DVR System. Section 3
presents control strategies based on Indirect Proportional Integral (IPI) and Synchronous Reference Frame (SRF).
Section 4, discusses a case study for the threephase fourwire distribution system employing dynamic voltage
restorer (DVR) as a power quality improvement device. In section 5 performances have been analyzed from the
obtained results under the condition for without DVR and with DVR and finally section 6 concludes the paper.
2. Dynamic Voltage Restoration
The configuration of a dynamic voltage restorer (DVR) is shown in Fig.1. The DVR can inject a (fundamental
frequency) voltage in each phase of required magnitude and phase. The DVR has two operating modes
1. Standby i.e. short circuit operation (SCO) mode where the voltage injected has zero magnitude.
2. Boost i.e. DVR injects a required voltage of appropriate magnitude and phase to restore the prefault load bus
voltage.
The power circuit of dynamic voltage restorer (DVR) is shown in Fig. 1 has four components listed below:
Fig. 1. Dynamic Voltage Restorer
2.1 Voltage Source Converter (VSC)
Voltage source converter (VSC) is commonly used to transfer power between a dc system and an ac system or back
to back connections for ac systems with different frequencies, such as variable speed wind turbine systems (HU et al.
2008). A dc capacitor is connected on the dc side to produce a smooth dc voltage. The switches in the circuit are
controllable semiconductors, such as insulated gate bipolar transistor (IGBT) or power transistors.
3
2.2 Boost or Injection Transformers
Three single phase transformers are connected in series with the distribution feeder to couple the voltage source
converter (VSC) at the lower voltage level to the higher distribution voltage level. The three single transformers can
be connected with star/open star winding or delta/open star winding. The choice of the injection transformer winding
depends on the connections of the step down transformer that feeds the load.
2.3 Passive Filters
The filtering scheme in the dynamic voltage restorer can be placed either on the highvoltageside or the converter
side of the series injection transformer. The advantage of the converterside filter is that it is on the lowvoltage side
of the series transformer and is closer to the harmonic source. Using this scheme, the highorder harmonic currents
will be prevented from penetrating into the series transformer thus reducing the voltage stress on the transformer.
2.4 Energy Storage
Energy storage is required to provide real power to the load. The energy storage device used for this work is a DC
capacitor which is connected to the DC side of voltage source converter (VSC), carries input ripple current of the
converter and is the main reactive energy storage element. This capacitor could be charged by a battery source or
could be precharged by converter itself.
3. Control Strategies
The major objectives of these control strategies are to ensure that the load bus voltages remain balanced and
sinusoidal. Since the load is assumed to be balanced and linear, the load currents will also remain balanced and
sinusoidal. An additional objective is to ensure that the source current remains in phase with the fundamental
frequency component of the point of common coupling (PCC) voltage. In this work control strategies of indirect
proportional integral controller (IPIC) and a novel approach of synchronous reference frame controller (SRFC) have
been discussed.
3.1 Indirect PI controller
The controller input is an error signal obtained from the reference voltage and the rms value of the terminal voltage.
Such error is processed by a PI controller; the output is the angle δ, which is provided to the pulse width modulation
(PWM) signal generator. Fig. 2 shows that an error signal is obtained by comparing the reference (set) voltage with
the rms voltage measured at the load point. The PI controller processes the error signal and generates the required
angle to drive the error to zero, i.e., the load rms voltage is brought back to the reference voltage (Kumar and
Nagaraju, 2007).
Fig.2 . Indirect PI controller
4
From Fig. 3 the sinusoidal signal V
control
is phasemodulated by means of the angle δ as:
A
B
C
V Sin( t )
V Sin( t 2 / 3)
V Sin( t 2 / 3)
= e + o
= e + o ÷ t
= e + o + t
(1)
Fig. 3 . Phase Modulation of the control angle δ
The modulated signal V
control
is compared against a triangular signal in order to generate the switching signals for the
voltage source converters (VSC) valves. The main parameters of the sinusoidal pulse width modulation (PWM)
scheme are the amplitude modulation index of signal, and the frequency modulation index of the triangular signal.
The amplitude index is kept fixed at 1 pu, in order to obtain the highest fundamental voltage component at the
controller output.
control
a
triangular
V
m 1p.u.
V
A
A
= =
(2)
Where control V
A
is the peak amplitude of the control signal
triangular V
A
is the peak amplitude of the triangular signal
The switching frequency (f
s
) is set at 1080 Hz. The frequency modulation index is given by,
s
f
1
f
m 1080/ 50 21.6
f
= = =
(3)
Where f
1
is the fundamental frequency
The modulating angle is applied to the PWM generators in phase A. The angles for phases B and C are shifted by
120
0
and 240
0
respectively. It can be seen that the control implementation is kept very simple by using only voltage
measurements as the feedback variable in the control scheme. Fig. 4 shows simulink model of dynamic voltage
restorer (DVR) controller.
5
Fig. 4. Simulink model of DVR Controller
3.2 Proposed Synchronous Reference Frame Controller
The Synchronous Reference Frame (SRF) control approach (Padiyar, 2007) is used to generate the reference voltages
for the dynamic voltage restorer (DVR). Fig. 5 shows the block diagram representation of synchronous reference
frame (SRF) control scheme.
Fig. 5. Block diagram of the SRF controller
The point of common coupling (PCC) voltage V
Pa
, V
Pb
and V
Pc
are transformed into dq components using the
following equations:
Pa
P
Pb
P
Pc
V
1 1
1
V
2 2
2
V
3
V
3 3
0
V
2 2
o

(
(
÷ ÷
(
(
(
=
(
(
(
¸ ¸
÷ (
(
¸ ¸
¸ ¸
(4)
Pd P 0 0
Pq P 0 0
V V cos t sin t
V V sin t cos t
o

e ÷ e ( ( (
=
( ( (
e e
¸ ¸ ¸ ¸ ¸ ¸
(5)
where
0
is the operating system frequency. The DC components in V
Pd
and V
Pq
are extracted by using a low pass
filter. Thus
6
Pd
Pd
Pq Pq
V
V
G(s)
V
V
(
(
=
(
(
( ¸ ¸
¸ ¸
(6)
Pd
V and
Pq
V are the DC components and G(s) is the transfer function of low pass filter. From Fig. 5 we
derive the reference for the active component of the load voltage (V
*
Ld
) as:
*
Pd
Ld Cd
V V V = +
(7)
where V
Cd
is obtained as the output of the DC voltage controller (with a proportional gain Kp ). A second order
butterworth low pass filter is used in the feedback path of the DC voltage controller to filter out high frequency ripple
in the DC voltage signal.
In steady state, V
*
Pq
=0 , therefore
q
K
*
Lq Pq
V V
s
=
(8)
K
q
is chosen to optimize the controller response.
From the reference values of V
*
Ld
and V
*
Lq
we can obtain the desired load voltages in phase coordinates from the
following equations:
* *
0 0 Ld L
* *
0 0 Lq L
cos t sin t V V
sin t cos t V V
o

( ( e e
(
=
( (
(
÷ e e
( ( ¸ ¸
¸ ¸ ¸ ¸
(9)
*
La *
L *
Lb *
L *
Lc
1 0
V
V
3
2 1
V
3 2 2
V
V
3
1
2 2
o

(
( (
(
( (
= ÷ ÷
(
( (
(
¸ ¸
( (
¸ ¸
(
÷
¸ ¸
(10)
Finally, the reference compensated voltages for the dynamic voltage restorer (DVR) are given by:
* *
Ca La Pa
V V V = ÷
* *
Cb Lb Pb
V V V = ÷
(11)
* *
Cc Lc Pc
V V V = ÷
The detailed comparison of the proposed control strategy with the Indirect proportional integral controller (IPIC) is
given in section 5.
7
4. Simulation of Dynamic Voltage Restorer (DVR): A Case Study
The voltage source converter based DVR connected to distribution system having a balanced load is taken up for
study (Padiyar, 2007). Table1 depicts system data and system diagram is shown in Fig. 6. A dynamic voltage
restorer (DVR) is connected in series with the linear load to improve the power factor on the source side i.e. at the
point of common coupling. The balanced RL load is star (Y) connected. Fig. 7(a & b) is the power circuit of
proposed threeleg and sixleg voltage source converter (VSC) based DVR integrated with three phase transformer.
It contains full bridge converters connected to a common DC bus. The DC bus voltage is held by the capacitor C
dc
.
The function of dc capacitor C
dc
is to produce a smooth dc voltage. The switches in the converter represent
controllable semiconductors, such as Insulated Gate Bipolar Transistor (IGBT) or power transistors. The IGBTs are
connected anti parallel with diodes for commutation purposes and for charging the DC capacitor. For converter the
most important part is the sequences of operation of the IGBTs. Pulse Width Modulation (PWM) scheme is used to
generate the pulses for the firing of the IGBTs. IGBTs are used in this work because it is easy to control the switch
on and off of their gates and suitable for the DVR.
Fig.6. System diagram
(a) (b)
Fig. 7. Configuration of DVR (a) Threeleg arrangement (b) Sixleg arrangement
8
Table1:System parameters
Parameter Value
AC source voltage and frequency
Line Impedance
Balanced RL load
Filter parameter
DCside capacitance,resistance and voltage
Controller Parameter
(Proportional and Integral)
PWM switching frequency
Power Converter
V
s
=415V
,
f =50 Hz
L
s
=40 mH, R
s
=1.57O
R =50 O , L =200 mH
L
f
= 9.6 mH, C
f
=4.2 µF
C
dc
=5000 µF , R
dc
=6000O
V
dc
=400V
K
p
=40, K
i
=7
1080 Hz
IGBTs/diodes
5. Simulation Results and Analysis
Fig. 8 (a & b) shows the basic simulation model of dynamic voltage restorer (DVR) system that correlates to the
system configuration shown in Fig. 6 in terms of source, load, DVR, and control blocks. The injection transformer in
series with the load, threephase source, and the seriesconnected voltage source converter (VSC) are connected as
shown in Fig. 8 (a & b). These DVR models are simulated with the Indirect PI and Synchronous Reference Frame
Control (SRFC) theory. The models are assembled using the mathematical blocks of SIMULINK block set.
Simulation is carried out in discrete mode at a maximum step size of 1×10
−3
with ode45 (DomandPrince) solver.
The total simulation period is 1s. There are three numbers of breakers used in these models for the purpose of DVR
in operation with the distribution system. Fig. 9. represents simulink model of SRF controller that is implemented
from the block diagram of the SRF controller as in Fig. 5.
(a) (b)
Fig. 8. MATLAB based model of DVR with (a) Indirect PI Control (b) Synchronous Reference Frame control
9
Fig. .9. MATLAB Based Model of Synchronous Reference Frame control Scheme
The main purpose of the simulation is to study two different performances of control aspects: 1) harmonic
compensation and power factor correction by Indirect PI control; 2) harmonic compensation and power factor
correction by Synchronous Reference Frame Control. In addition, the Fast Fourier Transform (FFT) is used to
measure the order of harmonics in the compensated voltage. The Total Harmonic Distortion (THD) of the
compensated voltage is measured without and with DVR for the both cases of control strategies. The system
parameters used in these simulations are given in Table1.
A. Harmonic Compensation and Power Factor Correction by Indirect PI control
The simulation results of the dynamic voltage restorer (DVR) system with the Indirect PI controller are shown in
Fig. 10, in which V
c
is the compensated voltage, V
L
is the load voltage, I
S
is the supply current and V
dc
is the dc
link voltage. From the results it is observed that the compensated voltage V
c
is pure sinusoidal indicating absence of
harmonics and load voltage V
L
remains balanced and sinusoidal because of balanced RL load. The waveform of
threephase supply current I
S
is also sinusoidal in nature and the DC link voltage V
dc
remains constant i.e. 1.75 V.
Fig. 10. Steady state response of the DVR with PI controller
10
Fig. 11 (a & b) shows the supply current i
Sa
and fundamental frequency component of point of common coupling
(PCC) voltage v
Pa
in phase a. In case of without DVR as shown in Fig. 11(a) the waveform of supply current starts
at t =0.203 s but PCC voltage starts at t =0.200 s, indicating a phase difference between supply current i
Sa
and
PCC voltage v
Pa
and hence it is not possible to maintain unity power factor (no power factor correction occurs) but
in case of with DVR, as shown in Fig. 11(b) the waveform of supply current i
Sa
as well as PCC voltage v
Pa
start for
the same time at t =0.200 s. Thus there is no phase difference between supply current and PCC voltage and hence it
is possible to maintain unity power factor (power factor correction occurs).
(a) (b)
Fig.11 Fundamental PCC voltage and source current (a) without DVR (b) with DVR
Fig. 12 (a & b) shows the harmonic spectrum of the compensated voltage without and with DVR. It is observed that
the total harmonic distortion (THD) of the compensated voltage is reduced from 27.17% without DVR to 0.00%
with DVR and hence mitigating harmonics in the compensated voltage.
(a) (b)
Fig. 12. THD of compensated voltage (a) without DVR (b) with DVR
11
B. Harmonic Compensation and Power Factor Correction by Synchronous Reference Frame Control
The dynamic voltage restorer (DVR) is tested for harmonic reduction and power factor correction by connecting
a balanced linear load. The waveforms of the compensated voltage (V
c
), load voltage (V
L
), supply current (I
S
) and
dc voltage (V
dc
) are presented in Fig. 13 to demonstrate the filtering performance of the DVR. It is observed that
compensated voltage V
c
is not sinusoidal and also indicates availability of small harmonics. Load voltage V
L
remains balanced and sinusoidal. The waveform of threephase supply current I
S
is also a pure sinusoidal wave. The
DC link voltage V
dc
remains constant near 398V.
Fig. 13. Steady state response of the DVR with SRF controller
Fig. 14 (a & b) shows the supply current i
Sa
and fundamental frequency component of point of common coupling
(PCC) voltage v
Pa
in phase a. In case of without DVR as shown in fig. 14(a) the waveform of supply current i
Sa
starts at t =0.2031 s but PCC voltage v
Pa
starts at t =0.2000 s. This indicates a phase difference between supply
current i
Sa
and PCC voltage v
Pa
and hence it is not possible to achieve unity power factor (no power factor correction
occurs) but when the DVR is in operation with the distribution system, the waveform of supply current i
Sa
as well as
PCC voltage v
Pa
start for the same time at t =0.2000 s as shown in Fig. 14(b). Thus there is no phase difference
between supply current i
Sa
and PCC voltage v
Pa
and hence it is possible to achieve unity power factor (power factor
correction occurs).
12
(a) (b)
Fig.14. Fundamental PCC voltage and source current (a) without DVR (b) with DVR
Fig. 15 (a & b) shows the compensated voltage spectrum without and with DVR. The corresponding total harmonic
distortion (THD) of the compensated voltage is reduced from 32.92% without DVR to 3.84% with DVR.
(a) (b)
Fig.15. THD of Compensated Voltage (a) without DVR (b) with DVR
Thus the fast fourier transform (FFT) analysis of the DVR confirms that the total harmonic distortion (THD) of the
compensated voltage is less than 5% for the both cases of control strategies that are in compliance with IEEE519
and IEC 610003 harmonic standards.
Table2:Measured THD under various Control strategies
Control strategy Without DVR (%) With DVR(%)
Indirect PI
Synchronous Reference
Frame
27.17
32.92
0.00
3.84
13
From Table 2 it is clear that with DVR, the THD of compensated voltage is 0.00% for the case of Indirect PI Control
(IPIC), indicating completely elimination of harmonic, which is not practically possible but in case of Synchronous
Reference Frame Control (SRFC), THD of compensated voltage is 3.84% indicating less than 5% of THD value,
which is acceptable for three phase four wire distribution system hence proposed Synchronous Reference Frame
Controller (SRFC) gives better performance in terms of harmonic compensation as compared to Indirect PI
Controller (IPIC).
6. Conclusion
The modeling and simulation of a new topology of dynamic voltage restorer integrated with three phase linear
transformer has been carried out and the performances have been demonstrated for power factor correction and
harmonic reduction. The dynamic voltage restorer is implemented with pulse width modulated controlled voltage
source converter. The converter switching patterns are generated from Indirect PI controller and Synchronous
Reference Frame controller. It has been shown that the system has a fast dynamic response and is able to keep the
total harmonic distortion of the compensated voltage below the limits specified by the IEEE 519 and IEC 610003
harmonic standards. The DVR employing the proposed control strategies have been found suitable for star
connected balanced RL load. The results from the system simulation demonstrate the effectiveness of the DVR in
providing balanced, sinusoidal voltages at the load bus.
Acknowledgments
The authors are thankful to Ministry of Human Resources Development (MHRD), New Delhi, Govt. of India and All
India council of Technical Education (AICTE), for providing financial assistants and supports to do the research work.
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