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Space Vector Modulation Control of an AC–DC–AC Converter With a Front-End Diode Rectifier and Reduced DC-link Capacitor
Xiyou Chen and Mehrdad Kazerani, Senior Member, IEEE
Abstract—In this paper, the control of an ac–dc–ac converter with a front-end diode rectifier and reduced dc-link capacitor based on the space vector modulation strategy is investigated. The modulation index is time-varying and determined by the instantaneous value of the dc voltage measured by a voltage sensor. Using a small bipolar capacitor, instead of a large electrolytic capacitor on the dc-link, increases the lifetime of the converter and reduces its size. The input current quality of this converter has been shown to be superior to that of the conventional ac–dc–ac converter with front-end diode rectifier. The perfectly sinusoidal local average output voltage can still be achieved under unbalanced input voltage condition by implementing a time-varying modulation index. The rule for determining the dc capacitance has also been studied in this paper. The simulation results obtained from PSIM simulation software and experimental results obtained from the lab prototype are used to verify the theoretical expectations. Index Terms—AC–DC–AC converter, front-end diode rectifier, reduced dc capacitor, space vector modulation, unbalanced input voltage.



N RECENT years, the trend in the design of ac–dc–ac converters for motor drive applications has been in the direction of reducing the size, integrating the converter with the motor, improving the efficiency and lifetime, and reducing the cost. As a result, eliminating or reducing the size of the dc-link capacitor has received a lot of attention [1], [2]. Replacing large dc-link electrolytic capacitors with small nonelectrolytic capacitors offers the advantages of compact size and longer lifetime. Many researchers have investigated the performance of ac–dc–ac converters with front-end controlled rectifier and without dc-link capacitors or ac–ac converters such as indirect matrix converters in motor drive applications [3], [4]. Nearly sinusoidal output voltage and input current waveforms, without low-order harmonics, as well as unity or regulated input power factor can be achieved in these converters. Because of the capability of power regeneration and high quality of waveforms on both input and output sides, these converters are widely

used in medium or high power industrial applications or when frequent start/stop operations are required. On the other hand, there are many low-power industrial applications such as fan and pump drive systems, where it is not feasible to regenerate energy from the load to the source. In these applications, the front-end diode rectifier ac–dc–ac converters are still being used because of their lower cost and higher reliability. In the dc–ac stage of such converters, sinusoidal pulse width modulation (SPWM) or space vector pulse width modulation (SVPWM) are often used in order to obtain sinusoidal output voltage waveforms. The operation of SPWM inverters are based on the comparison between the output voltage reference and a triangular carrier signal to generate the switch control signals or duty cycles. In these inverters, the dc-link voltage should be kept constant and a large electrolytic capacitor should be used in the dc-link. In SVPWM inverters, six fixed active voltage vectors and two zero vectors are used to synthesize the rotating desired output voltage vector [5]. The switch duty cycles are calculated according to the position of the desired output voltage vector with respect to the two adjacent active fixed vectors. In this case, too, a constant dc-link voltage should be maintained. In this paper, a novel SVPWM strategy based on time-varying dc-link voltage is investigated for front-end diode rectifier ac–dc–ac converter with a small nonelectrolytic dc-link capacitor which provides snubbing. The lifetime of the converter can be increased and its size reduced by adopting this strategy. A comparative evaluation with respect to the ac–dc–ac converter with dc-link electrolytic capacitor has been carried out based motor drive strategy. Simulations using PSIM on constant software package and experiments on a lab prototype have been performed to verify the validity of the method proposed in this paper. II. FUNDAMENTALS OF SPACE VECTOR MODULATED INVERTER BASED ON CONSTANT DC-LINK VOLTAGE The ideal local average values of the output three-phase , angular frequency , line-to-line voltages with amplitude and initial phase angle , can be expressed as

Manuscript received February 8, 2005; revised July 29, 2005. Recommended by Associate Editor B. Wu. X. Chen is with the Department of Electrical and Electronics Engineering, Dalian University of Technology, Dalian 116023, China (e-mail: chenxy@dlut. M. Kazerani is with the Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ON N2L 3G1, Canada (e-mail: Digital Object Identifier 10.1109/TPEL.2006.880236

(1) These voltages can be represented in a three-axis frame, with the , , and phase shifted by 2 3 radians with axes

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Fig. 2. Inverter with constant dc-side voltage.

Fig. 1. Three-axis frame, rotating space vector, and three-phase output voltages.

respect to one another, as shown in Fig. 1. The instantaneous , , and are equal to the projections of a rovalues , , and , retating voltage vector along the axes of spectively. This rotating vector is called the voltage space vector and is determined as follows:

(2) For the three-phase balanced voltages expressed in (1), the voltage space vector (2) can be simplified as

Fig. 3. Active voltage space vectors.

(3) represents the initial position where 0) of . (at In the dc–ac inverter shown in Fig. 2, there are 8 possible switch states. Each of these states refers to a certain set of output , and ) and therefore a specific voltage voltages ( space vector. The six nonzero active vectors with the same am, and the two zero vectors, resulting from plitude of 2 3 the eight switch states, are shown in Fig. 3 and Table I. For ex), where the top switch in leg ample, in the switch state ( A and bottom switches in legs B and C of inverter are ON


and and

(4) ), the equivalent circuit of Fig. 4 can For the switch state ( be obtained. From Fig. 4,
Fig. 4. Equivalent circuit for switch state (p; n; n).

(5) At any moment of time, one can get any of active and zero vectors by selecting the corresponding switch states shown in Table I. These vectors can be used to synthesize approximately . From the desired the rotating output voltage space vector position of , two adjacent active vectors and , and a



Fig. 5. Synthesis of output voltage space vector. Fig. 6. Front-end diode rectifier ac–dc–ac converter with reduced dc-link capacitor.

zero vector are selected to construct and shown in Fig. 5

, as formulated in (6) In simulation and practical realization, is obtained from is calculated in each a voltage sensor on the dc-link, and switching period, according to (9). From (6), (8), and (9), the following output voltage space vector can be obtained.

(6) where , and are the duty ratios of the switch states corresponding to the active vectors , , and , respectively. Defining the modulation index as

(7) the following duty cycles can be obtained from the “Law of Sines”: (10) (8) where 1 , is the switching frequency, and , , and are the time intervals in a switching period, corresponding to , , and , respectively. III. PROPOSED SPACE VECTOR MODULATION STRATEGY WITH TIME-VARYING DC VOLTAGE Fig. 6 shows the front-end diode rectifier ac–dc–ac converter with reduced dc capacitor, which is only used to suppress the high-frequency voltage ripple caused by the negative dc-link high-frequency current, instead of smoothing dc-link voltage. The voltage sensor measures and provides the dc voltage value to the low-pass filter (LPF), which is used to remove the ripple contents of the dc voltage signal. The LPF can be realized by an RC network. The output signal of LPF is fed to the SVPWM controller to calculate the instantaneous value of modulation index. , the amDue to time-varying nature of dc-bus voltage will change with time. plitudes of the space vectors For the front-end diode rectifier ac–dc–ac converter with reduced dc capacitor, this paper presents a novel SVPWM strategy , given by (9), for siwith time-varying modulation index nusoidal output voltages Therefore, the maximum voltage gain will be Equation (10) shows that the desired sinusoidal output voltage local average can be obtained by implementing the time-varying modulation index. In order to get a perfectly sinusoidal local average for the output voltage, the desired output voltage should meet the following criterion at any given moment of time:


(12) According to (12), the voltage gain is lower than that of the ac–dc–ac converter with large dc-link electrolytic capacitor, which is nearly 1. As a result, there will not be enough output voltage to run the motor at full utility voltage. This can limit the applications where this technology could be used. IV. DC-LINK CAPACITOR DESIGN Due to the inductive nature of the load, the dc-link current may contain high-frequency reverse pulses that tend to increase the dc-link capacitor voltage. In order to limit the ripple contents of the dc-link voltage, the dc-link capacitor should be properly designed. From the simulation waveforms shown in Fig. 7(a), 12 and 3 can be found. During the time period ,




Fig. 8. Zoom-in of Fig. 7.

Fig. 7. Voltage and current waveforms of VSI for T > T =12 (R = 2
, L = and its local average. (b) DC-link current and 10 mH, f = 50 Hz). (a) v line current i .

For a constant inductive load with constant resistance and incan be expressed as ductance, the dc-link negative current

2/3 and the switch state ( ) given by Table I exists. In this switch state, the dc-link current will equal to . Therefore, if it is desired to keep the dc-link current always positive, with no capacitor installed in dc-link, the time period should meet the constraint given by

(17) Substituting (16) and (17) in (15), the charge flowing in reand verse direction can be determined as a function of both

(13) In other words, the displacement angle of the load should satisfy

(14) In order to suppress high-frequency voltage ripples generated when displacement angle of load is greater than 6, one should select an appropriately-sized dc-link capacitor. This can be done by following the two steps described as follows. A. Step 1 Determine the maximum value of the charge flowing in the reverse direction towards dc-link capacitor in each switching period. From Fig. 8, which is a zoom-in view of the phase voltage, line current, and dc current, the charge flowing in reverse direction in each switching period can be found as From (19) and (20) (15) is the pulse width of the negative dc current, which where . If the origin of time is chosen as shown in is also equal to can be represented as Fig. 8, (21) From (21) (19) (18) In order to determine the maximum value of with respect to time and derivative of set to zero , the should be






Substituting (22) in (18), the maximum value of charge for a constant inductive load can be found as

(23) For inductive loads corresponding to from (19) 6 18,

negative dc-link current pulses and the capacitor should be designed based on the permitted peak-to-peak ripple on the dc-link voltage. The capacitance of the dc-link capacitor can be related and the permitted peak-to-peak to the maximum charge , through the following expresdc-link voltage ripple sion: (30)

(24) Substituting (24) into (18)

For inductive load with constant resistance and inductance, from (23), (24), and (30), the reduced capacitance needed in the dc-link can be determined as

(25) For a motor, it is more effective to calculate the charge using , rated voltage and load displacement rated power power factor (DPF). The line current magnitude and displacement angle are


(32) . where For motor load, from (29) and (30), the reduced capacitance needed in the dc-link can be determined as

and the negative dc-link current is

(26) From (15), (16), and (26), at can be obtained as 1, the charge for motor load (33) Equation (33) implies that the reduced dc-link capacitor can be used in cases where the motor displacement power factor does not vary in a wide range and does not assume very low values, such as near-zero values which happen at low- and no-load conditions. The smaller the power factor that is allowed, the larger the capacitance that has to be used. V. SIMULATION RESULTS (28) has the maximum value of In this section, the simulation results obtained from PSIM simulation software for the proposed method are presented. The following parameters have been used in the simulation of the system shown in Fig. 6. Source: three-phase, 60 Hz, 200 V (line-to-line, RMS). DC-link capacitor: Low-pass filter: B. Step 2 and permitted Determine the capacitance based on . peak-to-peak dc-link voltage ripple As mentioned earlier in the paper, the job of the dc-link capacitor is to absorb the energy released by the load in the form of SVPWM controller: 8 kHz. 30 F. 796 Hz. 6.2, 40 Hz, 0,

(27) It can be proven that if


The induction motor and mechanical load parameters are listed in Table II.




Fig. 10. Phase-a input current of ac–dc–ac converter with 2500-F dc electrolytic capacitor: (a) input current waveform and (b) input current spectrum.

Fig. 9. Simulation results at steady-state: (a) dc-link voltage V voltage v (V) and (b) modulation index.

(V) and output


A. Output Voltage Simulation Results , Fig. 9 shows the simulation results for dc-link voltage , and modulation index . From Fig. 9(a), output voltage is defined by the dc one can clearly see that the envelope of voltage . In order to investigate the effect of the dc capacitance reduction on the quality of the output voltage, the total harmonic disfor the cases of tortion (THD) values of the output voltage a reduced dc capacitance with variable modulation index and a large dc capacitance with fixed modulation index were obtained through simulation. The results are summarized in Table III. As seen, the improvement in the THD of the inverter output voltage due to a large dc capacitance is on the order of 0.1%, which is not considered an advantage, considering the size, weight and cost of the 2000- F capacitor that has to be used. B. Comparison Between Input Current Qualities of Proposed and Conventional AC–DC–AC Converters Duo to the nature of front-end diode rectifier, both low- and high-order harmonics will be present in the input current. The phase-a input current waveforms and their respective frequency

Fig. 11. Phase-a input current of ac–dc–ac converter with reduced (30-F) dc-link capacitor: (a) input current waveform, (b) input current spectrum.


spectrums for the conventional and proposed ac–dc–ac converters are shown in Figs. 10 and 11, respectively. In order to show in more detail the qualities of the input currents, the THD, root-mean-square (RMS), maximum value, crest factor (CF) and displacement power factor (DPF) have been calculated for both conventional and proposed ac–dc–ac converters. The CF is defined as Peak value of input current RMS value of input current



Table IV lists the results obtained from PSIM software package.




Fig. 12. Steady-state simulation results for unbalanced input voltage: (a) and its local dc-link voltage, (b) modulation index, and (c) output voltage v average.

posed in this paper. Table V lists the basic environment of the experiment. A. Input Currents and Power Factor

From Table IV, one can conclude that the quality of the input current of an ac–dc–ac converter with reduced capacitor is superior to that with a large electrolytic capacitor. Lower THD implies reduced filtering requirements. Lower input current RMS and peak values mean that diodes of lower current rating and thus lower cost are required. Finally, CF of 1.27 implies that the input current waveform is closer to a perfect sinusoid. C. Simulations for Unbalanced Input Voltage Since the modulation index is calculated based on the measured instantaneous value of the dc-link voltage, the output voltage sinusoidal local average waveform, without low-order harmonics, can still be obtained under unbalanced input voltage conditions. Fig. 12 shows the waveforms of dc-link voltage, modulation index, and output voltage for the unbalanced input voltage

Fig. 13(a) and (b) show the input currents of the ac–dc–ac converter and their spectrums with 11- F reduced capacitor and 2000- F normal electrolytic capacitor, respectively. The current shown in Fig. 13(a) contains less low-frequency harmonics and has lower crest factor than that shown in Fig. 13(b). As a result, the quality of the input current has been improved considerately. Fig. 14 shows that the displacement power factor of the converter in the case of reduced capacitor is near unity. B. DC Currents With Different Inductive Loads Fig. 15 shows the dc currents of the inductive load with 28 mH and different resistances at output frequency 50 Hz. 5 60.37 30 , negative pulses caused by Curve 1) the heavily inductive load are present in the dc current. 15 , 30.38 30 , negative pulses are not Curve 2) present in the dc current. 27 , 18.04 30 , negative pulses are not Curve 3) present in the dc current. C. Output Voltage and Current 10 and 28 mH was An inductive load with used in this experiment. The load impedance angle at the output 50 Hz was 0.7212 frequency 6. According to (32), the dc capacitor was calculated as


Other parameters of simulation have been kept the same as in parts A and B. Comparing Fig. 12(a) and (b), one can find out that the modulation index responds to variations in the instantaneous value of the dc-link voltage to shape the local average of the output voltage to be a sinusoid of desired amplitude, phase angle and frequency. It is worth noting that an imbalance in the input voltage can distort the dc-link voltage and reduce its minimum value that determines the maximum possible output voltage that can be obtained. It can also distort the output voltage waveform. The variable modulation index approach adopted in this paper can compensate for this effect and guarantee a sinusoidal local average for the output voltage waveform. VI. EXPERIMENTAL RESULTS A prototype based on the intelligent power module (PM30CSJ060) and a DSP controller was constructed in the lab to test the performance of the SVPWM strategy pro-

A bipolar capacitor of a bit larger capacitance, i.e., 11 F, was used on the dc-link in the prototype. Fig. 16 shows the dc voltage (curve 1) and the output line-toline voltage (curve 2). The dc-link voltage dose not contain high-frequency ripple after the proper capacitor is connected to the dc-link, but it is not constant due to the fact that the capacitor has been reduced greatly compared with the conventional converter. The envelope of the output voltage is determined by the dc voltage. In order to compare with the conventional ac–dc–ac converter based on SVPWM, Fig. 17 shows the load currents corresponding to the SVPWM method proposed in this paper (curve



Fig. 13. Input current (1 A/100 mV) and its spectrum: (a) with 11-F reduced dc bipolar capacitor and (b) with 2000-F dc electrolytic capacitor.

Fig. 14. Input current and input phase voltage.

Fig. 16. DC voltage and output voltage.

1) and the conventional method (curve 2). The perfectly sinusoidal local average output voltage can still be achieved by the SVPWM strategy proposed in this paper. VII. CONCLUSION The front-end diode rectifier ac–dc–ac converter with reduced dc-link capacitor investigated in this paper offers longer lifetime, smaller size, and higher-quality input current waveforms compared with the conventional ac–dc–ac converter with large electrolytic dc-link capacitor. The SVPWM strategy proposed in this paper enables successful operation in steady-state under balanced and unbalanced input voltage conditions as well as during sudden input voltage variations. This has been made possible by implementing a variable modulation index strategy. The modulation index varies inversely proportional to the dc-link voltage to realize the desired output voltage sinusoidal local average from the dc-link voltage which is time-varying due to the small size of the dc-link capacitor. Two rules for the design of the reduced dc capacitor are analytically derived for the cases of constant inductive load and motor load. For a reasonably small

Fig. 15. DC currents with L = 28 mH and 1) R R = 27
at f = 50 Hz.

= 5
, 2) R = 15
, and 3)



[3] L. Wei and T. A. Lipo, “A novel matrix converter topology with simple commutation,” in Proc. 36th Annu. IEEE Ind. Appl. Soc. Meeting (IAS’01), 2001, vol. 3, pp. 1749–1754. [4] M. Jussila, M. Salo, and H. Tuusa, “Realization of a three-phase indirect matrix converter with an indirect vector modulation method,” in Proc. 34th Annu. IEEE Power Electron. Spec. Conf. (PESC’03), 2003, vol. 2, pp. 689–694. [5] L. Huber and D. Borojevic, “Space vector modulated three-phase to three-phase matrix converter with input power factor correction,” IEEE Trans. Ind. Appl., vol. 31, no. 6, pp. 1234–1246, Nov./Dec. 1995.

Fig. 17. Output currents: 1) with reduced dc capacitor (11-F) and 2) with 2000-F dc electrolytic capacitor.

Xiyou Chen received the B.Sc., M.Sc., and Ph.D. degrees from the Harbin Institute of Technology, Harbin, China, in 1982, 1985, and 2000, respectively. Currently, he is a Professor in the Department of Electrical and Electronics Engineering, Dalian University of Technology, Dalian, China. From April 2004 to March 2005, he was with the Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ON, Canada, as a Visiting Scholar. His research interests are in applications of power electronics in power systems, matrix converters, motor drives, and chaos control in electrical engineering.

dc-link capacitor, the load power factor should be high. This implies that when the ac–dc–ac converter is used as a motor drive, the motor should be always loaded so that the load displacement angle is smaller. The drawbacks of the proposed scheme are the need for a fast microprocessor, voltage gain being lower than the conventional ac–dc–ac converter, and lack of regenerative braking capability. REFERENCES [1] J. S. Kim and S. K. Sul, “New control scheme for AC-DC-AC converter without dc link electrolytic capacitor,” in Proc. 24th Annu. IEEE Power Electron. Spec. Conf. (PESC’93), 1993, pp. 300–306. [2] M. Muroya, K. Shinohara, K. Iimori, and H. Sako, “Four-step commutation strategy of PWM rectifier of converter without dc link components for induction motor drive,” in Proc. Elect. Machines Drives Conf. (EMDC’01), 2001, pp. 770–772.

Mehrdad Kazerani (S’88–M’96–SM’02) received the B.Sc. degree from Shiraz University, Shiraz, Iran, in 1980, the M.Eng. degree from Concordia University, Montreal, QC, Canada, in 1990, and the Ph.D. degree from McGill University, Montreal, QC, Canada, in 1995. From 1982 to 1987, he was with the Energy Ministry, Iran. He is presently an Associate Professor with the Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ON, Canada. His research interests are in the areas of power electronic circuits and systems design, active power filters, matrix converters, pulsed power, distributed power generation, hybrid vehicles, and FACTS. Dr. Kazerani is a member of the Society of Automotive Engineers (SAE). He is a Professional Engineer in the province of Ontario, Canada.