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SLOA045 - August 2000

**Nulling Input Offset Voltage of Operational Amplifiers
**

Bao Nguyen and W. David Smith

ABSTRACT The input offset voltage of operational amplifiers (op amps) arises from unavoidable mismatches in the differential input stage of the op-amp circuit caused by mismatched transistor pairs, collector currents, current-gain betas(β), collector or emitter resistors, etc. This application report describes the effects of mismatched components on the input offset voltage, and proposes using an external null circuit to reduce the input offset voltage of an amplifier. It also suggests a means for computing proper values of resistors in the null circuit in order to provide appropriate input-offset-voltage compensation.

Mixed Signal Products

Contents 1 2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Effect of Component Mismatches in the Input Offset Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2.1 Effect of Collector-Resistor (Rc) Mismatch on Vos . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.2 Effect of Mismatched Transistors on Vos . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 External Null Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.1 Effect of the Potentiometer on Vos . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.1.1 TLC070 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1.2 THS4011 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.2 Effect of Additional Temperature-Coefficient Resistors on Vos . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.2.1 Low Temperature-Coefficient Resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.2.2 Effect of High Temperature-Coefficient Resistor (Thermistor) on Vos . . . . . . . . . . . . . . 9 3.2.3 TLC070 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.2.4 THS4011 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 List of Figures 1 2 3 4 5 6 7 8 9 The Simplified Differential Input Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The Simplified Differential Input Circuit With MOSFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The Null Pins Connected to the Op Amp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The Potentiometer in the Null Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Vos of TLC070 With the Potentiometer in the Null Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Vos of TLC4011 With the Potentiometer in the Null Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The Null Circuit of the Potentiometer in Series With a Resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Vos Variation of TLC070 With the Low Temperature-Coefficient Resistors in the Null Circuit . . . . . . . Temperature Dependence of Resistance for Five Thermistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 6 7 7 8 8 9 9

1

3

4 5

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . as well as the temperature coefficient of the input offset voltage. . . . . . . . . . and serves to balance the voltages at the input terminals of an op amp. . . The op-amp data sheets usually recommend the use of an external potentiometer connected to the null pins to zero Vos at room temperature. . . . . . .SLOA045 10 11 12 13 The Null Circuit With the Potentiometer in Series With Parallel Resistors . . .2 kΩ in Series With the Potentiometer in the Null Circuit . the data sheets do not present the polarity of Vos because the change in the input offset voltage caused by component mismatches is unknown. . . . . 11 Vos With Req = 1 kΩ//10 kΩ in Series With the Potentiometer in the Null Circuit . . . . . . this method is first shown in detail. . . 10 Vos With Req = 6 kΩ//10 kΩ in Series With the Potentiometer in the Null Circuit . . 12 Vos With Req = 20 kΩ//2. . . . . . . . . . . . . . . . . . . . The input offset voltage of the op amp results from mismatches in collector/emitter resistors and the transistor pair of the differential input. . . so does the input offset voltage. . . . . 10 Values of Resistors in the Null Circuit of Figure 10 for the First Attempt . . . . . . . . 14 1 Introduction Operational amplifiers (op amps) may exhibit an input offset voltage (Vos) in the range of µV to mV. . . . . . . . . . . 13 List of Tables 1 2 3 4 Values of the Resistors in the Null Circuit of Figure 10 . In addition. . . 12 Summary of Vos Results for TLC070 and THS4011 With Various Null Circuits. The op-amp data sheets usually specify the typical and maximum values. . . However. The Simplified Differential Input Circuit 2 Nulling Input Offset Voltage of Operational Amplifiers . . . . . . . . . depending on the polarity of Vos. . . This resistor is connected to either side of the null pins. . . . . . an alternative approach is also presented that minimizes the input-offset-voltage range over temperature by adding a resistor with a known temperature coefficient (Ω/°C) to the null circuit. . . . . . . . . . 2 Effect of Component Mismatches in the Input Offset Voltage Consider the simplified input-stage circuit of the operational amplifier in Figure 1. . . . . . . . . . Since the active and passive devices in the internal op-amp circuit have inherent temperature-dependent parameters. . . . . 11 Values of Resistors in the Null Circuit of Figure 10 for the Second Attempt . VDD RC1 VC1 VI(+) + VOS – Q1 RC2 VC2 Q2 VI(–) I Figure 1. . . . . . Each of these mismatches is examined separately below. . . . . . . . .

is [1a]: V o + V c2 * V c1 + V DD * αI R c2 * V DD * αI R c1 + V DD * αI 2 2 2 * V DD * αI 2 ǒ Ǔ ǒ Ǔ ƪ ǒR c* 2 DR c Ǔƫ ƪ Rc ǒ ǓǒRc ) D2 Ǔƫ + DR c αI 2 α DR c IǓ ǒ Ǔǒ2 αI 2 R VT c DR c DR c + kT q Rc Rc V Vo The input offset voltage is V os + o + + Ad g mR c + VT (1) where α+ I b .1 Effect of Collector-Resistor (Rc) Mismatch on Vos When the transistors Q1 and Q2 in Figure 1 are perfectly matched. Vo. Let Rc + R c1 ) R c2 2 and DR c + R c1 * R c2 Then. R c1 + R c ) DR c DR c and R c2 + R c * 2 2 Thus. differential gain : A d + g mR c. b)1 VT Here k is Boltzmann’s constant and q is the charge on the electron Nulling Input Offset Voltage of Operational Amplifiers 3 .SLOA045 2. the output voltage. is divided equally between them. g m + c and V T + kT q is the thermal voltage. I. the current.

SLOA045 2. I ) I s2 I s + s1 2 and DI s + I s1 * I s2 DI DI DI DI I s1 + I s ) s + I s 1 ) s and I s2 + I s– s + I s 1– s 2 2 2I s 2I s ǒ Ǔ ǒ Ǔ Assume that the voltages across base-emitter junctions are equal(VBE1 = VBE2). Let Then. then I c1 + I s1e ǒ Ǔ V BE1 V T V BE2 V T + I se ǒ Ǔ V BE1 V T V BE2 V T ǒ ǒ 1) DI s + αI 2 2I s Ǔ ǒ 1) DI s DI + Ic 1 ) s 2I s 2I s Ǔ ǒ Ǔ I c2 + I s2e ǒ Ǔ + I se ǒ Ǔ 1* DI s DI DI + αI 1 * s + I c 1 * s 2 2I s 2I s 2I s Ǔ ǒ Ǔ ǒ Ǔ Assume Rc1 and Rc2 are perfectly matched (Rc1 = Rc2). Mismatched emitter-base junction areas of BJTs give mismatches in current saturation junction IS. Since either BJT or MOSFET transistors can be used in the differential input stage. the output voltage Vo is:[1b] V o + V c2 * V c1 + ǒV DD * I c2R c2Ǔ * ǒV DD * I c1R c1Ǔ + ǒI c1–I c2ǓR c + R c αI 2 ƪǒ 1) DI s DI – 1– s 2I s 2I s αI DI s R c Ǔǒ Ǔƫ DI + αI s R c 2 Is DI s DI s + kT q Is Is 2 Is V Vo V os + o + + Ad g mR c αI + VT (2) 2 R c V T 4 Nulling Input Offset Voltage of Operational Amplifiers . each is analyzed separately below.2 Effect of Mismatched Transistors on Vos Mismatch in transistors usually occurs because of mismatches in emitter areas for bipolar junction transistors (BJT) and W/L ratios for MOSFETs. Thus.

(WńL) 1 + ǒWńLǓ ) and ǒWńLǓ 2 + ǒWńLǓ * ǒ Ǔ ǒ Ǔ Assume that there is no modulation effect (λ=0).SLOA045 Consider the mismatch in W/L ratios for MOSFETs in Figure 2. RD1 and RD2 are perfectly matched. I D1 + I D2 + 2 K′ N W K′ ǒVGS1 * VT1Ǔ + N W 2 L 1 2 L ǒ Ǔ ǒWńLǓ DǒWńLǓ ǒ Ǔ ǒVGS1 * VT1Ǔ2ǒ1 ) D Ǔ Ǔ + I ǒ1 ) 2 2ǒWńLǓ 2ǒWńLǓ 2 K′ N W K′ ǒVGS2–VT2Ǔ + N W 2 L 2 2 L ǒ Ǔ ǒWńLǓ DǒWńLǓ ǒ Ǔ ǒVGS2–VT2Ǔ2ǒ1 * D Ǔ Ǔ + I ǒ1 * 2 2ǒWńLǓ 2ǒWńLǓ The output voltage Vo will be:[1c] DǒWńLǓ V o + V D2 * V D1 + ǒV DD * I D2R D2Ǔ * ǒV dd * I D1R D1Ǔ + R DǒI D1 * I D2Ǔ + R D I 2 ǒWńLǓ DǒWńLǓ RD I 2 ǒWńLǓ V Vo V os + o + + Ad g mR D I R V GS*V T D + V GS * V T DǒWńLǓ ǒWńLǓ 2 (3) Nulling Input Offset Voltage of Operational Amplifiers 5 . VDD RD1 VD1 M2 V(I+) + VOS – RD2 VD2 M2 V(I–) I Figure 2. The Simplified Differential Input Circuit With MOSFET ǒWńLǓ ) ǒWńLǓ 1 2 . and M1 and M2 operate in the saturation region. DǒWńLǓ + ǒWńLǓ * ǒWńLǓ 1 2 2 DǒWńLǓ D(WńL) +W 1) 2 L 2(WńL) DǒWńLǓ D(WńL) +W 1* 2 L 2(WńL) Let WńL + Then.

The two circuits shown here are equivalent.. the Vos is obviously dependent on temperature through the parameter VT of the transistors.e. Hence. the absolute Vos becomes smaller for a given temperature. Vos = VI(–) – VI(+).1 Effect of the Potentiometer on Vos The null circuit shown in Figure 4 was set up using a potentiometer. current flows into the two branches of the input differential amplifier unequally. The second amplifier is a high-speed op amp with a large input offset voltage (mV). This report examines the behaviors of the input offset voltage over temperature for two amplifiers. 2. then VI(–) is smaller than VI(+) so more resistance needs to be added to the null2 pin (which ties to the inverting input branch) in order to produce more voltage at this node. and 3. 6 Nulling Input Offset Voltage of Operational Amplifiers . i. and vice versa for the case of positive Vos. adding the appropriate R1 and R2 to the null pins balances the voltage at the two input terminals. Therefore. the input offset voltage of the amplifier mostly has contributions from the mismatches in those components as shown in Equations 1. VI(+) NULL1 R R1 VEE NULL2 R R2 VI(–) Figure 3. In addition. If Vos is negative. and the threshold voltage VT is dependent on temperature since [2] V T + V TO ) g where V TO + * kT q ln ǒǸ2fF ) VBS * Ǹ2fFǓ n2 i N GN B * Q Q ox ) 2f F " D C ox C ox For all three of these cases. 3 External Null Circuit Because of mismatches in any of the aforementioned components. 3. The same nulling-offset approach is taken for both op amps. The Null Pins Connected to the Op Amp An input-offset-voltage measurement is determined by the difference in voltage between the two input terminals of the op amp. One amplifier is a low-speed op amp with a small input offset voltage (µV). Vos is less negative.SLOA045 where VGS is the gate-source voltage. thus. Figure 3 shows the null pins connected in the simplified circuit of the input stage.

87 mV to 495 µV.1.. Vos of TLC070 With the Potentiometer in the Null Circuit 3. The Potentiometer in the Null Circuit 3. it brings Vos closer to zero at room temperature. Adjusting the potentiometer simply provides the appropriate values of Rp1 and Rp2 (see Figure 4) and serves to increase the voltage at the inverting input. VI(–) < VI(+).e. Figure 6 shows the results. However. and the input offset voltage varies from 1. Nulling Input Offset Voltage of Operational Amplifiers 7 . Therefore.1.1 TLC070 The results shown in Figure 5 show that the input offset voltage of this op amp is negative (≅ –100 µV) at room temperature. Adjusting the potentiometer of the null circuit not only zeros Vos at room temperature but also compensates Vos variation over temperature. Unlike the TLC070. the temperature coefficient of the input offset voltage of this op amp remains fairly constant. the Vos temperature coefficient of this op amp reduces dramatically. TLC070_AVERAGE OF 15 UNITS 200 VIO – Input Offset Voltage – µ V 100 Null Circuit in Figure 4 0 –100 Without Null Circuit –200 –50 –25 0 25 50 75 100 125 TA – Free-Air Temperature – °C 150 Figure 5.2 THS4011 While the TLC070 has a low-input-offset voltage to start with. It is a high-speed op amp whose offset voltage is generally in the mV range. i. the THS4011 does not.SLOA045 NULL1 VI(–) OUT VI(+) Pot Rp1 Rp2 NULL2 VEE/GND VEE (Split Supply) VEE/GND GND (Single Supply) Figure 4. canceling out the voltage at the noninverting input.

The Null Circuit of the Potentiometer in Series With a Resistor 3. The addition of a knowntemperature-coefficient resistor in series with the potentiometer can effectively cancel out some of the temperature dependence inherent in the op amp.SLOA045 THS4011_AVERAGE OF 15 SAMPLES 1 VIO – Input Offset Voltage – mV 0 Null Circuit in Figure 4 –1 –2 –3 Without Null Circuit –4 –5 –50 –25 0 25 50 75 100 125 TA – Free-Air Temperature – °C 150 Figure 6. the resistor only slightly affects Vos between 85°C and 125°C.1 Low Temperature-Coefficient Resistor The addition of the temperature-dependent resistor. to the null circuit shown in Figure 7 is another Vos compensation approach. Vos of TLC4011 With the Potentiometer in the Null Circuit 3. NULL1 NULL2 R Pot VEE/GND Figure 7. adding either type to the null circuit shows insignificant decrease in the temperature dependence of Vos for this op amp. Furthermore.2. This resistor could be of surface-mounted or thin-film type with a temperature coefficient of ±100–200 ppm/°C.2 Effect of Additional Temperature-Coefficient Resistors on Vos The results in Figure 5 show that the Vos temperature coefficient of the TLC070 remains fairly constant both with and without the potentiometer in the null circuit. Because typical surface-mounted and thin-film resistors have roughly the same. The results in Figure 8 show that the sensitivity of Vos to temperature with and without the null circuit (Figure 7) are the same in the temperature range from –55°C to 85°C. small temperature coefficients. R. Figure 7 shows another experimental setup for nulling input offset voltage that attempts to reduce the variation in the input offset voltage with temperature. 8 Nulling Input Offset Voltage of Operational Amplifiers .

An alternative way to improve Vos is to employ a thermistor.2 Effect of High Temperature-Coefficient Resistor (Thermistor) on Vos Using the potentiometer and a low-temperature-coefficient resistor in the null circuit shows little effect on Vos temperature sensitivity for this op amp.E+01 –50 –25 0 25 50 75 100 TA – Free-Air Temperature – °C 125 Figure 9. Rt. RESISTANCE vs TEMPERATURE 1.E+05 1. Temperature Dependence of Resistance for Five Thermistors Nulling Input Offset Voltage of Operational Amplifiers 9 . The temperature coefficients of these thermistors are relatively high (900 Ω/°C).E+07 100 kΩ 1. Figure 9 shows plots for various values of thermistors from –40°C to 125°C.SLOA045 TLC070_AVERAGE OF 5 UNITS 150 Null Circuit in Figure 7 With Thin Film Resistor Null Circuit in Figure 7 With Surface Mounted Resistor VIO – Input Offset Voltage – µ V 100 50 0 Without Null Circuit –50 –100 –150 –60 –35 –10 15 40 65 90 TA – Free-Air Temperature – °C 115 Figure 8. which has a high.E+02 1. negative.7 kΩ 1.E+03 4.2.E+06 68 kΩ 22 kΩ Resistance – Ω 1. temperature coefficient. Vos Variation of TLC070 With the Low Temperature-Coefficient Resistors in the Null Circuit 3.E+04 10 kΩ 1.

NULL1 NULL2 R Pot Rt VEE/GND Figure 10.3 TLC070 Performing this calculation for the TLC070 gives ∆R approximately equal to 5 kΩ.33 kΩ Recall that the Vos temperature coefficient of this op amp with the potentiometer in the null circuit is positive (1 µV/°C). The change in resistance. is the difference in resistance of Rp1 or Rp2 from –40°C to 125°C. as shown in Figure 5. ∆R. Consequently. it is quite small at high temperature and very large at low temperature. Vos is pulled up into the vicinity of zero at –40°C and also is pulled down close to zero at 125°C.Vos is negative. one must connect it in parallel with the resistor R (this resistor is sunstantially independent of temperature) so that one is able to control the variation of Vos with temperature. The thermistor. One way of doing this is to connect the two leads of the potentiometer to the two null pins. Figure 10 shows a null circuit that has the parallel-resistor combination added. has a very large. The Null Circuit With the Potentiometer in Series With Parallel Resistors To adopt this approach.01 kΩ Rt = 10kΩ at 25°C 300 kΩ 605 Ω R//Rt 5.88 kΩ 550 Ω ∆R 5. R dominants at low temperature. As shown in Figure 11. depending on the following two criteria: a) the orientation of the null pins in the internal op-amp circuit. Obviously. the parallel resistor combination must be connected to the null pin that increases the voltage at low temperature and decreases it at high temperature at the inverting input. negative.99 kΩ 6. at high temperature it is positive. At low temperature.e. Table 1.. Values of the Resistors in the Null Circuit of Figure 10 TEMPERATURE –40°C 125°C R = 6kΩ at 25°C 5. and the wiper to the Vee/GND pin. 10 Nulling Input Offset Voltage of Operational Amplifiers . whereas Rt dominants at high temperature. Rt. one must determine suitable values of the resistors R and Rt that give an appropriate compensation. then measure the resistances Rp1 and Rp2 of the potentiometer at –40°C and 125°C when Vos ≅ 0 V.2. i. temperature coefficient.SLOA045 Because of the extremely high temperature coefficient of the thermistor. Rt. 3. This ∆R should be the same as the ∆Req of a parallel-resistor combination (R//Rt) from –40_C to 125°C. The values of R and Rt shown in Table 1 were selected. the variation in Vos is reduced from 174 µV to 30 µV over the temperature range from –40°C to 125°C. This parallel-resistor combination is connected to the null pin at the inverting-input branch or at the other null pin. With the null circuit shown in Figure 10. b) negative or positive temperature coefficients of the input offset voltage.

Since Vos for this op amp is quite large (mV range). Tables 2 and 3 present the resistor values for the first and second attempts.01 kΩ Rt =10kΩ at 25°C 300 kΩ 605 Ω R//Rt 980 Ω 378 Ω ∆R 602 Ω In the first attempt. Table 2. the values of R and Rt shown in Table 2 were used. Measurement of ∆R was obtained by using the same method as the TLC070. it is more difficult to zero Vos in order to compute ∆R as accurately as for the TLC070. Vos variation even smaller than 495 µV over temperature range from –40_C to 125_C ) if one carried out the same experiment as was done for the TLC070. the potentiometer in the null circuit yields greatly improved compensation for this op amp. However.4 THS4011 As shown in Figure 6.99 kΩ 1.2.e. Vos With Req = 6 kΩ//10 kΩ in Series With the Potentiometer in the Null Circuit 3.. The results in Figure 12 show that this op amp is overcompensated by the large thermistor Rt and the small resistor R. Nulling Input Offset Voltage of Operational Amplifiers 11 . Values of Resistors in the Null Circuit of Figure 10 for the First Attempt TEMPERATURE –40°C 125°C R=1 kΩ at 25°C 0.SLOA045 TLC070_AVERAGE OF 15 UNITS 200 VIO – Input Offset Voltage – µ V Null Circuit in Figure 4 100 Null Circuit in Figure 10 0 –100 Without Null Circuit –200 –50 –25 0 25 50 75 100 125 TA – Free-Air Temperature – °C 150 Figure 11. it would be interesting to see if even better compensation could be obtained (i.

9 Ω ∆R 12.4 VIO – Input Offset Voltage – mV First Attempt With R-Values in Table 2 and Null Circuit in Figure 10 0.SLOA045 THS4011_VIO vs TEMPERATURE 0. As shown in Figure 13. hence. using the R and Rt values given in Table 3 results in the input offset voltage being reduced from 1.2 –0. At low temperature.99 kΩ 20. the same technique applies to this case. one must increase ∆R by increasing the value of the resistor R and decreasing the thermistor Rt. more voltage is generated at the inverting input node due to increasing R which results in Vos = VI(–) – VI(+) being smaller. Table 3. then Vos also becomes smaller.6 0. VI(–) is reduced due to decreasing Rt.6 –50 –25 0 25 50 75 100 125 150 TA – Free-Air Temperature – °C Figure 12.2 0 –0.87 mV to 300 µV over the temperature range from –40°C to 125°C. the input offset voltage for this op-amp is similar to the TLC070 shown in Figure 5 except that Vos is larger.8 kΩ 12 Nulling Input Offset Voltage of Operational Amplifiers .2kΩ at 25°C 36 kΩ 35 Ω R//Rt 12. To reduce the Vos variation with temperature. Values of Resistors in the Null Circuit of Figure 10 for the Second Attempt TEMPERATURE –40°C 125°C R = 20 kΩ at 25°C 19. Vos With Req = 1 kΩ//10 kΩ in Series With the Potentiometer in the Null Circuit As shown in Figure 12.01 kΩ Rt = 2.85 kΩ 34. in the second attempt. At high temperature.4 –0.

but it is indeed tedious and time consuming work because one has to compute the appropriate ∆R. Table 4 summarizes the variation of input offset voltage with temperature for the TLC070 and THS4011 devices with the different null circuits presented in this report.SLOA045 THS4011_AVERAGE OF 15 UNITS 1 Second Attempt With R-Values in Table 3 and Null Circuit in Figure 10 VIO – Input Offset Voltage – mV 0 –1 –2 Without null circuit –3 –4 –5 –50 –25 0 25 50 75 100 125 TA – Free-Air Temperature – °C 150 Figure 13. Vos With Req = 20 kΩ//2. Using the potentiometer itself in the null circuit as shown in Figure 3 is recommended for all single op amps that have the null pins. The Vos variations are not the same for every op amp because the input offset voltage of amplifiers varies from device to device. This is the simplest implementation. Adding the thermistor to the null circuit in parallel with a very-low-temperature-coefficient resistor shows significant improvement in the input-offset-voltage sensitivity to temperature.2 kΩ in Series With the Potentiometer in the Null Circuit 4 Summary This report shows how to reduce the input offset voltage of operational amplifiers. Nulling Input Offset Voltage of Operational Amplifiers 13 . The input-offset-voltage range is reduced by simply adjusting the potentiometer.

87 794 µV 75. Summary of Vos Results for TLC070 and THS4011 With Various Null Circuits. 14 Nulling Input Offset Voltage of Operational Amplifiers . 2. RESISTOR. M. and W.SLOA045 Table 4. 424. Smith. Sansen. 425. S. K. 452. Sedra. (a) p. and K. New York. Microelectronic Circuits.2 µV(SM) 96 µV(TF) 1st attempt 846 µV 330 µV POT. C. (b) p. 1994.8 µV 495 µV 161 µV 174 µV POT 210 µV POT AND RESISTOR 194 µV(SM) 200 µV(TF) 92. A. Oxford University Press. S. McGraw-Hill. Design of Analog Integrated Circuits and Systems. AND THERMISTOR 30 µV 15 µV 2nd attempt 300 µV 74 µV THS4011 5 References 1. Vos VARIATION OVER TEMPERATURE WITH NULL CIRCUIT WITHOUT NULL CIRCUIT –40°C–125°C TLC070 0°C–70°C 40°C–125 C 125°C –40 0°C–70°C 82 µV 1 87 mV 1. R. 1991. (c) p. Laker.

mask work right. either express or implied. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval. Copyright © 2000. Customers are responsible for their applications using TI components. is granted under any patent right. patent infringement. Texas Instruments Incorporated . and limitation of liability. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. except those mandated by government requirements. machine. Specific testing of all parameters of each device is not necessarily performed.IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice. TI assumes no liability for applications assistance or customer product design. warranty or endorsement thereof. including those pertaining to warranty. or process in which such semiconductor products or services might be or are used. and advise customers to obtain the latest version of relevant information to verify. before placing orders. adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. copyright. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment. or other intellectual property right of TI covering or relating to any combination. that information being relied on is current and complete. TI does not warrant or represent that any license. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. In order to minimize risks associated with the customer’s applications.

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