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410355 Extended US I/O Driver Board Sheet 1 of 13 A hierarchical drawing showing how the following pages are connected

together. Aristocrat used OrCAD to draw these schematics. This is the same program we use inhouse. Ours is just the demo version with a few less features. Each block represents a page of the schematics. The direction of the hierarchical pin indicates whether they are inputs to that schematic or outputs, or otherwise. The naming of the pin ("BACCLIT[1..8]", for example) is an OrCAD convention. If you call it a bus you have to give it a name in the "name[#..#]" format for it to be understood by OrCAD. OrCAD understands that the bus is connected to other places in the schematic that have the same name used. This allows OrCAD to be more than just a drafting program. It understands the layout of the schematic and the function of the components and can run simulations and functional tests on the circuit. It can take the schematic layout and create a printed circuit board layout. Moving right along... Take, for example, the bus named PBS[1..14]. It leaves drawing Sheet 2 "I/O DRIVER HEADER J1" as an output bus and enters Sheet 5 "I/O DRIVER ELECTRONICS" Sheet 2 of 13, I/O DRIVER HEADER J1 While Sheet 1 gave us general information, sheet 2 shows us the details of what is connected to what pin of J1. J1, 64-way DIN connector. Cabinet and Door I/O Player Panel Switches. The Hierarchical Port symbol indicates these are Inputs to the board. We can go to Sheet 5 and follow them to Sheet 8. PBS1 - Top-Right button PBS2 - Bottom-Right button PBS3 - Bottom, second from right PBS4 - Bottom, third from right PBS5 - Bottom-Center PBS6 - Bottom, third from left PBS7 - Bottom, second from left PBS8 - Bottom-Left button PBS9 - Top-Left Button PBS10 - Top, second from left PBS11 - Top, third from left PBS12 - Top-Center PBS13 - Top, third from right PBS14 - Top, second from right Player Panel Lamps. The Hierarchical Port symbol indicates these are Outputs leaving the board and come here from Sheet 8. Again, to realize this we must follow them through sheet 5. PBL1 - Top-Right button, 24 Volt PBL2 - Bottom-Right button PBL3 - Bottom, second from right

PBL4 - Bottom, third from right PBL5 - Bottom-Center PBL6 - Bottom, third from left PBL7 - Bottom, second from left PBL8 - Bottom-Left button PBL9 - Top-Left button PBL10 - Top, second from left PBL11 - Top, third from left PBL12 - Top-Center PBL13 - Top, third from right PBL14 - Top, second from right On a 7 by 2 Player Panel the Push Buttons lay out is as shown below. PB9 PB8 PB10 PB7 PB11 PB6 PB12 PB5 PB13 PB4 PB14 PB3 PB1 PB2

Hard Meters (24 VDC, 46 mA, 20 CPS). If we go to Sheet 5 and find the HM[1..6] Port we can follow that back and find out these outputs come from Sheet 7. HM1 - Top-Left Meter HM2 - Top, second meter from left HM3 - Top, third meter from left HM4 - Top, fourth meter from left HM5 - Bottom-Left Meter HM6 - Bottom, second meter from left Tower Lamps (Wired through the Hard Meter Board). Also come from Sheet 7. LTL1 - Top Lamp LTL2 - Second Lamp Down LTL3 - Third Lamp Down LTL4 - Fourth Lamp Down Spare lines DRVSP1 - 24 Volt spare output DRVSP2 - 24 Volt spare output SPAREIO0 through 5 - Six TTL I/O, Parallel port of U5. See page 9. Animation lines, 24 Volt drivers AL1 through 5 - (see page 7) AL1 through 3 are on J1. AL4 and 5 are on J3. Spare RS-232, (on Sheet 9) SPRXD, SPTXD, SPCTS, SPRTS Hopper inputs (on Sheet 6) HOPCOIN - Hopper Coin Output

HOPHIGH - Hopper Full Door Optic input (on Sheet 6) DOPTIN - Door Optic Input Sheet 3 of 13, J2 J2 - 64-Way DIN Connector Battery-backed door switches (on Sheet 10) LDOR - Logic Cage Door Interrupts going to the MPU Board (from Sheet 6) NEIL0 - IL0. Interrupt Level 0*. Goes Low on any UART Interrupt Request. IRQDMON - "DEMON" Debug Interrupt Request (not used in the field) Bus Strobe Signals (to Sheet 6) NDACK - Data Acknowledge*. DMA (Direct Memory Addressing), DDT (Direct Data Transfer) operations. Tells the DDT requesting devices that it has control of the system bus. NEIOR - Expanded I/O Read*. Goes Low when the MPU is reading data from the Expanded I/O Board. NEIOW - Expanded I/O Write*. Goes Low when the MPU is writing data to the Expanded I/O Board. NERESET - Expanded I/O Reset* ECLK8M - Expanded I/O 8 MHz Clock Bus Lines EAxx - Extended I/O Board Address Lines. Note that only address lines 2 through 10 are used on the Extended I/O Board. On sheet 9 on U5, pins 33 (A2), 34 (A1) and 35 (A0), are connected to the EA4, EA3 and EA2. And notice that only the lower byte is used on the data lines. The MPU references the Extended I/O Board on Word boundaries, but only transfers bytes at a time. EDx - Extended I/O Board Data Lines. All data going in or out of the MPU on the I/O Board goes through the ED[0..7] bus. The MPU reads data a byte at a time. The Mikohn (Progressive) circuits are on Sheet 11. Sheet 4 of 13, J3 Bill Acceptor Bezel Outputs (come from Sheet 12) are driven from the Parallel Port built into UART U14, Comm 6 and 7 chips. BACCLIT1 - Highest Denomination Bill LED

BACCLIT2 BACCLIT3 BACCLIT4 BACCLIT5 BACCLIT6 BACCLIT7 - Lowest Denomination Bill LED BACCLIT8 - "Insert Bill" Lamp Comm Port 6 and 7 are on sheet 12 and 13. Animation Lamp outputs AL4 and AL5 come from Sheet 7. Door Switch wires, security Door Switches, SEC[0..5] Battery-backed door switches (on Sheet 10) GDOR - Main Game Door (SEC1) SEC - Belly Panel Door (SEC3) DDOR - Cash Box (Drop) Door (SEC5) Sheet 5 of 13, Block Diagram of Sheets 6 through 13 (Following up on our tracing of PBS[1..14]...) PBS[1..14] comes into this page in the top-left corner and is shown running into page 8. Go to Page 8, PUSH BUTTON LAMPS.) A wire ending in a name is a "Net Alias". Somewhere on this same page should be the other end of this wire with the same name on it. If you put the same Net Alias on two or more wires OrCAD understands that these two wires are connected together. But they must be on the same page for this to be understood. If they go to a different page you have to use an "Off Page Connector" of a "Hierarchical Port" symbol. Sheet 6 of 13, DECODER LOGIC U31, U32 and U40. Here we have all the Address Decoding for all the circuits on the board. We also have Interrupt organization. Most of the magic here is done inside PALs. We have enough information for us to troubleshoot through these circuits if it were ever necessary. Address Map 0x3010400, Write, NWRCS0 D7 is DOPTOUT output. 0x3010410, Write, NWRCS1 D0 is CCINH output. D2 is HOPDIR output. 0x3010440, Write, NWRCS4 D2 is HOPTEST output.

0x3010450, Write, NWRCS5 D0 is SOLDIV output D1 is JPBELL output D2 is HOPON output 0x3012000, Write, I/O Driver, "PBL1 CS", "CSW 00" PBL 1..8, Player button Lamp outputs 1 through 8. 0x3012000, Read, "PBSW1", Sheet 8 PBS 1..8, Player Button Switch 1 through 8. 0x3012010, Write, I/O Driver, "PBL2 CS", "CSW 10" PBL 9..14 (and Spare), Player Button Lamp outputs 9 through 14. 0x3012010, Read, "PBSW2", Sheet 8 PBS 9..14, Player Button Switch 9 through 14 and spares 0x3012020, Write, I/O Driver, "HM CS", "CSW20", Sheet 7, U38 HM 1..6, Hard Meter Outputs 0x3012020, Read, "RDP1 CS", Sheet 6, U25 D0 is GDSHR0, Game Door D1 is BDSHR0 (SECSHR0), Belly Door D2 is DDSHR0, Drop Door D3 is not used D4 is HOPCOIN, Hopper Coin Out D5 is HOPHIGH, Hopper Full D6 is DOPTIN, Door Optic D7 is LDSECIN, Logic Door 0x3012030, Write, I/O Driver, "LTL CS", "CSW 30", Sheet 7, U39 D0 - 3, LTL 1..4, Tower Lamp outputs. D4 - 6, AL 1..3 Animation Lamp outputs 0x3012030, Read, "LDSEC CS", Sheet 6, U24 When the MPU gets an NEIL0 interrupt it reads this port to find out which port generated the Interrupt. D4 - INTA, Comm 6, A side Interrupt D5 - INTB, Comm 6, B side Interrupt D6 - INT2A, Comm 7, A side Interrupt D7 - INT2B, Comm 7, B side Interrupt 0x3012070, Write, I/O Driver, "?" D0 is LDSEC0, Logic Door D1 is GDSHRIN, Game Door

D2 is BDSHRIN, Belly Door D3 is DDSHRIN, Drop Door 0x3010580, Read, NIOCS3 ERROR is CC ERROR SELECT is CCSEN PE is CCRED BUSY is SOLOPT P3 is AUSW P4 is JPSW P5 is BASW P6 is MECHSW P7 is CBOXSW 0x3012100, R/W, "SIO CSA" Comm Port 4, U5, Channel A, Mikohn 0x3012140, R/W, "SIO CSB" Comm Port 5, U5, Channel B, Expansion Port 0x3012180, R/W, "SIO CSP" Parallel Port, U5, Spare I/O 0x3012200, Read, "DIPSW1" DIP Switch #1. 0x3012210, Read, "DIPSW2" DIP Switch #1. 0x3012220, Read, "INT CS", Interrupt Register Chip Select. D4 - IRQ_CS DUART, Channel 4. D5 - IRQ_CS DUART, Channel 5. D6 - IRQ_CS DUART, Channel 6. D7 - IRQ_CS DUART, Channel 7. An Interrupt from any of these circuits results in the "NEIL0" Interrupt to the MPU. The MPU then comes back and reads 0x3012220 to see which device generated the Interrupt. 0x3012300, R/W, "SIO2A CS" Serial I/O chip #2, Channel A, Chip Select Comm Port 6, U14, Channel A, VLC 0x3012340, R/W, "SIO2B CS" Serial I/O chip #2, Channel B, Chip Select Comm Port 7, U14, Channel B, VLC

0x3012380, Write, "PARP CS" Parallel Port of Serial I/O chip #2 Chip Select Parallel Port DUART, Channel 6 0x301238? , Write Parallel Port DUART, Channel 7 0x301? "LDCLK" to Sheet U19 to Shift the Logic Door Shift Register. 0x301? "MSEC", to Sheet 9, U5, pin 63. This goes to what would be the "Printer Error" input of the Parallel port of U5. Other than generating the "INTP" Interrupt I don't know what it would be used for since this parallel port is not used normally. Perhaps it is used to note an occurrence of "MSEC1" or "MSEC2". U36 and U37 are used to allow the MPU to read the DIP Switches. U24 is worth a paragraph. The 74HC244 is an 8-bit buffer that actually is constructed as two 4-bit buffers. Each 4-bit section has an enable input. "1G" enables the "1Ax" Inputs to the "1Yx" outputs. "2G" enables the "2Ax" inputs to the "2Yx" outputs. In U25 they are put together to be an 8-bit port. In U24 they are used as separate 4-bit ports. When "LDSEC CS" goes Low we are reading the Data Bus (ED[0-3]) and generating the "SECW[0..3]" signals. When "INT CS" goes Low the MPU is reading the INT lines to tell which one generated an Interrupt. "SECW0" - (See Sheet 10) "LDSECO" becomes "LDSHRIN" to U19, pin 10. "SECW1" - "GDSHRIN" goes to U9, pin 10. "SECW2" - "SECSHRIN" goes to U10, pin 10. "SECW3" - "DDSHRIN" goes to U18, pin 10. Sheet 7 of 13, J3, Hard Meters, Tower Lamp and Animation Lamp Drivers U38 latches the data bus upon being addressed by a Write to 0x3012020. U27 and u28 are high-voltage high-current drivers that drive the Hard Meters. Following a reset U38 is cleared. To step a meter the MPU (I suspect) sets an output High. Any of the Hard Meter outputs going Low will cause either MSEC1 or MSEC2 to go Low. MSEC1 and MSEC2 feed U31 on Sheet 6. Either of them going Low causes u31, pin 21, "MSEC" to go Low. "MSEC" going Low goes over to the Error input on U5, sheet 10, and causes a "Printer Port Interrupt", U5, pin 59, goes High. This goes to U31 on sheet 6, pin 10 and causes U31, pin 19, to go High "INT", which causes U32, pin 20, to go High "INTOUT", AKA "NEIL0" which eventually goes to the MPU as the "Level 0 Interrupt Line". The MPU then releases the Hard meter by writing a Low back to U38, back on Sheet 7. As an alternate theory... the MPU simply drives the Hard Meter output low for a certain length of time then returns it High. The gates of MSEC1 and MSEC2 are monitored to go Low and the resulting Interrupt is noted as an error if they go Low any time they should not.

U39 drives the Tower Lamps and Animation Lamps, and is loaded from the data bus on a write to 0x3012030. Writing a High turns on the lamp. The 2,400 Ohm resistors on the outputs keep the lamp warm when they are not turned on to avoid the inrush current we experience with incandescent lamps when they are off and cold. Sheet 8 of 13, J3, PUSH BUTTONS and LAMPS (Following up on our tracing of PBS[1..14]...) PBS[1..14] comes into this page on the left side about two inches down. PBS1 through 8 go through a resistor network and are inputs to U16. The MPU reads these inputs onto the ED[0..7] bus by pulling "PBSW1 CS" low. PBS[9..14] and the two Spare switch inputs are read by pulling "PBSW2 CS" low. Each of these ("PBSW1 CS" and "PBSW2 CS") has an address assigned to them, specifically 0x3012000 and 0x3012010. A Read operation referencing these addresses is required to sense the player panel switch inputs. The MPU must read these addresses, bring the data into the CPU to one of the registers (R1 through R7 most likely) and do a mask operation on specific bits to see if a switch is activated.) U16 is used to read the player panel switches 1 through 8 on a read from address 0x3012000. U17 is used to read the player panel switches 9 through 14 and the two spare switch inputs on a read from address 0x3012010. U7 latches the data bus on a write to address 0x3012000 and light the player panel lamps 1 through 8. U22 does the same for the higher player panel lamps and the two spare lamp outputs on a write to address, 0x3012010. The 2,400 Ohm resistors keep the lamps warm instead of turning them completely off. Sheet 9 of 13, Serial I/O Ports 4 and 5 U5 is a DUART (Dual Universal Asynchronous receiver and Transmitter) with a built in Parallel Printer Port. The Serial port A-side is Port 4, used for Mikohn or other progressive system. The Serial port B-side is Port 5 and comes out as a Spare Serial I/O port. The parallel port is not normally used but may be used as an 8-bit Output, Input or Bi-directional port. The Interrupt input for the Parallel Port ("ERROR" input on pin 63) is used in conjunction with the Hard Meters. See the bullshit on the description for page 7 for more details. Sheet 10 of 13, Power Supply and Door Security U13 is a switched mode power supply that generates the "ISOL5V" power. U42 generates the "P12VDC" source from the +24 Volt line. U41 monitors the battery BT1. Normally the output of U41, at pin 7, is high, Q20 is kept turned on and the Inhibit ("INH") line is held Low. If the voltage on the battery should drop below an acceptable value the Reset*, pin 7, output goes Low. Q20 is turned off and the output, "INH" goes high. The battery backed-up door security system. U9, U10, U18 and U19 are Shift Registers. They have a Preset to them so data may be loaded in parallel fashion on the

Load Pulse, or shifted in one bit at a time on the Clock Pulse. When Load* is High we are in Shift mode. On each Clock Pulse the data present at the SERial input is shifted into the lower bit of the 8-bit shift register. Clock is High-Edge triggered. Inhibit being High disables the Clock pulse input but does not prohibit Load* operations. These four Shift registers monitor the four battery-backed Security Switches. U9 - Game Door Switch (GDxx) U10 - Belly Door Switch (SECxx) U18 - Drop Door (DDxx) U19 - Logic Door (LDxx) To get a grasp of how these shift registers are used it would be helpful to redraw the circuit a bit and show how the switch is wired into the Shift / Load* input of the Shift Registers. The NC contact of the switch is connected to ground. The Common connects to the Shift / LOAD* input of the Shift register. The NO contact goes to a resistor to VBAT. As long as the switch is undisturbed the 74HC165 is in Load mode and the Shift Register is loaded with zeros. Be mindful that the door switch is in the activated position when in the normal position so the Shift input is normally High. Before powering down the MPU shifts a pattern into the shift register. If the door is opened during power down the door switch makes contact with ground through the NC contact and the Shift Register Clears. When power is restored the MPU reads the Shift Register to confirm that the door has not been disturbed. C32 and R30 make a glitch filter with a time constant of around 20 ms. Switch wiggles that result in line noise faster than 20 ms are ignored. If any switch wire is removed in an attempt to bypass the system the result is the Shift / Load* input going to ground, flagging a door open condition. U41 monitors the battery BT1. Normally the output of U41, at pin 7, is high, Q20 is kept turned on and the Inhibit ("INH") line is held Low. If the voltage on the battery should drop below an acceptable value the Reset*, pin 7, output goes Low. Q20 is turned off and the output, "INH" goes high. This Inhibit signal goes to all the Shift registers U 9, U10, U18 and U19, prohibiting them from working. Sheet 11 of 13, Mikohn Interface "MIKPULS" comes from Sheet 9, U5-24, which is the RTS* output of Channel A. To the MPU this is just another line it can pull Low whenever it wants to. Normally this would be used to tell the other end of the serial channel that this end has information it wanted to send. We would pull on RTS* and wait for CTS* to come back, then start sending our data. Here we just use it as a programmable output. Pulsing it Low turns on Q1, which gives us equal pulses out "EMIKx1" and "EMIKx2". This is our progressive display. We could also communicate with a more advanced system through a serial port. "MIKX EN" is the enabling input for U33 and comes out of U5, pin 25. This is the DTR* line which, again, is nothing more than another programmable output to the MPU. DTR* going low turns on Q18 which gives us a High out. "MIKTX" is the Transmit Data output

at U5-26 (on sheet 9). The TXA output going Low turns on Q19, which gives us a Low at the Data input of U33 here on sheet 11. U33 is a TTL to Current Loop converter. Our TTL input levels are converted to a differential output signal. A Low in turns off the output of U33 (high resistance). A High in turns the output on (Low resistance). The circuitry inside the dotted lines is powered from an isolated power source. Ground inside this area is not ground elsewhere on the board. U6 provides the isolated power source. U34 is the return side of the Mikohn communications system. It comes in as Current Loop data and is turned into TTL to become MIKRX which goes back over to U5 on sheet 9. Sheet 12 of 13, Comm Ports 6 and 7 A simplified version of the same things we had going on around Sheet 9. Channel A becomes Comm Port 6. Channel B becomes Comm Port 7. The parallel port is used to drive the Bill Acceptor bezel lamps. Sheet 13 of 13, Comm 6 and 7 RS232 converters Working with Sheet 12 we have here the RS-232 drivers that convert the TTL lines into RS-232. These also run off of an isolated power source. Don't expect Ground here to be ground elsewhere on the board. The +V and -V voltage for the RS-232 lines are generated within the RS-202 chips themselves.