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[7] M. Higashimura and Y. Fukui, Realization of allpass networks using a current conveyor, In?. J. Electron., vol. 65, pp. 249-250, Aug. 1988. [8] 1. A. Svoboda, Current conveyors, operational amplifiers, and nullors, Proc. IEE (G),J . Cct. Dev. Sysr., vol. 136, pp. 317-322, Dec. 1989. [9] A. Fabre and J. P. Longuemard, High performance current processing allpass filters, In?. J. Electron., vol. 66, pp. 619-632, Apr. 1989. [IO] B. Wilson, F. J. Lidgey, and C. Tomazou, Current mode signal processing circuits, Proc. In?. Symp. Cct. Syst. (ISCAS), IEEE ISCAS, vol. 3, pp. 2666-2668, June 1988. [11] Current Mode Analog Integrated Circuit Design, Workshop 5 in the 1990 IEEE Int. Symp. Cct. Syst. (ISCAS), IEEE ISCAS, Louisiana, May 1990. [I21 M. Higashimura and Y. Fukui, Realization of current mode allpass networks using a current conveyor, IEEE Trans. Circ. Sysr., vol. 37, pp. 660-6661, May 1990. [13] M. A. Tan and R. Schaumann, Design of general biquadratic filter section with only transconductances and grounded capacitors, IEEE Trans. Circ. Sysr., vol. 35, pp. 478-480, Apr. 1988. 1141 J. L. Huertas, Circuit implementation of current conveyor, Electron. L e f t . , vol. 20, pp. 990-991, Oct. 1984. [ 151 B. Wilson, High performance current conveyor implementation, Electron Lett., vol. 16, pp. 225-226, Mar. 1980. [ 161 W. Surakampontom and P. Thitimajshima, Integrable electronically tunable current conveyors, Proc. IEE (G),vol. 135, pp. 71-77, Apr. 1988. [I71 B. Wilson, Differential current follower and conveyor using new mirror formulation, Electron. Lett. , vol. 22, 708-710, June 1986. I181 J. A. Svoboda and M. C. Spohn, Current conveyors, presented at the Proc. 31st Midwest Symp. on Circuits and Systems (MWSCAS), St. Louis, MO, 1988.

A single op amp with a matched-resistor network can be used to build a differential amplifier, as shown in Fig. 1. This configuration is advantageously used in the classic op amp-based instrumentation amplifier circuit [3]. To illustrate the frequency response, we assume that the op amp comprising the difference amplifier is approximated by a single-pole model which is given by

A , WO Wl A(s) = -- s U, s w,

(1)

where A ( s ) is the Laplace transform of the frequency response of the op amp, U, is equal to the -3 dB open-loop bandwidth of the op amp, wl is the unity gain bandwidth and s = j w . Note that w , = A , U,, where A , is the dc open-loop gain of the op amp. For w >> U,, ( 1 ) reduces to

with wl = 1/7. A straightforward analysis of the differential amplifier in Fig. 1, using ( 2 ) , gives

V =

R I + R3

which can be resolved into amplified difference and sum components of the input signal:

with

A Novel Wide-Band Differential Amplifier


Anwar A. Khan, Senior M e m b e r , IEEE, and Arun Kumar
Abstract-A new configuration for an op amp-based differential gain block is presented. The analytical expressions are obtained, and the performance of the proposed circuit is examined in relation to the conventional circuit. Simulation and experimental results are presented which establish the superiority of the proposed differential amplifier over the conventional circuit. Numerical results are given.

The balance condition

or

I. INTRODUCTION
Differential amplifiers are closed-loop gain blocks with differential inputs, an accurately predictable input-to-output relationship and very high common-mode rejection. This makes them ideal for accurately amplifying low-level signals in the presence of large common-mode voltages, such as from strain gauge bridges, thermocouples, and other transducers. They are also commercially available as a monolithic chip such as Burr-Browns INA105, which displays characteristics that recommend their use as gain blocks in wave processing and conditioning in instrumentation and communication systems [I], [ 2 ] . Manuscript received April 21, 1991; revised February 25, 1992. A. A. Khan is with Electrical Engineering Department, College of Engineering, P.O. Box 800, King Saud University, Riyadh 11421, Saudi Arabia. A. Kumar is with Department of Physics, Ranchi College, Ranchi University, Ranchi -834008, India. IEEE Log Number 92013080. of the resistor bridge R I through R4 creates an ideal differential amplifier. Under this matching of resistor ratio, (4) reduces to

V =

(1

+ G)s7 + 1 (VZ

- VI)

where G = R 3 / R l = R 4 / R 2 . The transfer function G(s)of the differential amplifier, using ( 6 ) , may be written as
G(s) =

v o
~

v2 -

VI

(1

+ G)s7 + 1
~G(s)I

(7)

From (7) it is possible to express the magnitude and phase angle of G(s) as
IG(s)I = G,[1
L

(8) (9)

G(s) =

G,

+ em(s)

0018-9456/92$03.00 0 1992 IEEE

556

R3

IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT. VOL. 41, NO. 4, AUGUST 1992

KR A1
+ /

U0

I"'
Fig. 1. Conventional differential amplifier.

R1 U1

U2

' \ I
U0

KR

Fig. 3 . Proposed differential amplifier.

Fig. 2 . Op amp-resistor network.

identical, a straightforward analysis of the circuit, using the singlepole op amp model in (2), for the matched-resistor ratio R 3 / R l = R,/R,, ~-gives the transfer function G(s) in the form
1 + (K + I)sT~ as) =A = G ( l + G)(1 + K ) s 2 r , r 2+ (1 + G)srl + 1 V2 - VI
(12)

where E ~ ( s and ) em@) are the magnitude and phase errors, respectively; Go and L G,, are the ideal magnitude and phase angle of G(s) in (7) at s = 0. For the transfer function G(s) in (7), E G ( S ) and E O ( S ) , to the first approximation, may be put in the form
E&) Em@)

= i(1 = -(I

+ Q2W2T2 + G)WT

(1 1)

provided (1 + G ) UT < I . The above expressions indicate that the magnitude and phase errors are second- and first-order terms, respectively. The finite value of these errors, which strongly depend upon the frequency, effectively degrades the overall gain magnitude and phase responses. To the author's knowledge no attempt has been reported to minimize these errors. In the recent past, however, an op amp-resistor network as depicted in Fig. 2 was successfully used by the authors [4] in conventional instrumentation amplifier topology to increase the overall bandwidth. In this paper, we suggest the use of the same network (Fig. 2) in existing differential amplifier structure that markedly minimizes the magnitude and phase errors. The proposed modification is simple to implement in the existing monolithic differential amplifier chip. Analytical expressions are obtained, and necessary conditions are derived to realize the maximally flat magnitude and phase responses over a wide frequency range. The effect of the op amp's second pole on the stability is also discussed. The features of the proposed differential amplifier are then compared with the conventional differential amplifier. Experimental results are given in support of the theoretical conclusions. 11. PROPOSED DIFFERENTIAL AMPLIFIER
A. Analysis Using a Single-Pole O p A m p Model

where s >> U , , G = R , / R , = R , / R , , K 2 0, and r1 and r2 are the reciprocals of the unity gain bandwidth of the op amps in Fig. 3. Note that the transfer function in (12) exhibits poles and zeros in the left half s-plane and, further, that the denominator in (12) satisfies the Routh-Hurwitz stability criterion [5] for all positive values of K and G. Equation (12) may be conveniently put in the form
1+-

G(s) - G

2>:(
d(1 +
1 2
(1 (1

2lF
2F

(9
-

):(

where
1
W"

G)(1

+ K)r1r2

(14)

+-J= + + K)r2'
G)T'

(15)

The amplitude and phase characteristics of (13) may be written as

The proposed differential amplifier topology is depicted in Fig. 3. Note that the modification in existing differential amplifier structure consists of placing the op amp-resistor network (Fig. 2) in the feedback loop of op amp A , . Assuming that the op amps are not

- = tan-'

(3s)
G

(&2)

- tan-'

[5 1 .
(17)

1 - 7

Un

IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 41. NO. 4. AUGUST 1992

557

For w / w n form

<< I , (16) and (17) may be approximately put in the


differential amplifier

( ~ ( - l + [ l - 2 t ' + 7 1 81

w2

(proposed, Fig.3) - - - - differential a m lifier (conventional, Fig.,)


+ .-

14
I

G=10

Kz3.556

i f

In order to compensate for the second-order error term in ( 1 8) we must put


1 1-2c;2+,=0 8E
1-'1
7 1

10

io=

10s

io'

105

or, for matched op amps A , and A2 (i.e.,

= T ~ ) ,using (15),

Frequency(Hz)
(20) Fig. 4. Gain magnitude response of the proposed and conventional differential amplifiers for G = 1 and G = 10.

K = K, = - ( 2

+ G ) + &(G +

1).

For a maximally flat phase response, on the other hand, we must set

where

I21

21=0
T~ = T ~ ) , using

or, for matched op amps A , and A2 (i.e.,

(15),

X, = 1 +B XI = Ba, X , = Ba2
(21) Y , = l + C + D Y, = 2Cal Du, Y2 = C(2a2 a t ) Y3 = 2 C a l a 2 Y, = Ca:

K = Km = G .

The amplitude error eG(s)as defined in ( 8 ) , using (18), may be put in the form

+ +

+ Da2

where The phase error in the form as defined in (9), using (18), may be put

B = (1 C = (1

+ K)/A,

= (1

+ G)(1 + K ) / A f , + @/A,.

where w, and 5 are defined by (14) and (15), respectively. The above expressions clearly indicate that the magnitude and phase errors are fourth- and third-order terms respectively, as opposed to the second- and first-order terms, respectively, in a conventional differential amplifier. The proposed structure (Fig. 3) thus offers improved performance over the conventional differential gain block (Fig. 1 ) .

A detailed numerical as well as analytical study of G ( s ) / G in (25) reveals the fact that the denominator in (25) satisfies the RouthHurwitz stability criterion for K z 0 and G > 0. Further, the numerical evaluation of the roots of numerator and denominator polynomials in (25) establishes the fact that all zeros and poles of (25) lie in the left half s-plane for K 2 0 and G > 0, a necessary condition to be met in practice to ensure circuit stability.
111. SIMULATION A N D EXPERIMENTAL RESULTS

B. Effect of the O p Amp Second Pole on Circuit Stability


The open-loop gain A ( s ) of the op amp with a second pole is represented by
A(s) =
A,W,WI

(s

+ w , ) ( s + wI)

+ a , s + a2s2

A,

(24)

where w , and w , are the two comer frequencies, a , = (l/w,, l / w l ) , a2 = ( l / w o w l ) , and A , is the op amp open-loop gain at s = 0. Assuming that both op amps in Fig. 3 are identical and each is represented by (24), the transfer function G(s) of the circuit, for the matched-resistor ratio R 4 / R 2 = R 3 / R l , may be put in the form
--

a s )
G

x*s*+
Y4s4

XIS

+ x,
+
YIS

Y3s'

Y,s2

+ Y,,

(25)

A computer simulation of the proposed differential amplifier as shown in Fig. 3 for its gain and phase responses is illustrated in Fig. 4 and Fig. 5 , respectively, for G = 1 and G = 10 using a single-pole op amp model with the parameters listed in Table I. The simulated magnitude and phase responses of the conventional differential amplifier in Fig. 1 are also plotted in Fig. 4 and Fig. 5 , respectively, to facilitate performance comparison. The resistor ratio-matching condition for a true differential amplifier as dictated by ( 5 ) was assumed to be effective. In Fig. 4, the curve for G = 10 corresponds to a value of K = K, = 3.556 which is computed using (20). The curve for G = 1 , on the other hand, corresponds to a value of K = 0 which is greater than its value obtained using (20). It is to be noted here that for a realizable value of K (i.e., K 2 0), G must be equal to or greater than 1.414. This is the reason for a peak in the frequency response curve (Fig. 4) for G = 1 and K = 0. This simply points to the fact that the proposed difference

558

IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 41. NO. 4. AUGUST 1992

_"

0
(U

o
-20

-0

(U

2 -40
(U
v)

0 ,

-60 -80

-differential amplifier
---

$ropoted, Fig.3) ifferential amplifier (conventional, Fig.1)

1 10

0
l o p

ios

1 0 '

los

ioe

Frequency( Hz)
Fig. 5. Phase response of the proposed and conventional differential amplifiers for G = 1 and G = IO. TABLE 1 MODEL PARAMETERS OF OP AMP
A , = 1.2
U , , U, U,

10'

= ?F X =

9.2 rad/s
X

11.6

106rad/s

= 3.47 x

Io6 rad/s

TABLE I1 COMPARISON OF THE PERFORMANCEOF PROPOSED DIFFERENTIAL AMPLIFIER ( F I G . 3) CONVENTIONAL CIRCU~T (FIG.1) Frequency for which Circuits Fig. 1 Fig. 3 Gain
1 G(s) = G , , / J 2 271 kHz 49.2 kHz 487 kHz 84.7 kHz

WITH THE

e G ( s ) = +0.1%
12.1 kHz 2.3 kHz 271.9 k H z t 16.5 kHz

tG(s)= + I %

cm(s) = *0.1"

E@($)

+I"

IO
1

38.55 kHz 7.01 kHz 283.06 k H z t 29.28 kHz

470 H z 86.0 H z 32.6 kHz 5.93 kHz

4.725 kHz 859 H z 70.18 kHz 12.76 kHz

IO

tData shown are taken after the peak value (Fig. 4)

amplifier does not yield a maximally flat magnitude response for G = 1. The phase response in Fig. 5, on the other hand (bold line) corresponds to a value of K = K# = 1 for G = 1 and K = Km = 10 for G = 10 being computed using (21). From these simulation plots (Figs. 4 and 5 ) , one can compute the bandwidth and the frequency values for f O . 1 % and 1 .O% flatness in gain magnitude response and + O . 1 and f 1.O" flatness in phase response curves for the proposed differential amplifier (bold line) and the conventional one (dotted lines). The data obtained are listed in Table 11. From Table I1 we notice that the proposed differential amplifier when compensated for the maximally flat magnitude and phase responses offers a significant improvement over the conventional one at the cost of one op amp and two passive resistors without putting any extra condition for minimizing the common-mode gain. The proposed differential gain block as shown in Fig. 3 was also implemented in the laboratory using a general purpose op amp pA741 with R I = R, = 27 kQ and R = 1 kQ. Resistors R, and R4 were selected to be 27 kQ for a gain of unity and 270 kQ for a gain of 10. Resistors R, through R4 were accurate to 0.1 %, and the re-

sistors were carefully selected to preserve the R,/RI = R4/R2 relationship. The resistor KR was selected to be 0 Q for G = 1 and 3.556 kQ for G = 10 to give maximally flat magnitude response and 1 kQ for G = 1 and 10 kQ for G = 10 to yield maximally flat phase response. The 1-pole and 2-pole op amp parameters as listed in Table I and used in the simulation were measured for pA741 op amp used in the experiment using the method described in [6]. Experiments were carried out to verify the expected frequency improvement of the proposed differential amplifier structure (Fig. 3). The experimental data obtained in both cases (maximally flat magnitude and phase responses) for G = 1 and G = I O are plotted in Fig. 6 and Fig. 7 along with the simulated curves to facilitate the comparison. Also shown in Figs. 6 and 7 are the simulated curves for the 2-pole op amp model with parameters listed in Table I. From Figs. 6 and 7 it may be seen that the experimental data are in close agreement with the simulated curves except at frequencies near the gain bandwidth product of the op amps. The minor deviation of the experimental data from the simulated curves may be attributed to the mismatching of op amps and their deviation from the parameters used in the simulation.

IEEE TRANSACTIONS ON INSTRUMENTATION A N D MEASUREMENT, VOL. 41, NO. 4. AUGUST 1992

559

,
51

KR=O

18

x x x experimental data - simulated 1-pole _ - _ - _simulated [2-pole]

u1-

2
6 U0

u23-

g
10

-'

10

10'

10'

10'

loo

I'

tucc -ucc Fig. 8. Monolithic unity-gain difference amplifier chip such as Burr-Brown INAlOS is configured as per the suggested approach to yield improved performance specifications.
V . CONCLUSIONS
A new configuration of an op amp-based differential amplifier comprising two op amps and six passive resistors (Fig. 3) is presented and is shown to exhibit fourth- and third-order magnitude and phase error terms, respectively, as opposed to second- and firstorder terms, respectively, in the conventional differential amplifier (Fig. 1). The resistor ratio matching which is required for high common-mode rejection (CMR), as defined in ( 3 ,however, remains unaffected. The maximally flat magnitude and phase responses are obtained in practice by choosing the value of resistor K R as dictated by the conditions (20) and (21), respectively. Note that the value of K R is not critical, and so its finer adjustment is not required. As the resistor ratio mismatch highly influences the C M R , the use of a hybrid resistor network is mandatory to guarantee highly stable common-mode rejection. Implementing resistor network R , to R, and R on the same substrate with the two op amps opens the possibility for successful application of the proposed differential amplifier circuit as shown in Fig. 3 with better performance as compared to the circuit in Fig. 1 . Integration of the whole amplifier (Fig. 3) into a single chip as the final design with terminals of K R provided outside, as shown in Fig. 8 under the bold thick line, would probably be feasible.

'7

'4

'1

Frequency( Hz)
Fig. 6. Simulated maximally flat magnitude versus frequency plots for G = 1 and G = 10 for the circuit in Fig. 3 using I-pole and 2-pole op amp models. x x shows the experimental data.

-801 "4""",
-120

, ,,,

y
'x,

io

iog

10'

10'

loo

'lf o 6

Frequency(Hz)
Fig. 7. Simulated maximally flat phases versus frequency plots for G = I and G = I O for the circuit in Fig. 3 using 1-pole and 2-pole op amp models. x x shows the experimental data.

REFERENCES
[ 11 Analog Devices, Data Acquisition Components and Subsystems, AD,

1980. To check further the validity of the approach described in this paper, a monolithic unity-gain difference amplifier chip such as Burr-Brown's INAlOS was configured as in Fig. 8 with R = 1 kQ and K R = 0 Q using a general purpose op amp pA741. This configuration was tested and was found to offer overall better performance than that of INAlOS alone. The response curve of the proposed structure, however, shows a peak at 316.2 kHz. This arises because of the fact that the realizable value of K was taken to be zero, which was greater than its value obtained using (20).
[2] Burr-Brown, The Handbook of Linear IC Applications, AZ, 1987. [ 3 ] J . G . Graeme, G. E. Tobey, and L. P. Huelsman, Operarional Amplifiers, Design and Application. New York: McGraw-Hill, 1971.

[4] A. A. Khan and A. Kumar, "A novel instrumentation amplifier with reduced magnitude and phase errors," IEEE Trans. Insrrum. Meas., vol. 40, pp. 1035-1038, 1991. [SI P. M. Chirlian, Analysis and Design of Integrated Elecrronic Circuits, Vol. 3, Analog Electronics. London, Harper and Row. chap. 16, pp. 826-830, 1982. [6] S . Natrajan, "A simple method to estimate gain-bandwidth product and the second-pole of the operational amplifier," IEEE Trans. Instrum. Meas., vol. 40, pp. 43-45, 1991.