ABSTRACT

The circuit chosen for our mini project is INTELLIGENT BELL. In this bell, there is a 2 position switch marked IN and OUT which is under the control of the house owner. When the house owner is at home, he keeps the switch at IN position and when a visitor comes, without pressing any bell switch, the bell sound is produced, which is contrary to the conventional bell systems in which the bell sound is produced after the visitor presses the bell switch. When the house owner goes out, he keeps the switch at the OUT position. When the switch is at OUT position and when a visitor comes, instead of a bell sound, a voice message is played to visitor which says that the house owner has gone out and asks the visitor to leave a voice message by pressing and holding the record button. Once the visitor presses and holds the record button and says whatever information he wants to convey to the house owner, it gets recorded onto the chip. When the house owner returns, he can very well playback the recorded messages and know about the visitors who had come to visit him while he was not at home. Hence the name intelligent bell is justified.

CONTENTS

1. INTRODUCTION. 2. SCOPE OF THE PROJECT. 3. BLOCK DIAGRAM. 3.1 PROXIMITY SENSOR 3.2 IN/OUT SELECTOR 3.3PRERECORDED CHIP 3.4RECORDING CHIP 3.5 OUTPUT SELECTOR 4. STUDY OF ICs. 4.1 STUDY OF APR9600. 4.1.1 FEATURES 4.1.2PIN DIAGRAM 4.1.3MESSAGE MANAGEMENT 4.1.4 SIGNAL STORAGE 4.1.5 SAMPLING RATE & VOICE QUALITY 4.1.6 AUTOMATIC GAIN CONTROL(AGC) 4.2 STUDY OF 555 TIMER. 4.2.1 PIN DETAILS 4.2.2 ASTABLE OPEARTION 4.3 STUDY OF TSOP 1738. 5. CIRCUIT SCHEMATIC OF “INTELLIGENT BELL”. 6. CIRCUIT DESCRIPTION.

1

6.1 POWER SUPPLY UNIT 6.2 555 TIMER CIRCUIT 6.3 TSOP1738 CIRCUIT 6.4 CIRCUIT FOR PRERECORDED CHIP 6.5 CIRCUIT FOR RECORDING CHIP 7. PCB FABRICATION AND SOLDERING. CONCLUSION. BIBLIOGRAPHY.

LIST OF DIAGRAMS

No.
3.2.1 3.2.2.1 3.2.2.2 4.3.1 4.3.2 5.1.1 5.2.1 5.3.1 5.4.1 5.5.1

Description
Pin diagram of 555 timer Astable operation of 555 timer Graph representing astable operation of 555 timer TSOP pin out Internal block diagram of TSOP 1738 Power supply for the entire circuit 555 timer circuit TSOP 1738 circuit Circuit for pre recorded chip Circuit for recorded chip

Page No.

INTRODUCTION

1. INTRODUCTION

The past 5 decades have seen the introduction of technologies that have radically changed the way in which we analyze and control the world around us. Starting from the vacuum tubes to the latest microcontrollers, Electronics has taken its place in almost all areas of application. Here we take a very low ended application of electronics and we have named it “INTELLIGENT BELL”. INTELLIGENT BELL is project work fabricated around an IC called APR9600.This chip is having inbuilt flash memory.

SCOPE OF THE PROJECT

2. SCOPE OF THE PROJECT.
In this project the IC used is APR 9600 which is having a recording capability of maximum 60seconds.But this can be efficiently enhanced using microprocessor controlled message management. Microprocessor control can be used to link several APR 9600 devices together in order to increase total available recording time. A continuous message cannot be recorded in multiple devices, however because the transition from one device to the next will incur a delay that is noticeable upon playback. For this reason it is recommended that message boundaries and device boundaries always coincide.

BLOCK DIAGRAM

3. BLOCK DIAGRAM

Block diagram of intelligent bell mainly consists of 6 blocks which are explained below: 3.1 PROXIMITY SENSOR This block includes 555 timer and TSOP1738 ICs. The 555 timer works as an astable multivibrator and the signal produced is received by the TSOP IC. A continuous infrared beam is maintained between the two circuits and any breakage to the infra red beam produces a logical low output. 3.2 IN/OUT SELECTOR This block is under the control of the house owner. It is actually a SPDT (single pole double terminal) switch. When the house owner goes out of the house, he keeps this switch at OUT position and when he is inside the house, he keeps this switch at IN position. 3.3PRERECORDED CHIP This block represents the chip which contains pre-recorded messages. The prerecorded messages are the bell sound and the play back message. When the owner has gone out, the play back message is played instead of the bell sound. This message asks the visitor to leave a message to the owner so that he can understand who had visited him, when he wasn’t at home. 3.4RECORDING CHIP This block represents the chip which is used for recording the messages of the visitors. 2.5 OUTPUT SELECTOR This block selects the output that is to be heard through the speaker. If the selector switch is at IN position, the output produced is a bell sound. If the switch is at OUT position, the prerecorded message is being played instead of the bell sound. During the playback mode, the recorded messages by the visitors are played.

STUDY OF ICs

3.1 STUDY OF APR9600

3.1.1 FEATURES

Single chip ,high quality voice recording and playback solution - No external ICs required - Minimum external components

Non-volatile Flash memory technology - No battery backup required

User-selectable messaging options - Random access of multiple fixed duration messages. - Sequential access of multiple variable duration messages

User friendly ,easy-to-use operation - Programming and development systems not required - Level activated recording and edge activated playback switches

Low power consumption - Operating current: 25mA typical - Standby current: 1μA typical - Automatic power down

Chip enable pin for simple message expansion

APR 9600 is a low cost, high performance sound record/replay IC, incorporating flash analogue storage technique. The IC is non-volatile; recorded sound is retained even after the power supply is removed from the module. The device offers true single chip voice recording and play back capability for 40 to 60 seconds. The replayed sound exhibits high quality with the low noise level. Sample rates are user selectable which allows the designers to customize their design for unique quality and storage time needs. Sampling rate for a 60 second recording period is 4.2 kHz that gives a sound record/replay bandwidth of 20 Hz to 2.1 KHz. However, by changing the oscillation resistor a high sampling rate can be achieved. Higher sampling rates improve the voice quality, but they also increase the bandwidth requirement and thus reduce the duration. Sampling rates as high as 8.0 KHz shortens the total length of sound recording to 32 seconds. Total sound recording time can be varied from 32 seconds to 60 seconds by changing the value of a single resistor. APLUS integrated, achieves high levels of storage capability by using its analog/multilevel storage technology implemented in an advanced flash nonvolatile memory process. The device offers both random and sequential access of multiple messages. The IC can be operated in two modes: • • Serial mode Parallel mode.

In serial access mode sound can be recorded in 256 sections; each memory cell can store 256 voltage levels. This technology enables the APR9600 device to reproduce voice signals in their natural form. It eliminates the need for encoding and compression which often introduces distortion.

In parallel access mode, sound can be recorded in 2, 4 or 8 sections. The IC can be controlled simply using push button keys. 3.1.2PIN DIAGRAM

/M1 /M2 /M3 /M4 /M5 /M6

1 2 3 4 5 6

28 27 26 25 24 23 22 21 20 19 18 17 16 15

VCCD /RE Ext CLK MSEL2 MSEL1 CE /STROBE Ana_Out Ana_In AGC MIC REF MIC IN VCCA SP-

OSCR 7 M7 M8 8 9

BUSY 10 BE 11

VSSD 12 VSSA 13 SP+ 14

Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

Name M1 M2 M3 M4 M5 M6 OSCR M7 M8 BUSY BE VSSD VSSA SP+ SPVCCA MIC IN MIC REF AGC ANA IN ANA OUT STROBE CE MSEL1 MSEL2 EXTCLK RE VCCD
st

Functions Select 1 section of sound or serial mode recording and replaying control(low active) Select 2nd section or fast forward control in serial mode (low active) Select 3rd section of the sound Select 4th section of the sound Select 5th section of the sound Select 6th section of the sound Resistor to set clock frequency Select 7th section of sound or overflow indication Select 8th section of sound or select mode Busy(low active) =1,beep when a key is pressed =0,do not beep Digital circuit ground Analogue circuit ground Speaker, positive end Speaker, negative end Analogue circuit power supply. Microphone input Microphone reference input Automatic gain control Audio input Audio output from microphone amplifier During recording and replaying, it produces a strobe signal Reset sound track counter to zero/stop or start/stop Mode selection 1 Mode selection 2 External clock input =0 to record, =1 to replay Digital circuit power supply

3.1.3MESSAGE MANAGEMENT

Play back and record options are managed by on chip circuitry. There are several available messaging modes depending upon desired operation. These message modes determine message management style and message management length. The device supports five message management modes: • • Random access mode with 2,4 or 8 fixed duration messages Tape mode with multiple variable duration messages, provides 2 options: Auto rewind Normal

Modes cannot be mixed. Switching of modes after the device has recorded an initial message is not recommended. If modes are switched after an initial recording has been made some unpredictable message fragments from the previous mode may remain present, and be audible on playback, in the new mode. The table defines the necessary decoding required for choosing the desired mode:

MODE Random access-2 fixed duration messages Random access-4 fixed duration messages Random access-8 fixed duration messages Tape mode, Auto rewind option Tape mode, Normal option

MSEL1 0 1 1 0 0

MSEL2 1 0 1 0 0

/M8_OPTION Pull this pin to VCC through 100k Pull this pin to VCC through 100k The /M8 message trigger becomes input pin 0 1

An important feature of the APR9600 Message management capabilities is the ability to audibly prompt the user to change in the device’s status through the use of beeps superimposed on the device’s output. This feature is enabled by asserting logic high on BE pin.

Random access mode
This mode supports 2, 4 or 8 message segments of fixed duration. Recording and play back can be made randomly in any of the selected messages. The length of each message is the total recording length available divided by the total number of segments enabled. Random access mode provides easy indexing to message segments. Tape mode

Tape mode manages messages sequentially much like traditional cassette tape recorders. Within tape mode two options exist, auto rewind and normal. Auto rewind mode configures the device to automatically rewind to the beginning of the message immediately following recording or playback of the message. In tape mode, using either option, messages must be recorded or played back sequentially, much like a traditional cassette tape recorder. Functional Description of Recording in Tape Mode using the Auto Rewind Option On power up, the device is ready to record or playback, starting at the first address in the memory array. To record, /CE must be set low to enable the device and /RE must be set low to enable recording. A falling edge of the /M1_MESSAGE pin initiates voice recording and is indicated by one beep. A subsequent rising edge of the /M1_MESSAGE pin during recording stops the recording which is also indicated by a single beep. If the M1_MESSAGE pin is held low beyond the end of the available memory, recording will stop automatically which is indicated by two beeps. The device will then assert a logic low on the /M7_END pin until the /M1 Message pin is released.

The device returns to standby mode when the /M1_MESSAGE pin goes high again. After recording is finished the device will automatically rewind to the beginning of the most recently recorded message and wait for the next user input. The auto rewind function is convenient because it allows the user to immediately playback and review the message

without the need to rewind. However, caution must be practiced because a subsequent record operation will overwrite the last recorded message unless the user remembers to pulse the /M2_Next pin in order to increment the device past the current message. A subsequent falling edge on the /M1_Message pin starts a new record operation, overwriting the previously existing message. You can preserve the previously recorded message by using the /M2_Next input to advance to the next available message segment. .The auto rewind mode allows the user to record over the just recorded message simply by initiating a record sequence without first toggling the /M2_NEXT pin. To record over any other message however requires a different sequence. You must pulse the /CE pin low once to rewind the device to the beginning of the voice memory. The /M2_NEXT pin must then be pulsed low for the specified number of times to move to the start of the message you wish to overwrite. Upon arriving at the desired message a record sequence can be initiated to overwrite the previously recorded material. After you overwrite the message it becomes the last available message and all previously recorded messages following this message become inaccessible. If during a record operation all of the available memory is used, the device will stop recording automatically, which is indicated by a double beep and set the /M7_END pin low for a duration equal to 1600 cycles of the sample clock. Playback can be initiated on this last message, but pulsing the /M2_Next pin will put the device into an "overflow state”. Once the device enters an overflow state any subsequent pulsing of /M1_MESSAGE or /M2_NEXT will only result in a double beep and setting of the /M7_END pin low for a duration equal to 400 cycles of the sample clock. To proceed from this state the user must rewind the device to the beginning of the memory array. This can be accomplished by toggling the /CE pin low or cycling power. All inputs, except the /CE pin, are ignored during recording.

Functional Description of Playback in Tape Mode using Auto Rewind Option

On power-up, the device is ready to record or playback, starting at the first address in the memory array. Before you can begin playback, the /CE input must be set to low to enable the device and /RE must be set to high to disable recording and enable playback. The first high to low going pulse of the /M1_MESSAGE pin initiates playback from the beginning of the current message; on power up the first message is the current message. When the /M1_MESSAGE pin pulses low the second time, playback of the current Message stops immediately. When the /M1_MESSAGE pin pulses low a third time, playback of the current message starts again from its beginning. If you hold the /M1_MESSAGE pin low continuously the same message will play continuously in a looping fashion. A 1,540ms period of silence is inserted during looping as an indicator to the user of the transition between the beginning and end of the message. Note that in auto rewind mode the device always rewinds to the beginning of the current message. To listen to a subsequent message the device must be fast forwarded past the current message to the next message. This function is accomplished by toggling the /M2_NEXT pin from high to low. After the device is incremented to the desired message the user can initiate playback of the message with the playback sequence described above. A special case exists when the /M2_NEXT pin goes low during playback. Playback of the current message will stop, the device will beep, advance to the next message and initiate playback of the next message. If /M2 Next goes low when not in playback mode, the device will prepare to play the next message, but will not actually initiate playback. If the /CE pin goes high during playback, playback of the current message will stop, the device will beep, reset to the beginning of the first message, and wait for a subsequent playback command. When you reach the end of the memory array, any subsequent pulsing of /M1_MESSAGE or /M2_NEXT will only result in a double beep. To proceed from this state the user must rewind the device to the beginning of the memory array. This can be accomplished by toggling the /CE pin low. 3.1.4 SIGNAL STORAGE

The APR9600 samples the incoming voice signals and stores the instantaneous voltage samples in non-volatile flash memory cells. Each memory cell can support voltage ranges from 0 to 256 levels. These 256 discrete levels are equivalent of 8 bit binary encoded values. During playback stored signals are retrieved from memory, smoothed to form a continuous signal, and then amplified before being fed to an external speaker.

3.1.5 SAMPLING RATE & VOICE QUALITY:

The APR9600 automatically filters its input, based on the selected sampling frequency. Higher sampling rates increase the bandwidth and hence the voice quality, but they also use more memory cells for the same length of recording time. Lower sampling rates use fewer memory cells and effectively increase the duration capabilities of the device, but they also reduce incoming signal bandwidth. The APR9600 accommodates sampling rates as high as 8 kHz and as low a 4 kHz. The quality/duration trade off can be controlled by controlling the sampling frequency. An internal oscillator provides the APR9600 sampling clock. Oscillator frequency can be Changed by changing the resistance from the OscR pin to GND. Table summarizes resistance values and the corresponding sampling frequencies, as well as the resulting input bandwidth and duration.

Resistance

Sampling Frequency

Input Bandwidth

Duration

84k 38k 24k

4.2 kHz 6.4 kHz 8.0 kHz

2.1 kHz 3.2 kHz 4.0 kHz

60 sec 40 sec 32 sec

3.1.6 AUTOMATIC GAIN CONTROL(AGC):

The APR9600 device has an integrated AGC. The AGC affects the microphone input but does not affect the ANA_IN input. The AGC circuit ensures that the input signal is properly amplified. The AGC works by applying maximum gain to small input signals and minimum gain to large input signals. This assures that inputs of varying amplitude are recorded at the optimum signal level. The AGC amplifier is designed to have a fast attack time and a slow decay time. This timing is controlled by the RC network connected to pin 19. A value of 220K and 4.7uF has been found to work well for the English language. Be aware that different languages, speakers from different countries, and music may all require modification of the recommended values for the AGC RC network.

3.2 STUDY OF 555 TIMER

The 555 timer is a monolithic timing circuit. It is capable of producing accurate and highly stable time delays. Basically the timer functions in one of the two modes either as monostable multivibrator. The timer is available as an 8-pin metal can, an 8 bit mini DIP or a 14 pin DIP. The figure shows the connection diagram and the block diagram of the SE/NE 555 timer.

Fig:3.2.1

The important features of the 555 timer as follows: 1. The timer is designed to operate for the temperature range of -55˚C to +125˚C. 2. The timer operates on +5V to +18V supply voltage. 3. The timer has an adjustable duty cycle. That is the timing is from microseconds through hours. 4. The timer can source or sink 200mA 5. The timer has a high current output. 6. The output of the timer is capable of driving TTL and has a temperature stability of 50 parts per million (ppm) per degree Celsius change in temperature. 7. Highly reliable. 8. Easy to handle. 9. Economically feasible. 3.2.1 PIN DETAILS Pin 1: Ground: All voltages are calculated with respect to this pin.

Pin 2: Trigger: External trigger pulse is applied at this pin which decides the amplitude of the timer output. If the voltage at this pin is lesser than 1/3 vcc, the output will at the comparator will be high and will reset the SR flip flop. Pin 3: Output: To connect the load to the output terminal, there are two methods. Either pin between pin 3 and ground or between pin 3 and supply voltage +Vcc. When the output is low, the load current is flowing through the load connected between pin 3 and +Vcc into the output terminal. This current is called sink current. When the output is low, the current through the grounded load is zero. Usually, the load connected between pin3 and Vcc is called normally on load. The load connected between pin3 and ground is known as normally off load. When the output is high, the current through the load connected between pin 3 and Vcc is zero. But the output terminal supplies current to the normally off load. This current is also known as the source current. The highest value of sink or source current is 200 mA. Pin 4: Reset: By applying a negative pulse to this pin, the 555 timer can be reset. When the reset is not in use, this terminal is connected to avoid the false triggering. Pin 5: Control voltage: The external voltage given to this terminal changes the threshold as well as the trigger voltage. That is, by imposing an external voltage on this pin or by introducing a potentiometer between this pin and ground, the pulse width of the output waveform can be changed. While not in use, the control pin should be by passed to ground with 0.01 μF capacitor to avoid noise problems. Pin 6: Threshold: This pin corresponds to the non-inverting input terminal of comparator 1.It monitors the voltage across the external capacitor. Pin 7: Discharge: Internally, this pin is connected to connected to the collector of transistor Q1.If the output is low,Q1 is saturated. Therefore it acts as a short circuit. If the output is high Q1 is off and it acts as an open circuit to the external capacitor connected across it. Pin 8: +Vcc: The supply voltage is in the range of +5V to +18 V is applied to this pin. 3.2.2 ASTABLE OPEARTION

Astable multivibrator is also known as free-running multivibrator. It is a rectangular wave shaping circuit having non-stable states. This circuit does not require any external trigger to change the state of its output and therefore is called as free running oscillator. The time for either high or low is determined by a capacitor and two resistors which are connected externally to the timer. The figure shows the 555 timer in the astable multivibrator configuration.

Fig: 3.2.2.1

Initially, when the output is high, capacitor charges towards +Vs through R1 and R2. If the capacitor voltage equals 2/3 Vs, then the comparator1 triggers the flip-flop and the output goes low. Now capacitor discharges through R2 and Q1.If the capacitor voltage is equal to 1/3 +Vs, then the comparator 2’s output triggers the flip-flop and output goes high. Now the cycle repeats. The output voltage and the capacitor waveforms are shown in the figure below.

Fig: 3.2.2.2

From the figure, we can observe that the capacitor is periodically charged and discharged between 2/3 Vs and 1/3 Vs respectively. The time required for the capacitor to charge from 1/3 Vs to 2/3 Vs is given by t m=0.69(R1+R2)C Where : R1 and R2 are resistances in ohms.] C is capacitance in farads. The time during which the capacitor discharges from 2/3 Vs to 1/3 Vs is equal to ts =0.69(R2)C The total period of waveform is T=tm + ts =0.69(R1 + 2 R2) C

3.3 STUDY OF TSOP1738

Burst length should be 10 cycles/burst or longer.

The TSOP17.. – Series are miniaturized receivers for infrared remote control systems. TSOP1738 is the standard IR remote control receiver, supporting all major transmission codes. Features • • • • • • • • • Photo detector and preamplifier in one package Internal filter for PCM frequency Improved shielding against electrical field disturbance TTL and CMOS compatibility Output active low Low power consumption High immunity against ambient light Continuous data transmission possible (up to 2400 bps) Suitable burst length = 10 cycles/burst

The circuit of the TSOP1738 is designed in such a way that unexpected output pulses due to noise or disturbance signals are avoided. A bandpassfilter, an integrator stage and an automatic gain control are used to suppress such disturbances. The distinguishing mark between data signal and disturbance signal are carrier frequency, burst length and duty cycle. The data signal should fulfill the following condition: • Carrier frequency should be close to center frequency of the band pass (e.g. 38 kHz).

• •

For each burst which is longer than 1.8 ms a corresponding gap time is necessary . After each burst which is between 10 cycles and 70 cycles a gap time of at least 14 cycles is necessary. at sometime in the DataStream. This gap time must have at least the same length as the burst.

The figure shows the pin out of TSOP

Fig:4.3.1

When a disturbance signal is applied to TSOP1738, it can still receive the data signal. However sensitivity is reduced to that level that no unexpected pulse will occur.

Fig:4.3.2

The figure shows the internal block diagram of the IC.

5. CIRCUIT DESCRIPTION

The circuit schematic of the project consists of the following units: 5.1Power supply unit 5.2555 timer circuit 5.3TSOP1738 circuit 5.4Circuit for prerecorded chip 5.5Circuit for recording chip

5.1 POWER SUPPLY UNIT: The power supply unit is the one which supplies power required by the whole circuit. This power supply is derived from AC through a step-down transformer, regulator and filter circuit as shown in the figure.

Fig: 5.1.1

When mains is available, the rectifier feeds the circuit. If a battery is connected, the mains charges the battery and in case of failure of mains, the battery provides the necessary voltage for the whole system to function.

The circuit mainly consists of a step-down transformer with secondary tapings. These supplies are obtained by means of a centre tap rectifier with 2 diodes which gives an unregulated output. This unregulated voltage is used to drive the outputs. Also a +5V series regulator circuit converts this unregulated supply into +5V regulated supply. The regulator used is a 3 terminal series regulator IC LM7805 to get +5V regulated output. 5.2 555 TIMER CIRCUIT:

Fig: 5.2.1

The above figure shows the 555 timer circuit. The 555 timer is working as an astable multivibrator.The IR LED emits Infrared radiations.

5.3 TSOP1738 CIRCUIT:

Fig: 5.3.1

The TSOP 1738 circuit receives the IR radiation from the 555 timer ciruit.Thus an IR beam is established between timer circuit and the TSOP circuit. Whenever a person breaks this IR beam, a logic low output is produced from this circuit and is fed into the SPDT switch which is connected the pre-recorded chip.

5.4 CIRCUIT FOR PRERECORDED CHIP The circuit consists of the pre recorded chip. This chip contains the bell sound and the voice message that is to be played by the intelligent bell to the visitor when the owner has gone out. When the owner is inside, the SPDT switch is at IN position and when the visitor comes and causes the breakage of the IR beam, the bell sound is heard.

Fig: 5.4.1

When the owner goes outside and when the visitor comes and causes the breakage of the IR beam, the voice message instructing the visitor to leave a voice message for the owner is delivered by the intelligent bell. This portion of the job is the responsibility of the prerecorded chip.

5.5 CIRCUIT FOR RECORDING CHIP Recording chip can otherwise be referred to as the visitor’s chip. When the house owner goes out he keeps the SPDT switch at the OUT position. So when a visitor comes, due to the breakage of IR beam, the voice message is played by the intelligent bell. The voice message actually asks the visitor to leave a voice message by pressing and holding the record button. Till the record button is released, whatever the visitor has told will be recorded. The IC is having a maximum capacity of 60 seconds. If the visitor keeps on

holding the record button even after this 60 seconds, then beeps are produced which indicate that its memory is full indicating no further recording can be possible. Via a DPDT switch, both the chips, the recording as well as the pre recorded chips are connected to the speaker.

Fig: 5.5.1

6. PCB MAKING
There are several ways of drawing PCB patterns and making the final boards. The making of the PCB generally involves two steps (1) Preparing the PCB drawing (2) Fabricating the PCB itself from the drawing. The traditional method is PCB drawing with complete placement of parts, taking a photographic negative of the drawing, developing the image of the negative formed on the photosensitized copper plate, and dissolving the excess copper by etching. This is the standard practice being followed in large scale operations. The cost saving procedure presented here may be opted.

PCB DRAWING The making of the PCB involves some preliminary considerations such as placement of components (in the same order as in the circuit diagram) on a piece of paper. Locating holes, deciding the diameters of various holes, the optimum area that each component should occupy, the shape and location of islands for connecting two or more components at a place, full space utilization and prevention of overcrowding of components at a particular place. For anchoring levels of components, 1mm diameter holes; and for fixing PCB holding screws to the chassis 3mm diameter holes can be made. Following these hints a sketch of the PCB is made. PCB FABRICATION

The copper clad PCB laminate is now prepared by rubbing away the oxide, grease etc. with fine emery paper or sand paper. On this, final PCB drawing may be traced using a carbon paper. Clips are used to prevent the carbon paper from slipping while the PCB pattern is being traced on the laminate. Only the connecting lines in

PCB’s islands and holes should be traced. The marked holes in the PCB may be drilled using 1mm or 3mm drill bits and the traced PCB pattern is coated with black, quick drying-enamel paint, using a thin brush and a small metal case. In case if there is any shorting of lines due to spilling of paint, these may be removed by scraping with a blade or a knife, after the paint has dried.

After drying, 22-20 grams of ferric chloride in 75ml of water may be heated to about 60 degree Celsius and poured over the PCB, placed with the copper side upwards in a plastic tray. Stirring the solution helps speedy etching. The dissolution of unwanted copper may take about 45 minutes. If etching takes longer time, the solution may be heated again and the process may be repeated. The point on the PCB can be removed by rubbing with a rag soaked in thinner, turpentine or acetone. The PCB is then washed and dried. Depending on the wiring diagram, the components are soldered on the PCB. Usually the resistors are soldered first and then the IC’s are soldered.

SOLDERING

All components are first tested. The leads of all components are cleared by rubbing with an abrasive. The PCB is also cleaned by scratching off the varnish layer at the selected point. The lead of the component to be soldered is applied with some flux to remove any remaining oxide coating.

7. SCOPE OF THE PROJECT.
In this project the IC used is APR 9600 which is having a recording capability of maximum 60seconds.But this can be efficiently enhanced using microprocessor controlled message management. Microprocessor control can be used to link several APR 9600 devices together in order to increase total available recording time. A continuous message cannot be recorded in multiple devices, however because the transition from one device to the next will incur a delay that is noticeable upon playback. For this reason it is recommended that message boundaries and device boundaries always coincide.

CONCLUSION
The intelligent bell has been successfully designed, assembled and tested for its performance. Proper selection of the components and designing aesthetically shall convert this into a commercially viable product.

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