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Test Parameter

Typ. Unit

Typical Description

Each input of an operational amplifier has a certain amount of current that flows in or out of it. This is basically the leakage current of the input transistor, i.e., the base leakage current if the input transistor is bipolar, or the gate leakage current if it is a FET. This current is known as the input bias current, and is ideally zero. Example of an Actual Spec: AD829: 3.3 µA typ.; 7 µA max. This is simply the mismatch or difference between the input bias currents flowing through the inputs. This is ideally zero. Example of an Actual Spec: AD829: 50 nA typ.; 500 nA max. An ideal operational amplifier will give an output of 0V if both of its inputs are shorted together. A real-world op amp will have a non-zero voltage output even if its inputs are shorted together. This is the effect of its input offset voltage, which is the slight voltage present across its inputs brought about by its non-zero input offset current. In essence, the input voltage offset is also the voltage that needs to be applied across the inputs of an op amp to make its output zero. Example of an Actual Spec: AD712C: 0.1 mV typ.; 0.3 mV max. This is the ratio of the op amp's output voltage to its differential input voltage without any external feedback. Example of an Actual Spec: AD712: 150 V/mV min.; 400 V/mV typ. This is the product of the op amp's open-loop voltage gain and the frequency at which it was measured. Example of an Actual Spec: AD829: 750 MHz for Vs=+/-15V This is the rate of change of the op amp's voltage output over time when its gain is set to unity (Gain =1). Example of an Actual Spec: AD712: 16 V/µsec min.; 20 V/µsec typ. This is the length of time for the output voltage of an operational amplifier to approach, and remain within, a certain tolerance of its final value. This is usually specified for a fast full-scale input step. Example of an Actual Spec: Settling time to 0.1% for a 10V step with Vs=+/15V: 90 nsec This is the ability of an operational amplifier to cancel out or reject any signals that are common to both inputs, and amplify any signals that are

Input Bias Current

µA

Input Offset Current

nA

Input Offset Voltage

mV

Open-Loop Gain

V/mV

Gain-Bandwidth Product

MHz

Slew Rate

V/µsec

Settling Time

nsec

Common Mode Rejection (CMR)

dB

com Example of an Actual Spec: AD847: 50 degrees AD829: 60 degrees This is the maximum voltage (negative or positive) that can be applied at both inputs of an operational amplifier at the same time. values of phase margin much less than 45° can cause problems such as "peaking" in frequency response.e.5V. Example of an Actual Spec: AD829: 100 dB min.5V to +/-18V An op amp will tend to oscillate at a frequency wherein the loop phase shift exceeds -180°. divided by the circuit's closed loop gain.analog. As phase margin approaches zero. the pole generated by capacitive loading should be at least a decade above the circuit's closed loop bandwidth. Vs=+/-15V Power Supply Rejection (PSR) dB Phase Margin degrees Input Voltage Range. The phase margin of an op amp circuit is the amount of additional phase shift at the closed loop bandwidth required to make the circuit unstable (i.e. phase shift + phase margin = -180°). PSR is a measure of an op amp’s ability to prevent its output from being affected by noise or ripples at the power supply. In order to maintain conservative phase margin.. 120 dB typ. Differential V Output Voltage Swing +/-V . It is computed as the ratio of the change in the power supply voltage to the change in the op amp's output voltage (caused by the power supply change). 120 dB typ... Common Mode V Input Voltage Range. with respect to the ground. Example of an Actual Spec: AD829: 98 dB min. for Vs=+/-15 V. CMRR is simply the ratio of the differential gain to the common-mode gain. Examples of Actual Specs: AD712: +14.5 V typ. for Vs=+/-4. Reference: www. Common mode rejection is the logarithmic expression of CMRR. if this frequency is below the closed-loop bandwidth. for R=1K. Example of an Actual Spec: +/-11V min.. CMR=20logCMRR. Example of an Actual Spec: AD712: +/-20V This is the maximum output voltage that the op amp can deliver without saturation or clipping for a given load and operating supply voltage. and overshoot or "ringing" in step response. The closed-loop bandwidth of a voltage-feedback op amp circuit is equal to the op amp's bandwidth at unity gain.10V for Vs=+/-15 V This is the maximum voltage (negative or positive) that can be applied across the two inputs of an operational amplifier. Typically. the loop phase shift approaches -180° and the op amp circuit approaches instability. AD844: +/.differential between them. It is often expressed in dB. i.. +/-13V typ. -11.

Example of an Actual Spec: OP27C: 0. The common mode input resistance of an op amp is the equivalent resistance value of the op amp's two input resistances in parallel. 4 M typ..8 mA max. Input Resistance or Impedance. Differential M This is the small-signal resistance between the two inputs (both ungrounded) of an op amp. 140-170 mW max.Input Resistance or Impedance. Example of an Actual Spec: AD844: 15 typ. Each input of an op amp has a resistance with respect to ground. Example of an Actual Spec: OP27: 90-100 mW typ.. This is the resistance of the two inputs shorted together with respect to ground.. Example of an Actual Spec: OP27C: 2 G typ. Example of an Actual Spec: AD712: 5 mA typ.4. Common Mode G Output Resistance or Impedance Power Supply Range V Quiescent Current mA Total Power Dissipation mW . This is the non-signal power supply current that the op amp will consume within a specified power supply voltage operating range. Example of an Actual Spec: AD712: +/..5V min.7 Mmin. This is the small-signal resistance or impedance between the output of an op amp and ground.. 6. for Vs=+/-15V The total DC power supplied to the op amp minus the power delivered by the op amp to its load. open loop This refers to the minimum and maximum values of supply voltages that the negative and positive supplies of an operational amplifier can accept. +/-18V max.

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