You are on page 1of 107

www.final-yearproject.com | www.finalyearthesis.

com

DATA LOGGER

ABSTRACT

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

ABSTRACT
As in the process control system it is very often required to record the various process parameters like temperature, pressure, flow, voltage, current, strain etc..And this parameter values will be used for maintaining the process control system automatically. Sensing and recording of physical parameters plays an important role in many industries. In the past analog devices were used for measurement of such parameters. A simple technique combining analog and digital circuit theory together with programming techniques has been used in this paper to design a temperature and pressure sensing system. The sensors analog signal is applied to a micro-controller based data logger for storage purposes. The main objective of our project is to log and store the data and by using this data we can analyze the performance of the system s. Generally in any process industries along with the supervision of the parameters, analyzing the system performance is also an important task .So, in order to analyze the performance we need to acquire the data regarding that particular device. For this purpose we use data loggers. In this project the physical quantities that we are measuring are temperature, pressure and liquid level. All the three parameters are sensed by using particular sensors, temperature is measured by using temperature transducer, pressure by using multi turn pot and liquid level is sensed by using limit switch.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

The outputs of these sensors are given to microcontroller which is used for automation, Real time clock to find out date and time of occurrence of the incident, a permanent memory (EEPROM) for keeping the detail coming from the RTC. A key board and display unit is used for the user interface. The data logged is displayed on LCD. Here we are using micro switches as key board in order to set the time, temperature, pressure. And when the operator wants these details can be accessed using a key board and it will be displayed in the LCD display.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

LIST OF CONTENTS
CHAPTER CHAPTER 1 1.0 1.1 1.2 1.3 CHAPTER 2 2.0 2.1 2.2 CHAPTER 3 3.0 3.1 TITLE INTRODUCTION WHAT IS DATA LOGGER DIFFERENT TYPES OF DATA LOGGERS NETWORKING AIM OF THE PROJECT WORKING PRINCIPLE BLOCK DIAGRAM OF DATA LOGGER FUNCTIONAL DIAGRAM CIRCUIT DESCRIPTION DESIGN PROCEDURE POWER SUPPLY PIC 16F877 MICROCONTROLLER 3.1.1 INTRODUCTION TO MICROPROCESSORS 3.1.2 INTRODUCTION TO MICROCONTROLLERS 3.1.3 PIC 16F877 MICROCONTROLLER I2C PROTOCOL REAL TIME CLOCK EEPROM TEMPERATURE SENSOR MULTI TURN POT LIMIT SWITCH LCD MICRO SWITCHES RESULTS OF THE PROJECT ADVANTAGES AND APPLICATIONS ADVANTAGES OF USING A DATA LOGGER FOR COLLECTING DATA DATA LOGGING VERSUS DATA ACQUISITION APPLICATIONS CONCLUSION AND FUTURE DIRECTIONS APPENDIX BIBLIOGRAPHY PAGE NO 10 11 11 12 12 13 14 15 16 17 18 21 21 21 22 31 40 48 56 67 69 70 75 76 82 83 83 85 86 88 107

3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 CHAPTER 4 CHAPTER 5 5.0 5.1 5.2 CHAPTER 6

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

CHAPTER 1 INTRODUCTION

1.0 INTRODUCTION TO DATA LOGGERS:


WHAT IS A DATA LOGGER?
A Data logger is an electronic instrument used to take measurements from sensors and store those measurements for future use. Some common measurements include temperature, pressure, current, velocity, strain, displacement, and other physical phenomena.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

This includes many data acquisition devices such as plug-in boards or serial communication systems which use a computer as a real time data recording system. However, most instrument manufacturers consider a data logger a stand alone device that can read various types of electrical signals and store the data in internal memory for later download to a computer. Data loggers vary between general purpose types for a range of measurement applications to very specific devices for measuring in one environment only. It is common for general purpose types to be programmable however many remains as static machines with only a limited number of changeable parameters. Electronic data loggers have replaced chart records in many applications.

1.1 DIFFERENT TYPES OF DATA LOGGERS:


The differences between various data loggers are based on the way that data is recorded and stored. The basic difference between the two data logger types is that one type allows the data to be stored in a memory, to be retrieved at a later time, while the other type automatically records the data on paper, for immediate viewing and analysis. Many data loggers combine these two functions, usually unequally, with the emphasis on either the ability to transfer the data or to provide a printout of it.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

1.2

HOW CAN NETWORKING BE USED FOR

EXTENSIVE CQUISITION REQUIREMENTS?


For users who must acquire data over many locations, and wish to have a single collection/recording point, networking is a truly viable solution. With a network, one central location is responsible for data storage and recording; data is collected by remote units in various locations, and then fed to this master unit for storage/recording. This is a great convenience, in that an operator can retrieve the data from one location, rather than having to go to each individual site for collection.

1.3 AIM OF PROJECT:


To capture the data (Temperature, pressure, flow etc) by using sensors for maintaining the process control systems automatically.

COMPONENTS REQUIRED: HARDWARE:


o Microcontroller (PIC 16F877) o RTC (DS 1307) o EEPROM (24LC64) o Temperature Sensor (DS 1621) o Multi 10 Pot o Limit switch o LCD

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

CHAPTER 2. WORKING PRINCIPLE

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

2.0 BLOCK DIAGRAM:

DISPLAY

RTC

EMBEDDED CONTROLER

EPROM

TEMP. TRANSDUCER KEY BOARD

MULTI TURN POT

POWER SUPPLY

LIMIT LIMIT SWITCH

Fig 1:

BLOCK DIAGRAM OF DATA LOGGER

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

2.1 FUNCTIONAL DIAGRAM

Fig 2:

FUNCTIONAL DIAGRAM

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

2.2 CIRCUIT DESCRIPTION:


A soft ware program written in Embedded C is loaded in the embedded controller, using a suitable temperature transducer (DS1621 is a Digital Thermometer and Thermostat which measures temperature with out any external components from -55C to +125C in 0.5C increments and Converts it to digital word in less than 1 second). temperature of the plant (normally a boiler) is measured and it is given as input to the embedded controller, and this value is compared with the set temperature value which is already kept in the controller if it exceeds the set value the RTC will be activated and the date and time at which it occurs will be stored in the EEPROM which is kept externally. Similarly the output of the multi turn pot indicates the changes in pressure. This analog signal is given as input to the micro controller which will be converted as digital signal using the built in ADC peripheral of the embedded controller this value is compared with the set temperature value which is already kept in the controller if it exceeds the set value the RTC will be activated and the date and time at which it occurs will be stored in the EEPROM. Simultaneously the system will give a siren as indication this will go off if unattended, in this manner the system can store as many as 255 records in the memory as and when the operator want this details can be accessed using a key board and it will be displayed in the LCD display. A regulated power supply of required voltage is provided to power up the circuit. The hardware is assembled and tested for proper functioning .the programming of micro controller involves writing the program on a PC. This may be done in either C or Assembly. The program if written in C is compiled to generate the Hex file. The Hex file needs to be in the INTEL Hex format. If program is written in assembly, it is compiled to produce the obj file. Subsequently a linker is used to generate the appropriate INTEL Hex file. Then this is programmed in to the micro controller using a programmer. The programmed micro controller is appropriately called the firmware for the data logger.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

CHAPTER 3. DESIGN PROCEDURE

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

3.0

POWER SUPPLY

Fig: POWER SUPPLY

STEP DOWN TRANSFORMER:


The step down transformer is used to step down the main supply voltage from 230V AC to lower value. This 230V AC voltage cannot be used directly, thus it is stepped down. The transformer consists of primary and secondary coils. To reduce or step down the voltage the transformer is designed to contain less number of turns in its secondary core. The output from the secondary coil is also in AC form. Thus the conversion from AC to DC is essential. This conversion is achieved by using the rectifier circuit.

RECTIFIER:
The rectifier circuit is used to convert the AC voltage into its corresponding DC voltage. There are half wave and full wave rectifiers available for this specific function. The most important simple device used in rectifier circuit is the diode the simple function of the diode is to conduct when forward biased and not to conduct in reverse bias. The efficient circuit used is the full wave bridge rectifier circuit. The output voltage of the rectifier is in ripple form. The ripples from the obtained DC voltages are removed by using the filter circuit.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

INPUT FILTER:
Capacitors are used as filters. The ripples from the DC voltage are removed and pure DC voltage is obtained. The primary action performed by capacitor is charging and discharging; it charges in positive half cycle of the AC voltage and discharges during the negative half cycle. So it allows only the AC voltage and does not allow DC voltage. This filter is fixed before the regulator thus the output is free from ripples.

REGULATOR UNIT:
Regulator regulates the output voltage to be always constant. The output voltage is maintained constant irrespective of the fluctuations in the input AC voltage. When the internal resistance of the power supply is greater than 30ohms the output gets fluctuated. Thus this can be successfully reduced here. The regulators are mainly classified for low voltage and for high voltage. Positive regulator regulates the positive voltage. Negative regulator regulates the negative voltage.

FIXED POSITIVE VOLTAGE REGULATORS:

Fig: VOLTAGE REGULATOR The series 78XX regulators provide fixed regulated voltages from +5V to +24V. Figure shows how one such IC, a 7805, is connected to provide voltage regulation with output from this unit of +5V DC. An unregulated input voltage Vi is filtered by capacitor Ci and connected to the ICs IN terminal. The ICs OUT terminal provides a regulated +5V, which is filtered by capacitor Co (mostly for any high frequency noise). The third terminal of IC is connected to ground (GND). While the input voltage may vary over some permissible voltage range and the output load may vary over some acceptable range, the output voltage

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

remains constant within specified voltage variation limits. These limitations are spelled out in the manufacturers specification sheets. A table of positive voltage regulated ICs is provided in the following table:

POSITIVE VOLTAGE REGULATOR IN 7800 SERIES:

IC PART 7805

OUTPUT VOLTAGE(V)

MINIMUM Vi(V)

+5 +6 +8 +10 +12 +15 +18


+24

7.3 8.3 10.5 12.5 14.6 17.7 21.0


27.1

7806 7808 7810 7812 7815 7818 7824

OUTPUT FILTER:
The filter circuit is often fixed after the regulator circuit. Capacitor is most often used as filter. The principle of the capacitor is to charge and discharge. It charges during the positive half cycle of the AC voltage and discharges during the negative half cycle. So it allows only the AC voltage and does not allow the DC voltage. This filter is fixed after the regulator circuit to filter any of the possibly found ripples in the output received finally. The output at this stage is 5V and is given to the micro controller PIC16F877.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

3.1 PIC16F877 MICROCONTROLLER


40-Pin 8-Bit CMOS FLASH MICRO CONTROLLER

3.1.1 INTRODUCTION TO MICRO PROCESSOR:


The microprocessor or CPU is the controller for the micro controller system. It controls all the bus activities, performs calculations and makes decisions. The microprocessor is programmable and its operations are controlled by a sequence of instructions. These instructions are of data transfer .arithmetic and logic and program control instructions. The combination of programmable CPU and its bus control signal result in an extremely flexible system that can easily be customized for a given application. The micro processor used for an embedded system is relatively simple when compared with microprocessors designed for desktop computers.

3.1.2 INTRODUCTION TO MICRO CONTROLLER:


The micro computer often called the embedded system is a very flexible system that allows the designer to include only the devices required for the specific application, which is especially important for embedded system. If a micro controller is integrated or embedded in a single IC it is called a single chip micro computer or micro controller (MCU). These terms are often used inter changeably but they really represent different applications. A single chip micro controller typically contains the resources that are typically used for computers such as memory management unit and disk controller. The micro controller on the other hand contains resources typically used for embedded systems such as timers and ADCs small packages and effectiveness are the guiding factors when selecting a micro controller includes video games, laser printers, and network routers, automotive engine control systems etc.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

PIN DIAGRAM OF PIC16F877:

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

MICROCONTROLLER CORE FEATURES:


High performance RISC CPU Only 35 single word instructions to learn All single cycle instructions except for program branches which are two cycle Operating speed: DC - 20 MHz clock input DC - 200 ns instruction cycle Up to 8K x 14 words of FLASH Program Memory, Up to 368 x 8 bytes of Data Memory (RAM), Up to 256 x 8 bytes of EEPROM Data Memory Pin out compatible to the PIC16C73B/74B/76/77 Interrupt capability (up to 14 sources) Eight level deep hardware stack Direct, indirect and relative addressing modes Power-on Reset (POR) Power-up Timer (PWRT) and Oscillator Start-up Timer (OST) Watchdog Timer (WDT) with its own on-chip RC oscillator for reliable operation Programmable code protection Power saving SLEEP mode Selectable oscillator options Low power, high speed CMOS FLASH/EEPROM technology Fully static design In-Circuit Serial Programming (ICSP) via two pins Single 5V In-Circuit Serial Programming capability In-Circuit Debugging via two pins Processor read/write access to program memory Wide operating voltage range: 2.0V to 5.5V High Sink/Source Current: 25 mA Commercial, Industrial and Extended temperature ranges Low-power consumption: < 0.6 mA typical @3V, 4 MHz

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

20 A typical @ 3V, 32 KHZ < 1A typical standby current

PERIPHERAL FEATURES:
Timer0: 8-bit timer/counter with 8-bit prescaler Timer1: 16-bit timer/counter with prescaler, can be incremented during SLEEP via external Crystal/clock Timer2: 8-bit timer/counter with 8-bit period register, prescaler and post scaler Two Capture, Compare, PWM modules Capture is 16-bit, max. resolution is 12.5 ns Compare is 16-bit, max. resolution is 200 ns PWM max. resolution is 10-bit

10-bit multi-channel Analog-to-Digital converter Synchronous Serial Port (SSP) with SPI(Master mode) and I2C(Master/Slave) Universal Synchronous Asynchronous Receiver Transmitter (USART/SCI) with 9bit address detection Parallel Slave Port (PSP) 8-bits wide, with external RD, WR and CS controls (40/44pin only) Brown-out detection circuitry for Brown-out Reset (BOR)

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

FIGURE 1: PIC16F877 ARCHITECHTURE

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

TABLE: PIC16F877 PINOUT DESCRIPTION:


PIN NAME RB5 RB6/PGC RB7/PGD DIP PIN # 38 39 40 I/O/P TYP E I/O I/O I/O BUFFER TYPE TTL DESCRIPTION Interrupt-On-Change pin.

TTL/ST(2) Interrupt-On-Change pin or incircuit debugger pin. Serial programming clock. TTL/ST(2) Interrupt-On-Change pin or incircuit debugger pin. Serial programming data. PORTC is a bi-directional I/O port.

RC0/T1OSO/T1CKI 15 RC1/T1OSI/CCP2 16

I/O I/O

ST RC0 can also be the Timer1 OSC output or a Timer1 CLK input. ST RCI can also be the Timer1 OSC input or capture2 input/ compare2 output/ PWM2 output..

RC2/CCP1 RC3/SCK/SCL

17 18

I/O I/O

ST RC2 can also be capture1 input/ compare2 output/ PWM1 output.. ST RC3 can also be the synchronous serial clock input/ output for both SPI and I2C modes.

RC4/SDI/SDA RC5/SDO RC6/TX/CK

23 24 25

I/O I/O I/O

ST ST ST RC4 can also be the SPI data in (SPI mode) or data I/O (I2C mode). RC5 can also be the SPI Data Out RC6 can also be the USSART asynchronous transmit or synchronous clock. RC6 can also be the USSART asynchronous receive or synchronous data.

RC7/RX/DT

26

I/O

ST

* Refer Note 1 in Appendix-C

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

PIN NAME

DIP PIN #

I/O/P TYP E

BUFFER TYPE

DESCRIPTION PORTD is a bi-directional I/O port or parallel slave port when interfacing to a microprocessor bus.

RD0/PSP0 RD1/PSP1 RD2/PSP2 RD3/PSP3 RD4/PSP4 RD5/PSP5 RD6/PSP6 RD7/PSP7

19 20 21 22 27 28 29 30

I/O I/O I/O I/O I/O I/O I/O I/O

ST/TTL(3) ST/TTL(3) ST/TTL(3) ST/TTL(3) ST/TTL(3) ST/TTL(3) ST/TTL(3) ST/TTL(3) PORTE is a bi-directional I/O port.

RE0/RD/AN5

I/O I/O I/O P P

ST/TTL(3) RE0 can also be read control for the parallel slave port or analog input 5. ST/TTL(3) RE1 can also be write control for the parallel slave port or analog input 6. ST/TTL(3) RE2 can also be select control for the parallel slave port or analog input 7. Ground reference for logic and I/O pins. Positive supply for logic and I/O pins

RE1/WR/AN6 9 RE2/CS/AN7 VSS VDD 10 12,3 1 11,3 2

* Refer Note 1 in Appendix-c

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

MEMORY ORGANIZATION:
There are three memory blocks in each of the PIC16F87X MCUs. The Program Memory and Data Memory have separate buses so that concurrent access can occur.

FIGURE:

PIC16F877/876 PROGRAM MEMORY MAP AND STACK

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

PROGRAM MEMORY ORGANIZATION:


The PIC16F87X devices have a 13-bit program counter capable of addressing an 8K x 14 program memory space. The PIC16F877/876 devices have 8K x 14 words of FLASH program memory, and the PIC16F873/874 devices have 4K x 14. Accessing a location above the physically implemented address will cause a wraparound. The RESET vector is at 0000h and the interrupt vector is at 0004h.

DATA MEMORY ORGANIZATION:


The data memory is partitioned into multiple banks which contain the General Purpose Registers and the Special Function Registers. Bits RP1 (STATUS<6>) and RP0 (STATUS<5>) are the bank select bits. RP1:RP0 00 01 10 11 BANK 0 1 2 3

Each bank extends up to 7Fh (128 bytes). The lower locations of each bank are reserved for the Special Function Registers. Above the Special Function Registers are General Purpose Registers, implemented as static RAM. All implemented banks contain Special Function Registers. Some frequently used Special Function Registers from one bank may be mirrored in another bank for code reduction and quicker access.

GENERAL PURPOSE REGISTER FILE:


The register file can be accessed either directly or indirectly through the File Select Register (FSR).

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

3.2 I2C PROTOCOL


HISTORY OF THE I2C BUS
The I2C bus was developed in the early 1980's by Philips Semiconductors. Its original purpose was to provide an easy way to connect a CPU to peripheral chips in a TV-set. IC is a multi-master serial computer bus used to attach low-speed peripherals to a motherboard, embedded system, or cell phone. The name stands for InterIntegrated Circuit and is pronounced I-squared-C and also, I-two-C.

THE I2C BUS PROTOCOL


The I2C bus physically consists of 2 active wires and a ground connection. The active wires, called SDA and SCL, are both bi-directional. SDA is the Serial data line, and SCL is the Serial clock line. Every device hooked up to the bus has its own unique address, no matter whether it is an MCU, LCD driver, memory, or ASIC. Each of these chips can act as a receiver and/or transmitter, depending on the functionality. Obviously, an LCD driver is only a receiver, while a memory or I/O chip can be both transmitter and receiver. The I2C bus is a multi-master bus. This means that more than one IC capable of initiating a data transfer can be connected to it. The I2C protocol specification states that the IC that initiates a data transfer on the bus is considered the Bus Master. Consequently, at that time, all the other ICs are regarded to be Bus Slaves. As bus masters are generally microcontrollers, let's take a look at a general 'inter-IC chat' on the bus. Lets consider the following setup and assume the MCU

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

wants to send data to one of its slaves.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

OPERATION:
First, the MCU will issue a START condition. This acts as an 'Attention' signal to all of the connected devices. All ICs on the bus will listen to the bus for incoming data. Then the MCU sends the ADDRESS of the device it wants to access, along with an indication whether the access is a Read or Write operation (Write in our example). Having received the address, all IC's will compare it with their own address. If it doesn't match, they simply wait until the bus is released by the stop condition (see below). If the address matches, however, the chip will produce a response called the ACKNOWLEDGEMENT signal. Once the MCU receives the acknowledge, it can start transmitting or receiving DATA. In our case, the MCU will transmit data. When all is done, the MCU will issue the STOP condition. This is a signal that the bus has been released and that the connected ICs may expect another transmission to start any moment. We have had several states on the bus in our example: START, ADDRSS, ACKNOWLEDGEMENT, DATA and STOP. These are all unique conditions on the bus. Before we take a closer look at these bus conditions we need to understand a bit about the physical structure and hardware of the bus.

THE I2C BUS HARDWARE STRUCTURE


As explained earlier, the bus physically consists of 2 active wires called SDA (data) and SCL (clock), and a ground connection. Both SDA and SCL are initially bi-directional. This means that in a particular device, these lines can be driven by the IC itself or from an external device. In order to achieve this functionality, these signals use open collector or open drain outputs (depending on the technology). The bus interface is built around an input buffer and an open drain or open collector transistor. When the bus is IDLE, the bus lines are in the logic HIGH state

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

(note that external pull-up resistors are necessary for this which is easily forgotten). To put a signal on the bus, the chip drives its output transistor, thus pulling the bus to a LOW level. The "pull-up resistor" in the devices as seen in the figure is actually a small current source or even non-existent.

I2C Bus Events: The START and STOP conditions:


Prior to any transaction on the bus, a START condition needs to be issued on the bus. The start condition acts as a signal to all connected IC's that something is about to be transmitted on the bus. As a result, all connected chips will listen to the bus. After a message has been completed, a STOP condition is sent. This is the signal for all devices on the bus that the bus is available again (idle). If a chip was accessed and has received data during the last transaction, it will now process this information (if not already processed during the reception of the message). START: The chip issuing the Start condition first pulls the SDA (data) line low, and next pulls the SCL (clock) line low.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

STOP: The Bus Master first releases the SCL and then the SDA line.

A single message can contain multiple Start conditions. The use of this socalled "repeated start" is common in I2C.

A Stop condition always denotes the END of a transmission. Even if it is issued in the middle of a transaction or in the middle of a byte. It is "good behavior" for a chip that, in this case, it disregards the information sent and resumes the "listening state", waiting for a new start condition.

I2C BUS EVENTS: TRANSMITTING A BYTE TO A SLAVE:


Once the start condition has been sent, a byte can be transmitted by the MASTER to the SLAVE. This first byte after a start condition will identify the slave on the bus (address) and will select the mode of operation. The meaning of all following bytes depends on the slave.

As the I2C bus gained popularity, it was soon discovered that the number of available addresses was too small. Therefore, one of the reserved addresses has been

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

allocated to a new task to switch to 10-bit addressing mode. If a standard slave (not able to resolve extended addressing) receives this address, it won't do anything (since it's not its address). If there are slaves on the bus that can operate in the extended 10-bit addressing mode, they will ALL respond to the ACK cycle issued by the master. The second byte that gets transmitted by the master will then be taken in and evaluated against their address.

I2C BUS EVENTS: RECEIVING A BYTE FROM A SLAVE:


Once the slave has been addressed and the slave has acknowledged this, a byte can be received from the slave if the R/W bit in the address was set to READ (set to '1'). The protocol syntax is the same as in transmitting a byte to a slave, except that now the master is not allowed to touch the SDA line. Prior to sending the 8 clock pulses needed to clock in a byte on the SCL line, the master releases the SDA line. The slave will now take control of this line. The line will then go high if it wants to transmit a '1' or, if the slave wants to send a '0', remain low.

All the master has to do is generate a rising edge on the SCL line (2), read the level on SDA (3) and generate a falling edge on the SCL line (4). The slave will not change the data during the time that SCL is high. (Otherwise a Start or Stop condition might inadvertently be generated.) During (1) and (5), the slave may change the state of the SDA line. In total, this sequence has to be performed 8 times to complete the data byte. Bytes are always transmitted MSB first

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

The meaning of all bytes being read depends on the slave. There is no such thing as a "universal status register". You need to consult the data sheet of the slave being addressed to know the meaning of each bit in any byte transmitted.

I2C BUS EVENTS: GETTING ACKNOWLEDGE FROM A SLAVE:


When an address or data byte has been transmitted onto the bus then this must be acknowledged by the slave(s). In case of an address: If the address matches its own then that slave and only that slave will respond to the address with an ACK. In case of a byte transmitted to an already addressed slave then that slave will respond with an ACK as well. The slave that is going to give an ACK pulls the SDA line low immediately after reception of the 8th bit transmitted, or, in case of an address byte, immediately after evaluation of its address. In practical applications this will not be noticeable.

This means that as soon as the master pulls SCL low to complete the transmission of the bit (1), SDA will be pulled low by the slave (2). The master now issues a clock pulse on the SCL line (3). The slave will release the SDA line upon completion of this clock pulse (4).

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

The bus is now available again for the master to continue sending data or to generate a stop condition. In case of data being written to a slave, this cycle must be completed before a stop condition can be generated. The slave will be blocking the bus (SDA kept low by slave) until the master has generated a clock pulse on the SCL line.

I2C BUS EVENTS: GIVING ACKNOWLEDGE TO A SLAVE:


Upon reception of a byte from a slave, the master must acknowledge this to the slave device. The master is in full control of the SDA and the SCL line.

After transmission of the last bit to the master (1) the slave will release the SDA line. The SDA line should then go high (2). The Master will now pull the SDA line low (3) . Next, the master will put a clock pulse on the SCL line (4). After completion of this clock pulse, the master will again release the SDA line (5).The slave will now regain control of the SDA line (6). If the master wants to stop receiving data from the slave, it must be able to send a stop condition.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

Since the slave regains control of the SDA line after the ACK cycle issued by the master, this could lead to problems. Let's assume the next bit ready to be sent to the master is a 0. The SDA line would be pulled low by the slave immediately after the master takes the SCL line low. The master now attempts to generate a Stop condition on the bus. It releases the SCL line first and then tries to release the SDA line - which is held low by the slave. Conclusion: No Stop condition has been generated on the bus. This condition is called a NACK: Not acknowledge.

I2C BUS EVENTS: NO ACKNOWLEDGE (FROM SLAVE TO MASTER):

This is not exactly a condition. It is merely a state in the data flow between master and slave. If, after transmission of the 8th bit from the master to the slave the slave does not pull the SDA line low, then this is considered a No ACK condition. This means that either:

The slave is not there (in case of an address) The slave missed a pulse and got out of sync with the SCL line of the master. The bus is "stuck". One of the lines could be held low permanently.

In any case the master should abort by attempting to send a stop condition on the bus.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

APPLICATIONS
IC is appropriate for peripherals where simplicity and low manufacturing cost are more important than speed. Common applications of the IC bus are: Reading configuration data from SPD EEPROMs on SDRAM, DDR SDRAM, DDR2 SDRAM memory sticks (DIMM) and other stacked PC boards Supporting systems management for PCI cards, through a SMBus 2.0 connection. Accessing NVRAM chips that keep user settings. Accessing low speed DACs. Accessing low speed ADCs. Changing contrast, hue, and color balance settings in monitors (Display Data Channel). Changing sound volume in intelligent speakers. Controlling OLED/LCD displays, like in a cell phone. Reading hardware monitors and diagnostic sensors, like a CPU thermostat and fan speed. Reading real time clocks. Turning on and turning off the power supply of system components.

A particular strength of IC is that a microcontroller can control a network of device chips with just two general-purpose I/O pins and software. Peripherals can also be added to or removed from the IC bus while the system is running, which makes it ideal for applications that require hot swapping of components.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

3.3 SERIAL REAL-TIME CLOCK DS1307


INTRODUCTION:
A real time clock (RTC) is a computer clock (most often in the form of integrated circuit) that keeps track of the current time. Although the term often refers to the devices in personal computers, servers and embedded systems, RTCs are present in almost any electronic device which needs to keep accurate time.

FEATURES:
Real-time clock (RTC) counts seconds, minutes, hours, date of the month, month, and day of the week, and year with leap-year compensation valid up to 2100 56-byte, battery-backed, nonvolatile (NV) RAM for data storage Two-wire serial interface Programmable square wave output signal Automatic power-fail detect and switch circuitry Consumes less than 500nA in battery backup mode with oscillator running Optional industrial temperature range: -40C to +85C Available in 8-pin DIP or SOIC Underwriters Laboratory (UL) recognized

PIN DESCRIPTION
VCC - Primary Power Supply X1, X2 - 32.768 kHz Crystal Connection VBAT - +3V Battery Input GND - Ground SDA - Serial Data

PIN ASSIGNMENT

DS1307 8-Pin DIP (300mil) SCL - Serial Clock SQW/OUT - Square Wave/Output Driver

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

DESCRIPTION:
The DS1307 Serial Real-Time Clock is a low power; full binary-coded decimal (BCD) clock/calendar plus 56 bytes of NV SRAM. Address and data are transferred serially via a 2-wire, bi-directional bus. The clock/calendar provides seconds, minutes, hours, day, date, month, and year information. The end of the month date is automatically adjusted for months with fewer than 31 days, including corrections for leap year. The clock operates in either the 24-hour or 12-hour format with AM/PM indicator. The DS1307 has a built-in power sense circuit that detects power failures and automatically switches to the battery supply.

TYPICAL OPERATING CIRCUIT:

OPERATION:
The DS1307

operates as a slave device on the serial bus. obtained Access is by

implementing a START condition and providing a device identification code followed by a register address. Subsequent registers can be accessed sequentially until a STOP condition is executed. When VCC falls below 1.25 x VBAT the device terminates an access in progress and resets the device address counter. Inputs to the device will not be recognized at this time to prevent erroneous data from being written to the device from an out of tolerance system. When VCC falls below VBAT the device switches into a low-current battery backup mode. Upon power-up, the device switches from battery to VCC when VCC is greater than VBAT + 0.2V and recognizes inputs when VCC is greater than 1.25 x VBAT. The block diagram in Figure 1 shows the main elements of the serial RTC.

DS1307 BLOCK DIAGRAM :

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

Fig: BLOCK DIAGRAM

SIGNAL DESCRIPTIONS:
VCC, GND DC power is provided to the device on these pins. VCC is the +5V
input. When 5V is applied within normal limits, the device is fully accessible and data can be written and read. When a 3V battery is connected to the device and V CC is below 1.25 x VBAT, reads and writes are inhibited. However, the timekeeping function continues unaffected by the lower input voltage. As VCC falls below VBAT the RAM and timekeeper are switched over to the external power supply (nominal 3.0V DC) at VBAT.

VBAT Battery input for any standard 3V lithium cell or other energy source.
Battery voltage must be held between 2.0V and 3.5V for proper operation. The nominal write protect trip point voltage at which access to the RTC and user RAM is denied is set by the internal circuitry as 1.25 x VBAT nominal. A lithium battery with 48mAhr or greater will back up the DS1307 for more than 10 years in the absence of power at 25C. UL recognized to ensure against reverse charging current when used in conjunction with a lithium battery.

SCL (Serial Clock Input) SCL is used to synchronize data movement on the serial
interface.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

SDA (Serial Data Input/Output) SDA is the input/output pin for the 2-wire serial
interface. The SDA pin is open drain, which requires an external pull up resistor.

SQW/OUT (Square Wave/Output Driver) When enabled, the SQWE bit set to 1, the
SQW/OUT pin outputs one of four square wave frequencies (1Hz, 4kHz, 8kHz, 32kHz). The SQW/OUT pin is open drain and requires an external pull-up resistor. SQW/OUT will operate with either Vcc or Vbat applied.

X1, X2 Connections for a standard 32.768 kHz quartz crystal. The internal oscillator
circuitry is designed for operation with a crystal having a specified load capacitance (CL) of 12.5pF. DS1307 can also be driven by an external 32.768 kHz oscillator. In this configuration, the X1 pin is connected to the external oscillator signal and the X2 pin is floated.

CLOCK ACCURACY:
The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match between the capacitive load of the oscillator circuit and the capacitive load for which the crystal was trimmed. Additional error will be added by crystal frequency drift caused by temperature shifts. External circuit noise coupled into the oscillator circuit may result in the clock running fast.

RTC AND RAM ADDRESS MAP:


The address map for the RTC and RAM registers of the DS1307 is shown in Figure 2. The RTC registers are located in address locations 00h to 07h. The RAM registers are located in address locations 08h to 3Fh. During a multi-byte access, when the address pointer reaches 3Fh, the end of RAM space, it wraps around to location 00h, the beginning of the clock space.

DS1307 ADDRESS MAP Figure 2:

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

CLOCK AND CALENDAR:


The time and calendar information is obtained by reading the appropriate register bytes. The RTC registers are illustrated in Figure 3. The time and calendar are set or initialized by writing the appropriate register bytes. The contents of the time and calendar registers are in the BCD format. Bit 7 of register 0 is the clock halt (CH) bit. When this bit is set to a 1, the oscillator is disabled. When cleared to a 0, the oscillator is enabled. Please note that the initial power-on state of all registers is not defined. Therefore, it is important to enable the oscillator (CH bit = 0) during initial configuration. The DS1307 can be run in either 12-hour or 24-hour mode. Bit 6 of the hours register is defined as the 12- or 24-hour mode select bit. When high, the 12-hour mode is selected. In the 12-hour mode, bit 5 is the AM/PM bit with logic high being PM. In the 24-hour mode, bit 5 is the second 10-hour bit (20- 23 hours). On a 2-wire START, the current time is transferred to a second set of registers. The time information is read from these secondary registers, while the clock may continue to run. This eliminates the need to reread the registers in case of an update of the main registers during a read.

DS1307 TIMEKEEPER REGISTERS Figure 3:

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

CONTROL REGISTER:
The DS1307 control register is used to control the operation of the SQW/OUT pin.

OUT (Output control): This bit controls the output level of the SQW/OUT pin when the square wave output is disabled. If SQWE = 0, the logic level on the SQW/OUT pin is 1 if OUT = 1 and is 0 if OUT = 0. SQWE (Square Wave Enable): This bit, when set to logic 1, will enable the oscillator output. The frequency of the square wave output depends upon the value of the RS0 and RS1 bits. With the square wave output set to 1Hz, the clock registers update on the falling edge of the square wave. RS (Rate Select): These bits control the frequency of the square wave output when the square wave output has been enabled. Table 1 lists the square wave frequencies that can be selected with the RS bits.

SQUAREWAVE OUTPUT FREQUENCY Table 1:

2-WIRE SERIAL DATA BUS:


The DS1307 supports a bi-directional, 2-wire bus and data transmission protocol. A device that sends data onto the bus is defined as a transmitter and a device receiving data as a receiver. The device that controls the message is called a master. The devices that are controlled by the master are referred to as slaves. The bus must be controlled by a master device that generates the serial clock (SCL), controls the bus

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

access, and generates the START and STOP conditions. The DS1307 operates as a slave on the 2-wire bus.

RECOMMENDED DC OPERATING CONDITIONS:

DC ELECTRICAL CHARACTERISTICS:

AC ELECTRICAL CHARACTERISTICS: (Over the operating range*)

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

* Refer Note- 2 in Appendix-C

3.4 EEPROM
ELECTRICALLY ERASABLE PROGRAMMABLE READ ONLY MEMORY

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

EEPROM_24LC64 PINDIAGRAM:

FEATURES:
Single supply with operation down to 2.5 V

Low power CMOS technology - 1 mA active current typical - 1 A standby current (max.) (I-temp) Organized as 8 blocks of 8K bit (64K bit) 2-wire serial interface bus, I2C compatible Cascadable for up to eight devices Schmitt Trigger inputs for noise suppression Output slope control to eliminate ground bounce 100 kHz (24AA64) and 400 kHz (24LC64) Compatibility Self-timed write cycle (including auto-erase) Page-write buffer for up to 32 bytes 2 ms typical write cycle time for page-write Hardware write protect for entire memory Can be operated as a serial ROM Factory programming (QTP) available ESD protection > 4,000V 1,000,000 erase/write cycles Data retention > 200 years 8-lead PDIP, SOIC, TSSOP, and MSOP package Available temperature ranges: Industrial (I): - 40oC to +85 oC

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

Automotive (E): - 40oC to +125oC

ELECTRICAL CHARACTERISTICS: ABSOLUTE MAXIMUM RATINGS:


VCC......................................................................................................6.5V All inputs and outputs w.r.t. VSS ........................................................-0.3V to VCC +1.0V Storage temperature ......................................................................... 650C to +1500C Ambient temp with power applied ................................................... 400Cto +1250C ESD protection on all pins ............................................................. 4 KV

PIN DESCRIPTIONS:
A0, A1, A2 Chip Address Inputs: The A0, A1, A2 inputs are used by the 24XX64 for multiple device operation. The levels on these inputs are compared with the corresponding bits in the slave address. The chip is selected if the compare is true. Up to eight devices may be connected to the same bus by using different chip select bit combinations. These inputs must be connected to either VCC or VSS.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

SERIAL DATA (SDA):


This is a bi-directional pin used to transfer addresses and data into and data out of the device. It is an open drain terminal; therefore, the SDA bus requires a pull up resistor to VCC (typical 10 k for 100 kHz, 2 k for 400 kHz) for normal data transfer SDA is allowed to change only during SCL low. Changes during SCL high are reserved for indicating the START and STOP conditions.

SERIAL CLOCK (SCL):


This input is used to synchronize the data transfer from and to the device.

WRITE PROTECT (WP):


This pin can be connected to either VSS, VCC or left floating. An internal pull-down resistor on this pin will keep the device in the unprotected state if left floating. If tied to VSS or left floating, normal memory operation is enabled (read/write the entire memory 0000-1FFF).If tied to VCC, WRITE operations are inhibited. Read operations are not affected.

BLOCK DIAGRAM:

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

DESCRIPTION:
The Microchip Technology Inc. 24AA64/24LC64 is a 64 K bit Electrically Erasable PROM. The device is organized as eight blocks of 1K x 8-bit memory with a 2-wire serial interface. Low voltage design permits operation down to 1.8V with standby and active currents of only 1 uA and 1 mA respectively. It has been developed for advanced, low power applications. Such as personal communications or data acquisition. The 24XX64 also has a page-write capability for up to 32 bytes of data. Functional address lines allow up to eight devices on the same bus, for up to 512 K bits address space. The 24XX64 is available in the standard 8-pin PDIP, surface mount SOIC, TSSOP and MSOP packages.

FUNCTIONAL DESCRIPTION:
The 24XX64 supports a bi-directional 2-wire bus and data transmission protocol. A device that sends data onto the bus is defined as transmitter, and a device receiving data as receiver. The bus has to be controlled by a master device which generates the serial clock (SCL), controls the bus access and generates the START and STOP conditions, while the 24XX64 works as slave. Both master and slave can operate as transmitter or receiver, but the master device determines which mode is activated.

DATA TRANSFER SEQUENCE ON THE SERIAL BUS:

BUS CHARACTERISTICS:

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

The following bus protocol has been defined: Data transfer may be initiated only when the bus is not busy. During data transfer, the data line must remain stable whenever the clock line is IGH. Changes in the data line while the clock line is HIGH will be interpreted as a START Or STOP condition. Accordingly, the following bus conditions have been defined.

1. BUS NOT BUSY (A)


Both data and clock lines remain HIGH.

2. START DATA TRANSFER (B)


A HIGH to LOW transition of the SDA line while the clock (SCL) is HIGH determines a START condition. All commands must be preceded by a START condition.

3. STOP DATA TRANSFER (C)


A LOW to HIGH transition of the SDA line while the clock (SCL) is HIGH Determines a STOP condition. All operations must be ended with a STOP Condition.

DEVICE ADDRESSING:
A control byte is the first byte received following the START condition from the master device (Figure 3-2).The control byte consists of a four bit control code; for the 24XX64 this is set as 1010 binary for read and writes operations. The next three bits of the control byte are the chip select bits (A2, A1, and A0). The chip select bits allow the use of up to eight 24XX64 devices on the same bus and are used to select which device is accessed. The chip select bits in the control byte must correspond to the logic levels on the corresponding A2, A1, and A0 pins for the device to respond. These bits are in effect the three Most Significant bits of the word address.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

The last bit of the control byte defines the operation to be performed. When set to a one a read operation is selected, and when set to a zero a write operation is selected. The next two bytes received define the address of the first data byte (Figure 3-3). Because only A12...A0 are used, the upper three address bits are dont care bits. The upper address bits are transferred first, followed by the less significant bits. Following the START condition, the 24XX64 monitors the SDA bus checking the device type identifier being transmitted. Upon receiving a 1010 code and appropriate device select bits, the slave device outputs an Acknowledge signal on the SDA line. Depending on the state of the R/W bit, the 24XX64 will select a read or write operation.

FIGURE 3-2: CONTROL BYTE FORMAT:

FIGURE 3-3: ADDRESS SEQUENCE BIT ASSIGNMENTS

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

DC CHARACTERISTICS:

WRITE OPERATIONS:
2 types: 1) Byte write. 2) Page write.

READ OPERATIONS:
There are three basic types of read operations: 1) Current Address Read 2) Random Read 3) Sequential Read

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

AC Characteristics:

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

3.5 TEMPERATURE TRANSDUCER


DS-1621
TRANSDUCER : A transducer is a device, usually electrical, electronic, electromechanical, electromagnetic, photonic, or photovoltaic that converts one type of energy or physical attribute to another for various purposes including measurement or information transfer (for example, pressure sensors).

TYPES OF TRANSDUCERS:
ELECTROMAGNETIC: Antenna - converts electromagnetic waves into electric current and vice versa. Cathode ray tube (CRT) - converts electrical signals into visual form Fluorescent lamp, light bulb - converts electrical power into visible light Magnetic cartridge - converts motion into electrical form Photodetector or Photoresistor (LDR) - converts changes in light levels into resistance changes ELECTROCHEMICAL: PH probes Electro-galvanic fuel cell

ELECTROMECHANICAL: Electro active polymers Galvanometer MEMS Rotary motor, linear motor Vibration powered generator Potentiometer when used for measuring position Load cell converts force to mV/V electrical signal using strain gauge

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

ELECTROACOUSTIC: Geophone - convert a ground movement (displacement) into voltage Gramophone pick-up Hydrophone - converts changes in water pressure into an electrical form Loudspeaker, earphone - converts changes in electrical signals into acoustic form Microphone - converts changes in air pressure into an electrical signal Piezoelectric crystal - converts pressure changes into electrical form Tactile transducer

ELECTROSTATIC: Electrometer

THERMOELECTRIC: RTD Resistance Temperature Detector Thermocouple Peltier cooler Thermistor (includes PTC resistor and NTC resistor)

RADIO ACOUSTIC: Receiver (radio) Eiger-Mller tube used for measuring radioactivity.

TEMPERATURE TRANSDUCER USED:


DS 1621 Digital Thermometer and Thermostat.

WHY DS1621??
DS1621 is a Digital Thermometer and Thermostat which measures temperature with out any external components from -55C to +125C in 0.5C

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

increments and Converts it to digital word in less than 1 second. Temperature is read as a 9-bit value (2-byte transfer). It also provides a wide power supply range of 2.7V to 5.5V.It is available in 8-pin DIP or SO package (150mil and 208mil) with a price of 200-300. DS1621 well supports I2c communication protocol. Because of all the available features and considering its low cost we can say it best suits the application of DATA LOGGER.

PIN ASSIGNMENT

PIN DESCRIPTION
SDA - 2-Wire Serial Data Input/Output SCL - 2-Wire Serial Clock GND Ground TOUT - Thermostat Output Signal Voltage A0 - Chip Address Input A1 - Chip Address Input A2 - Chip Address Input V DD - Power Supply

DESCRIPTION:
The DS1621 Digital Thermometer and Thermostat provides 9-bit temperature readings, which indicate the temperature of the device. The thermal alarm output, TOUT, is active when the temperature of the device exceeds a user-defined temperature TH. The output remains active until the temperature drops below user defined temperature TL, allowing for any hysteresis necessary. User-defined temperature settings are stored in nonvolatile memory so parts may be programmed prior to insertion in a system. Temperature settings and temperature readings are all communicated to/from the DS1621 over a simple 2-wire serial interface.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

DETAILED PIN DESCRIPTION :

OPERATION:
MEASURING TEMPERATURE:A block diagram of the DS1621 is shown in Figure 1.The DS1621 measures temperature using a band gap-based temperature sensor. A delta-sigma analog-to digital converter (ADC) converts the measured temperature to a digital value that is calibrated in C; for F applications, a lookup table or conversion routine must be used. The temperature reading is provided in a 9-bit, twos complement reading by issuing the READ TEMPERATURE command. The data is transmitted through the 2wire serial interface, MSB first. The DS1621 can measure temperature over the range of -55_C to +125_C in 0.5_C increments.

Figure 1. DS1621 FUNCTIONAL BLOCK DIAGRAM

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

Table 2. TEMPERATURE/DATA RELATIONSHIPS Since data is transmitted over the 2-wire bus MSB first, temperature data may be written to/read from the DS1621 as either a single byte (with temperature resolution of 1_C) or as two bytes. The second byte would contain the value of the least significant (0.5_C) bit of the temperature reading as shown in Table 1.Note that the remaining 7 bits of this byte are set to all "0"s

Temperature is represented in the DS1621 in terms of a _C LSB, yielding the following 9-bit format:

TEMPERATURE, TH, and TL FORMAT FOR T= -25_C

OPERATION AND CONTROL


The DS1621 must have temperature settings resident in the TH and TL registers for thermostatic operation. A configuration/status register also determines the method of operation that the DS1621 will use in a particular application, as well as indicating the status of the temperature conversion operation. The configuration register is defined as follows:

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

Where DONE = Conversion done bit. 1 = Conversion complete, 0 = Conversion in progress. THF = Temperature High Flag. This bit will be set to 1 when the temperature is greater than or equal to the value of TH. It will remain 1 until reset by writing 0 into this location or removing power from the device. This feature provides a method of determining if the DS1621 has ever been subjected to temperatures above TH while power has been applied. TLF = Temperature Low Flag. This bit will be set to 1 when the temperature is less than or equal to the value of TL. It will remain 1 until reset by writing 0 into this location or removing power from the device. This feature provides a method of determining if the DS1621 has ever been subjected to temperatures below TL while power has been applied. NVB = Nonvolatile Memory Busy flag. 1 = Write to an E 2 memory cell in progress, 0 =nonvolatile memory is not busy. A copy to E 2 may take up to 10 ms. POL = Output Polarity Bit. 1 = active high, 0 = active low. This bit is nonvolatile. 1SHOT = One Shot Mode. If 1SHOT is 1, the DS1621 will perform one temperature conversion upon receipt of the Start Convert T protocol. If 1SHOT is 0, the DS1621 will continuously perform temperature conversions. This bit is nonvolatile. X = Reserved.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

2-WIRE SERIAL DATA BUS


The DS1621 supports a bi-directional 2-wire bus and data transmission protocol. A device that sends data onto the bus is defined as a transmitter, and a device receiving data as a receiver. The device that controls the message is called a master." The devices that are controlled by the master are slaves." The bus must be controlled by a master device, which generates the serial clock (SCL), controls the bus access, and generates the START and STOP conditions. The DS1621 operates as a slave on the 2-wire bus. Connections to the bus are made via the open-drain I/O lines SDA and SCL. The following bus protocol has been defined (See Figure 4): Data transfer may be initiated only when the bus is not busy. During data transfer, the data line must remain stable whenever the clock line is HIGH. Changes in the data line while the clock line is high will be interpreted as control signals. Accordingly, the following bus conditions have been defined: Bus not busy: Both data and clock lines remain HIGH. Start data transfer: A change in the state of the data line, from HIGH to LOW, while the clock is HIGH, defines a START condition. Stop data transfer: A change in the state of the data line, from LOW to HIGH, while the clock line is HIGH, defines the STOP condition. Data valid: The state of the data line represents valid data when, after a START condition, the data line is stable for the duration of the HIGH period of the clock signal. The data on the line must be changed during the LOW period of the clock signal. There is one clock pulse per bit of data. Within the bus specifications a regular mode (100 kHz clock rate) and a fast mode (400 kHz clock rate) are defined. The DS1621 works in both modes. Acknowledge: Each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. The master device must generate an extra clock pulse which is associated with this acknowledge bit.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

A device that acknowledges must pull down the SDA line during the acknowledge clock pulse in such a way that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse. Of course, setup and hold times must be taken into account. A master must signal an end of data to the slave by not generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave must leave the data line HIGH to enable the master to generate the STOP condition.

Figure 4. DATA TRANSFER ON 2-WIRE SERIAL BUS

Figure 4 details how data transfer is accomplished on the 2-wire bus. Depending upon the state of the R/W bit, two types of data transfer are possible: 1. Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the master is the slave address. Next follows a number of data bytes. The slave returns an acknowledge bit after each received byte. 2. Data transfer from a slave transmitter to a master receiver. The master transmits the first byte, the slave address. The slave then returns an acknowledge bit. Next follows a number of data bytes transmitted by the slave to the master. The master returns an acknowledge bit after all received bytes other than the last byte. At the end of the last received byte, a not acknowledge is returned. The master device generates all of the serial clock pulses and the START and STOP conditions. A transfer is ended with a STOP condition or with a repeated START condition. Since a repeated START condition is also the beginning of the next serial transfer, the bus will not be released

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

COMMAND SET
Data and control information is read from and written to the DS1621 in the format shown in Figure 5. To write to the DS1621, the master will issue the slave address of the DS1621 and the R/W bit will be set to 0. After receiving an acknowledge, the bus master provides a command protocol. After receiving this protocol, the DS1621 will issue an acknowledge and then the master may send data to the DS1621. If the DS1621 is to be read, the master must send the command protocol as before and then issue a repeated START condition and the control byte again, this time with the R/W bit set to 1 to allow reading of the data from the DS1621. The command set for the DS1621 as shown in Table 3 is as follows:

ABSOLUTE MAXIMUM RATINGS*


Voltage on Any Pin Relative to Ground Operating Temperature Range Storage Temperature Range Soldering Temperature specification Supply voltage range 2.7V to 5.5V -0.5V to +6.0V -55_C to +125_C -55_C to +125_C See IPC/JEDEC J-STD-020A

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

DC ELECTRICAL CHARACTERISTICS (-55C to +125C; VDD = 2.7V to 5.5V)

TIMING DIAGRAM:

RECOMMENDED DC OPERATING CONDITIONS

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

AC ELECTRICAL CHARACTERISTICS (-55C to +125C; VDD = 2.7V to 5.5V)

* REFER NOTE 3 IN APPENDIX-C

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

3.6 MULTI TURN POT


INTRODUCTION:
The humble potentiometer (or pot, as it is more commonly known) is a simple electro-mechanical transducer. It converts rotary or linear motion from the operator into a change of resistance, and changes the output voltage from 0 to Vcc.

POTENTIOMETER TYPES:
Material Carbon Manufacturing Method Common uses Deposited as a carbon insulating Cermet (usually Power (Typ) Most common material, especially for 0.1 to

composition ink on an cheap to average quality pots. Has a 0.5W a reasonable life, and noise level is phenolic resin) body quite acceptable in most cases. Ceramic/metal composite, High quality trimpots and some 0.25 to using a metallic resistance conventional panel mount types. Low 2W element on a ceramic noise and high stability. Relatively (or substrate limited life more) Conductive Special impregnated 0.25 to High quality pots, both rotary and Plastic plastic material with well 0.5W linear (slide). Excellent life, low controlled resistance noise and very good mechanical feel characteristics Wire wound Insulating former, with High power and almost indefinite 5 to resistance adhesive movement wire to wound life. Resistance is "granular", with 50W prevent completely smooth transition from more) one resistance winding to the next. Low noise, usually a rough mechanical feel. around it, and bound with discrete small steps rather than a (or

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

MULTI TURN POT is a potentiometer of 47K which varies from 0 to 47K.For each turn the resistance will be changed by 10 . It consists of three pins. PIN 1 is connected to +5V (Vcc). PIN 2 is connected to AN0 of Microcontroller. PIN 3 is connected to Ground (GND) The analog voltage is given to the AN0 pin of the microcontroller which indicates the changes in the pressure.

DESCRIPTION:
Multi turn pot is a manually adjustable, variable, electrical resistor. It has a resistance element that is attached to the circuit by three contacts, or terminals. The ends of the resistance element are attached to two input voltage conductors of the circuit, and the third contact, attached to the output of the circuit, is usually a movable terminal that slides across the resistance element, effectively dividing it into two resistors. Since the position of the movable terminal determines what percentage of the input voltage will actually be applied to the circuit, the potentiometer can be used to vary the magnitude of the voltage; for this reason it is sometimes called a voltage divider. Typical uses of potentiometers are in radio volume controls and television brightness controls.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

3.7 LIMIT SWITCH


OVERVIEW:
Level sensors are used to detect liquid level. The liquid to be measured can be inside a container or can be in its natural form .Miniature, solid state sensors provide a digital output that indicates the presence or absence of liquid. These products incorporate the principle of total internal reflection to promote speed, reliability and cost-effectiveness. Sealed products have reverse polarity and over voltage protection. Stainless-steel housing provides longer life and easier cleaning.

Best Used For:


Presence/absence detection of liquid. Designed for many harsh industrial environments with extremes in temperature, pressure, vibration and shock

CONNECTIVITY:
This limit switch is connected to PIN-D2 of the microcontroller. This limit switch consists of three pins of first two are normally open (NO) and next two are normallyclosed(NC).

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

3.8 LCD
LIQUID CRYSTAL DISPLAY
INTRODUCTION:
A liquid crystal display (LCD) is a thin, flat display device made up of any number of color or monochrome pixels arrayed in front of a light source or reflector. It is often utilized in battery -powered electronic devices because it uses very small amounts of electric power.

OVERVIEW:
Each pixel of an LCD typically consists of a layer of molecules aligned between two transparent electrodes, and two polarizing filters, the axes of transmission of which are (in most of the cases) perpendicular to each other. With no liquid crystal between the polarizing filters, light passing through the first filter would be blocked by the second (crossed) polarizer. The surfaces of the electrodes that are in contact with the liquid crystal material are treated so as to align the liquid crystal molecules in a particular direction. This treatment typically consists of a thin polymer layer that is unidirectionally rubbed using, for example, a cloth. The direction of the liquid crystal alignment is then defined by the direction of rubbing. Electrodes are made of a transparent conductor called "ITO" or Indium Tin Oxide. Before applying an electric field, the orientation of the liquid crystal molecules is determined by the alignment at the surfaces. In a twisted nematic device (still the most common liquid crystal device), the surface alignment directions at the two electrodes are perpendicular to each other, and so the molecules arrange themselves in a helical structure, or twist. Because the liquid crystal material is birefringent , light passing through one polarizing filter is rotated by the liquid crystal helix as it passes through the liquid crystal layer, allowing it to pass through the second polarized filter.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

Half of the incident light is absorbed by the first polarizing filter, but otherwise the entire assembly is transparent. When a voltage is applied across the electrode s, a torque acts to align the liquid crystal molecules parallel to the electric field, distorting the helical structure (this is resisted by elastic forces since the molecules are constrained at the surfaces). This reduces the rotation of the polarization of the incident light, and the device appears gray. If the applied voltage is large enough, the liquid crystal molecules in the center of the layer are almost completely untwisted and the polarization of the incident light is not rotated as it passes through the liquid crystal layer. This light will then be mainly polarized perpendicular to the second filter, and thus be blocked and the pixel will appear black. By controlling the voltage applied across the liquid crystal layer in each pixel, light can be allowed to pass through in varying amounts thus constituting different levels of gray.

LCD USED:

In this project we are making use of 20 character X 40 line LCD module with LED backlight DMC20481

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

BLOCK DIAGRAM:

FIG: BLOCK DIAGRAM OF LCD MODULE

FEATURES:
Interface with 8-bit or 4-bit MPU is available. 192 kinds of alphabets, numerals, symbols and special characters can be displayed by built-in character generator (ROM). Other preferred characters can be displayed by character generator (RAM). Various functions of instruction are available by programming: Clear display Shift display cursor at home shift cursor on/off cursor blink character

Read/write display data. Etc.

Compact and light weight design which can be easily assembled in devices. Single power supply +5V drive (except for extended temp. type) Low power consumption.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

PIN ASSIGNMENT:

Pin No. Symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 Vss Vcc VEE RS R/W E DB0 DB1 DB2 DB3 DB4 DB5 DB6

Level H/L H/L H,H-L H/L H/L H/L H/L H/L H/L H/L

Function 0V(GND) Power Supply +5V For LCD Drive Register Select Signal Register H : Data Input Select L : Instruction Input H : Data Read (Module-MPU) L : Data Write (Module-MPU) Enable Signal (No Pull-Up Resistor)

Data Bus Line

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

TIMING CHART:

Item

Standard Value Min. Typ. 25 320 Max.

Unit

Enable Cycle Time 1000 Enable Pulse Width, High 450 Level Enable Rise and Decay Time Address Setup Time, RS, R/W- 140 E Data Delay Time Data Setup Time 195 Data Hold Time(Write 10 Operation) Data Hold Time(Read 20 Operation) Address Hold Time 10

ns ns ns ns ns ns ns ns ns

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

www.final-yearproject.com | www.finalyearthesis.com 3.9 MICRO SWITCHES

DATA LOGGER

INTRODUCTION:
A micro switch is a generic term used to refer to an electric switch that is able to be actuated by very little physical force. They are very common due to their low cost and extreme durability, typically greater than 1 million cycles and up to 10 million cycles for heavy duty models. . This durability is a natural consequence of the design. Internally a stiff metal strip must be bent to activate the switch. This produces a very distinctive clicking sound and a very crisp feel. When pressure is removed the metal strip springs back to its original state.

APPLICATIONS:
Common applications of micro switches include computer mouse buttons and arcade game's joysticks and buttons. Micro switches are commonly used in tamper switches on gate valves on fire sprinkler systems and other water pipe systems, where it is necessary to know if a valve has been opened or shut. They have also been used as anti-handling devices in booby trapped improvised explosive devices manufactured by paramilitary groups e.g. the Provisional IRA during the Troubles.

CONNECTIVITY:
In our project we are using 4 micro switches each for a specific purpose as a keypad. These switches are connected to the PORTD of microcontroller. The function of these switches is Switch 1 - Up key for Incrementing purpose- which is connected to pin D4 of microcontroller. Switch 2 - Down key for Decrementing purpose and to retrieve exceeded parameter data This is connected to pin D5 of microcontroller. Switch 3 Set key for setting date and time which is connected to pin D6 of microcontroller. Switch 4 Settp key for setting temperature and pressure which is connected to pin D7 of
Microcontroller

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

CHAPTER 4. RESULTS OF THE PROJECT

RESULTS OF PROJECT

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

DATA LOGGER KIT

1.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

WHEN WE SWITCH ON THE POWER SUPPLY IT WILL DISPLAY THE SET TEMPERATURE AND PRESSURE

2.

DISPLAYING THE SENSED TEMPERATURE AND PRESSURE

KEYPAD WITH 4 MICRO SWITCHES

SWITCH 1 UPKEY

SWITCH 2 DOWNKEY

SWITCH 3 SETKEY

SWITCH 4 SETTPKEY

3.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

WHEN WE PRESS SWITCH 3 IT WILL ASK TO SET THE DATE AND TIME i.e.; TO
ENTER MONTH, DATE, YEAR, HOUR, MINUTES, SECONDS AND AFTER COMPLETING IT WILL DISPLAY TIME SET OVER.

4.

WE CAN SET TEMPERATURE AND PRESSURE AS OUR INTEREST JUST BY PRESSING SWITCH 4.BY PRESSING SWITCH 4 IT WILL ASK TO SET TEMPERATURE FIRST AND THEN TO SET PRESSURE. TEMPERATURE AND PRESSURE ARE SET WITH THE HELP OF UP KEY (FOR INCREMENTING) OR DOWN KEY (FOR DECREMENTING)

5.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

WHEN THERE IS NO REQUIRED LIQUID LEVEL IN THE TANK THE LIMIT SWITCH THAT WE ARE USING FOR LEVEL SENSING GETS CLOSED AND IT WILL BE DISPLAYED AS LEVEL LOW UNTIL IT GETS OPENED THE SYSTEM REMAINS IN A STILL STATE.

6.

WHEN THE SENSED TEMPERATURE, PRESSURE EXCEEDS THEIR SET VALUES IT CAN GIVE ALARAM AND IT CAN ALSO DISPLAYS THAT HOW MANY TIMES TEMPERATURE AND PRESSURE EXCEEDED

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

7.

DISPLAYING THE EXCEEDED TEMPERATUREAND PRESSURE

CHAPTER 5 ADVANTAGES

& APPLICATIONS

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

5.0 ADVANTAGES OF USING A DATA LOGGER


FOR COLLECTING DATA:
A data logger is an attractive alternative to either a recorder or data acquisition system in many applications. When compared to a recorder, data loggers have the ability to accept a greater number of input channels, with better resolution and accuracy. Also, data loggers usually have some form of on-board intelligence, which provides the user with diverse capabilities. For example, raw data can be analyzed to give flow rates, differential temperatures, and other interpreted data that otherwise would require manual analysis by the operator. The major difference between a data logger and a recorder, however, is the way the data itself is stored, analyzed and recorded. A common recorder accepts an input, and compares it to a full scale value. The pen arm is then deflected across the recording width, to produce the appropriate ratio of the actual input to the full scale input. For example, using a recorder with a 1 Volt full scale, an input of 0.5 Volts would move the pen 0.5/1 or 50% of the distance across the recording width. In

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

comparison, a data logger accepts an input which is fed into an analog-to-digital converter prior to analysis and storage. This method has advantages in accuracy and resolution, while only a recorder can provide a truly continuous trend recording.

5.1 DATA LOGGING VERSUS DATA


ACQUISITION:
The terms data logging and data acquisition are often used interchangeably. However,
in a historical context they are quite different. A data logger is a data acquisition

system, but a data acquisition system is not necessarily a data logger.


Data loggers typically have slower sample rates. A maximum sample rate of 1 Hz may be considered to be very fast for a data logger, yet very slow for a typical data acquisition system. Data loggers are implicitly stand-alone devices, while typical data acquisition system must remain tethered to a computer to acquire data. This stand-alone aspect of data loggers implies on-board memory that is used to store acquired data. Sometimes this memory is very large to accommodate many days, or even months, of unattended recording. This memory may be battery-backed static random access memory, flash memory or EEPROM. Earlier data loggers used magnetic tape punched paper tape, or directly viewable records such as strip chart recorders.

Given the extended recording times of data loggers, they typically feature a time-and datestamping mechanism to ensure that each recorded data value is associated with a date and time of acquisition. As such, data loggers typically employ built-in real-time clocks whose published drift can be an important consideration when choosing between data loggers.

Data logger range from simple single-channel input to complex multi-channel instruments. Typically, the simpler the device the less programming flexibility. Some more sophisticated instruments allow for cross-channel computations and alarms based on predetermined conditions. The newest of data loggers can serve web pages, allowing numerous people to monitor a system remotely.

The unattended and remote nature of many data logger applications implies the need in some applications to operate from a DC power source, such as battery. Solar power may be used to supplement these power sources. These constraints have generally led the data logger industry to ensure that the devices they market are extremely power efficient relative to computers. In many cases they are required to operate in harsh environmental conditions where computers will not function reliably.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

This unattended nature also dictates that the data loggers must be extremely reliable. Since they may operate for long periods nonstop with little or no human supervision, and may be installed in harsh or remote locations, it is imperative that so long as they have power, they will not fail to log data for any reason. Manufacturers go to great length to ensure that the devices can be depended on in these applications. As such data loggers are almost completely immune to the problems that might affect a general-purpose computer in the same application, such as program crashes and the instability of some operating systems.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

5.2

APPLICATIONS OF DATA LOGGER:

Unattended weather station recording (such as wind speed / direction, temperature, relative humidity, solar radiation) Unattended hydrographic recording (such as water level, water depth, water flow, water PH, water conductivity). Unattended soil moisture level recording. Unattended gas pressure recording. Road traffic counting. Measure temperatures (humidity etc) of perishables during shipments. Process monitoring for maintenance and troubleshooting applications Wild life research. Measure vibration handling (drop height) environment of distribution packaging. Tank level monitoring. Deformation monitoring of any object with geodetic or geotechnical sensors controlled by an automatic deformation monitoring system. Environmental monitoring. Vehicle testing Monitoring of relay status in railway signaling. For science education enabling measurement, scientific investigation and an appreciation of change. Record trend data at regular intervals in veterinary vital signs monitoring

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

CHAPTER 6. CONCLUSION & FUTURE DIRECTIONS

CONCLUSION:

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

Data logger is not limited for any particular application, it can be used any where in a process industries with little modifications in software coding according to the requirements. This concept not only ensures that our work will be usable in the future but also provides the flexibility to adapt and extend, as needs change. Basically, Data logger is a stand alone device but we can even connect it to a PC by using RS232.We can also use Agilent VEE Pro software which is a graphical programming environment optimized for use with electronic instruments for providing the lab view of the parameters measured using Data Loggers

FUTURE DIRECTIONS:
Data Loggers are changing more rapidly now than ever before. The original model of a stand alone data logger is changing to one of a device that collects data but also has access to wireless communications for alarming of events, automatic reporting of data and remote control. Data Loggers are beginning to serve web pages for current readings e-mail their alarms and FTP their daily results into databases or direct to the users.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

APPENDIX

APPENDIX- A
SOURCE CODE:

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

/*

data.c

*/

#include<16f877a.h> #use delay (clock=4000000) #fuses xt,nowdt,nolvp,protect #use i2c(master, sda=PIN_C1,scl=PIN_C0) #use rs232(baud=9600,xmit=PIN_C6,rcv=PIN_C7) #include <lcdd.c> #define settpkey PIN_d7 #define setkey PIN_d6 #define downkey PIN_d5 #define upkey PIN_d4 #define buzer PIN_d3 #define limit PIN_d2 int sec,min,hour,day,date,month,year,k,mo; int temp,temp1; int temph,templ,press,pressset,tempset,countt=0,countp=0,memadrt=0,memadrp=130; int date1,month1,hour1,min1,temph1,b; long int a,q; #include <temparature.c> #include <rtclock.c> #include <timeset.c> #include <pressure.c> #include <setting.c> #include <memwrite.c> #include <memread.c> void main() { lcd_init(); time_read(); if ((min==0Xff)&(hour==0Xff)) rtc_init(); temp_init(); tempset = read_EEPROM (0x00); pressset= read_EEPROM (0x01); lcd_putC(" \f DATA LOGGER "); lcd_gotoxy(1,2); printf(lcd_putc,"TEMP. SET :%u dc",tempset ); lcd_gotoxy(1,3); printf(lcd_putc,"PRESS.SET :%ukg/sq.cm",pressset ); delay_ms(5000); q=3; while(1)

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

{ LEVEL:if(!input(limit)) { lcd_putC(" \f DATA LOGGER "); lcd_putC(" \n LEVEL LOW "); delay_ms(1000); GOTO LEVEL; } q--; if(q>2)goto skip; if((temph>=tempset)||(press>=pressset))mem1(); skip: if(q<2)q=3; { delay_us(500); if(!input(settpkey))ati(); if(!input(setkey)) { month=monthset(month); date=dateset(date); hour=hourset(hour); min=minuteset(min); lcd_putC(" \f TIME SET OVER "); rtc_set(); delay_ms(500); time_read(); delay_ms(300); } time_read(); temp_read(); pressure(); if (templ==0x80)templ=5; else templ=0; printf(lcd_putc," \f%02x/%02x/2008",date,month ); printf(lcd_putc," %02x:%02x:%02x",hour,min,sec); lcd_gotoxy(1,2); printf(lcd_putc,"TEMPERATURE: %02d.%d dc",temph,templ);

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

lcd_gotoxy(1,3); printf(lcd_putc,"PRESSURE: %02ukg/sq.cm",press); printf("\f"); printf("TEMP: %02d.%d,",temph,templ); printf(" PRESSURE: %02ukg/sq.cm",press); delay_ms(1000); if(!input(downkey))mem2();

} } }

/* temperature .c */
temp_init() { i2c_start(); i2c_write(0x90);// device address i2c_write(0xac);// control register i2c_write(00);// write mode i2c_stop(); delay_ms(10); i2c_start(); i2c_write(0x90);// device address i2c_write(0xee);// control register i2c_stop(); } temp_read() { i2c_start(); i2c_write(0x90); i2c_write(0xaa); i2c_start(); i2c_write(0x91); temph=i2c_read(); templ=i2c_read(0); i2c_stop(); }

/*

rtclock.c */

void rtc_init()

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

{ //printf("\n i2c initilization"); i2c_start(); i2c_write(0xd0); i2c_write(0x00); i2c_write(00);//seconds i2c_write(00);//minutes i2c_write(0x12);//hours i2c_write(01);//day i2c_write(01);//date i2c_write(01);//month i2c_write(0x08);//year i2c_write(0x10); i2c_stop(); } void rtc_set() { //printf("\n RTC SETTING "); i2c_start(); i2c_write(0xd0); i2c_write(0x00); i2c_write(00);//seconds i2c_write(min);//minutes i2c_write(hour);//hours i2c_write(day);//day i2c_write(date);//date i2c_write(month);//month i2c_write(0x08);//year); i2c_write(0x10); i2c_stop(); } time_read() { i2c_start(); i2c_write(0xd0); i2c_write(0x00); i2c_start(); i2c_write(0xd1); sec=i2c_read(); min=i2c_read(); hour=i2c_read(); day=i2c_read(); date=i2c_read(); month=i2c_read(); year=i2c_read(0); i2c_stop(); }

/*

timeset.c */

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

int dec_bcd(int a) { temp=abs(a/10); temp1=a%10; a=(temp*16)+temp1; return(a); } int bcd_dec(int a) { temp=abs(a/16); temp1=a%16; a=(temp*10)+temp1; return(a); } monthset(int m) { //int mo; lcd_putc("\f ENTER MONTH"); mo=bcd_dec(m); printf(lcd_putc,"\n month %02d",mo); k=0; code0: delay_ms(500); K++; if (K>=60) goto modem; if(!input(upkey)) { mo++; if (mo>=0X0d) mo=1; printf(lcd_putc,"\f month %02d",mo); } if(!input(downkey)) { mo--; if(mo<=1) mo=1; printf(lcd_putc,"\f month %02d",mo); } if(input(setkey)) goto code0; modem: mo=dec_bcd(mo); return(mo); } //*********************************************************** dateset(int n)

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

{ int da; lcd_putc("\f ENTER DATE"); da=bcd_dec(n); printf(lcd_putc,"\fDATE %02d",da); k=0; code2: delay_ms(500); K++; if(K>60) goto moded; if(!input(upkey)) { da++; if((mo==2)&&(da>0X1d)) da=0X1d; if((mo==4)||(mo==6)||(mo==9)||(mo==0X0B)&&(da>0X1E)) da=0X1E; if((mo==1)||(mo==3)||(mo==5)||(mo==7)||(mo==8)||(mo==0X0a)|| (mo==0X0c)&&(da>0x1f)) da=0X1f; printf(lcd_putc,"\fDATE %d",da); } if(!input(downkey)) { da--; if(da<1) da=1; printf(lcd_putc,"\fDATE %02d",da); } if(input(setkey)) goto code2; moded: da=dec_bcd(da); return(da); } //******************************************************************** ***** hourset(int o) { int ho; lcd_putc("\fENTER HOUR"); ho=bcd_dec(o); printf(lcd_putc,"\fhour %02d",ho); k=0; code21: delay_ms(500);

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

K++; if(k>=60) goto modeh; if(!input(upkey)) { ho++; if(ho>=24) ho=0; printf(lcd_putc,"\fhour %02d",ho); } if (!input(downkey)) { ho--; if (ho<0) ho=23; if(ho>=24) ho=0; printf(lcd_putc,"\fhour %02d",ho); } if (input(setkey)) goto code21 ; modeh: ho=dec_bcd(ho); return(ho); } //************************************************ minuteset(int p) { int mi; lcd_putc("\fENTER MINUTE"); mi=bcd_dec(p); printf(lcd_putc,"\f minutes %02d",mi); k=0; code3: delay_ms(500); K++; if (K>=60) goto modem; if(!input(upkey)) { mi++; if (mi>=60) mi=00; printf(lcd_putc,"\f minutes %02d",mi); } if(!input(downkey)) { mi--; if(mi<=1)

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

mi=0; if(mi>=60) mi=0; printf(lcd_putc,"\f minutes %02d",mi); } if(input(setkey)) goto code3; modem: mi=dec_bcd(mi); return(mi); } //***********************************************************

/* pressure.c */
pressure() { setup_adc_ports( ALL_ANALOG ); setup_adc(ADC_CLOCK_INTERNAL ); set_adc_channel( 0 ); press = read_adc(); press=press/2.55; setup_adc( ADC_OFF ); }

/*
ati() {

setting.c

*/

lcd_putC(" \fSET TEMPARATURE "); delay_ms(1000); while(input(settpkey)) { if(!input(upkey)) { tempset++; if(tempset>=100)tempset=100; lcd_gotoxy(1,2); printf(lcd_putc,"TEMP SET: %u dc",tempset); delay_ms(1000); write_eeprom(0x00,tempset);

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

/*
mem1() { if(temph>=tempset) {

memwrite.c */

countt++; if(countt>=121) { countt=0; memadrt=0; } output_low(buzer); delay_ms(1000); output_high(buzer); delay_ms(1000); i2c_start(); i2c_write(0xa0); // Device address i2c_write(0x00); // Data to device i2c_write(memadrt); i2c_write(temph); i2c_write(month); i2c_write(date); i2c_write(hour); i2c_write(min); i2c_stop(); delay_ms(100); memadrt=memadrt+5; } if(press>=pressset) { countp++; if(countp>=251) { countp=0; memadrp=0; } output_low(buzer); delay_ms(1000);

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

output_high(buzer); delay_ms(1000); output_high(buzer); // printf(lcd_putc," \f%02x/%02x/2008",date,month ); // lcd_gotoxy(11,2); // printf(lcd_putc," %02x:%02x:%02x",hour,min,sec); // lcd_gotoxy(1,3); // printf(lcd_putc,"pressure-%02ukg/sq.cm",press); // delay_ms(7000); i2c_start(); i2c_write(0xa0); // Device address i2c_write(0x00); // Data to device i2c_write(memadrp); i2c_write(press); i2c_write(month); i2c_write(date); i2c_write(hour); i2c_write(min); i2c_stop(); delay_ms(100); memadrp=memadrp+5; } }

/*
mem2() {

memread.c */

int c,d,rmonth,rdate,rmin,rhour,counttm,countpm; c=memadrt-5; d=memadrp-5; printf(lcd_putc,"\fTEMP.EXCEEDED "); printf(lcd_putc,"\n%u TIMES",countt); delay_ms(3000); for(b=1;b<=countt;b++) { i2c_start(); i2c_write(0xa0); // Device address i2c_write(0x00); // Data to device i2c_write(c); i2c_start(); i2c_write(0xa1); // to change data direction temph=i2c_read(); // Now read from slave rmonth=i2c_read(); rdate=i2c_read();

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

rhour=i2c_read(); rmin=i2c_read(0); i2c_stop(); delay_ms(100); printf(lcd_putc,"\fTEMP.DATA %u",b); delay_ms(2000); lcd_gotoxy(1,2); printf(lcd_putc," \f%02x/%02x/2008",rdate,rmonth ); lcd_gotoxy(1,2); printf(lcd_putc," %02x:%02x:%02x",rhour,rmin,sec); lcd_gotoxy(1,4); printf(lcd_putc,"TEMP : %02d.%d dc",temph,templ); delay_ms(5000); c=c-5; } printf(lcd_putc,"\fPRESS. EXCEEDED"); printf(lcd_putc,"\n%u TIMES",countP); delay_ms(3000); for(b=1;b<=countp;b++) { i2c_start(); i2c_write(0xa0); // Device address i2c_write(0x00); // Data to device i2c_write(d); i2c_start(); i2c_write(0xa1); // to change data direction press=i2c_read(); // Now read from slave rmonth=i2c_read(); rdate=i2c_read(); rhour=i2c_read(); rmin=i2c_read(0); i2c_stop(); delay_ms(100); printf(lcd_putc,"\fPRESS.DATA %u",b); delay_ms(2000); printf(lcd_putc," \f%02x/%02x/2008",rdate,rmonth ); lcd_gotoxy(1,2); printf(lcd_putc," %02x:%02x:%02x",rhour,rmin,sec); lcd_gotoxy(1,4); printf(lcd_putc,"PRE:%02ukg/sq.cm",press); delay_ms(5000); d=d-5; }

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

/*

lcdd.c

*/

//////////////////////////////////////////////////////////////////////////// //// LCD420.C //// //// Driver for common 4x20 LCD modules //// //// //// //// lcd_init() Must be called before any other function. //// //// //// //// lcd_putc(c) Will display c on the next position of the LCD. //// //// The following have special meaning: //// //// \f Clear display //// //// \n Go to start of second line //// //// \b Move back one position //// //// //// //// lcd_gotoxy(x,y) Set write position on LCD (upper left is 1,1) //// //// //// //// lcd_getc(x,y) Returns character at position x,y on LCD //// //// //// //////////////////////////////////////////////////////////////////////////// //// (C) Copyright 1996,1997 Custom Computer Services //// //// This source code may only be used by licensed users of the CCS C //// //// compiler. This source code may only be distributed to other //// //// licensed users of the CCS C compiler. No other use, reproduction //// //// or distribution is permitted without written permission. //// //// Derivative programs created using this software in object code //// //// form are not restricted in any way. //// //////////////////////////////////////////////////////////////////////////// // As defined in the following structure the pin connection is as follows: // B0 enable // B1 rs // B2 rw // B4 D4 // B5 D5 // B6 D6 // B7 D7 // // LCD pins D0-D3 are not used and PIC B3 is not used. struct lcd_pin_map { // This structure is overlayed BOOLEAN enable; // on to an I/O port to gain BOOLEAN rs; // access to the LCD pins. BOOLEAN rw; // The bits are allocated from BOOLEAN unused; // low order up. ENABLE will int data : 4; // be pin B0. } lcd; #byte lcd = 6 // This puts the entire structure

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

// on to port B (at address 6) #define lcd_type 2 // 0=5x7, 1=5x10, 2=2 lines

BYTE const LCD_INIT_STRING [4] = {0x20 | (lcd_type << 2), 0xc, 1, 6}; // these bytes need to be sent to the LCD // to start it up. // The following are used for setting // the I/O port direction register. struct lcd_pin_map const LCD_WRITE = {0,0,0,0,0}; // For write mode all pins are out struct lcd_pin_map const LCD_READ = {0,0,0,0,15}; // For read mode data pins are in BYTE lcdline; BYTE lcd_read_byte() { BYTE low,high; set_tris_b(LCD_READ); lcd.rw = 1; delay_cycles(1); lcd.enable = 1; delay_cycles(1); high = lcd.data; lcd.enable = 0; delay_cycles(1); lcd.enable = 1; delay_us(1); low = lcd.data; lcd.enable = 0; set_tris_b(LCD_WRITE); return( (high<<4) | low); } void lcd_send_nibble( BYTE n ) { lcd.data = n; delay_cycles(1); lcd.enable = 1; delay_us(2); lcd.enable = 0; }

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

void lcd_send_byte( BYTE address, BYTE n ) { lcd.rs = 0; while ( bit_test(lcd_read_byte(),7) ) ; lcd.rs = address; delay_cycles(1); lcd.rw = 0; delay_cycles(1); lcd.enable = 0; lcd_send_nibble(n >> 4); lcd_send_nibble(n & 0xf); } void lcd_init() { BYTE i; set_tris_b(LCD_WRITE); lcd.rs = 0; lcd.rw = 0; lcd.enable = 0; delay_ms(15); for(i=1;i<=3;++i) { lcd_send_nibble(3); delay_ms(5); } lcd_send_nibble(2); for(i=0;i<=3;++i) lcd_send_byte(0, LCD_INIT_STRING[i]); } void lcd_gotoxy( BYTE x, BYTE y) { BYTE address; switch(y) { case 1 : address=0x80;break; case 2 : address=0xc0;break; case 3 : address=0x94;break; case 4 : address=0xd4;break; } address+=x-1; lcd_send_byte(0,address); } void lcd_putc( char c) { switch (c) { case '\f' : lcd_send_byte(0,1); lcdline=1; delay_ms(2);

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

break; case '\n' : lcd_gotoxy(1,++lcdline); break; case '\b' : lcd_send_byte(0,0x10); break; default : lcd_send_byte(1,c); break; } } char lcd_getc( BYTE x, BYTE y) { char value; lcd_gotoxy(x,y); lcd.rs=1; value = lcd_read_byte(); lcd.rs=0; return(value); }

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

APPENDIX_B
DEVICE DIFFERENCES

CONVERSION CONSIDERATIONS

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

APPENDIX-C
NOTE 1:
Legend: I = input O = output I/O = input/output P = power = Not used TTL = TTL input ST = Schmitt Trigger input

NOTE 2:
1. ICCS specified with VCC = 5.0V and SDA, SCL = 5.0V. 2. VCC = 0V, VBAT = 3V. 3. After this period, the first clock pulse is generated. 4. A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VIHMIN of the SCL signal) in order to bridge the undefined region of the falling edge of SCL. 5. The maximum tHD: DAT has only to be met if the device does not stretch the LOW period (tLOW) of the SCL signal. 6. CB Total capacitance of one bus line in pF. 7. ICCA SCL clocking at max frequency = 100 kHz. 8. VPF measured at VBAT = 3.0V.

NOTE 3:
1. All voltages are referenced to ground. 2. I/O pins of fast mode devices must not obstruct the SDA and SCL lines if VDD is switched off. 3. ICC specified with TOUT pin open. 4. ICC specified with VCC at 5.0V and SDA, SCL = 5.0V, 0C to 70C. 5. After this period, the first clock pulse is generated. 6. A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VIH MIN of the SCL signal) in order to bridge the undefined region of the falling edge of SCL. 7. The maximum tHD: DAT has only to be met if the device does not stretch the LOW period (tLOW) of the SCL signal. 8. CB total capacitance of one bus line in pF.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

DS1307 64 X 8 SERIAL REAL-TIME CLOCKS 8-PIN DIP MECHANICAL DIMENSIONS

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

BIBLIOGRAPHY

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

BIBLIOGRAPHY
BOOKS REFERRED:
1) Adler, R. B., A. C. Smith, and R. L. Longani: Introduction to Semiconductor Physics, vol. 1, p. 78, Semiconductor Electronics Education Comitee, John Wiley & Sons, Inc., New York ,1964. 2) Schade, O. H.: Analysis of Rectifier Operation, proc. IRE, vol.31, pp. 341361, July, 1943. 3) Stout, M. B.: Analysis of Rectifier Circuits, Elec. Eng., vol. 54, September, 1935. 4) Jacob Millman Christos C. Halkias.: Electronic Devices And Circuits, Tata McGraw-Hill Publishing Company Ltd. Sep, 2003. 5) Fair, Z. E.: Piezoelectric Crystals in Oscillator Circuits, Bell System Tech. J., vol.24, April, 1945. 6) Hakim, S. s.:Open and Closed Loop Response of Feedback Amplifiers, Electron. Eng., October, 1962 7) Bode, H. W.: Negative Feedback in Current Amplifier Design, D. Van Nostrand Company, Inc., Princeton, N.J., 1945. 8) Sawhney, A.K.: Electrical and Electronic Measurements and Instruments, Dhanpat Rai & Co. 2003. 9) Yang, E.S: Fundamentals of Semiconductor Devices, chap. 1 McGraw Hill Book Company, New York, 1978. 10) Shive, J.N.: Semiconductor Devices, chaps 8&9, D.Van Nostrand Inc. Princeton, N.J., 1959. 11) Millman, J.: Microelectronics: Digital and Analog Circuits and Systems, McGraw Hill Book Company, New York, 1979. 12) Roger L Stevens : Serial Communications, Dontrics, 1997 13) Robert Terusalim: Programming in Luo 2-nd edition, D. Van Nostrand Company, Inc., Princeton, N.J., 1987.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

14) Jan Axelson: Parallel Port Complete, McGraw Hill Book Company, New York, 1989. 15) Peter H.Anderson, PIC C Routines copyright, Baltimore, MD, Nov,99 16) Bahadur, B.: Liquid Crystals- Applications and Uses, Litton Systems Canada, 1992. 17) Myke Predko: Programming and Customizing PIC Microcontrollers, Amazon, 1998. 18) Myke Predko: Handbook of Microcontrollers, Amazon, 1887.

Journals Referred
1) Innovation: Magazine of Research & Technology,2000 2) International Journal of Reliability, Quality and Safety Engineering(IJRQSE) Editor-in-chief Hoang Pham Dept. of Industrial Eng 3) Journal of Electronics Manufacturing (JEM) Editor-in-Chief Paul P. Conway Wolfson School of Mechanical & Manufacturing Engineering 4) Foundations and Trends in Electronic Design Automation (FTEDA) Editor in-chief Sharad Malik, Dept.of Electrical Eng., Princeton University. 5) Printed Circuit Design Online (Magazine). 6) Design Magazine. 7) Journal of Instrumentation (JNIST). 8) Microcontroller solutions.

www.final-yearproject.com | www.finalyearthesis.com

DATA LOGGER

Websites:
1) http://www.microchip.com/ 2) http://www.optrex.com/ 3) http://www.howstuffworks.com/ 4) http://www.maxim-ic.com/ 5) http://www-us2.semiconductors.philips.com/acrobat/various/ 6) http://www.esacademy.com/faq/i2c/index.htm 7) http://www.embedded.com/story/OEG20020528S0057 8) http://www.amplicon.com/ 9) http://www.grainger.com/ 10) http://www.sound.westhost.htm 11) http://www.wikipedia.org/wiki/level-sensor 12) http://www.smcelectronics.com/ 13) http://www.honeywell.com/ 14) http://www.logicteach.com/applications.htm 15) http://www.google.com/ 16) Electronic Devices And Circuits 17) http://www.bg800.com 18) http://www.omega.com

DATA SHEETS:
1) Dallas semiconductor datasheets. 2) Optrex LCD data sheet 3) I2C_BUS_SPECIFICATION_1995.pdf