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Technical reference manual Line distance protection IED REL 670 ANSI

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Technical reference manual


Line distance protection IED REL 670

About this manual


Document No: 1MRK 506 275-UUS Issued: March 2007 Product version: 1.1 Revision:

Copyright 2007 ABB. All rights reserved.

COPYRIGHT WE RESERVE ALL RIGHTS TO THIS DOCUMENT, EVEN IN THE EVENT THAT A PATENT IS ISSUED AND A DIFFERENT COMMERCIAL PROPRIETARY RIGHT IS REGISTERED. IMPROPER USE, IN PARTICULAR REPRODUCTION AND DISSEMINATION TO THIRD PARTIES, IS NOT PERMITTED. THIS DOCUMENT HAS BEEN CAREFULLY CHECKED. HOWEVER, IN CASE ANY ERRORS ARE DETECTED, THE READER IS KINDLY REQUESTED TO NOTIFY THE MANUFACTURER AT THE ADDRESS BELOW. THE DATA CONTAINED IN THIS MANUAL IS INTENDED SOLELY FOR THE CONCEPT OR PRODUCT DESCRIPTION AND IS NOT TO BE DEEMED TO BE A STATEMENT OF GUARANTEED PROPERTIES. IN THE INTERESTS OF OUR CUSTOMERS, WE CONSTANTLY SEEK TO ENSURE THAT OUR PRODUCTS ARE DEVELOPED TO THE LATEST TECHNOLOGICAL STANDARDS. AS A RESULT, IT IS POSSIBLE THAT THERE MAY BE SOME DIFFERENCES BETWEEN THE HW/SW PRODUCT AND THIS INFORMATION PRODUCT. Manufacturer:
ABB Inc. 3450 Harvester Road Burlington, ON L7N 3W5, Canada Phone: (905) 639-8840 Fax: (905) 333-7565 ABB Inc. 7036 Snowdrift Road Allentown, PA 18106, USA Phone: (610) 395-7333 Toll Free: (800) 634-6005 Fax: (610) 395-1055

Contents

Chapter
Chapter 1

Page
Introduction ..................................................................... 1
Introduction to the technical reference manual.................................... 2 About the complete set of manuals for an IED ............................... 2 About the technical reference manual ............................................ 3 Design of the Technical reference manual (TRM) .......................... 4 Introduction................................................................................ 4 Principle of operation................................................................. 4 Input and output signals ............................................................ 7 Function block ........................................................................... 7 Setting parameters .................................................................... 7 Technical data ........................................................................... 7 Intended audience .......................................................................... 7 General...................................................................................... 7 Requirements ............................................................................ 8 Related documents......................................................................... 8 Revision notes ................................................................................ 9

Chapter 2

Local human-machine interface .................................. 11


Medium size graphic HMI .................................................................. 12 Design .......................................................................................... 12 Keypad............................................................................................... 17 LHMI related functions....................................................................... 19 Introduction ................................................................................... 19 General setting parameters .......................................................... 19 Status indication LEDs ................................................................. 19 Design ..................................................................................... 19 Function block ......................................................................... 20 Input and output signals .......................................................... 20 Indication LEDs ............................................................................ 20 Introduction.............................................................................. 20 Design ..................................................................................... 21 Function block ......................................................................... 28 Input and output signals .......................................................... 28 Setting parameters .................................................................. 29

Chapter 3

Basic IED functions ...................................................... 33


Analog inputs ..................................................................................... 34 Introduction ................................................................................... 34 Principle of operation .................................................................... 34 Function block .............................................................................. 35 Output signals............................................................................... 36 Setting parameters ....................................................................... 38

Contents

Authorization ...................................................................................... 44 Authorization handling in the tool.................................................. 44 Authorization handling in the IED ................................................. 50 Self supervision with internal event list .............................................. 51 Introduction ................................................................................... 51 Principle of operation .................................................................... 51 Internal signals ........................................................................ 52 Run-time model ....................................................................... 54 Function block............................................................................... 56 Output signals............................................................................... 56 Setting parameters ....................................................................... 56 Technical data .............................................................................. 56 Time synchronization ......................................................................... 57 Introduction ................................................................................... 57 Principle of operation .................................................................... 57 General concepts .................................................................... 57 Real Time Clock (RTC) operation............................................ 58 Synchronization alternatives.................................................... 59 Function block............................................................................... 62 Output signals............................................................................... 62 Setting parameters ....................................................................... 62 Technical data .............................................................................. 65 Parameter setting groups .................................................................. 66 Introduction ................................................................................... 66 Principle of operation .................................................................... 66 Function block............................................................................... 67 Input and output signals................................................................ 68 Setting parameters ....................................................................... 68 Test mode functionality ...................................................................... 70 Introduction ................................................................................... 70 Principle of operation .................................................................... 70 Function block............................................................................... 71 Input and output signals................................................................ 71 Setting parameters ....................................................................... 72 IED identifiers .................................................................................... 73 Introduction ................................................................................... 73 Setting parameters ....................................................................... 73 Signal matrix for binary inputs (SMBI) ............................................... 74 Introduction ................................................................................... 74 Principle of operation .................................................................... 74 Function block............................................................................... 74 Input and output signals................................................................ 74 Signal matrix for binary outputs (SMBO) ........................................... 76 Introduction ................................................................................... 76 Principle of operation .................................................................... 76 Function block............................................................................... 76 Input and output signals................................................................ 76 Signal matrix for mA inputs (SMMI) ................................................... 78 Introduction ................................................................................... 78 Principle of operation .................................................................... 78 Function block............................................................................... 78 Input and output signals................................................................ 78 Signal matrix for analog inputs (SMAI) .............................................. 79

Contents

Introduction ................................................................................... 79 Principle of operation .................................................................... 79 Function block .............................................................................. 79 Input and output signals ............................................................... 80 Setting parameters ....................................................................... 81 Summation block 3 phase (SUM3Ph)................................................ 83 Introduction ................................................................................... 83 Principle of operation .................................................................... 83 Function block .............................................................................. 83 Input and output signals ............................................................... 83 Setting parameters ....................................................................... 84 Authority status (AUTS) ..................................................................... 85 Introduction ................................................................................... 85 Principle of operation .................................................................... 85 Function block .............................................................................. 85 Output signals............................................................................... 85 Setting parameters ....................................................................... 85 Goose binary receive......................................................................... 86 Function block .............................................................................. 86 Input and output signals ............................................................... 87 Setting parameters ....................................................................... 88

Chapter 4

Differential protection ................................................... 89


High impedance differential protection (PDIF, 87)............................. 90 Introduction ................................................................................... 90 Principle of operation .................................................................... 90 Logic diagram .......................................................................... 90 Function block .............................................................................. 91 Input and output signals ............................................................... 91 Setting parameters ....................................................................... 92 Technical data .............................................................................. 92

Chapter 5

Impedance protection................................................... 93
Distance measuring zones, quadrilateral characteristic (PDIS, 21)... 94 Introduction ................................................................................... 94 Principle of operation .................................................................... 95 Full scheme measurement ...................................................... 95 Impedance characteristic......................................................... 95 Minimum operating current...................................................... 99 Measuring principles.............................................................. 100 Directional lines ..................................................................... 102 Simplified logic diagrams....................................................... 104 Function block ............................................................................ 108 Input and output signals ............................................................. 109 Setting parameters ..................................................................... 110 Technical data ............................................................................ 111 Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS) ................................................. 113

Contents

Introduction ................................................................................. 113 Principle of operation .................................................................. 113 Full scheme measurement .................................................... 113 Impedance characteristic....................................................... 114 Minimum operating current .................................................... 118 Measuring principles.............................................................. 118 Directionality for series compensation ................................... 121 Simplified logic diagrams ....................................................... 123 Function block............................................................................. 127 Input and output signals.............................................................. 128 Setting parameters ..................................................................... 129 Technical data ............................................................................ 130 Full-scheme distance measuring, Mho characteristic, PDIS 21....... 132 Introduction ................................................................................. 132 Principle of operation .................................................................. 133 Full scheme measurement .................................................... 133 Impedance characteristic....................................................... 133 Basic operation characteristics .............................................. 134 Theory for operation .............................................................. 136 Function block............................................................................. 147 Input and output signals.............................................................. 148 Setting parameters ..................................................................... 149 Technical data ............................................................................ 151 Mho impedance supervision logic.................................................... 152 Introduction ................................................................................. 152 Principle of operation .................................................................. 152 Fault inception detection........................................................ 152 Function block............................................................................. 153 Input and output signals.............................................................. 154 Setting parameters ..................................................................... 154 Phase selection with load encroachment (PDIS, 21)....................... 156 Introduction ................................................................................. 156 Principle of operation .................................................................. 156 Phase-to-ground fault ............................................................ 158 Phase-to-phase fault ............................................................. 160 Three phase faults ................................................................. 161 Load encroachment ............................................................... 162 Minimum operate currents ..................................................... 166 Simplified logic diagrams ....................................................... 166 Function block............................................................................. 171 Input and output signals.............................................................. 171 Setting parameters ..................................................................... 172 Technical data ............................................................................ 173 Full scheme distance protection, quadrilateral for Mho ................... 174 Introduction ................................................................................. 174 Principle of operation .................................................................. 174 Full scheme measurement .................................................... 174 Impedance characteristic....................................................... 175 Minimum operating current .................................................... 177 Measuring principles.............................................................. 177 Directional lines ..................................................................... 180 Simplified logic diagrams ....................................................... 182 Function block............................................................................. 184

Contents

Input and output signals ............................................................. 184 Setting parameters ..................................................................... 185 Technical data ............................................................................ 186 Faulty phase identification with load enchroachment (PDIS, 21) .... 187 Introduction ................................................................................. 187 Principle of operation .................................................................. 187 The phase selection function................................................. 187 Function block ............................................................................ 199 Input and output signals ............................................................. 199 Setting parameters ..................................................................... 200 Technical data ............................................................................ 201 Directional impedance Mho (RDIR) ................................................. 202 Introduction ................................................................................. 202 Principle of operation .................................................................. 202 Directional impedance element for mho characteristic, ZDM 202 Additional distance protection directional function for ground faults, ZDA ........................................................... 205 Function block ............................................................................ 207 Input and output signals ............................................................. 207 Setting parameters ..................................................................... 208 Phase preference logic .................................................................... 210 Introduction ................................................................................. 210 Principle of operation .................................................................. 210 Function block ............................................................................ 213 Input and output signals ............................................................. 213 Setting parameters ..................................................................... 214 Power swing detection (RPSB, 78).................................................. 215 Introduction ................................................................................. 215 Principle of operation .................................................................. 215 Resistive reach in forward direction....................................... 217 Resistive reach in reverse direction....................................... 217 Reactive reach in forward and reverse direction ................... 218 Basic detection logic.............................................................. 218 Operating and inhibit conditions ............................................ 220 Function block ............................................................................ 221 Input and output signals ............................................................. 221 Setting parameters ..................................................................... 222 Technical data ............................................................................ 223 Power swing logic (RPSL, 78) ......................................................... 224 Introduction ................................................................................. 224 Principle of operation .................................................................. 224 Communication and tripping logic ......................................... 224 Blocking logic......................................................................... 225 Function block ............................................................................ 227 Input and output signals ............................................................. 227 Setting parameters ..................................................................... 228 Technical data ............................................................................ 228 Pole Slip protection (PPAM, 78) ...................................................... 229 Introduction ................................................................................. 229 Principle of operation .................................................................. 229 Function block ............................................................................ 233 Input and output signals ............................................................. 233 Setting parameters ..................................................................... 234

Contents

Technical data ............................................................................ 235 Automatic switch onto fault logic, voltage and current based (SFCV) .............................................................. 236 Introduction ................................................................................. 236 Principle of operation .................................................................. 236 Function block............................................................................. 238 Input and output signals.............................................................. 238 Setting parameters ..................................................................... 238 Technical data ............................................................................ 239

Chapter 6

Current protection ....................................................... 241


Instantaneous phase overcurrent protection (PIOC, 50) ................. 242 Introduction ................................................................................. 242 Principle of operation .................................................................. 242 Function block............................................................................. 242 Input and output signals.............................................................. 243 Setting parameters ..................................................................... 243 Technical data ............................................................................ 244 Four step phase overcurrent protection (PTOC, 51_67).................. 245 Introduction ................................................................................. 245 Principle of operation .................................................................. 245 Function block............................................................................. 249 Input and output signals.............................................................. 250 Setting parameters ..................................................................... 251 Technical data ............................................................................ 258 Instantaneous residual overcurrent protection (PIOC, 50N) ............ 260 Introduction ................................................................................. 260 Principle of operation .................................................................. 260 Function block............................................................................. 261 Input and output signals.............................................................. 261 Setting parameters ..................................................................... 261 Technical data ............................................................................ 262 Four step residual overcurrent protection (PTOC, 51N/67N)........... 263 Introduction ................................................................................. 263 Principle of operation .................................................................. 263 Operating quantity within the function ................................... 264 Internal polarizing facility of the function................................ 264 External polarizing facility for Ground Fault function ............. 266 Base quantities within the function ........................................ 267 Internal Ground Fault function structure ............................... 267 Four residual overcurrent stages ........................................... 267 Directional supervision element with integrated directional comparision stage ............................. 268 Second harmonic blocking element....................................... 270 Switch on to fault feature ....................................................... 272 Function block............................................................................. 276 Input and output signals.............................................................. 276 Setting parameters ..................................................................... 277 Technical data ............................................................................ 285 Sensitive directional residual overcurrent and

Contents

power protection (PSDE, 67N) ...................................................... 286 Introduction ................................................................................. 286 Principle of operation .................................................................. 287 Introduction............................................................................ 287 Function block ............................................................................ 293 Input and output signals ............................................................. 293 Setting parameters ..................................................................... 296 Technical data ............................................................................ 300 Thermal overload protection, one time constant (PTTR, 26)........... 302 Introduction ................................................................................. 302 Principle of operation .................................................................. 302 Function block ............................................................................ 306 Input and output signals ............................................................. 306 Setting parameters ..................................................................... 307 Technical data ............................................................................ 308 Breaker failure protection (RBRF, 50BF)......................................... 309 Introduction ................................................................................. 309 Principle of operation .................................................................. 309 Function block ............................................................................ 312 Input and output signals ............................................................. 313 Setting parameters ..................................................................... 313 Technical data ............................................................................ 314 Stub protection (PTOC, 50STB) ...................................................... 315 Introduction ................................................................................. 315 Principle of operation .................................................................. 315 Function block ............................................................................ 316 Input and output signals ............................................................. 316 Setting parameters ..................................................................... 317 Technical data ............................................................................ 317 Pole discrepancy protection (RPLD, 52PD)..................................... 318 Introduction ................................................................................. 318 Principle of operation .................................................................. 318 Pole discrepancy signalling from circuit breaker ................... 321 Unsymmetrical current detection ........................................... 321 Function block ............................................................................ 321 Input and output signals ............................................................. 322 Setting parameters ..................................................................... 322 Technical data ............................................................................ 323 Directional underpower protection (PDUP, 32)................................ 324 Introduction ................................................................................. 324 Principle of operation .................................................................. 325 Low pass filtering................................................................... 327 Calibration of analog inputs ................................................... 327 Function block ............................................................................ 329 Input and output signals ............................................................. 329 Setting parameters ..................................................................... 330 Technical data ............................................................................ 331 Directional overpower protection (PDOP, 32).................................. 332 Introduction ................................................................................. 332 Principle of operation .................................................................. 333 Low pass filtering................................................................... 335 Calibration of analog inputs ................................................... 335 Function block ............................................................................ 337

Contents

Input and output signals.............................................................. 337 Setting parameters ..................................................................... 338 Technical data ............................................................................ 339 Broken conductor check (PTOC, 46) ............................................... 340 Introduction ................................................................................. 340 Principle of operation .................................................................. 340 Function block............................................................................. 341 Input and output signals.............................................................. 341 Setting parameters ..................................................................... 342 Technical data ............................................................................ 342

Chapter 7

Voltage protection ....................................................... 343


Two step undervoltage protection (PTUV, 27)................................. 344 Introduction ................................................................................. 344 Principle of operation .................................................................. 344 Measurement principle .......................................................... 345 Time delay ............................................................................. 345 Blocking ................................................................................. 348 Design ................................................................................... 350 Function block............................................................................. 352 Input and output signals.............................................................. 352 Setting parameters ..................................................................... 353 Technical data ............................................................................ 356 Two step overvoltage protection (PTOV, 59)................................... 357 Introduction ................................................................................. 357 Principle of operation .................................................................. 357 Measurement principle .......................................................... 358 Time delay ............................................................................. 358 Blocking ................................................................................. 360 Design ................................................................................... 361 Function block............................................................................. 363 Input and output signals.............................................................. 363 Setting parameters ..................................................................... 364 Technical data ............................................................................ 367 Two step residual overvoltage protection (PTOV, 59N)................... 368 Introduction ................................................................................. 368 Principle of operation .................................................................. 368 Measurement principle .......................................................... 368 Time delay ............................................................................. 368 Blocking ................................................................................. 372 Design ................................................................................... 373 Function block............................................................................. 374 Input and output signals.............................................................. 374 Setting parameters ..................................................................... 375 Technical data ............................................................................ 377 Overexcitation protection (PVPH, 24) .............................................. 378 Introduction ................................................................................. 378 Principle of operation .................................................................. 378 Measured voltage .................................................................. 381 Operate time of the overexcitation protection. ....................... 381

Contents

Cooling .................................................................................. 385 OEX protection function measurands.................................... 385 Overexcitation alarm.............................................................. 386 Logic diagram ........................................................................ 387 Function block ............................................................................ 388 Input and output signals ............................................................. 388 Setting parameters ..................................................................... 388 Technical data ............................................................................ 390 Voltage differential protection (PTOV, 60) ....................................... 391 Introduction ................................................................................. 391 Principle of operation .................................................................. 391 Function block ............................................................................ 392 Input and output signals ............................................................. 393 Setting parameters ..................................................................... 393 Technical data ............................................................................ 394 Loss of voltage check (PTUV, 27) ................................................... 395 Introduction ................................................................................. 395 Principle of operation .................................................................. 395 Function block ............................................................................ 397 Input and output signals ............................................................. 397 Setting parameters ..................................................................... 397

Chapter 8

Frequency protection ................................................. 399


Underfrequency protection (PTUF, 81)............................................ 400 Introduction ................................................................................. 400 Principle of operation .................................................................. 400 Measurement principle .......................................................... 400 Time delay ............................................................................. 400 Voltage dependent time delay ............................................... 401 Blocking ................................................................................. 402 Design ................................................................................... 403 Function block ............................................................................ 404 Input and output signals ............................................................. 404 Setting parameters ..................................................................... 405 Technical data ............................................................................ 405 Overfrequency protection (PTOF, 81) ............................................. 407 Introduction ................................................................................. 407 Principle of operation .................................................................. 407 Measurement principle .......................................................... 407 Time delay ............................................................................. 407 Blocking ................................................................................. 408 Design ................................................................................... 408 Function block ............................................................................ 409 Input and output signals ............................................................. 409 Setting parameters ..................................................................... 409 Technical data ............................................................................ 410 Rate-of-change frequency protection (PFRC, 81) ........................... 411 Introduction ................................................................................. 411 Principle of operation .................................................................. 411 Measurement principle .......................................................... 411

Contents

Time delay ............................................................................. 412 Blocking ................................................................................. 412 Design ................................................................................... 412 Function block............................................................................. 413 Input and output signals.............................................................. 414 Setting parameters ..................................................................... 414 Technical data ............................................................................ 415

Chapter 9

Multipurpose protection ............................................. 417


General current and voltage protection (GAPC) .............................. 418 Introduction ................................................................................. 418 Inadvertent generator energization........................................ 418 Principle of operation .................................................................. 419 Measured quantities within the function................................. 419 Base quantities for GF function ............................................. 421 Built-in overcurrent protection steps ...................................... 421 Built-in undercurrent protection steps .................................... 427 Built-in overvoltage protection steps...................................... 428 Built-in undervoltage protection steps.................................... 428 Inadvertent generator energization........................................ 428 Logic diagram ........................................................................ 430 Function block............................................................................. 436 Input and output signals.............................................................. 437 Setting parameters ..................................................................... 439 Technical data ............................................................................ 448

Chapter 10 Secondary system supervision.................................. 451


Current circuit supervision (RDIF).................................................... 452 Introduction ................................................................................. 452 Principle of operation .................................................................. 452 Function block............................................................................. 454 Input and output signals.............................................................. 454 Setting parameters ..................................................................... 455 Technical data ............................................................................ 455 Fuse failure supervision (RFUF) ...................................................... 456 Introduction ................................................................................. 456 Principle of operation .................................................................. 456 Zero sequence ...................................................................... 456 Negative sequence ................................................................ 459 du/dt and di/dt ........................................................................ 459 Operation modes ................................................................... 460 Dead line detection ................................................................ 461 Function block............................................................................. 461 Input and output signals.............................................................. 461 Setting parameters ..................................................................... 462 Technical data ............................................................................ 463

Contents

Chapter 11 Control ......................................................................... 465


Synchronizing, synchronism check and energizing check (RSYN, 25) . 466 Introduction ................................................................................. 466 Principle of operation .................................................................. 466 Basic functionality.................................................................. 466 Logic diagrams ...................................................................... 467 Function block ............................................................................ 477 Input and output signals ............................................................. 478 Setting parameters ..................................................................... 481 Technical data ............................................................................ 483 Autorecloser (RREC, 79) ................................................................. 485 Introduction ................................................................................. 485 Principle of operation .................................................................. 485 Logic Diagrams...................................................................... 485 Auto-reclosing operation Off and On ..................................... 485 Auto-reclosing mode selection .............................................. 485 Initiate auto-reclosing and conditions for initiation of a reclosing cycle .............................................. 486 Control of the auto-reclosing open time for shot 1................. 487 Long trip signal ...................................................................... 487 Time sequence diagrams ...................................................... 493 Function block ............................................................................ 497 Input and output signals ............................................................. 497 Setting parameters ..................................................................... 499 Technical data ............................................................................ 501 Apparatus control (APC).................................................................. 503 Introduction ................................................................................. 503 Principle of operation .................................................................. 503 Bay control (QCBAY).................................................................. 504 Introduction............................................................................ 504 Principle of operation............................................................. 504 Function block ....................................................................... 505 Input and output signals ........................................................ 506 Setting parameters ................................................................ 506 Local/Remote switch (LocalRemote, LocRemControl) ............... 506 Introduction............................................................................ 506 Principle of operation............................................................. 506 Function block ....................................................................... 508 Input and output signals ........................................................ 508 Setting parameters ................................................................ 509 Switch controller (SCSWI) .......................................................... 510 Introduction............................................................................ 510 Principle of operation............................................................. 510 Function block ....................................................................... 516 Input and output signals ........................................................ 516 Setting parameters ................................................................ 517 Circuit breaker (SXCBR)............................................................. 518 Introduction............................................................................ 518 Principle of operation............................................................. 518 Function block ....................................................................... 522

Contents

Input and output signals ........................................................ 523 Setting parameters ................................................................ 524 Circuit switch (SXSWI)................................................................ 524 Introduction ............................................................................ 524 Principle of operation ............................................................. 524 Function block ....................................................................... 529 Input and output signals ........................................................ 529 Setting parameters ................................................................ 530 Bay reserve (QCRSV) ................................................................ 530 Introduction ............................................................................ 530 Principle of operation ............................................................. 530 Function block ....................................................................... 533 Input and output signals ........................................................ 533 Setting parameters ................................................................ 534 Reservation input (RESIN) ......................................................... 534 Introduction ............................................................................ 534 Principle of operation ............................................................. 535 Function block ....................................................................... 536 Input and output signals ........................................................ 537 Setting parameters ................................................................ 537 Interlocking ...................................................................................... 538 Introduction ................................................................................. 538 Principle of operation .................................................................. 538 Logical node for interlocking (SCILO)......................................... 541 Introduction ............................................................................ 541 Principle of operation ............................................................. 541 Function block ....................................................................... 542 Input and output signals ........................................................ 542 Interlocking for line bay (ABC_LINE) .......................................... 543 Introduction ............................................................................ 543 Function block ....................................................................... 544 Logic diagram ........................................................................ 545 Input and output signals ........................................................ 551 Interlocking for bus-coupler bay (ABC_BC)................................ 553 Introduction ............................................................................ 553 Function block ....................................................................... 555 Logic diagram ........................................................................ 556 Input and output signals ........................................................ 561 Interlocking for transformer bay (AB_TRAFO)............................ 563 Introduction ............................................................................ 563 Function block ....................................................................... 565 Logic diagram ........................................................................ 566 Input and output signals ........................................................ 569 Interlocking for bus-section breaker (A1A2_BS)......................... 571 Introduction ............................................................................ 571 Function block ....................................................................... 572 Logic diagram ........................................................................ 573 Input and output signals ........................................................ 576 Interlocking for bus-section disconnector (A1A2_DC) ................ 577 Introduction ............................................................................ 577 Function block ....................................................................... 578 Logic diagram ........................................................................ 579 Input and output signals ........................................................ 580

Contents

Interlocking for busbar grounding switch (BB_ES) ..................... 581 Introduction............................................................................ 581 Function block ....................................................................... 581 Logic diagram ........................................................................ 582 Input and output signals ........................................................ 582 Interlocking for double CB bay (DB) ........................................... 582 Introduction............................................................................ 582 Function block ....................................................................... 583 Logic diagrams ...................................................................... 585 Input and output signals ....................................................... 594 Interlocking for breaker-and-a-half diameter (BH) ...................... 597 Introduction............................................................................ 597 Function blocks...................................................................... 599 Logic diagrams ...................................................................... 602 Input and output signals ........................................................ 612 Horizontal communication via GOOSE for interlocking .............. 617 Function block ....................................................................... 617 Input and output signals ........................................................ 618 Setting parameters ................................................................ 619 Logic rotating switch for function selection and LHMI presentation (SLGGIO) ................................................... 620 Introduction ................................................................................. 620 Principle of operation .................................................................. 620 Functionality and behaviour .................................................. 621 Graphical display ................................................................... 622 Function block ............................................................................ 624 Input and output signals ............................................................. 626 Setting parameters ..................................................................... 627 Selector mini switch (VSGGIO) ....................................................... 628 Introduction ................................................................................. 628 Principle of operation .................................................................. 628 Function block ............................................................................ 629 Input and output signals ............................................................. 629 Setting parameters ..................................................................... 630 Single point generic control 8 signals (SPC8GGIO) ........................ 631 Introduction ................................................................................. 631 Principle of operation .................................................................. 631 Function block ............................................................................ 631 Input and output signals ............................................................. 632

Chapter 12 Scheme communication............................................. 633


Scheme communication logic for distance protection (PSCH, 85) ............................. 634 Introduction ................................................................................. 634 Principle of operation .................................................................. 634 Blocking scheme ................................................................... 634 Permissive underreach scheme ............................................ 635 Permissive overreach scheme .............................................. 635 Unblocking scheme ............................................................... 635 Intertrip scheme..................................................................... 636

Contents

Simplified logic diagram......................................................... 636 Function block............................................................................. 638 Input and output signals.............................................................. 638 Setting parameters ..................................................................... 639 Technical data ............................................................................ 639 Phase segregated scheme communication logic for distance protection (PSCH, 85) ................................................ 640 Introduction ................................................................................. 640 Principle of operation .................................................................. 640 Blocking scheme ................................................................... 641 Permissive underreach scheme ............................................ 641 Permissive overreach scheme............................................... 642 Unblocking scheme ............................................................... 642 Intertrip scheme ..................................................................... 642 Simplified logic diagram......................................................... 642 Function block............................................................................. 644 Input and output signals.............................................................. 644 Setting parameters ..................................................................... 646 Technical data ............................................................................ 646 Current reversal and weak-end infeed logic for distance protection (PSCH, 85) .................................................. 647 Introduction ................................................................................. 647 Principle of operation .................................................................. 647 Current reversal logic............................................................. 647 Weak end infeed logic ........................................................... 648 Function block............................................................................. 649 Input and output signals.............................................................. 650 Setting parameters ..................................................................... 651 Technical data ............................................................................ 651 Local acceleration logic (PLAL) ....................................................... 652 Introduction ................................................................................. 652 Principle of operation .................................................................. 652 Zone extension ...................................................................... 652 Loss-of-load acceleration ...................................................... 653 Function block............................................................................. 654 Input and output signals.............................................................. 654 Setting parameters ..................................................................... 655 Scheme communication logic for residual overcurrent protection (PSCH, 85)................................ 656 Introduction ................................................................................. 656 Principle of operation .................................................................. 656 Blocking scheme ................................................................... 657 Permissive under/overreach scheme .................................... 657 Unblocking scheme ............................................................... 658 Function block............................................................................. 660 Input and output signals.............................................................. 660 Setting parameters ..................................................................... 661 Technical data ............................................................................ 661 Current reversal and weak-end infeed logic for residual overcurrent protection (PSCH, 85)................................ 662 Introduction ................................................................................. 662 Principle of operation .................................................................. 662 Directional comparison logic function .................................... 662

Contents

Fault current reversal logic .................................................... 663 Weak and infeed logic ........................................................... 663 Function block ............................................................................ 664 Input and output signals ............................................................. 665 Setting parameters ..................................................................... 665 Technical data ............................................................................ 666 Current reversal and weak-end infeed logic for phase segregated communication (PSCH) .................................. 667 Introduction ................................................................................. 667 Principle of operation .................................................................. 667 Current reversal logic ........................................................... 667 Function block ............................................................................ 669 Input and output signals ............................................................. 670 Setting parameters ..................................................................... 671 Technical data ............................................................................ 671

Chapter 13 Logic............................................................................. 673


Tripping logic (PTRC, 94) ................................................................ 674 Introduction ................................................................................. 674 Principle of operation .................................................................. 674 Logic diagram ........................................................................ 675 Function block ............................................................................ 680 Input and output signals ............................................................. 680 Setting parameters ..................................................................... 681 Technical data ............................................................................ 682 Trip matrix logic (GGIO)................................................................... 683 Introduction ................................................................................. 683 Principle of operation .................................................................. 683 Function block ............................................................................ 685 Input and output signals ............................................................. 685 Setting parameters ..................................................................... 687 Configurable logic blocks (LLD)....................................................... 688 Introduction ................................................................................. 688 Inverter function block (INV) ....................................................... 688 OR function block (OR)............................................................... 688 AND function block (AND) .......................................................... 689 Timer function block (Timer) ....................................................... 690 Pulse timer function block (PULSE)............................................ 690 Exclusive OR function block (XOR) ............................................ 691 Set-reset with memory function block (SRM) ............................. 691 Controllable gate function block (GT) ......................................... 692 Settable timer function block (TS)............................................... 693 Technical data ............................................................................ 694 Fixed signal function block (FIXD) ................................................... 695 Introduction ................................................................................. 695 Principle of operation .................................................................. 695 Function block ............................................................................ 695 Input and output signals ............................................................. 696 Setting parameters ..................................................................... 696 Boolean 16 to Integer conversion B16I............................................ 697

Contents

Introduction ................................................................................. 697 Principle of operation ............................................................. 697 Function block ....................................................................... 697 Input and output signals ........................................................ 698 Setting parameters ................................................................ 698 Boolean 16 to Integer conversion with logic node representation (B16IGGIO)...................................................................................... 699 Introduction ................................................................................. 699 Principle of operation .................................................................. 699 Function block............................................................................. 699 Input and output signals.............................................................. 700 Setting parameters ..................................................................... 700 Integer to Boolean 16 conversion (IB16) ......................................... 701 Introduction ................................................................................. 701 Principle of operation .................................................................. 701 Function block............................................................................. 701 Input and output signals.............................................................. 701 Setting parameters ..................................................................... 702 Integer to Boolean 16 conversion with logic node representation (IB16GGIO)...................................................................................... 703 Introduction ................................................................................. 703 Function block............................................................................. 703 Input and output signals.............................................................. 703 Setting parameters ..................................................................... 704

Chapter 14 Monitoring .................................................................... 705


Measurements (MSQI)..................................................................... 706 Introduction ................................................................................. 707 Principle of operation .................................................................. 708 Measurement supervision...................................................... 708 Service values (MMXU, SVR)................................................ 712 Current Phasors (MMXU, CP) ............................................... 718 Voltage phasors (MMXU, VN and VP)................................... 718 Sequence quantities (MSQI, CSQ and VSQ) ........................ 718 Function block............................................................................. 718 Input and output signals.............................................................. 720 Setting parameters ..................................................................... 723 Technical data ............................................................................ 738 Event counter (GGIO) ...................................................................... 739 Function block............................................................................. 739 Setting parameters ..................................................................... 739 Event function (EV) .......................................................................... 740 Introduction ................................................................................. 740 Principle of operation .................................................................. 740 Function block............................................................................. 742 Input and output signals.............................................................. 742 Setting parameters ..................................................................... 743 Fault locator (RFLO) ........................................................................ 746 Introduction ................................................................................. 746 Principle of operation .................................................................. 746

Contents

Measuring principle ............................................................... 747 Accurate algorithm for measurement of distance to fault ...... 747 The non-compensated impedance model ............................. 751 IEC 60870-5-103 ................................................................... 752 Function block ............................................................................ 752 Input and output signals ............................................................. 752 Setting parameters ..................................................................... 753 Technical data ............................................................................ 754 Measured value expander block...................................................... 755 Introduction ................................................................................. 755 Principle of operation .................................................................. 755 Function block ............................................................................ 756 Input and output signals ............................................................. 756 Disturbance report (RDRE).............................................................. 757 Introduction ................................................................................. 757 Principle of operation .................................................................. 757 Function block ............................................................................ 765 Input and output signals ............................................................. 767 Setting parameters ..................................................................... 769 Technical data ............................................................................ 781 Sequence of events (RDRE) ........................................................... 783 Introduction ................................................................................. 783 Principle of operation .................................................................. 783 Function block ............................................................................ 783 Input signals ............................................................................... 783 Technical data ............................................................................ 784 Indications (RDRE) .......................................................................... 785 Introduction ................................................................................. 785 Principle of operation .................................................................. 785 Function block ............................................................................ 786 Input signals ............................................................................... 786 Technical data ............................................................................ 786 Event recorder (RDRE).................................................................... 787 Introduction ................................................................................. 787 Principle of operation .................................................................. 787 Function block ............................................................................ 787 Input signals ............................................................................... 787 Technical data ............................................................................ 788 Trip value recorder (RDRE) ............................................................. 789 Introduction ................................................................................. 789 Principle of operation .................................................................. 789 Function block ............................................................................ 789 Input signals ............................................................................... 790 Technical data ............................................................................ 790 Disturbance recorder (RDRE).......................................................... 791 Introduction ................................................................................. 791 Principle of operation .................................................................. 791 Memory and storage.............................................................. 792 IEC 60870-5-103 ................................................................... 793 Function block ............................................................................ 793 Input and output signals ............................................................. 793 Setting parameters ..................................................................... 794 Technical data ............................................................................ 794

Contents

Chapter 15 Metering ....................................................................... 795


Pulse counter logic (GGIO).............................................................. 796 Introduction ................................................................................. 796 Principle of operation .................................................................. 796 Function block............................................................................. 798 Input and output signals.............................................................. 798 Setting parameters ..................................................................... 799 Technical data ............................................................................ 799 Energy metering and demand handling (MMTR)............................. 800 Introduction ................................................................................. 800 Principle of operation .................................................................. 800 Function block............................................................................. 801 Input and output signals.............................................................. 801 Setting parameters ..................................................................... 802

Chapter 16 Station communication............................................... 805


Overview .......................................................................................... 806 IEC 61850-8-1 communication protocol........................................... 807 Introduction ................................................................................. 807 Generic single point function block (SPGGIO) ........................... 807 Introduction ............................................................................ 807 Principle of operation ............................................................. 807 Function block ....................................................................... 807 Input and output signals ........................................................ 808 Setting parameters ................................................................ 808 Generic double point function block (DPGGIO).......................... 808 Introduction ............................................................................ 808 Principle of operation ............................................................. 809 Function block ....................................................................... 809 Input and output signals ........................................................ 809 Setting parameters ................................................................ 809 Generic measured values function block (MVGGIO).................. 809 Introduction ............................................................................ 809 Principle of operation ............................................................. 809 Function block ....................................................................... 810 Input and output signals ........................................................ 810 Setting parameters ................................................................ 810 Setting parameters ..................................................................... 811 Technical data ............................................................................ 811 LON communication protocol........................................................... 812 Introduction ................................................................................. 812 Principle of operation .................................................................. 812 Setting parameters ..................................................................... 829 Technical data ............................................................................ 829 SPA communication protocol........................................................... 830 Introduction ................................................................................. 830 Principle of operation .................................................................. 830 Communication ports............................................................. 838 Design......................................................................................... 839

Contents

Setting parameters ..................................................................... 839 Technical data ............................................................................ 840 IEC 60870-5-103 communication protocol ...................................... 841 Introduction ................................................................................. 841 Principle of operation .................................................................. 841 General.................................................................................. 841 Communication ports............................................................. 851 Function block ............................................................................ 851 Input and output signals ............................................................. 854 Setting parameters ..................................................................... 859 Technical data ............................................................................ 862 Automation bits (AUBI) .................................................................... 863 Introduction ................................................................................. 863 Principle of operation .................................................................. 863 Function block ............................................................................ 864 Input and output signals ............................................................. 864 Setting parameters ..................................................................... 866 Single command, 16 signals (CD) ................................................... 878 Introduction ................................................................................. 878 Principle of operation .................................................................. 878 Function block ............................................................................ 878 Input and output signals ............................................................. 879 Setting parameters ..................................................................... 879 Multiple command (CM) and Multiple transmit (MT)........................ 880 Introduction ................................................................................. 880 Principle of operation .................................................................. 880 Design ........................................................................................ 880 General.................................................................................. 880 Function block ............................................................................ 881 Input and output signals ............................................................. 881 Setting parameters ..................................................................... 883

Chapter 17 Remote communication ............................................. 885


Binary signal transfer to remote end................................................ 886 Introduction ................................................................................. 886 Principle of operation .................................................................. 886 Function block ............................................................................ 887 Input and output signals ............................................................. 889 Setting parameters ..................................................................... 890

Chapter 18 Hardware...................................................................... 895


Overview.......................................................................................... 896 Variants of case- and HMI display size....................................... 896 Case from the rear side .............................................................. 897 Hardware modules........................................................................... 902 Overview..................................................................................... 902 Combined backplane module (CBM).......................................... 903 Introduction............................................................................ 903

Contents

Functionality .......................................................................... 903 Design ................................................................................... 903 Universal backplane module (UBM) ........................................... 905 Introduction ............................................................................ 905 Functionality .......................................................................... 905 Design ................................................................................... 905 Power supply module (PSM) ...................................................... 908 Introduction ............................................................................ 908 Design ................................................................................... 908 Technical data ....................................................................... 908 Numeric processing module (NUM)............................................ 909 Introduction ............................................................................ 909 Functionality .......................................................................... 909 Block diagram ........................................................................ 910 Local human-machine interface (LHMI)...................................... 910 Transformer input module (TRM) ............................................... 911 Introduction ............................................................................ 911 Design ................................................................................... 911 Technical data ....................................................................... 911 Analog digital conversion module, with time synchronization (ADM) ............................................. 912 Introduction ............................................................................ 912 Design ................................................................................... 912 Binary input module (BIM) .......................................................... 914 Introduction ............................................................................ 914 Design ................................................................................... 914 Technical data ....................................................................... 918 Binary output modules (BOM) .................................................... 918 Introduction ............................................................................ 918 Design ................................................................................... 919 Technical data ....................................................................... 921 Static binary output module (SOM)............................................. 921 Introduction ............................................................................ 921 Design ................................................................................... 921 Technical data ....................................................................... 923 Binary input/output module (IOM)............................................... 923 Introduction ............................................................................ 923 Design ................................................................................... 924 Technical data ....................................................................... 926 Line data communication module (LDCM) ................................. 928 Introduction ............................................................................ 928 Design ................................................................................... 928 Technical data ....................................................................... 930 Serial SPA/IEC 60870-5-103 and LON communication module (SLM) ................................................ 931 Introduction ............................................................................ 931 Design ................................................................................... 931 Technical data ....................................................................... 933 Galvanic RS485 communication module.................................... 934 Introduction ............................................................................ 934 Design ................................................................................... 934 Technical data ....................................................................... 936 Optical ethernet module (OEM) .................................................. 936

Contents

Introduction............................................................................ 936 Functionality .......................................................................... 936 Design ................................................................................... 936 Technical data ....................................................................... 937 mA input module (MIM) .............................................................. 937 Introduction............................................................................ 937 Design ................................................................................... 937 Technical data ....................................................................... 939 GPS time synchronization module (GSM) .................................. 939 Introduction............................................................................ 939 Design ................................................................................... 939 Technical data ....................................................................... 942 GPS antenna .............................................................................. 942 Introduction............................................................................ 942 Design ................................................................................... 942 Technical data ....................................................................... 944 IRIG-B time synchronization module IRIG-B .............................. 945 Introduction............................................................................ 945 Design ................................................................................... 945 Technical data ....................................................................... 946 Dimensions ...................................................................................... 947 Case without rear cover.............................................................. 947 Case with rear cover................................................................... 948 Flush mounting dimensions ........................................................ 949 Side-by-side flush mounting dimensions .................................... 950 Wall mounting dimensions.......................................................... 952 External resistor unit for high impedance differential protection . 953 Mounting alternatives....................................................................... 954 Flush mounting ........................................................................... 954 Overview................................................................................ 954 Mounting procedure for flush mounting ................................. 955 19 panel rack mounting ............................................................. 956 Overview................................................................................ 956 Mounting procedure for 19 panel rack mounting.................. 957 Wall mounting ............................................................................. 957 Overview................................................................................ 957 Mounting procedure for wall mounting .................................. 958 How to reach the rear side of the IED ................................... 958 Side-by-side 19 rack mounting .................................................. 959 Overview................................................................................ 959 Mounting procedure for side-by-side rack mounting ............. 960 IED 670 mounted with a RHGS6 case .................................. 960 Side-by-side flush mounting ....................................................... 961 Overview................................................................................ 961 Mounting procedure for side-by-side flush mounting............. 962 Technical data ................................................................................. 963 Enclosure.................................................................................... 963 Connection system ..................................................................... 963 Influencing factors ...................................................................... 964 Type tests according to standard ............................................... 965

Contents

Chapter 19 Labels ........................................................................... 967


Different labels ................................................................................. 968

Chapter 20 Connection diagrams.................................................. 971 Chapter 21 Time inverse characteristics ...................................... 987
Application ....................................................................................... 988 Principle of operation ....................................................................... 992 Mode of operation....................................................................... 992 Inverse characteristics ..................................................................... 999

Chapter 22 Glossary ..................................................................... 1011


Glossary......................................................................................... 1012

About this chapter

Chapter 1 Introduction

Chapter 1 Introduction
About this chapter This chapter explains concepts and conventions used in this manual and provides information necessary to understand the contents of the manual.

Introduction to the technical reference manual

Chapter 1 Introduction

1
1.1

Introduction to the technical reference manual


About the complete set of manuals for an IED
The users manual (UM) is a complete set of five different manuals:

Application manual

Technical reference manual

Installation and commissioning manual

Operators manual

Engineering guide

en06000097.vsd

The Application Manual (AM) contains application descriptions, setting guidelines and setting parameters sorted per function. The application manual should be used to find out when and for what purpose a typical protection function could be used. The manual should also be used when calculating settings. The Technical Reference Manual (TRM) contains application and functionality descriptions and it lists function blocks, logic diagrams, input and output signals, setting parameters and technical data sorted per function. The technical reference manual should be used as a technical reference during the engineering phase, installation and commissioning phase, and during normal service. The Installation and Commissioning Manual (ICM) contains instructions on how to install and commission the protection IED. The manual can also be used as a reference during periodic testing. The manual covers procedures for mechanical and electrical installation, energizing and checking of external circuitry, setting and configuration as well as verifying settings and performing directional tests. The chapters are organized in the chronological order (indicated by chapter/section numbers) in which the protection IED should be installed and commissioned. The Operators Manual (OM) contains instructions on how to operate the protection IED during normal service once it has been commissioned. The operators manual can be used to find out how to handle disturbances or how to view calculated and measured network data in order to determine the cause of a fault. The IED 670 Engineering guide (EG) contains instructions on how to engineer the IED 670 products. The manual guides to use the different tool components for IED 670 engineering. It also guides how to handle the tool component available to read disturbance files from the IEDs on the basis of the IEC 61850 definitions. The third part is an introduction about the diagnostic tool components available for IED 670 products and the PCM 600 tool. The IEC 61850 Station Engineering guide contains descriptions of IEC 61850 station engineering and process signal routing. The manual presents the PCM 600 and CCT tool used for station engineering. It describes the IEC 61850 attribute editor and how to set up projects and communication.

Introduction to the technical reference manual

Chapter 1 Introduction

1.2

About the technical reference manual


The technical reference manual contains the following chapters: The chapter Local human-machine interface describes the control panel on the IED. Display characteristics, control keys and various local human-machine interface features are explained. The chapter Basic IED functions presents functions that are included in all IEDs regardless of the type of protection they are designed for. These are functions like Time synchronization, Self supervision with event list, Test mode and other functions of a general nature. The chapter Distance protection describes the functions for distance zones with their quadrilateral characteristics, phase selection with load encroachment, power swing detection and similar. The chapter Current protection describes functions such as overcurrent protection, breaker failure protection and pole discordance. The chapter Voltage protection describes functions like undervoltage and overvoltage protection as well as residual overvoltage protection. The chapter Frequency protection describes functions for overfrequency, underfrequency and rate of change of frequency. The chapter Multipurpose protection describes the general protection function for current and voltage. The chapter Secondary system supervision includes descriptions of functions like current based Current circuit supervision and Fuse failure supervision. The chapter Control describes the control functions. These are functions like the Synchronization and energizing check as well as several others which are product specific. The chapter Scheme communication describes among others functions related to current reversal and weak end infeed logic. The chapter Logic describes trip logic and related functions. The chapter Monitoring describes measurement related functions used to provide data regarding relevant quantities, events, faults and the like. The chapter Metering describes primarily Pulse counter logic. The chapter Station communication describes Ethernet based communication in general including the use of IEC61850, and horizontal communication via GOOSE. The chapter Remote communication describes binary and analog signal transfer, and the associated hardware. The chapter Hardware provides descriptions of the IED and its components. The chapter Connection diagrams provides terminal wiring diagrams and information regarding connections to and from the IED. The chapter Time inverse characteristics describes and explains inverse time delay, inverse time curves and their effects. The chapter Glossary is a list of terms, acronyms and abbreviations used in ABB technical documentation.

Introduction to the technical reference manual

Chapter 1 Introduction

1.3

Design of the Technical reference manual (TRM)


The description of each IED related function follows the same structure (where applicable). The different sections are outlined below.

1.3.1

Introduction Outlines the implementation of a particular protection function. Principle of operation Describes how the function works, presents a general background to algorithms and measurement techniques. Logic diagrams are used to illustrate functionality. Logic diagrams Logic diagrams describe the signal logic inside the function block and are bordered by dashed lines. Signal names Input and output logic signals consist of two groups of letters separated by two dashes. The first group consists of up to four letters and presents the abbreviated name for the corresponding function. The second group presents the functionality of the particular signal. According to this explanation, the meaning of the signal BLKTR in figure 4 is as follows: BLKTR informs the user that the signal will BLOCK the TRIP command from the under-voltage function, when its value is a logical one (1).

1.3.2

Input signals are always on the left hand side, and output signals on the right hand side. Settings are not displayed. Input and output signals In a logic diagram, input and output signal paths are shown as a lines that touch the outer border of the diagram. Input and output signals can be configured using the CAP531 tool. They can be connected to the inputs and outputs of other functions and to binary inputs and outputs. Examples of input signals are BLKTR, BLOCK and VTSU. Examples output signals are TRIP, START, STL1, STL2, STL3. Setting parameters Signals in frames with a shaded area on their right hand side represent setting parameter signals. These parameters can only be set via the PST or LHMI. Their values are high (1) only when the corresponding setting parameter is set to the symbolic value specified within the frame. Example is the signal Block TUV=Yes. Their logical values correspond automatically to the selected setting value. Internal signals Internal signals are illustrated graphically and end approximately. 2 mm from the frame edge. If an internal signal path cannot be drawn with a continuous line, the suffix -int is added to the signal name to indicate where the signal starts and continues, see figure 3.

Introduction to the technical reference manual

Chapter 1 Introduction

BLKTR TEST TEST AND Block TUV=Yes BLOCK VTSU BLOCK-int. PU_V_A BLOCK-int. PU_V_B BLOCK-int. PU_V_C AND AND OR AND AND 0-t 0 TRIP PICKUP PU_A PU_B PU_C OR BLOCK-int.

xx04000375_ansi.vsd

Figure 1:

Logic diagram example with -int signals

External signals Signal paths that extend beyond the logic diagram and continue in another diagram have the suffix -cont., see figure 2 and figure 3.

Introduction to the technical reference manual

Chapter 1 Introduction

OR PHSEL AND AND AND AND AND AND OR

STZMPP-cont.

PUND_AB-cont. PUND_BC-cont. PUND_CA-cont. PUND_AG-cont. PUND_BG-cont. PUND_CG-cont. PUND_GND-cont.

AB BC CA AG BG CG

OR LOVBZ 1--BLOCK OR AND PU_ND BLK-cont.


xx04000376_ansi.vsd

Figure 2:

Logic diagram example with an outgoing -cont signal

STND_AG-cont. STND_BG-cont. STND_CG-cont. STND_AB-cont. STND_BC-cont. STND_CA-cont.

or AND or AND AND AND


0

PU_A PU_B PU_C PICKUP

15 ms
0

15 ms
0

or or

15 ms
0

15 ms

BLK-cont.
Xx04000377_ansi.vsd

Figure 3:

Logic diagram example with an incoming -cont signal

Introduction to the technical reference manual

Chapter 1 Introduction

1.3.3

Input and output signals Input and output signals are presented in two separate tables. Each table consists of two columns. The first column contains the name of the signal and the second column contains the description of the signal. Function block Each function block is illustrated graphically. Input signals are always on the left hand side, and output signals on the right hand side. Settings are not displayed. Special kinds of settings are sometimes available. These are supposed to be connected to constants in the configuration scheme, and are therefore depicted as inputs. Such signals will be found in the signal list but described in the settings table.

1.3.4

CAP531 Name Inputs


U3P BLOCK BLKTR1 BLKST1 BLKTR2 BLKST2

IEC 61850 - 8 -1 Logical Node

TUV1PH2PUVM TRIP TR1 TR1L1 TR1L2 TR1L3 TR2 TR2L1 TR2L2 TR2L3 START ST1 ST1L1 ST1L2 ST1L3 ST2 ST2L1 ST2L2 ST2L3 en05000330.vsd

Outputs

Diagram Number

Figure 4: 1.3.5

Example of a function block

Setting parameters These are presented in tables and include all parameters associated with the function in question. Technical data The technical data section provides specific technical information about the function or hardware described.

1.3.6

1.4
1.4.1

Intended audience
General This manual addresses system engineers, installation and commissioning personnel, who use technical data during engineering, installation and commissioning, and in normal service.

Introduction to the technical reference manual

Chapter 1 Introduction

1.4.2

Requirements The system engineer must have a thorough knowledge of protection systems, protection equipment, protection functions and the configured functional logics in the protective devices. The installation and commissioning personnel must have a basic knowledge in the handling electronic equipment.

1.5

Related documents
Documents related to REL 670 Operators manual Installation and commissioning manual Technical reference manual Application manual Buyers guide Connection diagram, Single breaker arr. Three-pole tripping arr. Connection diagram, Single breaker arr. Single-pole tripping arr. Connection diagram, Multi breaker arr. Three-pole tripping arr. Connection diagram, Multi breaker arr. Single-pole tripping arr. Configuration diagram A, Single breaker with single or double busbar, 3 pole tripping (A31) Configuration diagram B, Single breaker with single or double busbar, 1/3 pole tripping (A32) Identity number 1MRK 506 276-UUS 1MRK 506 277-UUS 1MRK 506 275-UUS 1MRK 506 278-UUS 1MRK 506 280-BUS 1MRK 002 801-BA 1MRK 002 801-CA 1MRK 002 801-DA 1MRK 002 801-EA 1MRK 004 500-86 1MRK 004 500-87

Configuration diagram C, Multi breaker such as breaker-and-a-half or ring bus- 1MRK 004 500-88 bar arr. 3 pole tripping (B31) Configuration diagram D, Multi breaker such as breaker-and-a-half or ring bus- 1MRK 004 500-89 bar arr. 1/3 pole tripping (B32) Setting example 1, 400 kV Long overhead power line with breaker-and-a-half CB arr. Quadrilaterial characteristic. Setting example 2, Setting example 1, 400 kV Long overhead power line with breaker-and-a-half CB arr. Mho characteristic. Setting example 3, 230 kV Extremely long overhead power line, double bus, single CB arr. Quadrilaterial characteristic. Setting example 4, 230 kV Extremely long overhead power line, double bus, single CB arr. Mho characteristic. Setting example 5, 132 kV Short overhead power line, double bus, single CB arr. Quadrilaterial characteristic. Setting example 6, 132 kV Short overhead power line, double bus, single CB arr. Mho characteristic. 1MRK 506 267-WEN 1MRK 506 291-WEN 1MRK 506 268-WEN 1MRK 506 292-WEN 1MRK 506 269-WEN 1MRK 506 290-WEN

Setting example 7, 70 kV power line on a resonance earth system. Double bus, 1MRK 506 293-WEN single breaker arrangement. Setting example 8, 400 kV long series compensated line. breaker-and-a-half arrangement. 1MRK 506 294-WEN

Introduction to the technical reference manual

Chapter 1 Introduction

Connection and Installation components Test system, COMBITEST Accessories for IED 670 Getting started guide IED 670 SPA and LON signal list for IED 670, ver. 1.1 IEC 61850 Data objects list for IED 670, ver. 1.1 Generic IEC 61850 IED Connectivity package Protection and Control IED Manager PCM 600 Installation sheet Engineering guide IED 670 products

1MRK 013 003-BEN 1MRK 512 001-BEN 1MRK 514 012-BEN 1MRK 500 080-UUS 1MRK 500 083-WEN 1MRK 500 084-WEN 1KHA001027-UEN 1MRS755552 1MRK 511 179-UEN

Latest versions of the described documentation can be found on www.abb.com/substationautomation

1.6

Revision notes
Revision Description First release

Introduction to the technical reference manual

Chapter 1 Introduction

10

About this chapter

Chapter 2 Local human-machine interface

Chapter 2 Local human-machine interface


About this chapter This chapter describes the structure and use of the Local human machine interface (LHMI) or in other words, the control panel on the IED.

11

Medium size graphic HMI

Chapter 2 Local human-machine interface

1
1.1

Medium size graphic HMI


Design
The different parts of the medium size LHMI is shown in figure 5The LHMI, exists in an IEC version and in an ANSI version. The difference is on the keypad operation buttons and the yellow LED designation.

12

Medium size graphic HMI

Chapter 2 Local human-machine interface

1 2 3 4 5 6 7 8

Status indication LEDs LCD Indication LEDs Label Local/Remote LEDs RJ45 port Communication indication LED Keypad

Figure 5:

Medium size graphic HMI

13

Keypad

Chapter 2 Local human-machine interface

Keypad
The keypad is used to monitor and operate the IED. The keypad has the same look and feel in all IEDs in the IED 670 series. LCD screens and other details may differ but the way the keys function is identical. The keypad is illustrated in figure 6.

Figure 6:

The HMI keypad.

The keys used to operate the IED are described below in table 1.

14

Keypad

Chapter 2 Local human-machine interface

Table 1:
Key

HMI keys on the front of the IED


Function

This key closes (energizes) a breaker or disconnector.

This key opens a breaker or disconnector.

The help key brings up two submenus. Key operation and IED information.

This key is used to clear entries, It cancels commands and edits.

Opens the main menu, and used to move to the default screen.

The Local/Remote key is used to set the IED in local or remote control mode.

This key opens the reset screen.

The E key starts editing mode and confirms setting changes when in editing mode.

The right arrow key navigates forward between screens and moves right in editing mode.

The left arrow key navigates backwards between screens and moves left in editing mode.

The up arrow key is used to move up in the single line diagram and in menu tree.

The down arrow key is used to move down in the single line diagram and in menu tree.

15

LHMI related functions

Chapter 2 Local human-machine interface

3
3.1

LHMI related functions


Introduction
The adaptation of the LHMI to the application and user preferences is made with: function block LHMI (LocalHMI) function block HLED (LEDMonitor) setting parameters

3.2

General setting parameters


Table 2:
Parameter Language DisplayTimeout AutoRepeat ContrastLevel DefaultScreen EvListSrtOrder SymbolFont

Basic general settings for the localHMI (LHM1-) function


Range English OptionalLanguage 10 - 120 Disabled Enabled -10 - 20 0-0 Latest on top Oldest on top IEC ANSI Step 10 1 1 Default English 60 Enabled 0 0 Latest on top IEC Unit Min % Description Local HMI language Local HMI display timeout Activation of auto-repeat (On) or not (Off) Contrast level for display Default screen Sort order of event list Symbol font for Single Line Diagram

3.3
3.3.1

Status indication LEDs


Design The function block LHMI (LocalHMI) controls and supplies information about the status of the status indication LEDs. The input and output signals of LHMI are configured with the PCM 600 tool. The function block can be used if any of the signals are required in a configuration logic. See section 3.4 for information about the LEDs.

16

LHMI related functions

Chapter 2 Local human-machine interface

3.3.2

Function block
LHMILocalHMI RSTLEDS HMI-ON RED-S YELLOW-S YELLOW-F RSTPULSE LEDSRST en05000773_ansi.vsd

Figure 7: 3.3.3

LHMI function block

Input and output signals


Table 3:
Signal RSTLEDS

Input signals for the LocalHMI (LHMI-) function block


Description Input to reset the LCD-HMI LEDs

Table 4:
Signal HMI-ON RED-S YELLOW-S YELLOW-F RSTPULSE LEDSRST

Output signals for the LocalHMI (LHMI-) function block


Description Backlight of the LCD display is active Red LED on the LCD-HMI is steady Yellow LED on the LCD-HMI is steady Yellow LED on the LCD-HMI is flashing A reset pulse is provided when the LEDs on the LCD-HMI are cleared Active when the LEDs on the LCD-HMI are not ON

3.4
3.4.1

Indication LEDs
Introduction The function block HLED (LEDMonitor) controls and supplies information about the status of the indication LEDs. The input and output signals of HLED are configured with the PCM 600 tool. The input signal for each LED is selected individually with the PCM 600 Signal Matrix Tool (SMT). LEDs (number 16) for trip indications are red and LEDs (number 715) for pickup indications are yellow. Each indication LED on the LHMI can be set individually to operate in six different sequences; two as follow type and four as latch type. Two of the latching sequence types are intended to be used as a protection indication system, either in collecting or restarting mode, with reset functionality. The other two are intended to be used as signalling system in collecting (coll) mode with an acknowledgment functionality. The light from the LEDs can be steady (-S) or flickering (-F). For details, refer to Technical reference manual.

17

LHMI related functions

Chapter 2 Local human-machine interface

3.4.2

Design The information on the LEDs is stored at loss of the auxiliary power to the IED in some of the modes of the HLED. The latest LED picture appears immediately after the IED is successfully restarted. Operating modes Collecting mode - LEDs which are used in collecting mode of operation are accumulated continuously until the unit is acknowledged manually. This mode is suitable when the LEDs are used as a simplified alarm system. Re-starting mode - In the re-starting mode of operation each new pickup resets all previous active LEDs and activates only those which appear during one disturbance. Only LEDs defined for re-starting mode with the latched sequence type 6 (LatchedReset-S) will initiate a reset and a restart at a new disturbance. A disturbance is defined to end a settable time after the reset of the activated input signals or when the maximum time limit has elapsed.

Acknowledgment/reset From local HMI - The active indications can be acknowledged/reset manually. Manual acknowledgment and manual reset have the same meaning and is a common signal for all the operating sequences and LEDs. The function is positive edge triggered, not level triggered. The acknowledgment/reset is performed via the Reset-button and menus on the LHMI. For details, refer to the Operators manual. From function input - The active indications can also be acknowledged/reset from an input, RESET, to the function. This input can for example be configured to a binary input operated from an external push button. The function is positive edge triggered, not level triggered. This means that even if the button is continuously pressed, the acknowledgment/reset only affects indications active at the moment when the button is first pressed. Automatic reset - The automatic reset can only be performed for indications defined for re-starting mode with the latched sequence type 6 (LatchedReset-S). When the automatic reset of the LEDs has been performed, still persisting indications will be indicated with a steady light.

Operating sequences The sequences can be of type Follow or Latched. For the Follow type the LED follow the input signal completely. For the Latched type each LED latches to the corresponding input signal until it is reset.

18

LHMI related functions

Chapter 2 Local human-machine interface

The figures below show the function of available sequences selectable for each LED separately. For sequence 1 and 2 (Follow type), the acknowledgment/reset function is not applicable. Sequence 3 and 4 (Latched type with acknowledgement) are only working in collecting mode. Sequence 5 is working according to Latched type and collecting mode while sequence 6 is working according to Latched type and re-starting mode. The letters S and F in the sequence names have the meaning S = Steady and F = Flash. At the activation of the input signal, the indication operates according to the selected sequence diagrams below. In the sequence diagrams the LEDs have the characteristics shown in figure 8.

= No indication

= Steady light

= Flash
en05000506.vsd

Figure 8:

Symbols used in the sequence diagrams

Sequence 1 (Follow-S) This sequence follows all the time, with a steady light, the corresponding input signals. It does not react on acknowledgment or reset. Every LED is independent of the other LEDs in its operation.

Activating signal

LED
en01000228.vsd

Figure 9:

Operating sequence 1 (Follow-S)

Sequence 2 (Follow-F) This sequence is the same as sequence 1, Follow-S, but the LEDs are flashing instead of showing steady light. Sequence 3 (LatchedAck-F-S) This sequence has a latched function and works in collecting mode. Every LED is independent of the other LEDs in its operation. At the activation of the input signal, the indication starts flashing. After acknowledgment the indication disappears if the signal is not present any more. If the signal is still present after acknowledgment it gets a steady light.

19

LHMI related functions

Chapter 2 Local human-machine interface

Activating signal

LED

Acknow.
en01000231.vsd

Figure 10:

Operating sequence 3 (LatchedAck-F-S)

Sequence 4 (LatchedAck-S-F) This sequence has the same functionality as sequence 3, but steady and flashing light have been alternated. Sequence 5 (LatchedColl-S) This sequence has a latched function and works in collecting mode. At the activation of the input signal, the indication will light up with a steady light. The difference to sequence 3 and 4 is that indications that are still activated will not be affected by the reset i.e. immediately after the positive edge of the reset has been executed a new reading and storing of active signals is performed. Every LED is independent of the other LEDs in its operation.

Activating signal

LED

Reset
en01000235.vsd

Figure 11:

Operating sequence 5 (LatchedColl-S)

Sequence 6 (LatchedReset-S) In this mode all activated LEDs, which are set to sequence 6 (LatchedReset-S), are automatically reset at a new disturbance when activating any input signal for other LEDs set to sequence 6 (LatchedReset-S). Also in this case indications that are still activated will not be affected by manual reset, i.e. immediately after the positive edge of that the manual reset has been executed a new reading and storing of active signals is performed. LEDs set for sequence 6 are completely independent in its operation of LEDs set for other sequences.

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LHMI related functions

Chapter 2 Local human-machine interface

Definition of a disturbance A disturbance is defined to last from the first LED set as LatchedReset-S is activated until a settable time, tRestart, has elapsed after that all activating signals for the LEDs set as LatchedReset-S have reset. However if all activating signals have reset and some signal again becomes active before tRestart has elapsed, the tRestart timer does not restart the timing sequence. A new disturbance start will be issued first when all signals have reset after tRestart has elapsed. A diagram of this functionality is shown in figure 12.

From disturbance length control per LED set to sequence 6

OR

OR

New disturbance

AND

tRestart 0 0-100s

OR

AND OR

AND

en01000237_ansi.vsd

Figure 12:

Activation of new disturbance

In order not to have a lock-up of the indications in the case of a persisting signal each LED is provided with a timer, tMax, after which time the influence on the definition of a disturbance of that specific LED is inhibited. This functionality is shown i diagram in figure 13.

Activating signal

To LED

AND 0-tMax 0

To disturbance length control

en05000507_ansi.vsd

Figure 13:

Length control of activating signals

Timing diagram for sequence 6 Figure 14 shows the timing diagram for two indications within one disturbance.

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Chapter 2 Local human-machine interface

Disturbance t Restart Activating signal 1 Activating signal 2

LED 1

LED 2 Automatic reset Manual reset

en01000239.vsd

Figure 14:

Operating sequence 6 (LatchedReset-S), two indications within same disturbance

Figure 15 shows the timing diagram for a new indication after tRestart time has elapsed.

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LHMI related functions

Chapter 2 Local human-machine interface

Disturbance t Restart Activating signal 1 Activating signal 2

Disturbance t Restart

LED 1

LED 2 Automatic reset Manual reset

en01000240.vsd

Figure 15:

Operating sequence 6 (LatchedReset-S), two different disturbances

Figure 16 shows the timing diagram when a new indication appears after the first one has reset but before tRestart has elapsed.

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LHMI related functions

Chapter 2 Local human-machine interface

Disturbance t Restart Activating signal 1 Activating signal 2

LED 1

LED 2 Automatic reset Manual reset


en01000241.vsd

Figure 16:

Operating sequence 6 (LatchedReset-S), two indications within same disturbance but with reset of activating signal between

Figure 17 shows the timing diagram for manual reset.

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LHMI related functions

Chapter 2 Local human-machine interface

Disturbance t Restart Activating signal 1 Activating signal 2

LED 1

LED 2 Automatic reset Manual reset


en01000242.vsd

Figure 17: 3.4.3

Operating sequence 6 (LatchedReset-S), manual reset

Function block
HLEDLEDMonitor BLOCK RESET LEDTEST NEWIND ACK

en05000508.vsd

Figure 18: 3.4.4

HLED function block

Input and output signals


Table 5:
Signal BLOCK RESET LEDTEST

Input signals for the LEDMonitor (HLED-) function block


Description Input to block the operation of the LED-unit Input to acknowledge/reset the indications of the LED-unit Input for external LED test

25

LHMI related functions

Chapter 2 Local human-machine interface

Table 6:
Signal NEWIND ACK

Output signals for the LEDMonitor (HLED-) function block


Description A new signal on any of the indication inputs occurs A pulse is provided when the LEDs are acknowledged

3.4.5

Setting parameters
Table 7:
Parameter Operation tRestart tMax

Basic general settings for the LEDMonitor (HLED-) function


Range Disabled Enabled 0.0 - 100.0 0.0 - 100.0 Step 0.1 0.1 Default Disabled 0.0 0.0 Unit s s Description Operation mode for the LED function Defines the disturbance length Maximum time for the definition of a disturbance Sequence type for LED 1

SeqTypeLED1

Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S

Follow-S

SeqTypeLED2

Follow-S

Sequence type for LED 2

SeqTypeLED3

Follow-S

Sequence type for LED 3

SeqTypeLED4

Follow-S

Sequence type for LED 4

SeqTypeLED5

Follow-S

Sequence type for LED 5

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LHMI related functions

Chapter 2 Local human-machine interface

Parameter SeqTypeLED6

Range Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S

Step -

Default Follow-S

Unit -

Description Sequence type for LED 6

SeqTypeLED7

Follow-S

Sequence type for LED 7

SeqTypeLED8

Follow-S

sequence type for LED 8

SeqTypeLED9

Follow-S

Sequence type for LED 9

SeqTypeLED10

Follow-S

Sequence type for LED 10

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LHMI related functions

Chapter 2 Local human-machine interface

Parameter SeqTypeLED11

Range Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S Follow-S Follow-F LatchedAck-F-S LatchedAck-S-F LatchedColl-S LatchedReset-S

Step -

Default Follow-S

Unit -

Description Sequence type for LED 11

SeqTypeLED12

Follow-S

Sequence type for LED 12

SeqTypeLED13

Follow-S

Sequence type for LED 13

SeqTypeLED14

Follow-S

Sequence type for LED 14

SeqTypeLED15

Follow-S

Sequence type for LED 15

28

About this chapter

Chapter 3 Basic IED functions

Chapter 3 Basic IED functions


About this chapter This chapter presents functions that are basic to all REx670 IEDs. Typical functions in this category are time synchronization, self supervision and test mode.

29

Analog inputs

Chapter 3 Basic IED functions

1
1.1

Analog inputs
Introduction
In order to get correct measurement results as well as correct protection operations the analog input channels must be configured and properly set. For power measuring and all directional and differential functions the directions of the input currents must be properly defined. The measuring and protection algorithms in IED 670 are using primary system quantities and the set values are done in primary quantities as well. Therefore it is extremely important to properly set the data about the connected current and voltage transformers. In order to make Service Values reading easier it is possible to define a reference PhaseAngleRef. Then this analog channels phase angle will be always fixed to zero degree and all other angle information will be shown in relation to this analog input. During testing and commissioning of the IED the reference channel can be freely change in order to facilitate testing and service values reading.

Note!
VT inputs are sometimes not available depending on ordered type of Transformer Input Module (TRM).

1.2

Principle of operation
The direction of a current to the IED is depending on the connection of the CT. The main CTs are typically star (WYE) connected and can be connected with the Star (WYE) point to the object or from the object. This information must be set to the IED. The convention of the directionality is defined as follows: A positive value of current, power etc. means that the quantity has the direction into the object and a negative value means direction out from the object. For directional functions the direction into the object is defined as Forward and the direction out from the object is defined as Reverse, see figure 19

30

Analog inputs

Chapter 3 Basic IED functions

Definition of direction for directional functions Reverse Forward

Definition of direction for directional functions Forward Reverse

Protected Object Line, transformer, etc


e.g. P, Q, I Measured quantity is positive when flowing towards the object Set parameter CT_WyePoint Correct Setting is "ToObject" e.g. P, Q, I Measured quantity is positive when flowing towards the object Set parameter CT_WyePoint Correct Setting is "FromObject"

Figure 19:

en05000456_ansi.vsd Internal convention of the directionality in IED 670

With correct setting of the primary CT direction, CTStarPoint set to FromObject or ToObject, a positive quantities always flowing towards the object and a direction defined as Forward always is looking towards the object. To be able to use primary system quantities for settings and calculation in the IED the ratios of the main CTs and VTs must be known. This information is given to the IED by setting of the rated secondary and primary currents and voltages of the CTs and VTs. The CT and VT ratio and the name on respective channel is done under General settings/Analog module in the parameter settings tool PST.

1.3

Function block
Dependent on ordered IED 670 type.

TB40ANALOGIN6I ERROR CH1 NAMECH1 CH2 NAMECH2 CH3 NAMECH3 CH4 NAMECH4 CH5 NAMECH5 CH6 NAMECH6 en05000712.vsd

31

Analog inputs

Chapter 3 Basic IED functions

TC40ANALOGIN9I3U ERROR NAMECH1 CH1 CH2 NAMECH2 NAMECH3 CH3 CH4 NAMECH4 NAMECH5 CH5 CH6 NAMECH6 NAMECH7 CH7 CH8 NAMECH8 NAMECH9 CH9 CH10 NAMECH10 NAMECH11 CH11 CH12 NAMECH12 en05000713.vsd

TD40ANALOGIN6I6U ERROR NAMECH1 CH1 CH2 NAMECH2 NAMECH3 CH3 CH4 NAMECH4 NAMECH5 CH5 CH6 NAMECH6 NAMECH7 CH7 CH8 NAMECH8 NAMECH9 CH9 CH10 NAMECH10 NAMECH11 CH11 CH12 NAMECH12 en05000714.vsd

1.4

Output signals
Dependent on ordered IED 670 type.

32

Analog inputs

Chapter 3 Basic IED functions

Table 8:
Signal ERROR CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12

Output signals for the ANALOGIN12I (TA40-) function block


Description Analog input module status Analog input 1 Analog input 2 Analog input 3 Analog input 4 Analog input 5 Analog input 6 Analog input 7 Analog input 8 Analog input 9 Analog input 10 Analog input 11 Analog input 12

Table 9:
Signal ERROR CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12

Output signals for the ANALOGIN9I3U (TC40-) function block


Description Analog input module status Analog input 1 Analog input 2 Analog input 3 Analog input 4 Analog input 5 Analog input 6 Analog input 7 Analog input 8 Analog input 9 Analog input 10 Analog input 11 Analog input 12

33

Analog inputs

Chapter 3 Basic IED functions

Table 10:
Signal ERROR CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12

Output signals for the ANALOGIN6I6U (TD40-) function block


Description Analog input module status Analog input 1 Analog input 2 Analog input 3 Analog input 4 Analog input 5 Analog input 6 Analog input 7 Analog input 8 Analog input 9 Analog input 10 Analog input 11 Analog input 12

1.5

Setting parameters
Dependent on ordered IED 670 type.
Table 11:
Parameter PhaseAngleRef

General settings for the AISERVAL (AISV-) function


Range 1 - 24 Step 1 Default 1 Unit Ch Description Reference channel for phase angle presentation

Table 12:
Parameter

Basic general settings for the ANALOGIN12I (TA40-) function


Range FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject Step Default ToObject Unit Description ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite

CT_WyePoint1

CTsec1 CTprim1 CT_WyePoint2

1 1 -

1 3000 ToObject

A A -

CTsec2 CTprim2 CT_WyePoint3

1 1 -

1 3000 ToObject

A A -

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Analog inputs

Chapter 3 Basic IED functions

Parameter CTsec3 CTprim3 CT_WyePoint4

Range 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999

Step 1 1 -

Default 1 3000 ToObject

Unit A A -

Description Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current

CTsec4 CTprim4 CT_WyePoint5

1 1 -

1 3000 ToObject

A A -

CTsec5 CTprim5 CT_WyePoint6

1 1 -

1 3000 ToObject

A A -

CTsec6 CTprim6 CT_WyePoint7

1 1 -

1 3000 ToObject

A A -

CTsec7 CTprim7 CT_WyePoint8

1 1 -

1 3000 ToObject

A A -

CTsec8 CTprim8 CT_WyePoint9

1 1 -

1 3000 ToObject

A A -

CTsec9 CTprim9 CT_WyePoint10

1 1 -

1 3000 ToObject

A A -

CTsec10 CTprim10

1 1

1 3000

A A

35

Analog inputs

Chapter 3 Basic IED functions

Parameter CT_WyePoint11

Range FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999

Step -

Default ToObject

Unit -

Description ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current

CTsec11 CTprim11 CT_WyePoint12

1 1 -

1 3000 ToObject

A A -

CTsec12 CTprim12

1 1

1 3000

A A

Table 13:
Parameter

Basic general settings for the ANALOGIN9I3U (TC40-) function


Range FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 Step Default ToObject Unit Description ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current

CT_WyePoint1

CTsec1 CTprim1 CT_WyePoint2

1 1 -

1 3000 ToObject

A A -

CTsec2 CTprim2 CT_WyePoint3

1 1 -

1 3000 ToObject

A A -

CTsec3 CTprim3 CT_WyePoint4

1 1 -

1 3000 ToObject

A A -

CTsec4 CTprim4 CT_WyePoint5

1 1 -

1 3000 ToObject

A A -

CTsec5

36

Analog inputs

Chapter 3 Basic IED functions

Parameter CTprim5 CT_WyePoint6

Range 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00

Step 1 -

Default 3000 ToObject

Unit A -

Description Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage

CTsec6 CTprim6 CT_WyePoint7

1 1 -

1 3000 ToObject

A A -

CTsec7 CTprim7 CT_WyePoint8

1 1 -

1 3000 ToObject

A A -

CTsec8 CTprim8 CT_WyePoint9

1 1 -

1 3000 ToObject

A A -

CTsec9 CTprim9 VTsec10 VTprim10 VTsec11 VTprim11 VTsec12 VTprim12

1 1 0.001 0.05 0.001 0.05 0.001 0.05

1 3000 110.000 400.00 110.000 400.00 110.000 400.00

A A V kV V kV V kV

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Analog inputs

Chapter 3 Basic IED functions

Table 14:
Parameter

Basic general settings for the ANALOGIN6I6U (TD40-) function


Range FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 FromObject ToObject 1 - 10 1 - 99999 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 Step Default ToObject Unit Description ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current ToObject= towards protected object, FromObject= the opposite Rated CT secondary current Rated CT primary current Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage

CT_WyePoint1

CTsec1 CTprim1 CT_WyePoint2

1 1 -

1 3000 ToObject

A A -

CTsec2 CTprim2 CT_WyePoint3

1 1 -

1 3000 ToObject

A A -

CTsec3 CTprim3 CT_WyePoint4

1 1 -

1 3000 ToObject

A A -

CTsec4 CTprim4 CT_WyePoint5

1 1 -

1 3000 ToObject

A A -

CTsec5 CTprim5 CT_WyePoint6

1 1 -

1 3000 ToObject

A A -

CTsec6 CTprim6 VTsec7 VTprim7 VTsec8 VTprim8 VTsec9

1 1 0.001 0.05 0.001 0.05 0.001

1 3000 110.000 400.00 110.000 400.00 110.000

A A V kV V kV V

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Analog inputs

Chapter 3 Basic IED functions

Parameter VTprim9 VTsec10 VTprim10 VTsec11 VTprim11 VTsec12 VTprim12

Range 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00 0.001 - 999.999 0.05 - 2000.00

Step 0.05 0.001 0.05 0.001 0.05 0.001 0.05

Default 400.00 110.000 400.00 110.000 400.00 110.000 400.00

Unit kV V kV V kV V kV

Description Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage Rated VT secondary voltage Rated VT primary voltage

39

Authorization

Chapter 3 Basic IED functions

Authorization
To safeguard the interests of our customers, both the IED 670 and the tools that are accessing the IED 670 are protected, subject of authorization handling. The concept of authorization, as it is implemented in the IED 670 and the associated tools is based on the following facts: There are two types of points of access to the IED 670: - local, through the local HMI - remote, through the communication ports There are different levels (or types) of users that can access or operate different areas of the IED and tools functionality; the pre-defined user types are defined as follows:

User type Guest SuperUser SPAGuest SystemOperator ProtectionEngineer DesignEngineer UserAdministrator

Access rights Read only Full access Read only + control Control from LHMI, no bypass All settings Application configuration (including SMT, GDE and CMT) User and password administration for the IED

The IED users can be created, deleted and edited only with the User Management Tool (UMT) within PCM 600. The user can only LogOn or LogOff on the LHMI of the IED, there are no users, groups or functions that can be defined on the IED LHMI.

2.1

Authorization handling in the tool


Upon the creation of an IED in the Plant Structure, the User Management Tool is immediately accessible, by right clicking with the mouse on that specific IED name:

40

Authorization

Chapter 3 Basic IED functions

Figure 20:

Right-clicking to get the User Management Tool IED Users.

By left-clicking on the IED Users submenu, the tool will open in the right-side panel:

41

Authorization

Chapter 3 Basic IED functions

Figure 21:

User Manager Tool opened in the right-side panel.

By default, the IEDs are delivered so that users are not required to log on to operate the IED. The default user is the SuperUser. Before doing any changes to the User Management in the IED it is recommendable that the administrator uploads the Users and Groups existent in the IED. If situation requires so, one can restore the factory settings, overwriting all existing settings in the User Management Tool database.

Note!
Even if the administrator empties the tool database, the users previously defined are still in the IED. They cannot be erased by downloading the empty list into the IED (the tool wont download an empty list), so it is strongly recommended that before you create any user you create one that belongs to the SuperUser group. If the administrator marks the check box User must logon to this IED, then the fields under the User Management tab are becoming accessible and one can add, delete and edit users. To add a new user, the administrator will press the button that is marked with a black arrow, see figure 22 on the User subtab:

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Authorization

Chapter 3 Basic IED functions

Figure 22:

User subtab and creation of a new user.

Upon pressing this button, a window will appear, enabling the administrator to enter details about the user, assign an access password and (after pressing Next and advancing to the next window) assign the user to a group:

Figure 23:

Enter details about the user.

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Authorization

Chapter 3 Basic IED functions

Figure 24:

Assign the user to a group.

Once the new user is created, it will appear in the list of users. Once in the list, there are several operations that can be performed on the users, shown in figure 25

No. 1 2 3

Description Delete selected user Change password Add another group to the user permissions

Figure 25:

Operations on users in the users list.

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Authorization

Chapter 3 Basic IED functions

The Group subtab is displaying all the pre-defined groups and gives short details of the permissions allowed to the members of a particular group:

Figure 26:

The Groups subtab.

It also allows the administrator to add another (already created) user to a group, in the same way it could assign one more group to an user, on the Users subtab. The Functions subtab is a descriptional area, showing in detail what Read/Write permissions has each user group, in respect to various tools and components. Finally, after the desired users are created and permissions assigned to them by means of user groups, the whole list must be downloaded in the IED, in the same way as from the other tools:

45

Authorization

Chapter 3 Basic IED functions

No. 1 2

Description Upload from IED Download to IED

2.2

Authorization handling in the IED


At delivery the default user is the superuser. No LogOn is required to operate the IED until a user has been created with the UMT(User Management Tool). See Application manual for more details. Once a user is created and downloaded into the IED, that user can perform a LogOn, introducing the password assigned in the tool. If there is no user created, an attempt to log on will cause the display to show a message box saying: No user defined! If one user leaves the IED without logging off, then after the timeout (set in Settings\General Settings\HMI\Screen\ Display Timeout ) elapses, the IED will return to a Guest state, when only reading is possible. The display time out is set to 60 minutes at delivery. If there are one or more users created with the UMT and downloaded into the IED, then, when a user intentionally attempts a LogOn or when the user attempts to perform an operation that is password protected, the LogOn window will appear The cursor is focused on the User identity field, so upon pressing the E key, one can change the user name, by browsing the list of users, with the up and down arrows. After choosing the right user name, the user must press the E key again. When it comes to password, upon pressing the E key, the following character will show up: $. The user must scroll for every letter in the pasword. After all the letters are introduced (passwords are case sensitive!) choose OK and press E key again. If everything is O.K. at a voluntary LogOn the LHMI returns to the Authorization screen. If the LogOn is OK, when required to change for example a password protected setting, the LHMI returns to the actual setting folder. If the LogOn has failed, then the LogOn window will pop-up again, until either the user makes it right or presses Cancel.

46

Self supervision with internal event list

Chapter 3 Basic IED functions

3
3.1

Self supervision with internal event list


Introduction
The self-supervision function listens and reacts to internal system events, generated by the different built-in self-supervision elements. The internal events are saved in an internal event list.

3.2

Principle of operation
The self-supervision operates continuously and includes: Normal micro-processor watchdog function. Checking of digitized measuring signals. Other alarms, for example hardware and time synchronization.

The self-supervision status can be monitored from the local HMI or a SMS/SCS system. Under the Diagnostics menu in the local HMI the present information from the self-supervision function can be reviewed. The information can be found under Diagnostics\Internal Events or Diagnostics\IED Status\General. Refer to the Installation and Commissioning manual for a detailed list of supervision signals that can be generated and displayed in the local HMI. A self-supervision summary can be obtained by means of the potential free alarm contact (INTERNAL FAIL) located on the power supply module. The function of this output relay is an OR-function between the INT-FAIL signal see figure 28 and a couple of more severe faults that can occur in the IED, see figure 27

Power supply fault

Power supply module

Fault

Watchdog TX overflow Master resp. Supply fault ReBoot I/O

I/O nodes

Fault
AND INTERNAL FAIL

Internal Fail (CPU)

CEM

Fault

I/O nodes = BIM, BOM, IOM xxxx = Inverted signal


en04000520_ansi.vsd

Figure 27:

Hardware self-supervision, potential-free alarm contact.

47

Self supervision with internal event list

Chapter 3 Basic IED functions

Figure 28:

Software self-supervision, IES (IntErrorSign) function block.

Some signals are available from the IES (IntErrorSign) function block. The signals from this function block are sent as events to the station level of the control system. The signals from the IES function block can also be connected to binary outputs for signalization via output relays or they can be used as conditions for other functions if required/desired. Individual error signals from I/O modules can be obtained from respective module in the Signal Matrix Tool. Error signals from time synchronization can be obtained from the time synchronization block TIME. 3.2.1 Internal signals Self supervision provides several status signals, that tells about the condition of the IED. As they provide information about the internal life of the IED, they are also called internal signals. The internal signals can be divided into two groups. One group handles signals that are always present in the IED; standard signals. Another group handles signals that are collected depending on the hardware configuration. The standard signals are listed in table 15. The hardware dependent internal signals are listed in table 16. Explanations of internal signals are listed in table 17.

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Self supervision with internal event list

Chapter 3 Basic IED functions

Table 15:

Self-supervision's standard internal signals


Description Internal Fail status Internal Warning status CPU module Fail status CPU module Warning status Real Time Clock status Time Synchronization status Runtime Execution Error status IEC 61850 Error status SW Watchdog Error status LON/Mip Device Error status Runtime Application Error status Settings changed Setting groups changed Fault Tolerant Filesystem status

Name of signal FAIL WARNING NUMFAIL NUMWARNING RTCERROR TIMESYNCHERROR RTEERROR IEC61850ERROR WATCHDOG LMDERROR APPERROR SETCHGD SETGRPCHGD FTFERROR

Table 16:
Card ADxx BIM BOM IOM MIM LDCM

Self-supervision's HW dependent internal signals


Name of signal ADxx BIM-Error BOM-Error IOM-Error MIM-Error LDCM-Error Description Analog In Module Error status Binary In Module Error status Binary Out Module Error status In/Out Module Error status Millampere Input Module Error status Line Differential Communication Error status

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Self supervision with internal event list

Chapter 3 Basic IED functions

Table 17:

Explanations of internal signals


Reasons for activation This signal will be active if one or more of the following internal signals are active; INT--NUMFAIL, INT--LMDERROR, INT--WATCHDOG, INT--APPERROR, INT--RTEERROR, INT--FTFERROR, or any of the HW dependent signals This signal will be active if one or more of the following internal signals are active; INT--RTCERROR, INT--IEC61850ERROR, INT--TIMESYNCHERROR This signal will be active if one or more of the following internal signals are active; INT--WATCHDOG, INT--APPERROR, INT--RTEERROR, INT--FTFERROR This signal will be active if one or more of the following internal signals are active; INT--RTCERROR, INT--IEC61850ERROR This signal will be active when there is a hardware error with the real time clock. This signal will be active when the source of the time synchronization is lost, or when the time system has to make a time reset. This signal will be active if the Runtime Engine failed to do some actions with the application threads. The actions can be loading of settings or parameters for components, changing of setting groups, loading or unloading of application threads. This signal will be active if the IEC61850 stack did not succeed in some actions like reading IEC61850 configuration, startup etc. This signal will be activated when the terminal has been under too heavy load for at least 5 minutes. The operating systems background task is used for the measurements. LON network interface, MIP/DPS, is in an unrecoverable error state. This signal will be active if one or more of the application threads are not in the state that Runtime Engine expects. The states can be CREATED, INITIALIZED, RUNNING, etc. This signal will generate an Internal Event to the Internal Event list if any settings are changed. This signal will generate an Internal Event to the Internal Event list if any setting groups are changed. This signal will be active if both the working file and the backup file are corrupted and can not be recovered.

Name of signal FAIL

WARNING

NUMFAIL

NUMWARNING RTCERROR TIMESYNCHERROR RTEERROR

IEC61850ERROR WATCHDOG

LMDERROR APPERROR

SETCHGD SETGRPCHGD FTFERROR

3.2.2

Run-time model The analog signals to the A/D converter is internally distributed into two different converters, one with low amplification and one with high amplification, see figure 29.

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Chapter 3 Basic IED functions

Figure 29:

Simplified drawing of A/D converter for the IED670.

The technique to split the analog input signal into two A/D converters with different amplification makes it possible to supervise the incoming signals under normal conditions where the signals from the two converters should be identical. An alarm is given if the signals are out of the boundaries. Another benefit is that it improves the dynamic performance of the A/D conversion. The self-supervision of the A/D conversion is controlled by the ADx_Controller function. One of the tasks for the controller is to perform a validation of the input signals. This is done in a validation filter which has mainly two objects: First is the validation part, i.e. checks that the A/D conversion seems to work as expected. Secondly, the filter chooses which of the two signals that shall be sent to the CPU, i.e. the signal that has the most suitable level, the ADx_LO or the 16 times higherADx_HI. When the signal is within measurable limits on both channels, a direct comparison of the two channels can be performed. If the validation fails, the CPU will be informed and an alarm will be given. The ADx_Controller also supervise other parts of the A/D converter.

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Chapter 3 Basic IED functions

3.3

Function block
IS--In tern alSig n al F AIL W AR N IN G C PU F AIL C PU W AR N TSYN C ER R R TC ER R en04000392.vsd

Figure 30:

IS function block

3.4

Output signals
Table 18:
Signal FAIL WARNING CPUFAIL CPUWARN TSYNCERR RTCERR

Output signals for the InternalSignal (IS---) function block


Description Internal fail Internal warning CPU fail CPU warning Time synchronization status Real time clock status

3.5

Setting parameters
The function does not have any parameters available in Local HMI or Protection and Control IED Manager (PCM 600)

3.6

Technical data
Table 19:
Data Recording manner List size

Self supervision with internal event list


Value Continuous, event controlled 1000 events, first in-first out

52

Time synchronization

Chapter 3 Basic IED functions

4
4.1

Time synchronization
Introduction
Use the time synchronization source selector to select a common source of absolute time for the IED when it is a part of a protection system. This makes comparison of events and disturbance data between all IEDs in a SA system possible.

4.2
4.2.1

Principle of operation
General concepts Time definitions The error of a clock is the difference between the actual time of the clock, and the time the clock is intended to have. The rate accuracy of a clock is normally called the clock accuracy and means how much the error increases, i.e. how much the clock gains or loses time. A disciplined clock is a clock that knows its own faults and tries to compensate for them, i.e. a trained clock. Synchronization principle From a general point of view synchronization can be seen as a hierarchical structure. A module is synchronized from a higher level and provides synchronization to lower levels.

Syncronization from a higher level

Module

Optional syncronization of modules at a lower level

en05000206.vsd

Figure 31:

Synchronization principle

A module is said to be synchronized when it periodically receives synchronization messages from a higher level. As the level decreases, the accuracy of the synchronization decreases as well. A module can have several potential sources of synchronization, with different maximum errors, which gives the module the possibility to choose the source with the best quality, and to adjust its internal clock after this source. The maximum error of a clock can be defined as a function of: The maximum error of the last used synchronization message

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4.2.2

The time since the last used synchronization message The rate accuracy of the internal clock in the module.

Real Time Clock (RTC) operation The IED has a built-in Real Time Clock (RTC) with a resolution of one nanosecond. The clock has a built-in calendar that handles leap years through 2098. RTC at power off During power off, the time in the IED time is kept by a capacitor backed RTC that will provide 35 ppm accuracy for 5 days. This means that if the power is off, the time in the IED may drift with 3 seconds per day, during 5 days, and after this time the time will be lost completely. RTC at startup At IED startup, the internal time is free running. If the RTC is still alive since the last up time, the time in the IED will be quite accurate (may drift 35 ppm), but if the RTC power has been lost during power off (will happen after 5 days), the IED time will start at 01-01-1970. For more information, please refer to section "Time synchronization startup procedure" and section "Example, binary synchronization". Time synchronization startup procedure The first message that contains full time (as for instance LON, SNTP, GPS etc.) will give an accurate time to the IED. The IED is brought into a safe state and the time is thereafter set to the correct value. After the initial setting of the clock, one of three things will happen with each of the coming synchronization messages, configured as fine: If the synchronization message, that is similar to the other messages from its origin has an offset compared to the internal time in the IED, the message is used directly for synchronization, that is for adjusting the internal clock to obtain zero offset at the next coming time message. If the synchronization message has an offset that is large compared to the other messages, a spike-filter in the IED will remove this time-message. If the synchronization message has an offset that is large, and the following message also has a large offset, the spike filter will not act and the offset in the synchronization message will be compared to a threshold that defaults to 100 milliseconds. If the offset is more than the threshold, the IED is brought into a safe state and the clock is thereafter set to the correct time. If the offset is lower than the threshold, the clock will be adjusted with 1000 ppm until the offset is removed. With an adjustment of 1000 ppm, it will take 100 seconds or 1.7 minutes to remove an offset of 100 milliseconds.

Synchronization messages configured as coarse will only be used for initial setting of the time. After this has been done, the messages are checked against the internal time and only an offset of more than 10 seconds will reset the time. Rate accuracy In the REx670 IED, the rate accuracy at cold start is about 100 ppm, but if the IED is synchronized for a while, the rate accuracy will be approximately 1 ppm if the surrounding temperature is constant. Normally it will take 20 minutes to reach full accuracy.

54

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Time-out on synchronization sources All synchronization interfaces has a time-out, and a configured interface must receive time-messages regularly, in order not to give a TSYNCERR. Normally, the time-out is set so that one message can be lost without getting a TSYNCERR, but if more than one message is lost, a TSYNCERR will be given. 4.2.3 Synchronization alternatives Three main alternatives of external time synchronization are available. Either the synchronization message is applied via any of the communication ports of the IED as a telegram message including date and time or as a minute pulse, connected to a binary input, or via GPS. The minute pulse is used to fine tune already existing time in the IEDs. Synchronization via SNTP SNTP provides a Ping-Pong method of synchronization. A message is sent from an IED to an SNTP-server, and the SNTP-server returns the message after filling in a reception time and a transmission time. SNTP operates via the normal Ethernet network that connects IEDs together in an IEC61850 network. For SNTP to operate properly, there must be a SNTP-server present, preferably in the same station. The SNTP synchronization provides an accuracy that will give 1 ms accuracy for binary inputs. The IED itself can be set as a SNTP-time server. Synchronization via Serial Communication Module (SLM) On the serial buses (both LON and SPA) two types of synchronization messages are sent. Coarse message is sent every minute and comprises complete date and time, i.e. year, month, day, hours, minutes, seconds and milliseconds. Fine message is sent every second and comprises only seconds and milliseconds.

The SLM module is located on the AD conversion Module (ADM). Synchronization via Built-in-GPS The built in GPS clock modules receives and decodes time information from the global positioning system. The modules are located on the GPS time synchronization Module (GSM). Synchronization via binary input The IED accepts minute pulses to a binary input. These minute pulses can be generated from e.g. station master clock. If the station master clock is not synchronized from a world wide source, time will be a relative time valid for the substation. Both positive and negative edge on the signal can be accepted. This signal is also considered as a fine signal. The minute pulse is connected to any channel on any Binary Input Module in the IED. The electrical characteristic is thereby the same as for any other binary input. If the objective of synchronization is to achieve a relative time within the substation and if no station master clock with minute pulse output is available, a simple minute pulse generator can be designed and used for synchronization of the IEDs. The minute pulse generator can be created using the logical elements and timers available in the IED. The definition of a minute pulse is that it occurs one minute after the last pulse. As only the flanks are detected, the flank of the minute pulse shall occur one minute after the last flank. Binary minute pulses are checked with reference to frequency.

55

Time synchronization

Chapter 3 Basic IED functions

Pulse data: Period time (a) should be 60 seconds. Pulse length (b): - Minimum pulse length should be >50 ms. - Maximum pulse length is optional. Magnitude (c) - please refer to section 2.9 "Binary input module (BIM)".

Deviations in the period time larger than 50 ms will cause TSYNCERR.

a b

c
en05000251.vsd

Figure 32:

Binary minute pulses

The default time-out-time for a minute pulse is two minutes, and if no valid minute pulse is received within two minutes a SYNCERR will be given. If contact bounces occurs, only the first pulse will be detected as a minute pulse. The next minute pulse will be registered first 60 s - 50 ms after the last contact bounce. If the minute pulses are perfect, e.g. it is exactly 60 seconds between the pulses, contact bounces might occur 49 ms after the actual minute pulse without effecting the system. If contact bounces occurs more than 50 ms, e.g. it is less than 59950 ms between the two most adjacent positive (or negative) flanks, the minute pulse will not be accepted. Example, binary synchronization A IED is configured to use only binary input, and a valid binary input is applied to a binary input card. The HMI is used to tell the IED the approximate time and the minute pulse is used to synchronize the IED thereafter. The definition of a minute pulse is that it occurs one minute after the previous minute pulse, so the first minute pulse is not used at all. The second minute pulse will probably be rejected due to the spike filter. The third pulse will give the IED a good time and will reset the time so that the fourth minute pulse will occur on a minute border. After the first three minutes, the time in the IED will be good if the coarse time is set properly via the HMI or the RTC backup still keeps the time since last up-time. If the minute pulse is removed for instance for an hour, the internal time will drift by maximum the error rate in the internal clock. If the minute pulse is returned, the first pulse automatically is rejected. The second pulse will possibly be rejected due to the spike filter. The third pulse will either synchronize the time, if the

56

Time synchronization

Chapter 3 Basic IED functions

time offset is more than 100 ms, or adjust the time, if the time offset is small enough. If the time is set, the application will be brought to a safe state before the time is set. If the time is adjusted, the time will reach its destination within 1.7 minutes. Synchronization via IRIG Synchronization with DNP3.0 The DNP3.0 communication can be ? to be the source of the Course time synchronisation. The fine synch source must be another when high accuracy time working is required. The IRIG interface to the IED supplies two possible synchronization methods, IRIG-B and PPS. IRIG-B IRIG-B is a protocol used only for time synchronization. A clock can provide local time of the year in this format. The B in IRIG-B states that 100 bits per second are transmitted, and the message is sent every second. After IRIG-B there is a number of figures stating if and how the signal is modulated and the information transmitted. To receive IRIG-B there are two connectors in the IRIG module, one galvanic BNC connector and one optical ST connector. IRIG-B 12x messages can be supplied via the galvanic interface, and IRIG-B 00x messages can be supplied via either the galvanic interface or the optical interface, where x (in 00x or 12x) means a figure in the range 1-7. 00 means that a base band is used, and the information can be fed into the IRIG-B module via the BNC contact or an optical fiber. 12 means that a 1 kHz modulation is used. In this case the information must go into the module via the BNC connector. If the x in 00x or 12x is 4, 5, 6 or 7, the time message from IRIG-B contains information of the year. If x is 0, 1, 2 or 3, the information only contains the time within the year, and year information has to come from the tool or HMI. The IRIG Module also takes care of IEEE1344 messages that are sent by many IRIG-B clocks, as IRIG-B previously did not have any year information. IEE1344 is compatible with IRIG-B and contains year information and information of time-zone. It is recommended to use IEEE 1344 for supplying time information to the IRIG module. In this case, also send the local time in the messages, as this local time plus the TZ Offset supplied in the message equals UTC at all times. PPS An optical PPS signal can be supplied to the optical interface of the IRIG module. The PPS signal is a transition from dark to light, that occurs 1 second +- 2 us after another PPS signal. The allowed jitter of 2 us is settable.

57

Time synchronization

Chapter 3 Basic IED functions

4.3

Function block
TIMETIME TSYNCERR RTCERR en05000425.vsd

Figure 33:

TIME function block

4.4

Output signals
Table 20:
Signal TSYNCERR RTCERR

Output signals for the TIME (TIME-) function block


Description Time synchronization error Real time clock error

4.5

Setting parameters
Path in local HMI: Setting/Time Path in PCM 600: Settings/Time/Synchronization
Table 21:
Parameter CoarseSyncSrc

Basic general settings for the TimeSynch (TSYN-) function


Range Disabled SPA LON SNTP DNP Disabled SPA LON BIN GPS GPS+SPA GPS+LON GPS+BIN SNTP GPS+SNTP IRIG-B GPS+IRIG-B PPS Disabled SNTP-Server Step Default Off Unit Description Coarse time synchronization source

FineSyncSource

Off

Fine time synchronization source

SyncMaster

Off

Activate IEDas synchronization master

58

Time synchronization

Chapter 3 Basic IED functions

Table 22:
Parameter

General settings for the TimeSynchBIN (TBIN-) function


Range 3 - 16 Step 1 Default 3 Unit Description Hardware position of IO module for time synchronization Binary input number for time synchronization Positive or negative edge detection

ModulePosition

BinaryInput BinDetection

1 - 16 PositiveEdge NegativeEdge

1 -

1 PositiveEdge

Table 23:
Parameter ServerIP-Add

General settings for the TimeSynchSNTP (TSNT-) function


Range 0 - 18 0 - 18 Step 1 1 Default 0.0.0.0 0.0.0.0 Unit Description Server IP-address Redundant server IP-address

RedServIP-Add

Table 24:
Parameter MonthInYear

General settings for the DaySumDSTBegin (TSTB-) function


Range January February March April May June July August September October November December Sunday Monday Tuesday Wednesday Thursday Friday Saturday Last First Second Third Fourth 0 - 86400 Step Default March Unit Description Month in year when daylight time starts

DayInWeek

Sunday

Day in week when daylight time starts

WeekInMonth

Last

Week in month when daylight time starts

UTCTimeOfDay

3600

UTC Time of day in seconds when daylight time starts

59

Time synchronization

Chapter 3 Basic IED functions

Table 25:
Parameter MonthInYear

General settings for the DaySumTimeEnd (TSTE-) function


Range January February March April May June July August September October November December Sunday Monday Tuesday Wednesday Thursday Friday Saturday Last First Second Third Fourth 0 - 86400 Step Default October Unit Description Month in year when daylight time ends

DayInWeek

Sunday

Day in week when daylight time ends

WeekInMonth

Last

Week in month when daylight time ends

UTCTimeOfDay

3600

UTC Time of day in seconds when daylight time ends

Table 26:
Parameter

General settings for the TimeZone (TZON-) function


Range -24 - 24 Step 1 Default 0 Unit Description Number of half-hours from UTC

NoHalfHourUTC

60

Time synchronization

Chapter 3 Basic IED functions

Table 27:
Parameter SynchType TimeDomain Encoding

Basic general settings for the TimeSynchIRIGB (TIRI-) function


Range BNC Opto LocalTime UTC IRIG-B 1344 1344TZ MinusTZ PlusTZ Step Default Opto LocalTime IRIG-B Unit Description Type of synchronization Time domain Type of encoding

TimeZoneAs1344

PlusTZ

Time zone as in 1344 standard

4.6

Technical data
Table 28:
Function Time tagging resolution, Events and Sampled Measurement Values Time tagging error with synchronization once/min (minute pulse synchronization), Events and Sampled Measurement Values Time tagging error with SNTP synchronization, Sampled Measurement Values

Time synchronization, time tagging


Value 1 ms 1.0 ms typically

1.0 ms typically

61

Parameter setting groups

Chapter 3 Basic IED functions

5
5.1

Parameter setting groups


Introduction
Use the six sets of settings to optimize IED operation for different system conditions. By creating and switching between fine tuned setting sets, either from the human-machine interface or configurable binary inputs, results in a highly adaptable IED that can cope with a variety of system scenarios.

5.2

Principle of operation
The ACGR function block has six functional inputs, each corresponding to one of the setting groups stored in the IED. Activation of any of these inputs changes the active setting group. Seven functional output signals are available for configuration purposes, so that up to date information on the active setting group is always available. A setting group is selected by using the local HMI, from a front connected personal computer, remotely from the station control or station monitoring system or by activating the corresponding input to the ACGR function block. Each input of the function block can be configured to connect to any of the binary inputs in the IED. To do this the PCM 600 configuration tool must be used. The external control signals are used for activating a suitable setting group when adaptive functionality is necessary. Input signals that should activate setting groups must be either permanent or a pulse exceeding 400 ms. More than one input may be activated at the same time. In such cases the lower order setting group has priority. This means that if for example both group four and group two are set to activate, group two will be the one activated. Every time the active group is changed, the output signal GRP_CHGD is sending a pulse. The parameter MAXSETGR defines the maximum number of setting groups in use to switch between.

62

Parameter setting groups

Chapter 3 Basic IED functions

ACTIVATE GROUP 6 ACTIVATE GROUP 5 ACTIVATE GROUP 4 ACTIVATE GROUP 3 ACTIVATE GROUP 2 +RL2 ACTIVATE GROUP 1 ACGRIOx-Bly1 IOx-Bly2 IOx-Bly3 IOx-Bly4 IOx-Bly5 IOx-Bly6 ActiveGroup ACTGRP1 GRP1 ACTGRP2 ACTGRP3 ACTGRP4 ACTGRP5 ACTGRP6 GRP2 GRP3 GRP4 GRP5 GRP6 GRP_CHGD

en05000119_ansi.vsd

Figure 34:

Connection of the function to external circuits

The above example also includes seven output signals, for confirmation of which group that is active. The SGC function block has an input where the number of setting groups used is defined. Switching can only be done within that number of groups. The number of setting groups selected to be used will be filtered so only the setting groups used will be shown on the PST setting tool.

5.3

Function block
ACGRActiveGroup ACTGRP1 GRP1 ACTGRP2 GRP2 ACTGRP3 GRP3 ACTGRP4 GRP4 ACTGRP5 GRP5 ACTGRP6 GRP6 GRP_CHGD en05000433_ansi.vsd

Figure 35:

ACGR function block

63

Parameter setting groups

Chapter 3 Basic IED functions

SGC-NoOfSetGrp MAXSETGR en05000716.vsd

5.4

Input and output signals


Table 29:
Signal ACTGRP1 ACTGRP2 ACTGRP3 ACTGRP4 ACTGRP5 ACTGRP6

Input signals for the ActiveGroup (ACGR-) function block


Description Selects setting group 1 as active Selects setting group 2 as active Selects setting group 3 as active Selects setting group 4 as active Selects setting group 5 as active Selects setting group 6 as active

Table 30:
Signal GRP1 GRP2 GRP3 GRP4 GRP5 GRP6 GRP_CHGD

Output signals for the ActiveGroup (ACGR-) function block


Description Setting group 1 is active Setting group 2 is active Setting group 3 is active Setting group 4 is active Setting group 5 is active Setting group 6 is active Pulse when setting changed

5.5

Setting parameters
Table 31:
Parameter t

General settings for the ActiveGroup (ACGR-) function


Range 0.0 - 10.0 Step 0.1 Default 1.0 Unit s Description Pulse length of pulse when setting changed

64

Parameter setting groups

Chapter 3 Basic IED functions

Table 32:
Parameter ActiveSetGrp

General settings for the NoOfSetGrp (SGC--) function


Range SettingGroup1 SettingGroup2 SettingGroup3 SettingGroup4 SettingGroup5 SettingGroup6 1-6 Step Default SettingGroup1 Unit Description ActiveSettingGroup

NoOfSetGrp

No

Number of possible setting groups to switch between

65

Test mode functionality

Chapter 3 Basic IED functions

6
6.1

Test mode functionality


Introduction
Most of the functions in the IED can individually be blocked by means of settings from the local HMI or PST. To enable these blockings the IED must be set in test mode. When leaving the test mode, i.e. entering normal mode, these blockings are disabled and everything is set to normal operation. All testing will be done with actually set and configured values within the IED. No settings will be changed, thus mistakes are avoided.

6.2

Principle of operation
To be able to test the functions in the IED, you must set the terminal in the TEST mode. There are two ways of setting the terminal in the TEST mode: By configuration, activating the input of the function block TEST. By setting TestMode to On in the local HMI, under the menu: TEST/IED test mode.

While the IED is in test mode, the ACTIVE output of the function block TEST is activated. The other two outputs of the function block TEST are showing which is the generator of the Test mode: On state input from configuration (OUTPUT output activated) or setting from LHMI (SETTING output activated). While the IED is in test mode, the yellow PICKUP LED will flash and all functions are blocked. Any function can be de-blocked individually regarding functionality and event signalling. Most of the functions in the IED can individually be blocked by means of settings from the local HMI. To enable these blockings the IED must be set in test mode (the output ACTIVE in function block TEST is set to true), see example in figure 36. When leaving the test mode, i.e. entering normal mode, these blockings are disabled and everything is set to normal operation. All testing will be done with actually set and configured values within the IED. No settings will be changed, thus no mistakes are possible. The blocked functions will still be blocked next time entering the test mode, if the blockings were not reset. The blocking of a function concerns all output signals from the actual function, so no outputs will be activated. The TEST function block might be used to automatically block functions when a test handle is inserted in a test switch. A contact in the test switch (RTXP24 contact 29-30) or an FT switch finger can supply a binary input which in turn is configured to the TEST function block. Each of the protection functions includes the blocking from TEST function block. A typical example from the undervoltage function is shown in figure 36. The functions can also be blocked from sending events over IEC 61850 station bus to prevent filling station and SCADA databases with test events e.g. during a maintenance test.

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Chapter 3 Basic IED functions

Disconnection

Normal voltage Pickup1 Pickup2

tBlkUV1 < t1,t1Min IntBlkStVal1 IntBlkStVal2 Time Block step 1 Block step 2
en05000466_ansi.vsd

tBlkUV2 < t2,t2Min

Figure 36:

Example of blocking the time delayed undervoltage protection function.

6.3

Function block
TESTTest INPUT ACTIVE OUTPUT SETTING en05000443.vsd

Figure 37:

TEST function block

6.4

Input and output signals


Table 33:
Signal INPUT

Input signals for the Test (TEST-) function block


Description Sets terminal in test mode when active

67

Test mode functionality

Chapter 3 Basic IED functions

Table 34:
Signal ACTIVE OUTPUT SETTING NOEVENT

Output signals for the Test (TEST-) function block


Description IED in test mode when active Test input is active Test mode setting is (Enabled) or not (Disabled) Event disabled during testmode

6.5

Setting parameters
Table 35:
Parameter TestMode

Basic general settings for the Test (TEST-) function


Range Disabled Enabled Disabled Enabled Disabled Enabled Step Default Off Unit Description Test mode in operation (Enabled) or not (Disabled) Event disable during testmode Command bit for test required or not during testmode

EventDisable CmdTestBit

Off Off

68

IED identifiers

Chapter 3 Basic IED functions

7
7.1

IED identifiers
Introduction
There are two functions that allow you to identify each IED individually: ProductInformation function has seven pre-set, settings that are unchangeable but nevertheless very important: IED Type ProductDef FirmwareVer IEDMainFunType SerialNo. Ordering No. ProductionDate.

The settings are visable on the local HMI, under: Diagnostics/IED Status/ProductIdentifiers They are very helpful in case of support process (such as repair or maintenance). TerminalID function is allowing you to identify the individual IED in your system, not only in the substation, but in a whole region or a country.

7.2

Setting parameters
Table 36:
Parameter StationName StationNumber ObjectName ObjectNumber UnitName UnitNumber

General settings for the TerminalID (TEID-) function


Range 0 - 18 0 - 99999 0 - 18 0 - 99999 0 - 18 0 - 99999 Step 1 1 1 1 1 1 Default Station name 0 Object name 0 Unit name 0 Unit Description Station name Station number Object name Object number Unit name Unit number

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Signal matrix for binary inputs (SMBI)

Chapter 3 Basic IED functions

8
8.1

Signal matrix for binary inputs (SMBI)


Introduction
The SMBI function block is used within the CAP tool in direct relation with the Signal Matrix Tool SMT (please see the overview of the engineering process in the Application manual, chapter Engineering of the IED). It represents the way binary inputs are brought in for one IED 670 configuration.

8.2

Principle of operation
The SMBI function block, see figure 38, receives its inputs from the real (hardware) binary inputs via the SMT, and makes them available to the rest of the configuration via its outputs, named BI1 to BI10. The inputs, as well as the whole block, can be tag-named. These tags will be represented in SMT as information which signals shall be connected between physical IO and the SMBI function block.

8.3

Function block
SI01SMBI INSTNAME BI1NAME BI2NAME BI3NAME BI4NAME BI5NAME BI6NAME BI7NAME BI8NAME BI9NAME BI10NAME BI1 BI2 BI3 BI4 BI5 BI6 BI7 BI8 BI9 BI10

en05000434.vsd

Figure 38:

SI function block

8.4

Input and output signals


Table 37:
Signal BI1 BI2 BI3 BI4 BI5

Output signals for the SMBI (SI01-) function block


Description Binary input 1 Binary input 2 Binary input 3 Binary input 4 Binary input 5

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Signal matrix for binary inputs (SMBI)

Chapter 3 Basic IED functions

Signal BI6 BI7 BI8 BI9 BI10

Description Binary input 6 Binary input 7 Binary input 8 Binary input 9 Binary input 10

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Signal matrix for binary outputs (SMBO)

Chapter 3 Basic IED functions

9
9.1

Signal matrix for binary outputs (SMBO)


Introduction
The SMBO function block is used within the CAP tool in direct relation with the Signal Matrix Tool SMT (please see the overview of the engineering process in the Application manual, chapter Engineering of the IED). It represents the way binary outputs are sent from one IED 670 configuration.

9.2

Principle of operation
The SMBO function block, see figure 39, receives logical signal from the IED configuration, which is transferring to the real (hardware) outputs, via the SMT. The inputs in the SMBO are named BO1 to BO10 and they, as well as the whole function block, can be tag-named. The name tags will appear in SMT as information which signals shall be connected between physical IO and the SMBO.

9.3

Function block
SO01SMBO BO1 BO2 BO3 BO4 BO5 BO6 BO7 BO8 BO9 BO10 INSTNAME BO1NAME BO2NAME BO3NAME BO4NAME BO5NAME BO6NAME BO7NAME BO8NAME BO9NAME BO10NAME en05000439.vsd

Figure 39:

SO function block

9.4

Input and output signals


Table 38:
Signal BO1 BO2 BO3 BO4 BO5

Input signals for the SMBO (SO01-) function block


Description Signal name for BO1 in Signal Matrix Tool Signal name for BO2 in Signal Matrix Tool Signal name for BO3 in Signal Matrix Tool Signal name for BO4 in Signal Matrix Tool Signal name for BO5 in Signal Matrix Tool

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Signal matrix for binary outputs (SMBO)

Chapter 3 Basic IED functions

Signal BO6 BO7 BO8 BO9 BO10

Description Signal name for BO6 in Signal Matrix Tool Signal name for BO7 in Signal Matrix Tool Signal name for BO8 in Signal Matrix Tool Signal name for BO9 in Signal Matrix Tool Signal name for BO10 in Signal Matrix Tool

73

Signal matrix for mA inputs (SMMI)

Chapter 3 Basic IED functions

10
10.1

Signal matrix for mA inputs (SMMI)


Introduction
The SMMI function block is used within the CAP tool in direct relation with the Signal Matrix Tool SMT (please see the overview of the engineering process in the Application manual, chapter Engineering of the IED). It represents the way milliamp (mA) inputs are brought in for one IED670 configuration.

10.2

Principle of operation
The SMMI function block, see figure 40, receives its inputs from the real (hardware) mA inputs via the SMT, and makes them available to the rest of the configuration via its analog outputs, named AI1 to AI6. The inputs, as well as the whole block, can be tag-named. These tags will be represented in SMT. The outputs on the SMMI are normally connected to the MVGGIO function block for further use of the mA signals.

10.3

Function block
SMI1SMMI INSTNAME AI1NAME AI2NAME AI3NAME AI4NAME AI5NAME AI6NAME AI1 AI2 AI3 AI4 AI5 AI6

en05000440.vsd

Figure 40:

SMI function block

10.4

Input and output signals


Table 39:
Signal AI1 AI2 AI3 AI4 AI5 AI6

Output signals for the SMMI (SMI1-) function block


Description Analog milliampere input 1 Analog milliampere input 2 Analog milliampere input 3 Analog milliampere input 4 Analog milliampere input 5 Analog milliampere input 6

74

Signal matrix for analog inputs (SMAI)

Chapter 3 Basic IED functions

11
11.1

Signal matrix for analog inputs (SMAI)


Introduction
The SMAI function block (or the pre-processing function block, as it is also known) is used within the PCM 600 in direct relation with the Signal Matrix Tool SMT (please see the overview of the engineering process in the Application manual, chapter Engineering of the IED). It represents the way analog inputs are brought in for one IED 670 configuration.

11.2

Principle of operation
Every SMAI function block can receive four analog signals (three phases and one neutral value), either voltage or current, see figure 41 and figure 42. The outputs of the SMAI are giving information about every aspect of the 3ph analog signals acquired (phase angle, RMS value, frequency and frequency derivates etc. 244 values in total). The BLOCK input will reset to 0 all the outputs of the function block. The output singal AI1 to AI4 are direct output of the in SMT connected input to AI1 to AI4. AIN is always the neutral current, calculated residual sum or the signal connected to AI4. Note that function block will always calculate the residual sum of current/voltage if the input is not connected in SMT. Applications with a few exceptions (HEDIF, BBDIF) shall always be connected to AI3P.

11.3

Function block
PR01SMAI BLOCK DFTSPFC GRPNAME AI1NAME AI2NAME AI3NAME AI4NAME TYPE SYNCOUT SPFCOUT AI3P AI1 AI2 AI3 AI4 AIN NOSMPLCY en05000705.vsd

Figure 41:

PR01 function block

PR02SMAI BLOCK GRPNAME AI1NAME AI2NAME AI3NAME AI4NAME TYPE AI3P AI1 AI2 AI3 AI4 AIN en07000130.vsd

Figure 42:

PR0212 function block

75

Signal matrix for analog inputs (SMAI)

Chapter 3 Basic IED functions

11.4

Input and output signals


Table 40:
Signal BLOCK DFTSYNC DFTSPFC

Input signals for the SMAI (PR01-) function block


Description Block group 1 Synchronisation of DFT calculation Number of samples per fundamental cycle used for DFT calculation

Table 41:
Signal SYNCOUT SPFCOUT AI3P AI1 AI2 AI3 AI4 AIN

Output signals for the SMAI (PR01-) function block


Description Synchronisation signal from internal DFT reference function Number of samples per fundamental cycle from internal DFT reference function Group 1 analog input 3-phase group Group 1 analog input 1 Group 1 analog input 2 Group 1 analog input 3 Group 1 analog input 4 Group 1 analog input residual for disturbance recorder

Table 42:
Signal BLOCK

Input signals for the SMAI (PR02-) function block


Description Block group 2

Table 43:
Signal AI3P AI1 AI2 AI3 AI4 AIN

Output signals for the SMAI (PR02-) function block


Description Group 2 analog input 3-phase group Group 2 analog input 1 Group 2 analog input 2 Group 2 analog input 3 Group 2 analog input 4 Group 2 analog input residual for disturbance recorder

76

Signal matrix for analog inputs (SMAI)

Chapter 3 Basic IED functions

11.5

Setting parameters Note!


Settings DFTRefExtOut and DFTReference shall be set to default value InternalDFTRef if no VT inputs are available. Internal nominal frequency DFT reference is then the reference.
Table 44:
Parameter DFTRefExtOut

Basic general settings for the SMAI (PR01-) function


Range InternalDFTRef AdDFTRefCh1 AdDFTRefCh2 AdDFTRefCh3 AdDFTRefCh4 AdDFTRefCh5 AdDFTRefCh6 AdDFTRefCh7 AdDFTRefCh8 AdDFTRefCh9 AdDFTRefCh10 AdDFTRefCh11 AdDFTRefCh12 External DFT ref InternalDFTRef AdDFTRefCh1 AdDFTRefCh2 AdDFTRefCh3 AdDFTRefCh4 AdDFTRefCh5 AdDFTRefCh6 AdDFTRefCh7 AdDFTRefCh8 AdDFTRefCh9 AdDFTRefCh10 AdDFTRefCh11 AdDFTRefCh12 External DFT ref Ph-N Ph-Ph 1-2 Step Default InternalDFTRef Unit Description DFT reference for external output

DFTReference

InternalDFTRef

DFT reference

ConnectionType TYPE

Ph-N 1

Ch

Input connection type 1=Voltage,2=Current

77

Signal matrix for analog inputs (SMAI)

Chapter 3 Basic IED functions

Table 45:
Parameter Negation

Advanced general settings for the SMAI (PR01-) function


Range Disabled NegateN Negate3Ph Negate3Ph+N 5 - 200 0.05 - 2000.00 Step Default Disabled Unit Description Negation

MinValFreqMeas VBase

1 0.05

10 400.00

% kV

Limit for frequency calculation in % of VBase Base Voltage

Table 46:
Parameter

Basic general settings for the SMAI (PR02-) function


Range InternalDFTRef AdDFTRefCh1 AdDFTRefCh2 AdDFTRefCh3 AdDFTRefCh4 AdDFTRefCh5 AdDFTRefCh6 AdDFTRefCh7 AdDFTRefCh8 AdDFTRefCh9 AdDFTRefCh10 AdDFTRefCh11 AdDFTRefCh12 External DFT ref Ph-N Ph-Ph 1-2 Step Default InternalDFTRef Unit Description DFT reference

DFTReference

ConnectionType TYPE

Ph-N 1

Ch

Input connection type 1=Voltage,2=Current

Table 47:
Parameter Negation

Advanced general settings for the SMAI (PR02-) function


Range Disabled NegateN Negate3Ph Negate3Ph+N 5 - 200 0.05 - 2000.00 Step Default Off Unit Description Negation

MinValFreqMeas VBase

1 0.05

10 400.00

% kV

Limit for frequency calculation in % of VBase Base Voltage

78

Summation block 3 phase (SUM3Ph)

Chapter 3 Basic IED functions

12
12.1

Summation block 3 phase (SUM3Ph)


Introduction
The SUM3Ph function block is used in order to get the sum of two sets of 3 ph analog signals (of the same type) for those IED functions that might need it.

12.2

Principle of operation
The summation block receives the 3ph signals from the SMAI blocks, see figure 43. In the same way, the BLOCK input will reset to 0 all the outputs of the function block.

12.3

Function block
SU01Sum3Ph BLOCK DFTSYNC DFTSPFC G1AI3P G2AI3P AI3P AI1 AI2 AI3 AI4 en05000441.vsd

Figure 43:

SU function block

12.4

Input and output signals


Table 48:
Signal BLOCK DFTSYNC DFTSPFC G1AI3P G2AI3P

Input signals for the Sum3Ph (SU01-) function block


Description Block Synchronisation of DFT calculation Number of samples per fundamental cycle used for DFT calculation Group 1 analog input 3-phase group Group 2 analog input 3-phase group

Table 49:
Signal AI3P AI1 AI2 AI3 AI4

Output signals for the Sum3Ph (SU01-) function block


Description Group analog input 3-phase group Group 1 analog input Group 2 analog input Group 3 analog input Group 4 analog input

79

Summation block 3 phase (SUM3Ph)

Chapter 3 Basic IED functions

12.5

Setting parameters Note!


Settings DFTRefExtOut and DFTReference shall be set to default value InternalDFTRef if no VT inputs are available.
Table 50:
Parameter SummationType

Basic general settings for the Sum3Ph (SU01-) function


Range Step Default Group1+Group2 Unit Description Summation type

Group1+Group2 Group1-Group2 Group2-Group1 -(Group1+Group2) InternalDFTRef AdDFTRefCh1 External DFT ref -

DFTReference

InternalDFTRef

DFT reference

Table 51:
Parameter

Advanced general settings for the Sum3Ph (SU01-) function


Range 5 - 200 Step 1 Default 10 Unit % Description Magnitude limit for frequency calculation in % of Vbase Base voltage

FreqMeasMinVal

VBase

0.05 - 2000.00

0.05

400.00

kV

80

Authority status (AUTS)

Chapter 3 Basic IED functions

13
13.1

Authority status (AUTS)


Introduction
The AUTS function block (or the authority status function block) is an indication function block, which informs about two events related to the IED and the user authorization: the fact that at least one user has tried to log on wrongly into the IED and it was blocked (the output USRBLKED) the fact that at least one user is logged on (the output LOGGEDON)

13.2

Principle of operation
Whenever on of the two events described above happens, the specific output (USRBLKED or LOGGEDON) will be activated. The output can e.g. be connected on Event function block for LON/SPA. The signals are also available on IEC 61850 station bus.

13.3

Function block
AUTSAuthStatus USRBLKED LOGGEDON en06000503.vsd

Figure 44:

AUTS function block

13.4

Output signals
Table 52:
Signal USRBLKED LOGGEDON

Output signals for the AuthStatus (AUTS-) function block


Description At least one user is blocked by invalid password At least one user is logged on

13.5

Setting parameters
The function does not have any parameters available in Local HMI or Protection and Control IED Manager (PCM 600)

81

Goose binary receive

Chapter 3 Basic IED functions

14
14.1

Goose binary receive


Function block
GB01GooseBinRcv BLOCK INSTNAME OUT1 OUT1VAL OUT2 OUT2VAL OUT3 OUT3VAL OUT4 OUT4VAL OUT5 OUT5VAL OUT6 OUT6VAL OUT7 OUT7VAL OUT8 OUT8VAL OUT9 OUT9VAL OUT10 OUT10VAL OUT11 OUT11VAL OUT12 OUT12VAL OUT13 OUT13VAL OUT14 OUT14VAL OUT15 OUT15VAL OUT16 OUT16VAL OUT1NAM OUT2NAM OUT3NAM OUT4NAM OUT5NAM OUT6NAM OUT7NAM OUT8NAM OUT9NAM OUT10NAM OUT11NAM OUT12NAM OUT13NAM OUT14NAM OUT15NAM OUT16NAM en07000047.vsd

Figure 45:

GB function block

82

Goose binary receive

Chapter 3 Basic IED functions

14.2

Input and output signals


Table 53:
Signal BLOCK INSTNAME

Input signals for the GooseBinRcv (GB01-) function block


Description Block of output signals Instance name in Signal Matrix Tool

Table 54:
Signal OUT1 OUT1VAL OUT2 OUT2VAL OUT3 OUT3VAL OUT4 OUT4VAL OUT5 OUT5VAL OUT6 OUT6VAL OUT7 OUT7VAL OUT8 OUT8VAL OUT9 OUT9VAL OUT10 OUT10VAL OUT11 OUT11VAL OUT12 OUT12VAL OUT13 OUT13VAL OUT14 OUT14VAL OUT15 OUT15VAL OUT16

Output signals for the GooseBinRcv (GB01-) function block


Description Binary output 1 Valid data on binary output 1 Binary output 2 Valid data on binary output 2 Binary output 3 Valid data on binary output 3 Binary output 4 Valid data on binary output 4 Binary output 5 Valid data on binary output 5 Binary output 6 Valid data on binary output 6 Binary output 7 Valid data on binary output 7 Binary output 8 Valid data on binary output 8 Binary output 9 Valid data on binary output 9 Binary output 10 Valid data on binary output 10 Binary output 11 Valid data on binary output 11 Binary output 12 Valid data on binary output 12 Binary output 13 Valid data on binary output 13 Binary output 14 Valid data on binary output 14 Binary output 15 Valid data on binary output 15 Binary output 16

83

Goose binary receive

Chapter 3 Basic IED functions

Signal OUT16VAL OUT1NAM OUT2NAM OUT3NAM OUT4NAM OUT5NAM OUT6NAM OUT7NAM OUT8NAM OUT9NAM OUT10NAM OUT11NAM OUT12NAM OUT13NAM OUT14NAM OUT15NAM OUT16NAM

Description Valid data on binary output 16 Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool Signal name for reservation request in Signal Matrix Tool

14.3

Setting parameters
Table 55:
Parameter Operation

Basic general settings for the GooseBinRcv (GB01-) function


Range Disabled Enabled Step Default Off Unit Description Operation Disabled/Enabled

84

About this chapter

Chapter 4 Differential protection

Chapter 4 Differential protection


About this chapter This chapter describes the measuring principles, functions and parameters used in differential protection.

85

High impedance differential protection (PDIF, 87)

Chapter 4 Differential protection

High impedance differential protection (PDIF, 87)


Function block name: HZDxANSI number: 87 IEC 61850 logical node name: HZPDIF IEC 60617 graphical symbol:

IdN

1.1

Introduction
The high impedance differential protection can be used when the involved CT cores have the same turn ratio and similar magnetizing characteristic. It utilizes an external summation of the phases and neutral current and a series resistor and a voltage dependent resistor externally to the relay.

1.2

Principle of operation
The high impedance differential function is based on one current input with external stabilizing resistors and voltage dependent resistors. Three functions can be used to provide a three phase differential protection function. The stabilizing resistor value is calculated from the relay operating value V TripPickup calculated to achieve through fault stability. The supplied stabilizing resistor has a link to allow setting of the correct resistance value. Refer to Application manual for operating voltage and sensitivity calculation.

1.2.1

Logic diagram The logic diagram see figure 46 shows the operation principles for the high impedance differential protection function. It is a basically a simple one step relay with an additional lower alarm level. The function can be totally blocked totally or only tripping, can be blocked, by activating inputs from external signals.

86

High impedance differential protection (PDIF, 87)

Chapter 4 Differential protection

AlarmPickup 0-tAlarm 0

AlarmPickup 0.03s 0

en05000301_ansi.vsd

Figure 46:

Logic diagram for High impedance differential protection.

1.3

Function block
HZD1HZPDIF_87 ISI BLOCK BLKTR TRIP ALARM MEASVOLT en05000363_ansi.vsd

Figure 47:

HZD function block

1.4

Input and output signals


Table 56:
Signal ISI BLOCK BLKTR

Input signals for the HZPDIF_87 (HZD1-) function block


Description Group signal for current input Block of function Block of trip

87

High impedance differential protection (PDIF, 87)

Chapter 4 Differential protection

Table 57:
Signal TRIP ALARM MEASVOLT

Output signals for the HZPDIF_87 (HZD1-) function block


Description Trip signal Alarm signal Measured RMS voltage on CT secondary side

1.5

Setting parameters
Table 58:
Parameter Operation AlarmPickup tAlarm TripPickup

Basic parameter group settings for the HZPDIF_87 (HZD1-) function


Range Disabled Enabled 2 - 500 0.000 - 60.000 5 - 900 Step 1 0.001 1 Default Off 10 5.000 100 Unit V s V Description Disable/Enable Operation Alarm voltage level on CT secondary Time delay to activate alarm Pickup voltage level in volts on CT secondary side Value of series resistor in Ohms

R series

10 - 20000

250

ohm

1.6

Technical data
Table 59:
Function Operate voltage

High impedance differential protection (PDIF, 87)


Range or value (20-400) V Accuracy 1.0% of Vn for V < Vn 1.0% of V for V >Vn 2

Reset ratio Maximum continuous voltage Operate time Reset time Critical impulse time

>95% V>TripPickup /series resistor 200 W 10 ms typically at 0 to 10 x Vd 90 ms typically at 10 to 0 x Vd 2 ms typically at 0 to 10 x Vd

88

About this chapter

Chapter 5 Impedance protection

Chapter 5 Impedance protection


About this chapter This chapter describes distance protection and associated functions. It includes function blocks, logic diagrams and data tables with information about distance protection, automatic switch onto fault, weak end in-feed and other associated functions. Quadrilateral characteristics are also covered.

89

Distance measuring zones, quadrilateral characteristic (PDIS, 21)

Chapter 5 Impedance protection

Distance measuring zones, quadrilateral characteristic (PDIS, 21)


Function block name: ZMQANSI number: 21 IEC 61850 logical node name: ZMQPDIS IEC 60617 graphical symbol:

1.1

Introduction
The line distance protection is a five zone full scheme protection with three fault loops for phase to phase faults and three fault loops for phase to ground fault for each of the independent zones. Individual settings for each zone in resistive and reactive reach gives flexibility for use on overhead lines and cables of different types and lengths. Mho alternative Quad characteristic is available. The function has a functionality for load encroachment which increases the possibility to detect high resistive faults on heavily loaded lines (see figure 48).

X(Ohm)

ZL

R(Ohm)

en06000375.vsd

Figure 48:

Typical Mho distance protection zone with load encroachment function activated

The independent measurement of impedance for each fault loop together with a sensitive and reliable built in phase selection makes the function suitable in applications with single phase auto-reclosing.

90

Distance measuring zones, quadrilateral characteristic (PDIS, 21)

Chapter 5 Impedance protection

Built-in adaptive load compensation algorithm prevents overreaching of zone1 at load exporting end at phase to ground faults on heavily loaded power lines. The distance protection zones can operate, independent of each other, in directional (forward or reverse) or non-directional mode. This makes them suitable, together with different communication schemes, for the protection of power lines and cables in complex network configurations, such as parallel lines, multi-terminal lines etc.

1.2
1.2.1

Principle of operation
Full scheme measurement The execution of the different fault loops within the IED670 are of full scheme type, which means that each fault loop for phase to ground faults and phase to phase faults for forward and reverse faults are executed in parallel. Figure 49 presents an outline of the different measuring loops for the basic five, impedance-measuring zones l.

A-G

B-G

C-G

A-B

B-C

C-A

Zone 1

A-G

B-G

C-G

A-B

B-C

C-A

Zone 2

A-G

B-G

C-G

A-B

B-C

C-A

Zone 3

A-G

B-G

C-G

A-B

B-C

C-A

Zone 4

A-G

B-G

C-G

A-B

B-C

C-A

Zone 5

en05000458_ansi.vsd

Figure 49:

The different measuring loops at line-ground fault and phase-phase fault.

The use of full scheme technique gives faster operation time compared to switched schemes which mostly uses a pickup of an overreaching element to select correct voltages and current depending on fault type. Each distance protection zone performs like one independent distance protection relay with six measuring elements. 1.2.2 Impedance characteristic The distance measuring zone include six impedance measuring loops; three intended for phase-to-ground faults, and three intended for phase-to-phase as well as three-phase faults. The distance measuring zone will essentially operate according to the non-directional impedance characteristics presented in figure 50 and figure 51. The phase-to-ground characteristic is illustrated with the full loop reach while the phase-to-phase characteristic presents the per-phase reach.

91

Distance measuring zones, quadrilateral characteristic (PDIS, 21)

Chapter 5 Impedance protection

X RFPG R1+Rn RFPG

Xn =
X1+Xn

X0 X1 3

Rn = f N f N

R0 R1 3

R (Ohm/loop)

RFPG

RFPG

X1+Xn

RFPG

R1+Rn

RFPG
en05000661_ansi.vsd

Figure 50:

Characteristic for the phase-to-ground measuring loops, ohm/loop domain.

92

Distance measuring zones, quadrilateral characteristic (PDIS, 21)

Chapter 5 Impedance protection

X RFPP 2R1

(Ohm/phase)
RFPP

2X1

R (Ohm/phase) RFPP RFPP

2X1

RFPP

2R1

RFPP
en05000662.vsd

Figure 51:

Characteristic for the phase-to-phase measuring loops

The fault loop reach with respect to each fault type may also be presented as in figure 52. Note in particular the difference in definition regarding the (fault) resistive reach for phase-to-phase faults and three-phase faults.

93

Distance measuring zones, quadrilateral characteristic (PDIS, 21)

Chapter 5 Impedance protection

Ip VA

R1 + j X1

Phase-to-ground element

Phase-to-ground fault in phase A

RFPG (Arc + tower resistance) 0 IN (R0-R1)/3 + j (X0-X1)/3 )

IA VA Phase-to-phase fault in phase A-B VB

R1 + j X1

Phase-to-phase element A-B RFPP

IB R1 + j X1

(Arc resistance)

IA VA Three-phase fault VC

R1 + j X1

0.5RFPP

Phase-to-phase element A-C

IC R1 + j X1 0.5RFPP
en05000181_ansi.vsd

where: n m designates anyone of the three phases (1, 2 or 3) and represents the phase that is leading phase n with 120 degrees (i.e. 3, 1 or 2).

Figure 52:

Fault loop model

The R1 and jX1 in figure 52 represents the positive sequence impedance from the measuring point to the fault location. The RFPG and RFPP is the eventual fault resistance in the fault place.

94

Distance measuring zones, quadrilateral characteristic (PDIS, 21)

Chapter 5 Impedance protection

Regarding the illustration of three-phase fault in figure 52, there is of course fault current flowing also in the third phase during a three-phase fault. The illustration merely reflects the loop measurement, which is made phase-to-phase. The theoretical parameters p and q outline the area of operation in quadrant 1 when varied from 0 to 1.0. That is, for any combination of p and q, where both are between 0 and 1.0, the corresponding impedance is within the reach of the characteristic. The zone may be set to operate in Non-directional, Forward or Reverse direction through the setting OperationDir. The result from respective set value is illustrated in figure 53. It may be convenient to once again mention that the impedance reach is symmetric, in the sense that it is conform for forward and reverse direction. Therefore, all reach settings apply to both directions.

Non-directional

Forward

Reverse

en05000182.vsd

Figure 53: 1.2.3

Directional operating modes of the distance measuring zone

Minimum operating current The operation of the distance measuring zone is blocked if the magnitude of input currents fall below certain threshold values. The phase-to-ground loop AG (BG or CG) is blocked if IA (IB or IC) < IMinPUPG. For zone 1 with load compensation feature the additional criterion applies, that all phase-to-ground loops will be blocked when IN < IMinOpIR, regardless of the phase currents. IA (IB or IC) is the RMS value of the current in phase IA (IB or IC). IN is the RMS value of the vector sum of the three phase currents, i.e. residual current 3I0.

95

Distance measuring zones, quadrilateral characteristic (PDIS, 21)

Chapter 5 Impedance protection

The phase-to-phase loop AB (BC or CA) is blocked if IAB (BC or CA)< IMinPUPP.

Note!
All three current limits IMinPUPG, IminOpIR and IMinPUPP are automatically reduced to 75% of regular set values if the zone is set to operate in reverse direction, i.e. OperationDir=Reverse. 1.2.4 Measuring principles Fault loop equations use the complex values of voltage, current, and changes in the current. Apparent impedances are calculated and compared with the set limits. The calculation of the apparent impedances at ph-ph faults follows equation 1 (example for a phase A to phase B fault).

Zapp =

VA - VB IA - IB
(Equation 1)

Here V and I represent the corresponding voltage and current phasors in the respective phase Ln (n = 1, 2, 3) The return compensation applies in a conventional manner to ph-g faults (example for a phase A to ground fault) according to equation 2.

Z app =

V_A I _ A + IN KN
(Equation 2)

Where: V_A, I_A and IN KN are the phase voltage, phase current and residual current present to the IED is defined as:

KN =

X0 - X1 3X1

where X0 and X1 is zero and positive sequence reactance from the measuring point to the fault on the protected line.

Here IN is a phasor of the residual current in relay point. This results in the same reach along the line for all types of faults. The apparent impedance is considered as an impedance loop with resistance R and reactance X.

96

Distance measuring zones, quadrilateral characteristic (PDIS, 21)

Chapter 5 Impedance protection

The formula given in equation 2 is only valid for no loaded radial feeder applications. When load is considered in the case of single line to ground fault, conventional distance protection might overreach at exporting end and underreach at importing end. REx670 has an adaptive load compensation which increases the security in such applications. Measuring elements receive current and voltage information from the A/D converter. The check sums are calculated and compared, and the information is distributed into memory locations. For each of the six supervised fault loops, sampled values of voltage (V), current (I), and changes in current between samples (I) are brought from the input memory and fed to a recursive Fourier filter. The filter provides two orthogonal values for each input. These values are related to the loop impedance according to equation 3,

V = R i +

0 t
(Equation 3)

in complex notation, or:

Re (V ) = R Re (I ) +

X 0

Re (I ) t
(Equation 4)

Im (V ) = R Im (I ) +

X 0

Im (I ) t
(Equation 5)

with
0 = 2 f 0
(Equation 6)

where: Re Im f0 designates the real component of current and voltage, designates the imaginary component of current and voltage and designates the rated system frequency

97

Distance measuring zones, quadrilateral characteristic (PDIS, 21)

Chapter 5 Impedance protection

The algorithm calculates Rm measured resistance from the equation for the real value of the voltage and substitute it in the equation for the imaginary part. The equation for the Xm measured reactance can then be solved. The final result is equal to:

Rm =

Im (V) Re (I) Re (V) lm(I) Re (I) lm(I) lm(I) Re (I)


(Equation 7)

X m = 0 t

Re (V) lm(I) lm(V ) Re (I) Re (I) lm(I) lm(I) Re (I)


(Equation 8)

The calculated Rm and Xm values are updated each sample and compared with the set zone reach. The adaptive tripping counter counts the number of permissive tripping results. This effectively removes any influence of errors introduced by the capacitive voltage transformers or by other factors. The directional evaluations are performed simultaneously in both forward and reverse directions, and in all six fault loops. Positive sequence voltage and a phase locked positive sequence memory voltage are used as a reference. This ensures unlimited directional sensitivity for faults close to the relay point. 1.2.5 Directional lines The evaluation of the directionality takes place in the function block ZD. Equation 9 and equation 10 are used to classify that the fault is in forward direction for line-to-ground fault and phase-phase fault.

AngDir < ang

0.8V1A + 0.2V1AM IA

< AngNegRes
(Equation 9)

For the AB element, the equation in forward direction is according to.

98

Distance measuring zones, quadrilateral characteristic (PDIS, 21)

Chapter 5 Impedance protection

AngDir < ang

0.8V1AB + 0.2V1ABM IAB

< AngNegRes
(Equation 10)

where: AngDir AngNegRes V1A V1AM IA V1AB V1ABM IAB is the setting for the lower boundary of the forward directional characteristic, by default set to 15 (= -15 degrees) and is the setting for the upper boundary of the forward directional characteristic, by default set to 115 degrees, see figure 54. is positive sequence phase voltage in phase A is positive sequence memorized phase voltage in phase A is phase current in phase A is voltage difference between phase A and B (B lagging A) is memorized voltage difference between phase A and B (B lagging A) is current difference between phase A and B (B lagging A)

The setting of AngDir and AngNegRes is by default set to 15 (= -15) and 115 degrees respectively.(see figure 54) and it should not be changed unless system studies have shown the necessity. The ZD gives a binary coded signal on the output STDIR depending on the evaluation where FWD_A=1 adds 1, REV_A=1 adds 2, FWD_B=1 adds 4 etc.

AngNegRes

AngDir

en05000722_ansi.vsd

Figure 54:

Setting angles for discrimination of forward and reverse fault

99

Distance measuring zones, quadrilateral characteristic (PDIS, 21)

Chapter 5 Impedance protection

The reverse directional characteristic is equal to the forward characteristic rotated by 180 degrees. The polarizing voltage is available as long as the positive-sequence voltage exceeds 4% of the set base voltage VBase. So the directional element can use it for all unsymmetrical faults including close-in faults. For close-in three-phase faults, the V1AM memory voltage, based on the same positive sequence voltage, ensures correct directional discrimination. The memory voltage is used for 100 ms or until the positive sequence voltage is restored. After 100 ms, the following occurs: If the current is still above the set value of the minimum operating current (between 10 and 30% of the set terminal rated current IBase), the condition seals in. - If the fault has caused tripping, the trip endures. - If the fault was detected in the reverse direction, the measuring element in the reverse direction remains in operation. If the current decreases below the minimum operating value, the memory resets until the positive sequence voltage exceeds 10% of its rated value.

1.2.6

Simplified logic diagrams Distance protection zones The design of distance protection zone 1 is presented for all measuring loops: phase-to-ground as well as phase-to-phase. Phase-to-ground related signals are designated by AG, BG and CG. The phase-to-phase signals are designated by AB, BC and CA. Fulfillment of two different measuring conditions is necessary to obtain the one logical signal for each separate measuring loop: Zone measuring condition, which follows the operating equations described above. Group functional input signal (PHSEL), as presented in figure 55.

The PHSEL input signal represents a connection of six different integer values from the phase selection function within the IED, which are converted within the zone measuring function into corresponding boolean expressions for each condition separately. It is connected to the PHS function block output STCDZ. The internal input signal DIRCND is used to give condition for directionality for the distance measuring zones. The signal contains binary coded information for both forward and reverse direction. The zone measurement function filter out the relevant signals on the STDIR input depending on the setting of the parameter OperationDir. It shall be configured to the STDIR output on the ZD block.

100

Distance measuring zones, quadrilateral characteristic (PDIS, 21)

Chapter 5 Impedance protection

OR PHSEL AB BC CA AG BG CG AND AND AND AND AND AND OR

PUZMPP

NDIR_AB NDIR_BC NDIR_CA NDIR_A NDIR_B NDIR_C STNDPE

OR LOVBZ BLOCK OR AND PHPUND BLK


99000557_ansi.vsd

Figure 55:

Conditioning by a group functional input signal PHSEL

Composition of the phase pickup signals for a case, when the zone operates in a non-directional mode, is presented in figure 56.

101

Distance measuring zones, quadrilateral characteristic (PDIS, 21)

Chapter 5 Impedance protection

NDIR_A NDIR_B NIDR_C NDIR_AB NDIR_BC NDIR_CA

OR AND OR AND AND AND


0 15ms 0 15ms 0 15ms 0 15ms

PU_A PU_B PU_C PICKUP

OR OR

BLK
en00000488_ansi.vsd

Figure 56:

Composition of pickup signals in non-directional operating mode

Results of the directional measurement enter the logic circuits, when the zone operates in directional (forward or reverse) mode, see figure 57.

102

Distance measuring zones, quadrilateral characteristic (PDIS, 21)

Chapter 5 Impedance protection

NDIR_A DIR_A NDIR_B DIR_B NDIR_C DIR_C NDIR_AB DIR_AB NDIR_BC DIR_BC NDIR_CA DIR_CA

AND OR AND OR AND 0 15 ms PU_A AND PU_ZMPG

AND

AND

OR

AND

0 15 ms

PU_B

AND OR AND OR AND 0 15 ms PU_C

AND

PU_ZMPP

BLK

OR

AND

0 15 ms

PICKUP

en05000778_ansi.vsd

Figure 57:

Composition of pickup signals in directional operating mode

Tripping conditions for the distance protection zone one are symbolically presented in figure 58.

103

Distance measuring zones, quadrilateral characteristic (PDIS, 21)

Chapter 5 Impedance protection

Timer tPP=Enable PUZMPP Timer tPG=Enable PUZMPG BLKTR AND 0-tPG 0 AND 0 15 ms TRIP AND 0-tPP 0 OR

PU_A

AND

TR_A

PU_B

AND

TR_B

PU_C

AND

TR_C

en00000490_ansi.vsd

Figure 58:

Tripping logic for the distance protection zone one

1.3

Function block
ZM01ZMQPDIS_21 I3P V3P BLOCK LOVBZ BLKTR PHSEL DIRCND TRIP TR_A TR_B TR_C PICKUP PU_A PU_B PU_C PHPUND en06000256_ansi.vsd

Figure 59:

ZM function block

104

Distance measuring zones, quadrilateral characteristic (PDIS, 21)

Chapter 5 Impedance protection

ZD01ZDRDIR I3P V3P STDIR

en05000681_ansi.vsd

Figure 60:

ZD function block

1.4

Input and output signals


Table 60:
Signal I3P V3P BLOCK LOVBZ BLKTR PHSEL DIRCND

Input signals for the ZMQPDIS_21 (ZM01-) function block


Description Group signal for current input Group signal for voltage input Block of function Blocks all output for LOV (or fuse failure) condition Blocks all trip outputs Faulted phase loop selection enable from phase selector External directional condition

Table 61:
Signal TRIP TR_A TR_B TR_C PICKUP PU_A PU_B PU_C PHPUND

Output signals for the ZMQPDIS_21 (ZM01-) function block


Description General Trip, issued from any phase or loop Trip signal from phase A Trip signal from phase B Trip signal from phase C General Pickup, issued from any phase or loop Pickup signal from phase A Pickup signal from phase B Pickup signal from phase C Non-directional pickup, issued from any selected phase or loop

Table 62:
Signal I3P V3P

Input signals for the ZDRDIR (ZD01-) function block


Description Group connection Group connection

105

Distance measuring zones, quadrilateral characteristic (PDIS, 21)

Chapter 5 Impedance protection

Table 63:
Signal STDIR

Output signals for the ZDRDIR (ZD01-) function block


Description All output signals binary coded

1.5

Setting parameters
Table 64:
Parameter Operation IBase UBase OperationDir

Basic parameter group settings for the ZMQPDIS_21 (ZM01-) function


Range Disabled Enabled 1 - 99999 0.05 - 2000.00 Disabled Non-directional Forward Reverse 0.10 - 3000.00 0.10 - 1000.00 Step 1 0.05 Default On 3000 400.00 Forward Unit A kV Description Disable/Enable Operation Base current, i.e. rated current Base voltage, i.e. rated voltage Operation mode of directionality NonDir / Forw / Rev

X1 R1

0.01 0.01

30.00 5.00

ohm/p ohm/p

Positive sequence reactance reach Positive seq. resistance for zone characteristic angle Zero sequence reactance reach Zero seq. resistance for zone characteristic angle Fault resistance reach in ohm/loop, Ph-Ph Fault resistance reach in ohm/loop, Ph-G Operation mode Disable/Enable of Phase-Phase loops Operation mode Disable/Enable of Zone timer, Ph-Ph Time delay of trip, Ph-Ph Operation mode Disable/Enable of Phase-Ground loops

X0 R0 RFPP RFPG OperationPP

0.10 - 9000.00 0.50 - 3000.00 1.00 - 3000.00 1.00 - 9000.00 Disabled Enabled Disabled Enabled 0.000 - 60.000 Disabled Enabled

0.01 0.01 0.01 0.01 -

100.00 15.00 30.00 100.00 On

ohm/p ohm/p ohm/l ohm/l -

Timer tPP

On

tPP OperationPG

0.001 -

0.000 On

s -

106

Distance measuring zones, quadrilateral characteristic (PDIS, 21)

Chapter 5 Impedance protection

Parameter Timer tPG

Range Disabled Enabled 0.000 - 60.000 10 - 30

Step -

Default On

Unit -

Description Operation mode Disable/ Enable of Zone timer, Ph-G Time delay of trip, Ph-G Minimum pickup delta current (2 x current of lagging phase) for Phase-to-phase loops Minimum pickup phase current for Phase-to-ground loops Minimum operate residual current for Phase-Ground loops

tPG IMinPUPP

0.001 1

0.000 20

s %IB

IMinPUPG

10 - 30

20

%IB

IMinOpIR

5 - 30

%IB

Table 65:
Parameter AngNegRes

Parameter group settings for the ZDRDIR (ZD01-) function


Range 90 - 175 Step 1 Default 115 Unit Deg Description Angle to blinder in second quadrant for forward direction measured counter clockwise Angle to blinder in fourth quadrant for forward direction measured clockwise Minimum operate current in % of IBase Base Current Base Voltage

AngDir

5 - 45

15

Deg

IMinOp IBase VBase

1 - 99999 1 - 99999 0.05 - 2000.00

1 1 0.05

10 3000 400.00

%IB A kV

1.6

Technical data
Table 66:
Function Number of zones Minimum operate current Positive sequence reactance Positive sequence resistance Zero sequence reactance Zero sequence resistance Fault resistance, phase-ground Fault resistance, phase-phase

Distance measuring zone, Quad (PDIS, 21)


Range or value 5 with selectable direction (10-30)% of Ibase (0.50-3000.00) /phase (0.10-1000.00) /phase (0.50-9000.00) /phase (0.50-3000.00) /phase (1.00-9000.00) /loop (1.00-3000.00) /loop Accuracy 2.0% static accuracy 2.0 degrees static angular accuracy Conditions: Voltage range: (0.1-1.1) x Vn Current range: (0.5-30) x In Angle: at 0 degrees and 85 degrees

107

Distance measuring zones, quadrilateral characteristic (PDIS, 21)

Chapter 5 Impedance protection

Function Dynamic overreach Impedance zone timers Operate time Reset ratio Reset time

Range or value

Accuracy

<5% at 85 degrees measured with CCVTs and 0.5<SIR<30 (0.000-60.000) s 24 ms typically 105% typically 30 ms typically 0.5% 10 ms -

108

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)

Chapter 5 Impedance protection

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)
Function block name: ZMC ANSI number: 21 IEC 61850 logical node name: ZMCPDIS IEC 60617 graphical symbol:

2.1

Introduction
The line distance protection is a five zone full scheme protection with three fault loops for phase to phase faults and three fault loops for phase to ground fault for each of the independent zones. Individual settings for each zone resistive and reactive reach gives flexibility for use on overhead lines and cables of different types and lengths. Quad characteristic is available. The function has a functionality for load encroachment which increases the possibility to detect high resistive faults on heavily loaded lines. The independent measurement of impedance for each fault loop together with a sensitive and reliable built in phase selection makes the function suitable in applications with single phase auto-reclosing. Built-in adaptive load compensation algorithm for the quadrilateral function prevents overreaching of zone1 at load exporting end at phase to ground faults on heavily loaded power lines. The distance protection zones can operate, independent of each other, in directional (forward or reverse) or non-directional mode. This makes them suitable, together with different communication schemes, for the protection of power lines and cables in complex network configurations, such as parallel lines, multi-terminal lines etc.

2.2
2.2.1

Principle of operation
Full scheme measurement The execution of the different fault loops within the IED670 are of full scheme type, which means that each fault loop for phase to ground faults and phase to phase faults for forward and reverse faults are executed in parallel. Figure 61 presents an outline of the different measuring loops for the basic five, impedance-measuring zones.

109

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)

Chapter 5 Impedance protection

A-G

B-G

C-G

A-B

B-C

C-A

Zone 1

A-G

B-G

C-G

A-B

B-C

C-A

Zone 2

A-G

B-G

C-G

A-B

B-C

C-A

Zone 3

A-G

B-G

C-G

A-B

B-C

C-A

Zone 4

A-G

B-G

C-G

A-B

B-C

C-A

Zone 5

en05000458_ansi.vsd

Figure 61:

The different measuring loops at line-ground fault and phase-phase fault.

The use of full scheme technique gives faster operation time compared to switched schemes which mostly uses a pickup of an overreaching element to select correct voltages and current depending on fault type. Each distance protection zone performs like one independent distance protection relay with six measuring elements. 2.2.2 Impedance characteristic The distance measuring zone include six impedance measuring loops; three intended for phase-to-ground faults, and three intended for phase-to-phase as well as three-phase faults. The distance measuring zone will essentially operate according to the non-directional impedance characteristics presented in figure 62 and figure 63. The phase-to-ground characteristic is illustrated with the full loop reach while the phase-to-phase characteristic presents the per-phase reach.

110

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)

Chapter 5 Impedance protection

X RFRVG

(Ohm/loop)

R1+Rn RFFWPG
X 0 PG X 1RVPG XNRV = X 0 PE X 1RVPE XNRV = 33

X1FWPG+XNFW

XX 0 PE X FWPE 0 PG 1X 1FWPG XNFW XNFW== 3 3

N
R (Ohm/loop)

RFRVG

RFFWPG

X1RVPG+XNRV

RFRVG

R1+Rn RFFWPG
en07000061.vsd

Figure 62:

Characteristic for the phase-to-ground measuring loops, ohm/loop domain.

111

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)

Chapter 5 Impedance protection

X (Ohm/phase) RFVPP
2

R1PP

RFFWPP
2

X1FWPP

X 0PE X 1RVPE XNRV =X X 0PG 1 X 1RVPG RVPE XNRV = 0PE X3 XNRV = 3 3 X PE X 1 X 00 PE X FWPE X 0 PG 1 X 1FWPE FWPG XNFW = XNFW XNFW== 33 3

R (Ohm/phase)

RFRVPP
2

RFFWPP
2

X1RVPP

RFVPP
2

R1PP

RFFWPP
2
en07000062.vsd

Figure 63:

Characteristic for the phase-to-phase measuring loops

The fault loop reach with respect to each fault type may also be presented as in figure 64. Note in particular the difference in definition regarding the (fault) resistive reach for phase-to-phase faults and three-phase faults.

112

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)

Chapter 5 Impedance protection

Ip VA

R1 + j X1

Phase-to-ground element

Phase-to-ground fault in phase A

RFPG (Arc + tower resistance) 0 IN (R0-R1)/3 + j (X0-X1)/3 )

IA VA Phase-to-phase fault in phase A-B VB

R1 + j X1

Phase-to-phase element A-B RFPP

IB R1 + j X1

(Arc resistance)

IA VA Three-phase fault VC

R1 + j X1

0.5RFPP

Phase-to-phase element A-C

IC R1 + j X1 0.5RFPP
en05000181_ansi.vsd

where: n m designates anyone of the three phases (1, 2 or 3) and represents the phase that is leading phase n with 120 degrees (i.e. 3, 1 or 2).

Figure 64:

Fault loop model

The R1 and jX1 in figure 64 represents the positive sequence impedance from the measuring point to the fault location. The RFPG and RFPP is the eventual fault resistance in the fault place.

113

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)

Chapter 5 Impedance protection

Regarding the illustration of three-phase fault in figure 64, there is of course fault current flowing also in the third phase during a three-phase fault. The illustration merely reflects the loop measurement, which is made phase-to-phase. The zone may be set to operate in Non-directional, Forward or Reverse direction through the setting OperationDir. The result from respective set value is illustrated in figure 65. It may be convenient to once again mention that the impedance reach is symmetric, forward and reverse direction. Therefore, all reach settings apply to both directions.

Non-directional

Forward

Reverse

en05000182.vsd

Figure 65: 2.2.3

Directional operating modes of the distance measuring zone

Minimum operating current The operation of the distance measuring zone is blocked if the magnitude of input currents fall below certain threshold values. The phase-to-ground loop AG (BG or CG) is blocked if IA (IB or IC) < IMinPUPG. For zone 1 with load compensation feature the additional criterion applies, that all phase-to-ground loops will be blocked when IN < IMinOpIR, regardless of the phase currents. IA (IB or IC) is the RMS value of the current in phase IA (IB or IC). IN is the RMS value of the vector sum of the three phase currents, i.e. residual current 3I0. The phase-to-phase loop AB (BC or CA) is blocked if IAB (BC or CA)< IMinPUPP.

Note!
All three current limits IMinPUPG, IminOpIR and IMinPUPP are automatically reduced to 75% of regular set values if the zone is set to operate in reverse direction, i.e. OperationDir=Reverse.

114

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)

Chapter 5 Impedance protection

2.2.4

Measuring principles Fault loop equations use the complex values of voltage, current, and changes in the current. Apparent impedances are calculated and compared with the set limits. The calculation of the apparent impedances at ph-ph faults follows equation 11 (example for a phase A to phase B fault).

Zapp =

VA - VB IA - IB
(Equation 11)

Here V and I represent the corresponding voltage and current phasors in the respective phase. The return compensation applies in a conventional manner to ph-g faults (example for a phase A to ground fault) according to equation 12.

Z app =

V_A I _ A + IN KN
(Equation 12)

Where: V_A, I_A and IN KN are the phase voltage, phase current and residual current present to the IED is defined as:

KN =

X0 - X1 3X1 where X0 and X1 is zero and positive sequence reactance from the measuring point to the fault on the protected line.

Here IN is a phasor of the residual current at the relay point. This results in the same reach along the line for all types of faults. The apparent impedance is considered as an impedance loop with resistance R and reactance X. The formula given in equation 12 is only valid for no loaded radial feeder applications. When load is considered in the case of single line to ground fault, conventional distance protection might overreach at exporting end and underreach at importing end. REx670 has an adaptive load compensation which increases the security in such applications. Measuring elements receive current and voltage information from the A/D converter. The check sums are calculated and compared, and the information is distributed into memory locations. For each of the six supervised fault loops, sampled values of voltage (V), current (I), and changes in current between samples (I) are brought from the input memory and fed to a recursive Fourier filter.

115

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)

Chapter 5 Impedance protection

The filter provides two orthogonal values for each input. These values are related to the loop impedance according to equation 13,

V = R i +

0 t
(Equation 13)

in complex notation, or:

Re (V ) = R Re (I ) +

X 0

Re (I ) t
(Equation 14)

Im (V ) = R Im (I ) +

Im (I ) t
(Equation 15)

with
0 = 2 f 0
(Equation 16)

where: Re Im f0 designates the real component of current and voltage, designates the imaginary component of current and voltage and designates the rated system frequency

The algorithm calculates Rm measured resistance from the equation for the real value of the voltage and substitute it in the equation for the imaginary part. The equation for the Xm measured reactance can then be solved. The final result is equal to:

Rm =

Im (V) Re (I) Re (V) lm(I) Re (I) lm(I) lm(I) Re (I)


(Equation 17)

116

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)

Chapter 5 Impedance protection

X m = 0 t

Re (V) lm(I) lm(V ) Re (I) Re (I) lm(I) lm(I) Re (I)


(Equation 18)

The calculated Rm and Xm values are updated each sample and compared with the set zone reach. The adaptive tripping counter counts the number of permissive tripping results. This effectively removes any influence of errors introduced by the capacitive voltage transformers or by other factors. The directional evaluations are performed simultaneously in both forward and reverse directions, and in all six fault loops. Positive sequence voltage and a phase locked positive sequence memory voltage are used as a reference. This ensures unlimited directional sensitivity for faults close to the relay point. 2.2.5 Directionality for series compensation In the basic distance protection function, the control of the memory for polarizing voltage is performed by an under voltage control. In case of series compensated line, a voltage reversal can occur with a relatively high voltage also when the memory must be locked. Thus, a simple undervoltage type of voltage memory control can not be used in case of voltage reversal. In the option for series compensated network the polarizing quantity and memory are controlled by an impedance measurement criterion. The polarizing voltage is a memorized positive sequence voltage. The memory is continuously synchronized via a positive sequence filter. The memory is starting to run freely instantaneously when a voltage change is detected in any phase. A non-directional impedance measurement is used to detect a fault and identify the faulty phase or phases. At a three phase fault when no positive sequence voltage remains (all three phases are disconnected) the memory is used for direction polarization during 100 ms. The memory predicts the phase of the positive sequence voltage with the pre-fault frequency. This extrapolation is made with a high accuracy and it is not the accuracy of the memory that limits the time the memory can be used. The network is at a three phase fault under way to a new equilibrium and the post-fault condition can only be predicted accurately for a limited time from the pre-fault condition. In case of a three phase fault after 100 ms the phase of the memorized voltage can not be relied upon and the directional measurement has to be blocked. The achieved direction criteria are sealed-in when the directional measurement is blocked and kept until the impedance fault criteria is reset (the direction is stored until the fault is cleared). This memory control allows in the time domain unlimited correct directional measurement for all unsymmetrical faults also at voltage reversal. Only at three phase fault within the range of the set impedance reach of the criteria for control of the polarization voltage the memory has to be used and the measurement is limited to 100 ms and thereafter the direction is sealed-in. The special impedance measurement to control the polarization voltage is set separately and has only to cover (with some margin) the impedance to fault that can cause the voltage reversal.

117

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)

Chapter 5 Impedance protection

The evaluation of the directionality takes place in the function block ZDS. Equation 19 and equation 20 are used to classify that the fault is in forward direction for line-to-ground fault and phase-phase fault.

AngDir < a n g

V 1AM < AngNeg Re s IA


(Equation 19)

For the AB element, the equation in forward direction is according to.

AngDir < a n g

V 1ABM < AngNeg Re s I AB


(Equation 20)

where: AngDir AngNegRes V1AM IA V1ABM IAB is the setting for the lower boundary of the forward directional characteristic, by default set to 15 (= -15 degrees) and is the setting for the upper boundary of the forward directional characteristic, by default set to 115 degrees, see figure 66. is positive sequence memorized phase voltage in phase A is phase current in phase A is memorized voltage difference between phase A and B (B lagging A) is current difference between phase A and B (B lagging A)

The setting of AngDir and AngNegRes is by default set to 15 (= -15) and 115 degrees respectively.(see figure 66) and it should not be changed unless system studies have shown the necessity. The ZDS gives a binary coded signal on the output STDIR depending on the evaluation where FWD_A=1 adds 1, REV_A=1 adds 2, FWD_B=1 adds 4 etc.

118

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)

Chapter 5 Impedance protection

AngNegRes

AngDir

en05000722_ansi.vsd

Figure 66:

Setting angles for discrimination of forward and reverse fault

The reverse directional characteristic is equal to the forward characteristic rotated by 180 degrees. 2.2.6 Simplified logic diagrams Distance protection zones The design of distance protection zone 1 is presented for all measuring loops: phase-to-ground as well as phase-to-phase. Phase-to-ground related signals are designated by AG, BG and CG. The phase-to-phase signals are designated by AB, BC and CA. Fulfillment of two different measuring conditions is necessary to obtain the one logical signal for each separate measuring loop: Zone measuring condition, which follows the operating equations described above. Group functional input signal (PHSEL), as presented in figure 67.

The PHSEL input signal represents a connection of six different integer values from the phase selection function within the IED, which are converted within the zone measuring function into corresponding boolean expressions for each condition separately. It is connected to the PHS function block output STCDZ.

119

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)

Chapter 5 Impedance protection

The internal input signal DIRCND is used to give condition for directionality for the distance measuring zones. The signal contains binary coded information for both forward and reverse direction. The zone measurement function filter out the relevant signals on the STDIR input depending on the setting of the parameter OperationDir. It shall be configured to the STDIR output on the ZDS block.

OR PHSEL AB BC CA AG BG CG AND AND AND AND AND AND OR

PUZMPP

NDIR_AB NDIR_BC NDIR_CA NDIR_A NDIR_B NDIR_C STNDPE

OR LOVBZ BLOCK OR AND PHPUND BLK


99000557_ansi.vsd

Figure 67:

Conditioning by a group functional input signal PHSEL

Composition of the phase pickup signals for a case, when the zone operates in a non-directional mode, is presented in figure 68.

120

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)

Chapter 5 Impedance protection

NDIR_A NDIR_B NIDR_C NDIR_AB NDIR_BC NDIR_CA

OR AND OR AND AND AND


0 15ms 0 15ms 0 15ms 0 15ms

PU_A PU_B PU_C PICKUP

OR OR

BLK
en00000488_ansi.vsd

Figure 68:

Composition of pickup signals in non-directional operating mode

Results of the directional measurement enter the logic circuits, when the zone operates in directional (forward or reverse) mode, see figure 69.

121

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)

Chapter 5 Impedance protection

NDIR_A DIR_A NDIR_B DIR_B NDIR_C DIR_C NDIR_AB DIR_AB NDIR_BC DIR_BC NDIR_CA DIR_CA

AND OR AND OR AND 0 15 ms PU_A AND PU_ZMPG

AND

AND

OR

AND

0 15 ms

PU_B

AND OR AND OR AND 0 15 ms PU_C

AND

PU_ZMPP

BLK

OR

AND

0 15 ms

PICKUP

en05000778_ansi.vsd

Figure 69:

Composition of pickup signals in directional operating mode

Tripping conditions for the distance protection zone one are symbolically presented in figure 70.

122

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)

Chapter 5 Impedance protection

Timer tPP=Enable PUZMPP Timer tPG=Enable PUZMPG BLKTR AND 0-tPG 0 AND 0 15 ms TRIP AND 0-tPP 0 OR

PU_A

AND

TR_A

PU_B

AND

TR_B

PU_C

AND

TR_C

en00000490_ansi.vsd

Figure 70:

Tripping logic for the distance protection zone one

2.3

Function block
ZMC1ZMCPDIS_21 I3P V3P BLOCK LOVBZ BLKTR PHSEL DIRCND TRIP TR_A TR_B TR_C PICKUP PU_A PU_B PU_C PHPUND en07000036_ansi.vsd

Figure 71:

ZMC function block

123

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)

Chapter 5 Impedance protection

ZDS1ZDSRDIR I3P V3P PUFW PUREV STDIRCND en07000035_ansi.vsd

Figure 72:

ZDS function block

2.4

Input and output signals


Table 67:
Signal I3P V3P BLOCK LOVBZ BLKTR PHSEL DIRCND

Input signals for the ZMCPDIS_21 (ZMC1-) function block


Description Group signal for current input Group signal for voltage input Block of function Blocks all output for LOV (or fuse failure) condition Blocks all trip outputs Faulted phase loop selection enable from phase selector External directional condition

Table 68:
Signal TRIP TR_A TR_B TR_C PICKUP PU_A PU_B PU_C PHPUND

Output signals for the ZMCPDIS_21 (ZMC1-) function block


Description General Trip, issued from any phase or loop Trip signal from phase A Trip signal from phase B Trip signal from phase C General Pickup, issued from any phase or loop Pickup signal from phase A Pickup signal from phase B Pickup signal from phase C Non-directional pickup, issued from any selected phase or loop

Table 69:
Signal I3P V3P

Input signals for the ZDSRDIR (ZDS1-) function block


Description Group connection for current Group connection for voltage

124

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)

Chapter 5 Impedance protection

Table 70:
Signal PUFW PUREV STDIRCND

Output signals for the ZDSRDIR (ZDS1-) function block


Description Pickup in forward direction Pickup in reverse direction Binary coded directional information per measuring loop

2.5

Setting parameters
Table 71:
Parameter Operation IBase VBase OperationDir

Basic parameter group settings for the ZMCPDIS_21 (ZMC1-) function


Range Disabled Enabled 1 - 99999 0.05 - 2000.00 Disabled Non-directional Forward Reverse Disabled Enabled 0.50 - 3000.00 Step 1 0.05 Default Enabled 3000 400.00 Forward Unit A kV Description Disable/Enable Operation Base current, i.e. rated current Base voltage, i.e. rated voltage Operation mode of directionality NonDir / Forw / Rev

OperationPP

Enabled

Operation mode Disable/Enable of Phase-Phase loops Positive sequence reactance reach, Ph-Ph, forward Positive seq. resistance for characteristic angle, Ph-Ph Fault resistance reach, Ph-Ph, forward Positive sequence reactance reach, Ph-Ph, reverse Fault resistance reach, Ph-Ph, reverse Operation mode Disable/Enable of Zone timer, Ph-Ph Time delay of trip, Ph-Ph Operation mode Disable/Enable of Phase-Ground loops Positive sequence reactance reach, Ph-G, forward

X1FwPP

0.01

30.00

ohm/p

R1PP

0.10 - 1000.00

0.01

5.00

ohm/p

RFltFwdPP X1RvPP

1.00 - 3000.00 0.50 - 3000.00

0.01 0.01

30.00 30.00

ohm/l ohm/p

RFltRevPP Timer tPP

1.00 - 3000.00 Disabled Enabled 0.000 - 60.000 Disabled Enabled 0.50 - 3000.00

0.01 -

30.00 Enabled

ohm/l -

tPP OperationPG

0.001 -

0.000 Enabled

s -

X1FwPG

0.01

30.00

ohm/p

125

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)

Chapter 5 Impedance protection

Parameter X1FwPG

Range 0.10 - 1000.00

Step 0.01

Default 5.00

Unit ohm/p

Description Positive seq. resistance for characteristic angle, Ph-G Zero sequence reactance reach, Ph-G Zero seq. resistance for zone characteristic angle, Ph-G Fault resistance reach, Ph-G, forward Positive sequence reactance reach, Ph-G, reverse Fault resistance reach, Ph-G, reverse Operation mode Disable/ Enable of Zone timer, Ph-G Time delay of trip, Ph-G Minimum pickup delta current (2 x current of lagging phase) for Phase-to-phase loops Minimum pickup phase current for Phase-to-ground loops Minimum operate residual current for Phase-Ground loops

X0PG R0PG

0.50 - 9000.00 0.50 - 3000.00

0.01 0.01

100.00 47.00

ohm/p ohm/p

RFltFwdPG X1RvPG

1.00 - 9000.00 0.50 - 3000.00

0.01 0.01

100.00 30.00

ohm/l ohm/p

RFltRevPG Timer tPG

1.00 - 9000.00 Disabled Enabled 0.000 - 60.000 10 - 30

0.01 -

100.00 Enabled

ohm/l -

tPG IMinPUPP

0.001 1

0.000 20

s %IB

IMinPUPG

10 - 30

20

%IB

IMinOpIR

5 - 30

%IB

2.6

Technical data
Table 72:
Function Number of zones Minimum operate current Positive sequence reactance Positive sequence resistance Zero sequence reactance Zero sequence resistance Fault resistance, phase-ground Fault resistance, phase-phase

Distance measuring zone, quadrilateral characteristic for series compensated lines (PDIS, 21)
Range or value 5 with selectable direction (10-30)% of Ibase (0.50-3000.00) /phase (0.10-1000.00) /phase (0.50-9000.00) /phase (0.50-3000.00) /phase (1.00-9000.00) /loop (1.00-3000.00) /loop Accuracy 2.0% static accuracy 2.0 degrees static angular accuracy Conditions: Voltage range: (0.1-1.1) x Vn Current range: (0.5-30) x In Angle: at 0 degrees and 85 degrees

126

Distance protection zones, quadrilateral characteristic for series compensated lines (PDIS)

Chapter 5 Impedance protection

Function Dynamic overreach Impedance zone timers Operate time Reset ratio Reset time

Range or value

Accuracy

<5% at 85 degrees measured with CCVTs and 0.5<SIR<30 (0.000-60.000) s 24 ms typically 105% typically 30 ms typically 0.5% 10 ms -

127

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

Full-scheme distance measuring, Mho characteristic, PDIS 21


Function block name: ZMHx-ANSI number: 21 IEC 61850 logical node name: ZMHPDIS IEC 60617 graphical symbol:

3.1

Introduction
The numerical mho line distance protection is a five zone full scheme protection for detection of short circuit and earth faults. The full scheme technique provides protection of power lines with high sensitivity and low requirement on remote end communication. The five zones have fully independent measuring and settings which gives high flexibility for all types of lines. The modern technical solution offers fast operating time down to 3/4 cycles. The IED can be used up to the highest voltage levels. It is suitable for the protection of heavily loaded lines and multi-terminal lines where the requirement for tripping is one, two-, and/or three pole. The independent measurement of impedance for each fault loop together with a sensitive and reliable built in phase selection makes the function suitable in applications with single phase auto-reclosing. Built-in adaptive load compensation algorithm prevents overreaching at phase-to-earth faults on heavily loaded power lines, see figure 73.

128

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

jX

Operation area

Operation area

Operation area

No operation area

No operation area

en07000117.vsd

Figure 73:

Load encroachment influence on the offset mho characteristic

The distance protection zones can operate, independent of each other, in directional (forward or reverse) or non-directional mode. This makes them suitable, together with different communication schemes, for the protection of power lines and cables in complex network configurations, such as parallel lines, multi-terminal lines etc. The possibility to use the phase-to-earth quadrilateral impedance characteristic together with the mho characteristic increases the possibility to overcome eventual lack of sensitivity of the mho element due to the shaping of the curve at remote end faults. The integrated control and monitoring functions offers effective solutions for operating and monitoring all types of transmission and sub transmission lines.

3.2
3.2.1

Principle of operation
Full scheme measurement The execution of the different fault loops within the REx 6xx are of full scheme type, which means that each fault loop for phase to ground faults and phase to phase faults are executed in parallel. The use of full scheme technique gives faster operation time compare to switched schemes which mostly uses a phase selector element to select correct voltages and current depending on fault type. So each distance protection zone performs like one independent distance protection relay with six measuring elements.

3.2.2

Impedance characteristic The distance function consists of five instances. Each instance can be selected to be either forward or reverse with cross polarized mho characteristic alternatively self polarized offset Mho characteristics with reverse offset. The operating characteristic is in accordance to figure 74 below where zone5 is selected offset Mho.

129

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

jX Mho, zone4

Mho, zone3

Zs=0
Mho, zone2

R
Mho, zone1

Zs=Z1
R

Zs=2Z1
Offset mho, zone5

en06000400.vsd

Figure 74:

Mho, offset Mho characteristic and the source impedance influence on the Mho characteristic

The mho characteristic has a dynamic expansion due to the source impedance. Instead of crossing the origin as for the offset mho in the left figure 74, which is only valid where the source impedance is zero, the crossing point is moved to the coordinates of the negative source impedance given an expansion of the circle shown in the right figure 74. The polarisation quantities used for the mho circle is 100% memorized positive sequence voltages. This will give a somewhat less dynamic expansion of the mho circle during faults. However, if the source impedance is high, the dynamic expansion of the mho circle might lower the security of the function too much with high loading and mild power swing conditions. The mho distance element has a load encroachment function which cut off a section of the characteristic when enabled. The function is enabled by setting the setting parameter LoadEnchMode to On. Enabling of the load encroachment function increases the possibility to detect high resistive faults without interfering with the load impedance. The algorithm for the load encroachment is located in the PHSM function, where also the relevant settings can be found. Information about the load encroachment from the PHS to the zone measurement is given in binary format to the input signal LDCND. 3.2.3 Basic operation characteristics Each impedance zone can be switched On and Off by the setting parameter Operation. Each zone can also be set to Non-directional, Forward or Reverse by setting the parameter DirMode . The operation for phase to ground and phase to phase fault can be individually switched On and Off by the setting parameter OpModePG and OpModePP.

130

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

For critical applications such as for lines with high SIRs as well as CVTs, it is possible to improve the security by setting the parameter ReachMode to Underreach. In this mode the reach for faults close to the zone reach is reduced by 20% and the filtering is also introduced to increase the accuracy in the measuring. If the ReachMode is set to Overreach no reduction of the reach is introduced and no extra filtering introduced. The latter setting is recommended for overreaching pilot zone, zone 2 or zone 3 elements and reverse zone where overreaching on transients is not a major issue either because of less likelihood of overreach with higher settings or the fact that these elements do not initiate tripping unconditionally. The offset mho characteristic can be set in Non-directional, Forward or Reverse by the setting parameter OffsetMhoDir. When Forward or Reverse is selected a directional line is introduced. Information about the directional line is given from the directional element and given to the measuring element as binary coded signal to the input DIRCND. The zone reach for phase to ground fault and phase to phase fault is set individually in polar coordinates. The impedance is set by the parameters ZPG and ZPP and the corresponding angles by the parameters ZAngPG and ZAngPP. Compensation for ground return path for faults involving ground is done by setting the parameter KNMag and KNAng where KNMag is the magnitude of the ground return path and KNAng is the difference of angles between KNMag and ZPG. KNMag and KNAng are defined according to equation 21 and equation 22.

KNMag =

Z0-Z1 3 Z1
(Equation 21)

Z 0 Z1 KNAng = ( ZAngPG ) ang 3 Z1


(Equation 22)

Where: Z0 Z1 ZAngP G is the complex zero sequence impedance of the line in ohm/phase is the complex positive sequence impedance of the line in ohm/phase line angle of the positive line impedance

The phase-to-ground and phase-to-phase measuring loops can be time delayed individually by setting the parameter tPG and tPP respectively. To release the time delay, the operation mode for the timers, OpModetPG and OpModetPP, has to be set to On. This is also the case for instantaneous operation. The function can be blocked in the following ways:

131

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

activating of input BLOCK blocks the whole function activating of the input BLKZ (fuse failure) blocks all output signals activating of the input BLKZMTD blocks the delta based algorithm activating of the input BLKHSIR blocks the high speed part of the algorithm for high SIR values activating of the input BLKTRIP blocks all output signals activating the input BLKPG blocks the phase-to-ground fault loop outputs activating the input BLKPP blocks the phase-to-phase fault loop outputs

The activation of signal BLKZ can either be by external fuse failure function or from the loss of voltage check in the Mho supervision logic (ZSMGAPC). In both cases the output BLKZ in the Mho supervision logic shall be connected to the input BLKZ in the Mho distance function block (ZMHODIS 21). The input signal BLKZMTD is activated during some ms after fault has been detected by the Mho supervision logic to avoid unwanted operations due to transients. It shall be connected to the BLKZMTD output signal at the Mho supervision function. At SIR values >10, the use of electronic CVT might cause overreach due to the built in resonance circuit in the CVT which reduce the secondary voltage for a while. The input BLKHSIR shall be connected to the output signal HSIR on the Mho supervision logic for increasing of the filtering and high SIR values. This is valid only when permissive underreach scheme is selected by setting ReachMode=Underreach. 3.2.4 Theory for operation The Mho algorithm is based on phase comparison of a operating phasor and a polarizing phasor. When the operating phasor leads the reference phasor by more than 90 degrees, the function will operate and give a trip output. Phase-to-phase fault Mho The plain Mho circle has the characteristic as figure 75The condition for deriving the angle is according to equation 23.

= ang (V AB I AB ZPP ) ang (V po


(Equation 23)

132

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

where: the voltage vector difference between phases A and B

V AB
the current vector difference between phases A and B

I AB
ZPP Vpol the positive sequence impedance setting for phase to phase fault is the polarizing voltage

The polarized voltage consists of 100% memorized positive sequence voltage (VAB for phase A to B fault). The memorized voltage will prevent collapse of the Mho circle for close in faults. Operation occurs if 90270

IABX

Vcomp=VAB - IAB ZPP

I AB ZPP

V pol
V AB

IABR

en07000109_ansi.vsd

Figure 75:

Simplified mho characteristic and vectordiagram for phase A to B fault.

133

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

Offset Mho The characteristic for offset mho is a circle where two points on the circle are the setting parameters ZPP and ZRevPP. The vector ZPP in the impedance plane has the settable angle AngZPP and the angle for ZRevPP is AngZPP+180. The condition for operation at phase to phase fault is that the angle between the two compensated voltages Vcomp1 and Vcomp2 is greater or equal to 90 figure 76. The angle will be 90 for fault location on the boundary of the circle. The angle for A to B fault can be defined according to equation 24.

= arg

V -(-IAB ZRevPP) V -IAB ZPP


(Equation 24)

where: = is the VAB voltage

V
ZRevPP = is the positive sequence impedance setting for phase to phase fault in reverse direction

134

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

IABjX

V comp1 = VAB - IAB ZPP

I AB ZPP

Vcomp2 = V

=IFZF =VAB

IABR

- I AB

Z Re vPP
en07000110_ansi.vsd

Figure 76:

Simplified offset mho characteristic and voltage vectors for phase A to B fault.

For operation the angle should be 90<<270. Offset Mho, forward direction When forward direction has been selected for the offset mho, an extra criteria beside the one for offset mho equation 25 is introdced, that is the angle between the voltage and the current must lie between the blinders in second quadrant and fourth quadrant. See figure 77 below. So the condition for operation will be

90 < < 270


(Equation 25)

and

ArgDir < < ArgNegR e s


(Equation 26)

135

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

where ArgDir ArgNegRes is the setting parameter for directional line in fourth quadrant is the setting parameter for directional line in second quadrant is calculated according to equation 24

The directional information is brought to the mho distance measurement from the mho directional element as binary coded information to the input DIRCND. See chapter Mho directional element for information about the mho directionalety element.

IABjX

ZPP

VAB

ArgNegRes

IAB
ArgDir

en07000111_ansi

Figure 77:

Simplified offset mho characteristic in forward direction for phase A to B fault.

Offset Mho, reverse direction The operation area for offset Mho in reverse direction is according to figure 78. The operation area in second quadrant is ArgNegRes+180. The conditions for operation are

90 < < 270


(Equation 27)

136

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

and

180 ArgDir < < ArgNeg Re s + 180


(Equation 28)

The is derived according to equation 24 for the mho circle and is the angle between the voltage and current.

X ZPP

ArgNegRes

IAB

ArgDir
VAB

ZRevPP
en06000469_ansi.eps

Figure 78:

Operation characteristice for reverse phase Aphase B fault.

Phase-to-ground fault Mho The measuring of ground faults uses ground return compensation applied in a conventional way. The compensation voltage is derived by considering the influence from the ground return path. For a ground fault in phase L1A, we can derive the compensation voltage Vcomp see figure 79 as

137

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

Vcomp = V

pol

I A Z loop
(Equation 29)

where Vpol Zloop is the polarizing voltage (memorized VA for Phase A to ground fault) is the loop impedance, which in general terms can be expressed as

Z1+ZN = Z 1 1 + KN
where Z1 KN

positive sequence impedance of the line (Ohm/phase) zero sequence compensator factor

The angle between the Vcomp and the polarize voltage Vpol for a A to ground fault is

= arg V A I A + IN KN ZPE arg(Vp

(Equation 30)

where: VA IA IN = phase voltage in faulty phase A = phase current in faulty phase A = zero sequence current in faulty phase A (3I0)

KN
Vpol

Z0-Z1 the setting parameter for the zero swquence compensation consisting of the magni3 Z1 tude KN and the angle KNAng.

= 100% of positive sequence memorized voltage VA

It is to be noted that the angle KNAng is the difference angle between the positive sequence impedance ZPE and the impedance ZN for the ground return path see figure 79

138

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

IAX

KNAng IAZN

V comp

I A Z loop
IAZPE Vpol f IA (Ref) IAR

en06000472_ansi.vsd

Figure 79:

Simplified offset mho characteristic and vectordiagram for phase A to ground fault.

Operation occurs if

90 270
(Equation 31)

Offset Mho The characteristic for offset mho at ground fault is a circle containing the two vectors from the origin ZPE and ZRevPE where ZPE and ZrevPE are the settting reach for the positive sequence impedance in forward respective reverse direction. The vector ZPE in the impedance plane has the settable angle AngZPE and the angle for ZRevPP is AngZPE+180 The condition for operation at phase to ground fault is that the angle between the two compensated voltages Vcomp1 and Vcomp2 is greater or equal to 90 see 80. The angle will be 90 for fault location on the boundary of the circle. The angle for A to ground fault can be defined as

= arg
= arg

UL1-(- IL1 Z Re vPE )


UL1- IL1L ZPE

VL1-(- IL1 Z Re vPE ) VL1- IL1L ZPE


(Equation 32)

139

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

where is the phase A phase voltage

VA

IABjX

V comp1 = VA - I A ZPE

IA ZPE

VA

V comp2 = VA - (-IA ZRevPE)


I AB R

- IA Z RevPe
en 06000465 _ansi. vsd

Figure 80:

Simplified offset mho characteristic and voltage vector for phase A to B fault.

Operation occurs if

90 270
(Equation 33)

Offset Mho, forward direction In the same way as for phase-to-phase fault, selection of forward direction of offset mho will introduce an extra criteria for operation. Beside the basic criteria for offset mho according to equations 32 and 33, also the criteria that the angle between the voltage and the current must lie between the blinders in second and fourth quadrant. See figure 81. The condition for operation will hereby be 90<<270 and ArgDir<<ArgNegRes.

140

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

where ArgDir ArgNegRes is the setting parameter for directional line in fourth quadrant is the setting parameter for directional line in second quadrant. is calculated according to equation 32

IA jX

VA

ArgNegRes

IA
ArgDir

IAR

en 06000466 _ansi.vsd

Figure 81:

Simplified characteristic for offset mho in forward direction for A to ground fault.

Offset mho, reverse direction In the same way as for offset in forward direction, the selection of offset mho in reverse direction will introduce an extra criteria for operation compare to the normal offset Mho. The extra is that the angle between the fault voltage and the fault current shall lie between the blinders in second and fourth quadrant. The operation area in second quadrant is limited by the blinder defined as 180 -ArgDir and in fourth quadrant ArgNegRes+180, see figure 82 The conditions for operation of offset Mho in reverse direction for A to ground fault will be 90<<270 and 180-Argdir<<ArgNegRes+180. The is derived according to equation 32 for the offset Mho circle and is the angle between the voltage and current.

141

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

X ZPE

ArgNegRes

IL1 ArgDir UL1 ZRevPE R

en06000470.eps

142

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

X ZPE

ArgNegRes

IA ArgDir VA ZRevPE R

en06000470_ansi.eps

Figure 82:

Simplified characteristic for offset Mho in reverse direction for A to ground fault.

3.3

Function block
ZMH1ZMHPDIS_21 I3P V3P CURR_INP VOLT_INP POL_VOLT BLOCK BLKZ BLKZMTD BLKHSIR BLKTRIP BLKPG BLKPP DIRCND PHSEL LDCND TRIP TR_A TR_B TR_C TRPE TRPP PICKUP PU_A PU_B PU_C PHG_FLT PHPH_FLT

en06000423_ansi.vsd

Figure 83:

ZMH function block

143

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

3.4

Input and output signals


Table 73:
Signal I3P V3P CURR_INP VOLT_INP POL_VOLT BLOCK BLKZ BLKZMTD BLKHSIR BLKTRIP BLKPG BLKPP DIRCND PHSEL LDCND

Input signals for the ZMHPDIS_21 (ZMH1-) function block


Description Connection for current sample signals Connection for voltage sample signals Connection for current signals Connection for voltage signals Connection for polarizing voltage Block of function Block due to fuse failure Block signal for blocking of time domaine function Blocks time domain function at high SIR Blocks all operate output signals Blocks phase-to-earth operation Blocks phase-to-phase operation External directional condition Faulted phase loop selection enable from phase selector External load condition (loop enabler)

Table 74:
Signal TRIP TR_A TR_B TR_C TRPE TRPP PICKUP PU_A PU_B PU_C PHG_FLT PHPH_FLT

Output signals for the ZMHPDIS_21 (ZMH1-) function block


Description Trip General Trip phase A Trip phase B Trip phase C Trip phase-to-ground Trip phase-to-phase Pickup General Pickup phase A Pickup phase B Pickup phase C Pickup phase-to-ground Pickup phase-to-phase

144

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

3.5

Setting parameters
Table 75:
Parameter Operation IBase VBase DirMode

Basic parameter group settings for the ZMHPDIS_21 (ZMH1-) function


Range Disabled ON 1 - 99999 0.05 - 2000.00 Disabled Offset Forward Reverse Disabled ON OverReach Underreach Disabled ON 0.005 - 3000.000 Step 1 0.05 Default ON 3000 400.00 Forward Unit A kV Description Operation Enable/Disable Base current Base voltage Direction mode

LoadEnchMode ReachMode OpModePG

Off OverReach ON

Load enchroachment mode Off/On Reach mode Over/Underreach Operation mode Disable/Enable of Phase-Ground loops Positive sequence impedance setting for Phase-Ground loop Angle for positive sequence line impedance for Phase-Ground loop Magnitud of ground return compensation factor KN Angle for earth return compensation factor KN Reverse reach of the phase to ground loop(magnitude) Delay time for operation of phase to ground elements Minimum operation phase to ground current Operation mode Disable/Enable of Phase-Phase loops

ZPG

0.001

30.000

ohm/p

ZAngPG

10 - 90

80

Deg

KN

0.00 - 3.00

0.01

0.80

KNAng ZRevPG

-180 - 180 0.005 - 3000.000

1 0.001

-15 30.000

Deg ohm/p

tPG

0.000 - 60.000

0.001

0.000

IMinPUPG OpModePP

10 - 30 Disabled ON

1 -

20 ON

%IB -

145

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

Parameter ZPP

Range 0.005 - 3000.000

Step 0.001

Default 30.000

Unit ohm/p

Description Impedance setting reach for phase to phase elements Angle for positive sequence line impedance for Phase-Phase elements Reverse reach of the phase to phase loop(magnitude) Delay time for operation of phase to phase Minimum operation phase to phase current

ZAngPP

10 - 90

85

Deg

ZRevPP

0.005 - 3000.000

0.001

30.000

ohm/p

tPP IMinPUPP

0.000 - 60.000 10 - 30

0.001 1

0.000 20

s %UB

Table 76:
Parameter OffsetMhoDir

Advanced parameter group settings for the ZMHPDIS_21 (ZMH1-) function


Range Non-directional Forward Reverse Disabled ON Disabled ON Step Default Non-directional Unit Description Direction mode for offset mho Operation mode Disable/ Enable of Zone timer, Ph-G Operation mode Off / On of Zone timer, Ph-ph

OpModetPG

ON

OpModetPP

ON

Table 77:
Parameter IBase VBase PilotMode Zreach IMinOp

Basic parameter group settings for the ZSMGAPC (ZSM1-) function


Range 1 - 99999 0.05 - 2000.00 Disabled Enabled 0.1 - 3000.0 10 - 30 Step 1 0.05 0.1 1 Default 3000 400.00 Off 38.0 20 Unit A kV ohm %IB Description Base value for current measurement Base value for voltage measurement Pilot mode Off/On Line impedance Minimum operating current for SIR measurement

146

Full-scheme distance measuring, Mho characteristic, PDIS 21

Chapter 5 Impedance protection

Table 78:
Parameter DeltaI

Advanced parameter group settings for the ZSMGAPC (ZSM1-) function


Range 0 - 200 Step 1 Default 10 Unit %IB Description Current change level in %IB for fault inception detection Zero seq current change level in % of IB Voltage change level in %UB for fault inception detection Zero seq voltage change level in % of UB Settable level for source impedance ratio

Delta3I0 DeltaU

0 - 200 0 - 100

1 1

10 5

%IB %VB

Delta3U0 SIRLevel

0 - 100 5 - 15

1 1

5 10

%VB -

3.6

Technical data
Table 79:
Function Number of zones with selectable directions Minimum operate current Positive sequence impedance, phaseground loop Positive sequence impedance angle, phaseground loop Reverse reach, phaseground loop (Magnitude) Impedance reach for phasephase elements Angle for positive sequence impedance, phasephase elements Reverse reach of phasephase loop Magnitude of ground return compensation factor KN Angle for ground compensation factor KN Dynamic overreach Timers Operate time Reset ratio Reset time

Full-scheme distance protection, Mho characteristic (PDIS, 21)


Range or value 5 with selectable direction (1030)% of IBase (0.0053000.000) /phase (1090) degrees (0.0053000.000) /phase (0.0053000.000) /phase (1090) degrees Accuracy 2.0% static accuracy Conditions: Voltage range: (0.1-1.1) x Vn Current range: (0.5-30) x In Angle: at 0 degrees and 85 degrees

(0.0053000.000) /phase (0.003.00) (-180180) degrees <5% at 85 degrees measured with CVTs and 0.5<SIR<30 (0.000-60.000) s 15 ms typically (with static outputs) 105% typically 30 ms typically 0.5% 10 ms -

147

Mho impedance supervision logic

Chapter 5 Impedance protection

4
4.1

Mho impedance supervision logic


Introduction
The Mho impedance supervision logic includes features for fault inception detection and high SIR detection. It also includes the functionality for loss of potential logic as well as for the pilot channel blocking scheme. The Mho Impedance Supervision logic can mainly be decomposed in two different parts: 1. A fault inception detection logic 2. High SIR detection logic

4.2
4.2.1

Principle of operation
Fault inception detection The aim for the fault inception detector is to very fast detect that a fault has occurred on the system. The fault inception detection detects instantaneous changes in any phase currents or zero sequence current in combination with a change in the corresponding phase voltage or zero sequence voltage. If the change of any phase current and corresponding phase voltage or 3U0 and 3I0 exceeds the setting parameters DeltaI and DeltaU respectively Delta3U0 and Delta3I0 and the input signal BLOCK is not activated, the ouput signal FLTDET is activated indicating that a system fault has occoured. If the setting pilotMode is set to On in Blocking scheme and the fault inception function has detected a system fault, a block signal BLKCHST will be issued and send to remote end in order to block the overreaching zones. Different criteria has to be fulfilled for sending the BLKCHST signal: 1. The setting parameter pilotMode has to be set to On 2. The breaker has to be closed, i.e. the input signal CBOPEN has to be deactivated 3. A reverse fault should have been detected while the carrier send signal is not blocked, i.e. input signal REVSTART is activated and input signal BLOCKCS is not activated OR A fault inception is detected If it is later detected that it was an internal fault that made the function issue the BLKCHST signal, the function will issue a CHSTOP signal to unblock the remote end. The criteria that have to be fulfilled for this are: 1. The function has to be in pilot mode, i.e. the setting parameter pilotMode has to be set to On 2. The carrier send signal should be blocked, i.e. input signal BLOCKCS is On and,

148

Mho impedance supervision logic

Chapter 5 Impedance protection

3. A reverse fault should not have been detected while the carrier send signal was not blocked, i.e.input signals REVSTART and BLOCKCS is not activated. The function has a built in loss of voltage detection based on the evaluation of the change in phase voltage or the change in zero sequence voltage (3U0). It operates if the change in phase voltages exceeds the setting dULevel or 3U0 exceeds the setting dU0Level. If loss of voltage is detected, but not a fault inception, the distance protection function will be blocked. This is also the case if a fuse failure is detected by the external fuse failure function and activate the input FUSEFAIL. Those blocks are generated by activating the output BLKZ, which shall be connected to the input BLKZ on the distance Mho function block. During fault inception a lot of transients will be developed which in turn might cause the distance function to overreach. The Mho supervision logic will increase the filtering during the most transient period of the fault. This is done by activating the output BLKZMD, which shall be connected to the input BLKZMTD on mho distance function block. High SIR detection High SIR values increases the likelihood that CVT will introduce a prolonged and distorted transient, increasing the risk for overreach of the distance function. The SIR function calculates the SIR value as the source impedance divided by the setting Zreach and activates the output signal HSIR if the calculated value for any of the six basic shunt faults exceed the setting parameter SIRLevel.The HSIR signal is intended to block the delta based mho impedance function.

4.3

Function block
ZSM1ZSMGAPC I3P BLKZMTD U3P BLKCHST BLOCK CHSTOP REVSTART HSIR BLOCKCS CBOPEN en06000426.vsd

ZSM1ZSMGAPC I3P V3P BLOCK REVSTART BLOCKCS CBOPEN BLKZMTD BLKCHST CHSTOP HSIR

en06000426_ansi.vsd

Figure 84:

ZSM1 function block

149

Mho impedance supervision logic

Chapter 5 Impedance protection

4.4

Input and output signals


Table 80:
Signal I3P V3P BLOCK REVSTART BLOCKCS CBOPEN

Input signals for the ZSMGAPC (ZSM1-) function block


Description Three phase current samples and DFT magnitude Three phase phase-neutral voltage samples and DFT magnitude Block of the function Indication of reverse start Blocks the blocking carrier signal to remote end Indicates that the breaker is open

Table 81:
Signal BLKZMTD BLKCHST CHSTOP HSIR

Output signals for the ZSMGAPC (ZSM1-) function block


Description Block signal for blocking of time domained mho Blocking signal to remote end to block overreaching zone Stops the blocking signal to remote end Indication of source impedance ratio above set limit

4.5

Setting parameters
Table 82:
Parameter IBase VBase PilotMode Zreach IMinOp

Basic parameter group settings for the ZSMGAPC (ZSM1-) function


Range 1 - 99999 0.05 - 2000.00 Disabled Enabled 0.1 - 3000.0 10 - 30 Step 1 0.05 0.1 1 Default 3000 400.00 Off 38.0 20 Unit A kV ohm %IB Description Base value for current measurement Base value for voltage measurement Pilot mode Off/On Line impedance Minimum operating current for SIR measurement

150

Mho impedance supervision logic

Chapter 5 Impedance protection

Table 83:
Parameter DeltaI

Advanced parameter group settings for the ZSMGAPC (ZSM1-) function


Range 0 - 200 Step 1 Default 10 Unit %IB Description Current change level in %IB for fault inception detection Zero seq current change level in % of IB Voltage change level in %VB for fault inception detection Zero seq voltage change level in % of VB Settable level for source impedance ratio

Delta3I0 DeltaV

0 - 200 0 - 100

1 1

10 5

%IB %UB

Delta3V0 SIRLevel

0 - 100 5 - 15

1 1

5 10

%UB -

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Phase selection with load encroachment (PDIS, 21)


Function block name: PHSANSI number: 21 IEC 61850 logical node name: FDPSPDIS IEC 60617 graphical symbol:

Z<phs

5.1

Introduction
The operation of transmission networks today is in many cases close to the stability limit. Due to environmental considerations the rate of expansion and reinforcement of the power system is reduced e.g. difficulties to get permission to build new power lines. The ability to accurately and reliable classify the different types of fault so that single pole tripping and auto-reclosing can be used plays an important roll in this matter. The phase selection function is designed to accurately select the proper fault loop in the distance function dependent on the fault type. The heavy load transfer that is common in many transmission networks may make fault resistance coverage difficult to achieve. Therefore the function has a built in algorithm for load encroachment, which gives the possibility to enlarge the resistive setting of both the phase selection and the measuring zones without interfering with the load. The extensive output signals from the phase selection gives also important information about faulty phase(s) which can be used for fault analysis.

5.2

Principle of operation
The basic impedance algorithm for the operation of the phase-selection measuring elements is the same as for the distance-measuring function (see section 1 "Distance measuring zones, quadrilateral characteristic (PDIS, 21)"). The "phase selection" includes six impedance measuring loops; three intended for phase-to-ground faults, and three intended for phase-to-phase as well as for three-phase faults. The difference, compared to the zone measuring elements, is in the combination of the measuring quantities (currents and voltages) for different types of faults. The characteristic is basically non-directional, but the PHS function uses information from the directional function block to discriminate whether the fault is in forward or reverse. The directional lines are drawn as "line-dot-dot-line" in the figures below.

The pickup condition PHSELZ is essentially based on the following criteria: 1. Residual current criteria, i.e. separation of faults with and without ground connection 2. Regular quadrilateral impedance characteristic

152

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Chapter 5 Impedance protection

3. Load encroachment characteristics is always active but can be switched off by selecting a high setting. The current pickup condition PHSELI is based on the following criteria: 1. Residual current criteria 2. No quadrilateral impedance characteristic. The impedance reach outside the load area is theoretically infinite. The practical reach, however, will be determined by the minimum operating current limits. 3. Load encroachment characteristic is always active, but can be switched off by selecting a high setting. The PHSELI-output described above is non-directional. The directionality is determined by the distance zones direction function block. There are still output from the function that indicate whether a pickup is in forward or reverse direction, or in between those (e.g. FWD_A and REV_A, and STNDL1). These directional indications are based on the sector boundaries of the directional function and the impedance setting of the phase selection function. Their operate characteristics are illustrated in figure 85.

60 R 60

60 R 60

Non-directional (ND)

Forward (FWD)

Reverse (REV)
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Figure 85:

Characteristic for non-directional, forward and reverse operation of PHS

The setting of the load encroachment function may influence the total operating characteristic, (for more information, refer to section 5.2.4 "Load encroachment"). The input DIRCND contains binary coded information about the directional coming from the directionality block. It shall be connected to the STDIR output on the ZD block. This information is also transferred to the input DIRCND on the distance measuring zones, i.e. the ZM block. The code built up for the directionality is as follows: STDIR=FWD_A*1+FWD_B*4+FWD_C*16+FWD_AB*64+FWD_BC*256+FWD_CA*102 4+REV_A*2+REV_B*8+REV_C*32+REV_AB*128+REV_BC*512+REV_CA*2048

153

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Chapter 5 Impedance protection

If the binary information is 1 then it will be considered that we have pickup in forward direction in phase A. If the binary code is 5 then we have pickup in forward direction in phase A and B etc. The PHSEL (Z or I) output contains, in a similar way as DIRCND, binary coded information, in this case information about the condition for opening correct fault loop in the distance measuring element. It shall be connected to the PHSEL input on the ZM blocks. The code built up for release of the measuring fault loops is as follows: PHSEL = AG*1+BG*2+CG*4+AB*8+BC*16+CA*32 5.2.1 Phase-to-ground fault
ZPHSn =
VA( B , C ) IA( B , C )
(Equation 34)

where: n corresponds to the particular phase (n=1, 2 or 3)

The characteristic for the PHS function at phase to ground fault is according to figure 86. The characteristic has a fixed angle for the resistive boundary in the first quadrant of 60. The resistance RN and reactance XN is the impedance in the ground return path defined according to equation 35 and equation 36.

RN =

R0 R1 3
(Equation 35)

XN =

X 0 X1 3
(Equation 36)

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Chapter 5 Impedance protection

X (ohm/loop) Kr(X1+XN)
RFItRevPG RFItFwdPG

X1+XN
RFItFwdPG

60 deg

RFItRevPG

R (Ohm/loop) X1+XN Kr =

60 deg 1 tan(60 deg)

RFItRevPG

RFItFwdPG

Kr(X1+XN)
en06000396_ansi.vsd

Figure 86:

Characteristic of PHS for phase to ground fault (setting parameters in italic), ohm/loop domain

Besides this, the 3I0 residual current must fulfil the conditions according to equation 37 and equation 38.
3 I 0 0.5 IM in O p
(Equation 37)

3 I0

3I 0 Enable _ PG 100

Iph max
(Equation 38)

where: IMinOp 3I0Enable_PG Iphmax is the minimum operation current for forward zones, is the setting for the minimum residual current needed to enable operation in the ph-G fault loops (in %) and is the maximum phase current in any of three phases.

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Chapter 5 Impedance protection

5.2.2

Phase-to-phase fault For a phase-to-phase fault, the measured by the PHS function will be according to equation 39.

ZPHS =

Vm Vn 2 In
(Equation 39)

The operation characteristic is shown in figure 87.

X (ohm/phase) 0.5RFltRevPP KrX1 0.5RFltFwdPP

X1 0.5RFltFwdPP 60 deg

R (ohm/phase) 60 deg 0.5RFltRevPP X1 Kr = 1 tan(60 deg)

KrX1 0.5RFltRevPP 0.5RFltFwdPP


en05000670_ansi.vsd

Figure 87:

The operation characteristic for PHS at phase-to-phase fault (setting parameters in Italic), ohm/phase domain

In the same way as the condition for phase-to-ground fault, there are current conditions that have to be fulfilled in order to release the phase-to-phase loop. Those are according to equation 40 or equation 41.

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Chapter 5 Impedance protection

3I 0 < 3I 0Enable _ PG
(Equation 40)

3I 0 < 3I 0BLK _ PP
(Equation 41)

where: 3I0Enable_P is 3I0 limit for releasing phase-to-ground measuring loops, G 3I0BLK_PP Iphmax is 3I0 limit for blocking phase-to-phase measuring loop and is maximal magnitude of the phase currents.

5.2.3

Three phase faults The operation condition for three phase faults are the same as for phase-to-phase fault i.e. equation 39, equation 40 and equation 41 are used to release the operation of the function. However, the reach is expanded by a factor 2/3 (approximately 1.1547) in all directions. At the same time the apparent impedance is rotated 30 degrees, counter-clockwise. The characteristic is shown in figure 88.

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Chapter 5 Impedance protection

X (ohm/phase) 4 X1 3 90 deg

0.5RFltFwdPPK3 X1K3
4 RFltFwdPP 6

R (ohm/phase) 0.5RFltRevPPK3 K3 = 2 / sqrt(3)

30 deg

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Figure 88: 5.2.4

The characteristic of PHS for three phase fault (setting parameters in italic)

Load encroachment Each of the six measuring loops has its own load (encroachment) characteristic based on the corresponding loop impedance. The load encroachment functionality is always active, but can be switched off by selecting a high setting. The outline of the characteristic is presented in figure 89. As illustrated, the resistive blinders are set individually in forward and reverse direction while the angle of the sector is the same in all four quadrants.

158

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Chapter 5 Impedance protection

RLdFwd LdAngle LdAngle R

LdAngle RLdRev

LdAngle

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Figure 89:

Characteristic of load encroachment function

The influence of load encroachment function depending on the operation characteristic is dependent on the chosen operation mode of the PHS function. When selection mode is PHSELZ, the characteristic for the PHS (and also zone measurement depending on settings) will be reduced by the load encroachment characteristic (see figure 90, left illustration). When PHSELI is selected the operation characteristic will be as the right illustration in figure 90. The reach will in this case be limit by the minimum operation current and the distance measuring zones.

159

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Chapter 5 Impedance protection

PHSELZ

PHSELI
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Figure 90:

Difference in operating characteristic depending on operation mode when load encroachment is activated

When the "phase selection" is set to operate together with a distance measuring zone the resultant operate characteristic could look something like in figure 91. The figure shows a distance measuring zone operating in forward direction. Thus, the operate area is highlighted in black.

160

Phase selection with load encroachment (PDIS, 21)

Chapter 5 Impedance protection

X "Phase selection" "quadrilateral" zone Distance measuring zone

Load encroachment characteristic R Directional line

en05000673.vsd

Figure 91:

Operation characteristic in forward direction when load encroachment is enabled

Figure 91 is valid for phase-to-ground as well as phase-to-phase faults. During a three-phase fault, or load, when the "quadrilateral" phase-to-phase characteristic is subject to enlargement and rotation the operate area is transformed according to figure 92. Notice in particular what happens with the resistive blinders of the "phase selection" "quadrilateral" characteristic. Due to the 30-degree rotation, the angle of the blinder in quadrant one is now 90 degrees instead of the original 60 degrees. The blinder that is nominally located to quadrant four will at the same time tilt outwards and increase the resistive reach around the R-axis. Consequently, it will be more or less necessary to use the load encroachment characteristic in order to secure a margin to the load impedance.

161

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Chapter 5 Impedance protection

X (ohm/phase) Phase selection Quadrilateral zone

Distance measuring zone

R (ohm/phase)

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Figure 92:

Operation characteristic for PHS in forward direction for three-phase fault, ohm/phase domain

5.2.5

Minimum operate currents The operation of the PHS function is blocked if the magnitude of input currents falls below certain threshold values. The phase-to-ground loop n is blocked if In<IMinPUPG, where In is the RMS value of the current in phase n (A or B or C). The phase-to-phase loop mn is blocked if (2In<IMinOpPPIMinPUPP).

5.2.6

Simplified logic diagrams Figure 93 presents schematically the creation of the phase-to-phase and phase-to-ground operating conditions. Consider only the corresponding part of measuring and logic circuits, when only a phase-to-ground or phase-to-phase measurement is available within the terminal.

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Chapter 5 Impedance protection

Load encroachment block IA IMinOpPG & 3I0 3I0Enable_PG/100 Iphmax BLOCK IA > 0.5 IMinOpPP
AND AND 0 15ms

IRELPG STPG PHSELI

Bool to integer STPP IRELPP

AND

&
10ms 0 0 20ms

0 15ms

or 3I0 < INBlockPP Iphmax

en05000249_ansi.vsd

Figure 93:

Phase-to-phase and phase-to-ground operating conditions (residual current criteria)

A special attention is paid to correct phase selection at evolving faults. A PHSEL output signal is created as a combination of the load encroachment characteristic and current criteria, refer to figure 93. This signal can be configured to STCND functional input signals of the distance protection zone and this way influence the operation of the ph-ph and ph-G zone measuring elements and their phase related pickup and tripping signals. Figure 94 presents schematically the composition of non-directional phase selective signals PHS--NDIR_A (B or C). Signals ZMn and ZMmn (m and n change between A, B and C according to the phase) represent the fulfilled operating criteria for each separate loop measuring element (i.e. within the "quadrilateral" characteristic.

163

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Chapter 5 Impedance protection

INDIR_A INDIR_B INDIR_C

OR IRELPG ZMA ZMB ZMC ZMAB ZMBC3 ZMCA IRELPP AND OR AND AND OR

0 15ms

PHSEL_G

0 15ms

PHSEL_A

0 15ms

PHSEL_B

AND AND AND

OR INDIR_AB INDIR_BC INDIR_CA

0 15ms

PHSEL_C

en00000545_ansi.vsd

Figure 94:

Composition on non-directional phase selection signals

Composition of the directional (forward and reverse) phase selective signals is presented schematically in figure 96 and figure 95. The directional criteria appears as a condition for the correct phase selection in order to secure a high phase selectivity for simultaneous and evolving faults on lines within the complex network configurations. Signals DFWLn and DFWLnLm present the corresponding directional signals for measuring loops with phases Ln and Lm. Designation FW (figure 96) represents the forward direction as well as the designation RV (figure 95) represents the reverse direction. All directional signals are derived within the corresponding digital signal processor. Figure 95 presents additionally a composition of a PHSELZ output signal, which is created on the basis of impedance measuring conditions. This signal can be configured to PHSEL functional input signals of the distance protection zone and this way influence the operation of the ph-ph and ph-G zone measuring elements and their phase related pickup and tripping signals.

164

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Chapter 5 Impedance protection

INDIR_A DRV_A INDIR_AB DRV_AB INDIR_CA DRV_CA INDIR_B DRV_B INDIR_AB AND INDIR_BC DRV_BC INDIR_C DRV_C INDIR_BC AND INDIR_CA AND OR
0 15ms

AND REV_A

AND

OR

0 15ms

AND OR AND REV_B REV_G


0 15ms

OR

0 15ms

AND

AND

INDIR_A INDIR_B INDIR_C INDIR_AB INDIR_BC INDIR_CA

Bool to integer

PHSELZ

REV_C

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Figure 95:

Composition of phase selection signals for reverse direction

165

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Chapter 5 Impedance protection

AND INDIR_A DFW_A INDIR_AB DFW_AB INDIR_CA DFW_CA INDIR_B DFW_B INDIR_AB AND INDIR_BC DFW_BC INDIR_C DFW_C INDIR_BC AND INDIR_CA AND OR AND
0 15ms

AND AND AND OR AND AND OR AND AND OR AND AND OR


15ms 0 0 15ms 0 15ms

OR

15ms 0

0 15ms 0 15ms

STFW1PH STFWL1

STFWPE

STFWL2

0 15ms

STFW2PH

AND

AND
0 15ms

STFWL3

STFW3PH

en05000201_ansi.vsd

Figure 96:

Composition of phase selection signals for forward direction

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Chapter 5 Impedance protection

5.3

Function block
PHS1FDPSPDIS_21 I3P V3P BLOCK DIRCND TRIP RI FWD_A FWD_B FWD_C FWD_G REV_A REV_B REV_C REV_G NDIR_A NDIR_B NDIR_C NDIR_G FWD_1PH FWD_2PH FWD_3PH PHG_FLT PHPH_FLT PHSELZ PHSELI en06000258_ansi.vsd

Figure 97:

PHS function block

5.4

Input and output signals


Table 84:
Signal I3P V3P BLOCK DIRCND

Input signals for the FDPSPDIS_21 (PHS--) function block


Description Group signal for current input Group signal for voltage input Block of function External directional condition

Table 85:
Signal FWD_A FWD_B FWD_C FWD_G REV_A REV_B REV_C REV_G NDIR_A NDIR_B

Output signals for the FDPSPDIS_21 (PHS--) function block


Description Fault detected in phaseA - forward direction Fault detected in phase B - forward direction Fault detected in phase C - forward direction Ground fault detected in forward direction Fault detected in phase A- reverse direction Fault detected in phase B - reverse direction Fault detected in phase C - reverse direction Ground fault detected in reverse direction Non directional fault detected in Phase A Non directional fault detected in Phase B

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Chapter 5 Impedance protection

Signal NDIR_C NDIR_G FWD_1PH FWD_2PH FWD_3PH PHG_FLT PHPH_FLT PHSELZ

Description Non directional fault detected in Phase C Non directional phase-to-ground fault detected Single phase-to-ground fault in forward direction Phase-to-phase fault in forward direction Three phase fault in forward direction Release condition to enable phase-ground measuring elements Release condition to enable phase-phase measuring elements Composite data containing faulted phase loop selections based on impedance loop measurement, current measurement and load emcrochment for input to distance protection PHSELCT Composite data containing faulted phase loop selections based on current measurement and load emcrochment for input to distance protection PHSELCT

PHSELI

5.5

Setting parameters
Table 86:
Parameter IBase 3I0BLK_PP

Basic parameter group settings for the FDPSPDIS_21 (PHS--) function


Range 1 - 99999 10 - 100 Step 1 1 Default 3000 40 Unit A %IPh Description Base current for current settings 3I0 limit for disabling phase-to-phase measuring loops 3I0 pickup for releasing phase-to-ground measuring loops Forward resistive reach for the load impedance area Reverse resistive reach for the load impedance area Load angle determining the load impedance area Positive sequence reactance reach Zero sequence reactance reach Fault resistance reach, Ph-Ph, forward

3I0Enable_PG

10 - 100

20

%IPh

RLdFwd

1.00 - 3000.00

0.01

80.00

ohm/p

RldRev

1.00 - 3000.00

0.01

80.00

ohm/p

LdAngle X1 X0 RFltFwdPP

5 - 70 0.50 - 3000.00 0.50 - 9000.00 0.50 - 3000.00

1 0.01 0.01 0.01

30 40.00 120.00 30.00

Deg ohm/p ohm/p ohm/l

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Chapter 5 Impedance protection

Parameter RFltRevPP RFltFwdPG RFltRevPG IMinPUPP

Range 0.50 - 3000.00 1.00 - 9000.00 1.00 - 9000.00 5 - 30

Step 0.01 0.01 0.01 1

Default 30.00 100.00 100.00 10

Unit ohm/l ohm/l ohm/l %IB

Description Fault resistance reach, Ph-Ph, reverse Fault resistance reach, Ph-G, forward Fault resistance reach, Ph-G, reverse Minimum pickup delta current (2 x current of lagging phase) for Phase-to-phase loops Minimum pickup phase current for Phase-to-ground loops

IMinPUPG

5 - 30

%IB

5.6

Technical data
Table 87:
Function Minimum operate current Reactive reach, positive sequence, forward and reverse Resistive reach, positive sequence Reactive reach, zero sequence, forward and reverse Resistive reach, zero sequence Fault resistance, phase-ground faults, forward and reverse Fault resistance, phase-phase faults, forward and reverse Load encroachment criteria: Load resistance, forward and reverse Safety load impedance angle Reset ratio 105% typically (1.003000.00) /phase (5-70) degrees

Phase selection with load encroachment, quadrilateral characteristic (PDIS, 21)


Range or value (5-30)% of Ibase (0.503000.00) /phase (0.101000.00) /phase (0.509000.00) /phase (0.503000.00) /phase (1.009000.00) /loop (0.503000.00) /loop Accuracy 1.0% of In 2.0% static accuracy 2.0 degrees static angular accuracy Conditions: Voltage range: (0.1-1.1) x Vn Current range: (0.5-30) x In Angle: at 0 degrees and 85 degrees

169

Full scheme distance protection, quadrilateral for Mho

Chapter 5 Impedance protection

Full scheme distance protection, quadrilateral for Mho


Function block name: ZMMx-ANSI number: 21 IEC 61850 logical node name: ZMMPDIS IEC 60617 graphical symbol:

6.1

Introduction
The line distance protection is a five zone protection with three fault loops for phase to ground fault for each of the independent zones. Individual settings for each zone resistive and reactive reach gives flexibility for use on overhead lines and cables of different types and lengths. The function has a functionality for load encroachment which increases the possibility to detect high resistive faults on heavily loaded lines. The independent measurement of impedance for each fault loop together with a sensitive and reliable built in phase selection makes the function suitable in applications with single phase auto-reclosing. Built-in adaptive load compensation algorithm prevents overreaching of zone1 at load exporting end at phase to ground faults on heavily loaded power lines. The distance protection zones can operate, independent of each other, in directional (forward or reverse) or non-directional mode. This makes them suitable, together with different communication schemes, for the protection of power lines and cables in complex network configurations, such as parallel lines, multi-terminal lines etc.

6.2
6.2.1

Principle of operation
Full scheme measurement The different fault loops within the IED 670 are operating in parallel in the same principle as a full scheme measurement.. Figure 98 presents an outline of the different measuring loops for the basic five, impedance-measuring zones l.

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Full scheme distance protection, quadrilateral for Mho

Chapter 5 Impedance protection

A-G

B-G

C-G

Zone 1

A-G

B-G

C-G

Zone 2

A-G

B-G

C-G

Zone 3

A-G

B-G

C-G

Zone 4

A-G

B-G

C-G

Zone 5

en07000080_ansi.vsd

Figure 98: 6.2.2

The different measuring loops at line-ground fault and phase-phase fault.

Impedance characteristic The distance measuring zone include three impedance measuring loops; one fault loop for each phase. The distance measuring zone will essentially operate according to the non-directional impedance characteristics presented in figure 99. The characteristic is illustrated with the full loop reach.

171

Full scheme distance protection, quadrilateral for Mho

Chapter 5 Impedance protection

X RFPG R1+Rn RFPG

Xn =
X1+Xn

X0 X1 3

Rn = f N f N

R0 R1 3

R (Ohm/loop)

RFPG

RFPG

X1+Xn

RFPG

R1+Rn

RFPG
en05000661_ansi.vsd

Figure 99:

Characteristic for the phase-to-ground measuring loops, ohm/loop domain.

The fault loop reach may also be presented as in figure 100.

IA VA

R1 + j X1

Phase-to-ground element

Phase-to-ground fault in phase A

RFPG (Arc + tower resistance) 0 IN (R0-R1)/3 + j (X0-X1)/3 )


en06000412_ansi.vsd

Figure 100: Fault loop model

172

Full scheme distance protection, quadrilateral for Mho

Chapter 5 Impedance protection

The R1 and jX1 in figure 100 represents the positive sequence impedance from the measuring point to the fault location. The RFPG is presented in order to convey the fault resistance reach. The zone may be set to operate in Non-directional, Forward or Reverse direction through the setting OperationDir. The result from respective set value is illustrated in figure 101. It may be convenient to once again mention that the impedance reach is symmetric, in the sense that it is conform for forward and reverse direction. Therefore, all reach settings apply to both directions.

Non-directional

Forward

Reverse

en05000182.vsd

Figure 101: Directional operating modes of the distance measuring zone 6.2.3 Minimum operating current The operation of the distance measuring zone is blocked if the magnitude of input currents fall below certain threshold values. The phase-to-ground loop AG (BG or CG) is blocked if IA (IB or IC) < IMinPUPG. For zone 1 with load compensation feature the additional criterion applies, that all phase-to-ground loops will be blocked when IN < IMinOpIR, regardless of the phase currents. IA (IB or IC) is the RMS value of the current in phase IA (IB or IC). IN is the RMS value of the vector sum of the three phase currents, i.e. residual current 3I0.

Note!
Both current limits IMinPUPG and IMinOpIR are automatically reduced to 75% of regular set values if the zone is set to operate in reverse direction, i.e. OperationDir=Reverse. 6.2.4 Measuring principles Fault loop equations use the complex values of voltage, current, and changes in the current. Apparent impedances are calculated and compared with the set limits.

173

Full scheme distance protection, quadrilateral for Mho

Chapter 5 Impedance protection

Here V and I represent the corresponding voltage and current phasors in the respective phase A, B or C. The calculation of the apparant impedances at phase-to-ground fault follow equation 42 The return compensation applies in a conventional manner.

Z app =

VA IA + I N KN
(Equation 42)

Where: VA, IA and IN KN are the phase voltage, phase current and residual current present to the IED is defined as:

KN =

X0 - X1 3X1

where X0 and X1 is zero and positive sequence reactance from the measuring point to the fault on the protected line.

Here IN is a phasor of the residual current in relay point. This results in the same reach along the line for all types of faults. The apparent impedance is considered as an impedance loop with resistance R and reactance X. The formula given in equation 42 is only valid for no loaded radial feeder applications. When load is considered in the case of single line to ground fault, conventional distance protection might overreach at exporting end and underreach at importing end. REx670 has an adaptive load compensation which increases the security in such applications. Measuring elements receive current and voltage information from the A/D converter. The check sums are calculated and compared, and the information is distributed into memory locations. For each of the six supervised fault loops, sampled values of voltage (V), current (I), and changes in current between samples (I) are brought from the input memory and fed to a recursive Fourier filter. The filter provides two orthogonal values for each input. These values are related to the loop impedance according to equation 43,

V = R i +

0 t
(Equation 43)

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Full scheme distance protection, quadrilateral for Mho

Chapter 5 Impedance protection

in complex notation, or:

Re (V ) = R Re (I ) +

X 0

Re (I ) t
(Equation 44)

Im (V ) = R Im (I ) +

X 0

Im (I ) t
(Equation 45)

with
0 = 2 f 0
(Equation 46)

where: Re Im f0 designates the real component of current and voltage, designates the imaginary component of current and voltage and designates the rated system frequency

The algorithm calculates Rm measured resistance from the equation for the real value of the voltage and substitute it in the equation for the imaginary part. The equation for the Xm measured reactance can then be solved. The final result is equal to:

Rm =

Im (V) Re (I) Re (V) lm(I) Re (I) lm(I) lm(I) Re (I)


(Equation 47)

X m = 0 t

Re (V) lm(I) lm(V ) Re (I) Re (I) lm(I) lm(I) Re (I)


(Equation 48)

The calculated Rm and Xm values are updated each sample and compared with the set zone reach. The adaptive tripping counter counts the number of permissive tripping results. This effectively removes any influence of errors introduced by the capacitive voltage transformers or by other factors.

175

Full scheme distance protection, quadrilateral for Mho

Chapter 5 Impedance protection

The directional evaluations are performed simultaneously in both forward and reverse directions, and in all six fault loops. Positive sequence voltage and a phase locked positive sequence memory voltage are used as a reference. This ensures unlimited directional sensitivity for faults close to the relay point. 6.2.5 Directional lines The evaluation of the directionality takes place in the function block ZDM. Equation 49 are used to classify that the fault is in forward direction for line-to-ground fault.

AngDir < Ang

0.85 V 1A + 0.15 V 1 AM IA

< AngNeg Re s
(Equation 49)

where: AngDir AngNegRes V1A V1AM IA is the setting for the lower boundary of the forward directional characteristic, by default set to 15 (= -15 degrees) and is the setting for the upper boundary of the forward directional characteristic, by default set to 115 degrees, see figure 102. is positive sequence phase voltage in phase A is positive sequence memorized phase voltage in phase A is phase current in phase A

The setting of AngDir and AngNegRes is by default set to 15 (= -15) and 115 degrees respectively (see figure 102) and it should not be changed unless system studies have shown the necessity. The ZDM gives a binary coded signal on the output STDIRCND depending on the evaluation where FWD_A=1 adds 1, REV_A=1 adds 2, FWD_B=1 adds 4 etc.

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Full scheme distance protection, quadrilateral for Mho

Chapter 5 Impedance protection

AngNegRes

AngDir

en05000722_ansi.vsd

Figure 102: Setting angles for discrimination of forward and reverse fault The reverse directional characteristic is equal to the forward characteristic rotated by 180 degrees. The polarizing voltage is available as long as the positive-sequence voltage exceeds 5% of the set base voltage VBase. So the directional element can use it for all unsymmetrical faults including close-in faults. For close-in three-phase faults, the V1AM memory voltage, based on the same positive sequence voltage, ensures correct directional discrimination. The memory voltage is used for 100 ms or until the positive sequence voltage is restored. After 100 ms, the following occurs: If the current is still above the set value of the minimum operating current (between 10 and 30% of the set terminal rated current IBase), the condition seals in. - If the fault has caused tripping, the trip endures. - If the fault was detected in the reverse direction, the measuring element in the reverse direction remains in operation. If the current decreases below the minimum operating value, the memory resets until the positive sequence voltage exceeds 10% of its rated value.

177

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6.2.6

Simplified logic diagrams Distance protection zones The design of distance protection zone 1 is presented for all measuring: phase-to-ground loops. Phase-to-ground related signals are designated by AG, BG and CG. Fulfillment of two different measuring conditions is necessary to obtain the one logical signal for each separate measuring loop: Zone measuring condition, which follows the operating equations described above. Group functional input signal (PHSEL), as presented in figure 103.

The PHSEL input signal represents a connection of six different integer values from the phase selection function within the IED, which are converted within the zone measuring function into corresponding boolean expressions for each condition separately. It is connected to the PHS function block output STCNDZ. The input signal DIRCND is used to give condition for directionality for the distance measuring zones. The signal contains binary coded information for both forward and reverse direction. The zone measurement function filter out the relevant signals on the DIRCND input depending on the setting of the parameter OperationDir. It shall be configured to the DIRCND output on the ZDM block.

PHSEL NDIR_A NDIR_B NDIR_C OR NDIR_G

AG BG CG

AND AND AND

OR LOVBZ BLOCK OR AND PHPUND BLK


en06000408_ansi.vsd

Figure 103: Conditioning by a group functional input signal PHSEL Composition of the phase pickup signals for a case, when the zone operates in a non-directional mode, is presented in figure 104.

178

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NDIR_A AND NDIR_B AND NDIR_C AND AND


0 15 ms 0 15 ms 0 15 ms 0 15 ms

PU_A PU_B PU_C

PICKUP

OR BLK

en06000409_ansi.vsd

Figure 104: Composition of pickup signals in non-directional operating mode Results of the directional measurement enter the logic circuits, when the zone operates in directional (forward or reverse) mode, see figure 105.

NDIR_A DIR_A NDIR_B DIR_B NDIR_C DIR_C

AND OR AND
0 15 ms

&

PU_2MPG

AND

&

PU_A

&

0 15 ms

PU_B

& BLK

0 15 ms

PU_C

OR

&

0 15 ms

PICKUP

en07000081_ansi.vsd

Figure 105: Composition of pickup signals in directional operating mode Tripping conditions for the distance protection zone one are symbolically presented in figure 106.

179

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Timer tPG=Enable PUZMPG BLKTR AND 0-tPG 0 AND 0 15 ms TRIP

PU_A

AND

TR_A

PU_B

AND

TR_B

PU_C

AND

TR_C

en07000082_ansi.vsd

Figure 106: Tripping logic for the distance protection zone one

6.3

Function block
ZMM1ZMMPDIS_21 I3P V3P BLOCK BLKZ BLKTR PHSEL DIRCND TRIP TR_A TR_B TR_C PICKUP PU_A PU_B PU_C PHPUND en06000454_ansi.vsd

Figure 107: ZMM function block

6.4

Input and output signals


Table 88:
Signal I3P V3P

Input signals for the ZMMPDIS_21 (ZMM1-) function block


Description Group signal for current input Group signal for voltage input

180

Full scheme distance protection, quadrilateral for Mho

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Signal BLOCK BLKZ BLKTR PHSEL DIRCND

Description Block of function Blocks all output for LOV (or fuse failure) condition Blocks all trip outputs Faulted phase loop selection enable from phase selector External directional condition

Table 89:
Signal TRIP TR_A TR_B TR_C PICKUP PU_A PU_B PU_C PHPUND

Output signals for the ZMMPDIS_21 (ZMM1-) function block


Description General Trip, issued from any phase or loop Trip signal from phase A Trip signal from phase B Trip signal from phase C General Pickup, issued from any phase or loop Pickup signal from phase A Pickup signal from phase B Pickup signal from phase C Non-directional pickup, issued from any selected phase or loop

6.5

Setting parameters
Table 90:
Parameter Operation IBase Vbase OperationDir

Basic parameter group settings for the ZMMPDIS_21 (ZMM1-) function


Range Disabled Enabled 1 - 99999 0.05 - 2000.00 Disabled Non-directional Forward Reverse 0.50 - 3000.00 0.10 - 1000.00 Step 1 0.05 Default Enabled 3000 400.00 Forward Unit A kV Description Disable/Enable Operation Base current, i.e. rated current Base voltage, i.e. rated voltage Operation mode of directionality NonDir / Forw / Rev

X1 R1

0.01 0.01

30.00 5.00

ohm/p ohm/p

Positive sequence reactance reach Positive seq. resistance for zone characteristic angle Zero sequence reactance reach Zero seq. resistance for zone characteristic angle

X0 R0

0.50 - 9000.00 0.50 - 3000.00

0.01 0.01

100.00 15.00

ohm/p ohm/p

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Chapter 5 Impedance protection

Parameter RFPG Timer tPG

Range 1.00 - 9000.00 Disabled Enabled 0.000 - 60.000 10 - 30

Step 0.01 -

Default 100.00 Enabled

Unit ohm/l -

Description Fault resistance reach in ohm/loop, Ph-G Operation mode Disable/ Enable of Zone timer, Ph-G Time delay of trip, Ph-G Minimum pickup phase current for Phase-to-ground loops Minimum operate residual current for Phase-Ground loops

tPG IMinPUPG

0.001 1

0.000 20

s %IB

IMinOpIR

5 - 30

%IB

6.6

Technical data
Table 91:
Function Number of zones Minimum operate current Positive sequence reactance Positive sequence resistance Zero sequence reactance Zero sequence resistance Fault resistance, phase-ground

Full-scheme distance protection, quadrilateral for mho


Range or value 5 with selectable direction (10-30)% of Ibase (0.50-3000.00) /phase (0.10-1000.00) /phase (0.50-9000.00) /phase (0.50-3000.00) /phase (1.00-9000.00) /loop Accuracy 2.0% static accuracy 2.0 degrees static angular accuracy Conditions: Voltage range: (0.1-1.1) x Vn Current range: (0.5-30) x In Angle: at 0 degrees and 85 degrees

Dynamic overreach Impedance zone timers Operate time Reset ratio Reset time

<5% at 85 degrees measured with CCVTs and 0.5<SIR<30 (0.000-60.000) s 24 ms typically 105% typically 30 ms typically 0.5% 10 ms -

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Faulty phase identification with load enchroachment (PDIS, 21)


Function block name: PHMx ANSI number: 21 IEC 61850 logical node name: FMPSPDIS IEC 60617 graphical symbol:

7.1

Introduction
The operation of transmission networks today is in many cases close to the stability limit. Due to environmental considerations the rate of expansion and reinforcement of the power system is reduced e.g. difficulties to get permission to build new power lines. The ability to accurate and reliable classifying the different types of fault so that single pole tripping and auto-reclosing can be used plays an important roll in this matter. The phase selection function is design to accurate select the proper fault loop in the distance function dependent on the fault type. The heavy load transfer that is common in many transmission networks may in some cases interfere with the distance protection zone reach and cause unwanted operation. Therefore the function has a built in algorithm for load encroachment, which gives the possibility to enlarge the resistive setting of the measuring zones without interfering with the load. The output signals from the phase selection function produce important information about faulty phase(s) which can be used for fault analysis as well.

7.2
7.2.1

Principle of operation
The phase selection function The phase selection function can be decomposed into four different parts: 1. A high speed delta based current phase selector 2. A high speed delta based voltage phase selector 3. A symmetrical components based phase selector 4. Fault evaluation and selection logic 5. A load enchroachment logic 6. A blinder logic The function can be de-activated and activated by setting the parameter Operation Off/On The total function can be blocked by activating the input BLOCK. Figure 1 (kommer senare)

183

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Chapter 5 Impedance protection

Delta based current and voltages The delta based fault detection function uses adaptive technique and is based on patent US4409636. It is a well proven technique that goes back to the beginning of 1980, used with very good experience in highly proven ABB distance relay RALZA. The aim of the delta based phase selector is to provide very fast and reliable phase selection for releasing of tripping from the high speed Mho element and as well as is essential to Directional Comparison Blocking scheme (DCB), which uses Power Line Carrier (PLC) communication system across the protected line. The current and voltage samples for each phase passes through a notch filter that filters out the fundamental components. Under steady state load conditions or when no fault is present, the output of the filter is zero or close to zero. When a fault occurs, currents and voltages change resulting in sudden changes in the current and voltages resulting in non-fundamental waveforms being introduced on the line. At this point the notch filter produces significant non-zero output. The filter output is processed by the delta function. The algorithm uses an adaptive relationship between phases to determine if a fault has occurred, and determines the faulty phases. The current and voltage delta phase selector gives a real output signal if the following criteria is fulfilled (only phase A shown): Max(VA,VB,VC)>DeltaVMinOp Max(IA,IB,IC)>DeltaIMinOp
where: VA, VB and VC DeltaVMinOp and DeltaIMinOp are the voltage change between sample t and sample t-1 are the minimum harmonic level settings for the voltage and current filters to decide that a fault has occured indeed. A slow evolving fault may not produce sufficient harmonics to detect the fault; however, in such a case speed is no longer the issue and the sequence components phase selector will operate.

The delta voltages VA(B,C) and delta current IA(B,C) are the voltage and current between sample t and sample t-1. The delta phase selector employs adaptive techniques to determine the fault type. The logic determines the fault type by summing up all phase values and dividing by the largest value. Both voltages and currents are filtered out and evaluated. The condition for fault type classification for the voltage and currents can be expressed as

FaultType =

( VA, VB , VC ) Max ( IA, IB , IC )


(Equation 50)

184

Faulty phase identification with load enchroachment (PDIS, 21)

Chapter 5 Impedance protection

FaultType =

( IA, IB , IC ) Max ( IA, IB , IC )


(Equation 51)

The value of FaultType for different shunt faults are as follows:


Under ideal conditions: (Patent pending) Single line ground fault; Phase to phase fault 3-phase fault; FaultType=1 FaultType=2 FaultType=3

The output signal is 1 for single line to ground fault, 2 for phase to phase fault and 3 for three phase fault. At this point the filer does not know if ground was involved or not. Typically there are induced harmonics in the non-faulted lines that will affect the result. This method allows for a significant tolerance in the evaluation of FaultType over its entire range. When a single fault has been detected, the logic determines the largest quantity, and asserts that phase. If phase to phase fault is detected, the two largest phase quantities will be detected and asserted as outputs. The faults detected by the delta based phase selector are coordinated in a separate block. Different phases of faults may be detected at slightly different times due to differences in the angles of incidence of fault on the waveshape. The output is forcet to wait a certain time. If the timer expires, if no other fault detection on the other phases is not detected, the fault is deemed as phase-to-ground. This way a premature single phase to ground fault detection is not released for a phase-phase fault. If, however, ground current is detected before the timer expires, the phase to ground fault is released sooner. If another phase picks up during the delay, the wait time is reduced by a certain amount. Each detection of either ground or additional phases further reduce the initial wait time and allow the delta phase selector output to be asserted sooner. There is not wait time, if for example, all three phases are faulty. The delta function is released if the input DELTAREL is activated at the same time as input DELTABLK is not activated. Activating the DELTABLK input will block the delta function. The release signal has an internal pulse timer of 100 ms. When the DELTAREL signal has disappeared the delta logic is reset. In order not to get too abrupt change, the reset is decayed in pre-defined steps. Symmetrical component based phase selector The sequence component phase selector uses preprocessed calculated sequence voltages and currents as inputs. It also uses sampled values of the phase currents. All the sequence quantities mentioned further in this section are with reference to phase A.

185

Faulty phase identification with load enchroachment (PDIS, 21)

Chapter 5 Impedance protection

The function is made up of four main parts:


A B C D Detection of the presence of ground fault A phase to phase logic block based on V2/V1 angle relationship A phase to ground component based on patent US5390067 where the angle relationships between V2/I0 and V2/V1 is evaluated to determine ground fault or phase to phase to ground fault Logic for detection of three phase fault

A. Presence of ground detection The detection of ground fault is done in two ways, one by evaluation of the magnitude of zero sequence current and secondly by the evaluation of the zero and negative sequence voltage. The evaluation of the zero sequence current is done both with a separate complementary function outside the main sequence based evaluation function. The complementary based zero sequence current function evaluates the presence of ground fault by calculating the 3I0 and comparing the result with the setting parameter INtoMaxI. The output signal is used to release the ground fault loop. It is a complement to the ground fault signal built-in in the sequence based phase selector. The condition for releasing the phase to ground loop are as follows: |3I0|>maxIph INto Im ax
where: |3I0| maxIph INtoImax is the magnitude of the zero sequence current 3I0 is the maximum magnitude of the phase currents is a setting parameter for the relation between the magnitude of 3I0 and the maximum phase current

The ground fault loop is also released if the evaluation of the zero sequence current by the main sequence function meets the following conditions: |3I0|>IMinOp k1 |3I0|>maxIph INRelPG
where: IMinOp INRelPG k1 IBase is the settings of the minimum operate phase current is the setting of 3I0 limit for release of phase-to-ground measuring loop in % of IBase is a design parameter is the setting of the base current (A)

186

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Chapter 5 Impedance protection

In systems where the source impedance for zero sequence is high the change of zero sequence current may not be secure. In those cases the sequence based phase selector will automatically change from evaluation of zero sequence current to evaluation of zero and negative sequence voltage. So the release of ground fault loop can also be done if the following conditions are fulfilled: |3V0|>V2*k2 |3V0|>V1*k3 |V1|>k and 3I0<IMinOp*k5 OR 3I0<ILmax INRelPG
where: 3V0 V2 k2, k3, k4 and k5 ILmax IMinOp is the magnitude of the zero sequence voltage is the magnitude of the negative sequence voltage at the relay measuring point of phase A are design parameters is the maximal phase current is the setting of minimum operate phase current in % of IBase

B Phase to phase fault detection The detection of phase to phase fault is performed by evaluation of the angle difference between the sequence voltages V2 and V1.

187

Faulty phase identification with load enchroachment (PDIS, 21)

Chapter 5 Impedance protection

UL3 L3-L1 sector 180 UL2

60

0 L2-L3 sector

U1L1 (Ref)

L1-L2 sector UL1 300


en06000383.vsd

Figure 108: Definition of fault sectors for phase to phase fault The phase to phase loop for the faulty phases will be determined if the angle between the sequence voltages V2 and V1 lies within the sector defined according to figure 108 and the following conditions are fulfilled: |V2|>V2MinOp |V1|>V1MinOP
where: V1MinOP and V2MinOp are the setting parameters for positive sequence and negative sequence minimum operate voltage

The positive sequence voltage V1A in figure 108 above is reference. If there is a three phase fault, there will not be any release of the individual phase signals, even if the general conditions for V2 and V1 are fulfilled. C. Phase to ground and phase to phase to ground detection The detection of phase to ground and phase to phase to ground fault (US patent 5390067) is based on two conditions: 1. Angle relationship between V2 and I0 2. Angle relationship between V2 and V1 The first condition determines faulty phase at single line to ground fault by determine the angle between V2 and I0.

188

Faulty phase identification with load enchroachment (PDIS, 21)

Chapter 5 Impedance protection

80

BG sector

CG sector
V2A (Ref)

200

AG sector
320

en06000384_ansi.vsd

Figure 109: Definition of faulty phase sector as angle between V2 and I0 The angle is calculated in a directional function block and gives the angle in radians as input to the V2I0 function block. The input angle is released only if the fault is in forward direction. This is done by the directional element. The fault is classified as forward direction if the angle between V0 and I0 lies between 20 to 200 degrees see figure 110.

Forward

20

200

Reverse

en06000385.vsd

Figure 110: Directional element used to release the measured angle between V2 and I0 The input radians are summarized with an offset angle and the result evaluated. If the angle is within the boundaries for a specific sector, the phase indication for that sector will be active see figure 109. Only one sector signal is allowed to be activated at the same time.

189

Faulty phase identification with load enchroachment (PDIS, 21)

Chapter 5 Impedance protection

The sector function for condition1 has an internal release signal which is active if the main sequence function has classified the angle between V0 and I0 as valid. The following conditions must be fulfilled for activating the release signals: |V2|>V2MinOp |3I0|>IMinOp 0.5 |3I0|>ILmax INRelPG
where: V2 and IN V2MinOp IMinOp are the magnitude of the negative sequence voltage and zero sequence current (3I0) is the setting parameter for minimum operate negative sequence voltage is the setting parameter for minimum operate phase current

The angle difference is phase shifted by 180 degrees if the fault is in reverse direction. The condition2 looks at the angle relationship between the negative sequence voltage V2 and the positive sequence voltage V1. Since this is a phase to phase voltage relationship, there is no need for shifting phases if the fault is in reverse direction. A phase shift is introduced so that the fault sectors will have the same angle boarders as for condition1. If the calculated angle between V2 and V1 lies within one sector, the corresponding phase for that sector will be activated. The condition2 is released if both the following conditions are fulfilled: |V2|>U2MinOp |V1|>U1MinOP
where: |U1| and |U2| V1MinOP and U2MinOpV2MinOP are the magnitude of the positive and negative sequence voltage are the setting parameter for positive sequence and negative sequence minimum operate voltage.

190

Faulty phase identification with load enchroachment (PDIS, 21)

Chapter 5 Impedance protection

140

CG sector
20 V1A (Ref)

AG sector BG sector

260

en06000413_ansi.vsd

Figure 111: Condition 2: V2 and V1 angle relationship If both conditions are true and there is sector match, the fault is deemed as single phase to ground. If the sectors, however, do not match the fault is determined to be the complement of the second condition, i.e. a phase to phase to ground fault.
E.g. Condition 1 CG BG Condition 2 CG AG Fault type CG BCG

The sequence phase selector is blocked when groundis not involved or if a three phase fault is detected. D. Three phase fault detection The function classify the fault as three phase fault if the following conditions are fulfilled: |V1|>V1Level |I1|>I1Level or |I1|>IMaxLoad
where: V1 and I1 V1Level and I1Level are the positive sequence voltage and current magnitude are the setting of limits for positive sequence voltage and current

191

Faulty phase identification with load enchroachment (PDIS, 21)

Chapter 5 Impedance protection

The output signal for detection of three phase fault is only released if not ground fault and phase to phase fault in the main sequence function is detected. The conditions for not detecting ground fault are the inverse of equation 5 to10. The condition for not detecting phase to phase faults is determined by three conditions. Each of them gives condition for not detecting phase to phase fault. Those are:
Condition1: ground fault is detected or |IN|>IMinOP*k2 and |IN|>ILmax*INRelPG Condition2: Condition2 for phase to ground and phase to phase faults are not fulfilled and ILmax<IMinOp and |I2|<ILmax*I2ILmax Condition3: |IN|>maxIL*3I0BLK_PP or |I2|<maxIL*I2maxIL

where: ILmax INRelPG |I2| I2ILmax 3I0BLK_P P is the maximum of the phase currents IA, IB and IC is the setting parameter for 3I0 limit for release of phase to groundfault loops is the magnitude of the negative sequence current is the setting parameter for the relation between negative sequence current to the maximum phase current in percent of IBase is the setting parameter for 3I0 limit for blocking phase to phase measuring loops

Fault evaluation and selection logic The phase selection logic has an evaluation procedure that can be simplified according to figure 112. Only phase A is shown in the figure. If the internal signal 3Phase fault is activated, all three outputs PU_A, PU_B and PU_Cwill be activated.

192

Faulty phase identification with load enchroachment (PDIS, 21)

Chapter 5 Impedance protection

DeltaIA DeltaVA
Sequence based function

a b

a>b then c=a else c=a

FaultPriority Adaptive release dependent on result from Delta logic

a
OR

AB fault AG fault 3 Phase fault

a<b then c=b else c=a

c
OR

IA Valid BLOCK

&

PU_A

en06000386_ansi.vsd

Figure 112: Simplified diagram for fault evaluation, phase A Load encroachment logic Each of the six measuring loops has its own load (encroachment) characteristic based on the corresponding loop impedance. The load encroachment functionality is always activated in the PHSM function but the influence on the zone measurement can be switched on/off in the respective Zm function. The outline of the characteristic is presented in figure 113. As illustrated, the resistive reach are set individually in forward and reverse direction while the angle of the sector is the same in all four quadrants. The reach for the phase selector will be reduced by the load encroachment function, see right figure 113.

193

Faulty phase identification with load enchroachment (PDIS, 21)

Chapter 5 Impedance protection

jX

Operation area RLd LdAngle LdAngle R LdAngle RLd LdAngle

Operation area

Operation area

No operation area

No operation area

en06000414_ansi.vsd

Figure 113: Influence on the characteristic by load encroachment logic. Outputs The output of the sequence components based phase selector and the delta logic phase selector activates the output signal(s) STL1, STL2 and STL3PU_A, PU_B and PU_C. If the phase to ground loop have been released, then the signal STE will be activated as well. The phase selector also gives binary coded signals that are connected to the zone measuring element for opening the correct measuring loop(s). This is done by the signal PHSEL. If only one phase is enable (A, B or C), the corresponding phase to ground element is enabled as well. Earth is expected to be made available for two and three phase faults for the correct output to be asserted. The fault loop is indicated by one of the decimal numbers below:
0= 1= 2= 3= 4= 5= 6= 7= 8= 9= 10= 11= no faulted phases AG BG CG -ABG -BCG -L3L1N-CAG -ABCG -AB -BC -CA ABC

194

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Chapter 5 Impedance protection

An additional logic is applied to handle the cases when phase to groundoutputs are to be asserted when the ground input G is not asserted. The output signal STCNDPLE is activated when the load encroachment is operating. STCNDPLE shall be connected to the input STCND for selected quadrilateral impedance measuring zones (ZM0x) to be blocked. The signal STCNDLE shall be connected to the input LDCND for selected Mho impedans measuring zones (ZMMx)

Note!
The load encroachment at the measuring zone must be activated to release the blocking from the load encroachment function.

7.3

Function block
PHMFMPSPDIS I3P V3P BLOCK ZSTART TR3PH 1POLEAR PU_A PU_B PU_C PHG_FLT PHSCND PLECND DLECND PICKUP en06000429_ansi.vsd

Figure 114: PHM function block

7.4

Input and output signals


Table 92:
Signal I3P V3P BLOCK ZSTART TR3PH 1POLEAR

Input signals for the FMPSPDIS (PHM-) function block


Description Group signal for current Group signal for voltage Block of function Start from underimpdeance function Three phase tripping initiated Single pole autoreclosing in progress

195

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Chapter 5 Impedance protection

Table 93:
Signal PU_A PU_B PU_C PHG_FLT PHSCND PLECND DLECND PICKUP

Output signals for the FMPSPDIS (PHM-) function block


Description Fault detected in phase A Fault detected in phase B Fault detected in phase C Ground fault detected Binary coded starts from phase selection Binary coded starts from ph sel with load encroachment Binary coded starts from load encroachment only Indicates that something has picked up

7.5

Setting parameters
Table 94:
Parameter IBase VBase IMaxLoad

Basic parameter group settings for the FMPSPDIS (PHM-) function


Range 1 - 99999 0.05 - 2000.00 10 - 5000 Step 1 0.05 1 Default 3000 400.00 200 Unit A kV %IB Description Base current Base voltage Maximum load for identification of three phase fault in % of IBase Load encroachment resistive reach in ohm/phase Load encroachment inclination of load angular sector

RLd

1.00 - 3000.00

0.01

80.00

ohm/p

LdAngle

5 - 70

20

Deg

Table 95:
Parameter DeltaIMinOp DeltaVMinOp V1Level

Advanced parameter group settings for the FMPSPDIS (PHM-) function


Range 5 - 100 5 - 100 5 - 100 Step 1 1 1 Default 10 20 80 Unit %IB %UB %UB Description Delta current level in % of IBase Delta voltage level in % of UBase Pos seq voltage limit for identification of 3-ph fault

196

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Chapter 5 Impedance protection

Parameter I1LowLevel

Range 5 - 200

Step 1

Default 10

Unit %IB

Description Pos seq current level for identification of 3-ph fault in % of IBase Minimum operate positive sequence voltage for ph sel Minimum operate negative sequence voltage for ph sel 3I0 limit for release ph-g measuring loops in % of max phase current 3I0 limit for blocking phase-to-phase measuring loops in % of max phase current

V1MinOp

5 - 100

20

%UB

V2MinOp

1 - 100

%UB

INRelPE

10 - 100

20

%IB

3I0BLK_PP

10 - 100

40

%IB

7.6

Technical data
Table 96:
Function Minimum operate current Load encroachment criteria: Load resistance, forward and reverse

Faulty phase identification with load encroachment (PDIS, 21)


Range or value (5-30)% of Ibase (0.53000) /phase (570) degrees Accuracy 1.0% of In 2.0% static accuracy Conditions: Voltage range: (0.11.1) x Vn Current range: (0.530) x In Angle: at 0 degrees and 85 degrees

197

Directional impedance Mho (RDIR)

Chapter 5 Impedance protection

Directional impedance Mho (RDIR)


Function block name: ZDMANSI number: IEC 61850 logical node name: ZDMRDIR IEC 60617 graphical symbol:

Function block name: ZDAANSI number: IEC 61850 logical node name: ZDARDIR

IEC 60617 graphical symbol:

8.1

Introduction
The phase-to-ground impedance elements can be optionally supervised by a phase unselective directional function (phase unselective, because it is based on symmetrical components).

8.2
8.2.1

Principle of operation
Directional impedance element for mho characteristic, ZDM The evaluation of the directionality takes place in the function block ZDM. Equation 52 and equation 53 are used to classify that the fault is in the forward direction for phase-to-ground fault and phase-phase fault respectively.

AngDir < Ang

0.85 V 1A + 0.15 V 1 AM IA

< AngNeg Re s
(Equation 52)

AngDir < Ang

0.85 V 1 AB + 0.15 V 1ABM IAB

< AngNeg Re s
(Equation 53)

198

Directional impedance Mho (RDIR)

Chapter 5 Impedance protection

Where: AngDir AngNegRes V1A V1AM IA V1AB V1ABM IAB Setting for the lower boundary of the forward directional characteristic, by default set to 15 (= -15 degrees) Setting for the upper boundary of the forward directional characteristic, by default set to 115 degrees, see figure 115 Positive sequence phase voltage in phase A Positive sequence memorized phase voltage in phase A Phase current in phase A Voltage difference between phase A and B (B lagging A) Memorized voltage difference between phase A and B (B lagging A) Current difference between phase A and B (B lagging A)

The default settings for AngDir and AngNegRes are 15 (= -15) and 115 degrees respectively (see figure 115) and they should not be changed unless system studies show the necessity. The directional lines are computed by means of a comparator-type calculation, meaning that the directional lines are based on mho-circles (of infinite radius).

X Zset reach point

AngNegRes

-AngDir

-Zs
en06000416_ansi.vsd

Figure 115: Setting angles for discrimination of forward fault The reverse directional characteristic is equal to the forward characteristic rotated by 180 degrees. The polarizing voltage is available as long as the positive-sequence voltage exceeds 5% of the set base voltage VBase. So the directional element can use it for all unsymmetrical faults including close-in faults.

199

Directional impedance Mho (RDIR)

Chapter 5 Impedance protection

For close-in three-phase faults, the V1AM memory voltage, based on the same positive sequence voltage, ensures correct directional discrimination. The memory voltage is used for 100ms or until the positive sequence voltage is restored. After 100ms, the following occurs: If the current is still above the set value of the minimum operating current the condition seals in. - If the fault has caused tripping, the trip endures. - If the fault was detected in the reverse direction, the measuring element in the reverse direction remains in operation. If the current decreases below the minimum operating value, no directional indications will be given until the positive sequence voltage exceeds 10% of its rated value.

The directional function block ZDM has the following output signals: The STDIRCND output provides an integer signal that depends on the evaluation and is derived from a binary coded signal as follows:
bit 11 (2048) REV_CA1=1 bit 5 (32) FWD_CA=1 bit 10 (1024) REV_BC=1 bit 4 (16) FWD_BC=1 bit 9 (512) REV_AB=1 bit 3 (8) FWD_AB=1 bit 8 (256) REV_C=1 bit 2 (4) FWD_C=1 bit 7 (128) REV_B=1 bit 1 (2) FWD_B=1 bit 6 (64) REV_A=1 bit 0 (1) FWD_A=1

The PUFW output is a logical signal with value 1 or 0. It is made up as an OR-function of all the forward starting conditions, i.e. FWD_A, FWD_B, FWD_C, FWD_AB, FWD_BC and RWD_CA. The PUREV output is similar to the PUFW output, the only difference being that it is made up as an OR-function of all the reverse starting conditions, i.e. REV_A, REV_B, REV_C. REV_AB, REV_BC and REV_CA. Values for the following parameters are calculated, and may be viewed as service values: resistance phase A reactance phase A resistance phase B reactance phase B resistance phase C reactance phase C direction phase A direction phase B direction phase C

200

Directional impedance Mho (RDIR)

Chapter 5 Impedance protection

8.2.2

Additional distance protection directional function for ground faults, ZDA A Mho element needs a polarizing voltage for its operation. The positive-sequence memory-polarized elements are generally preferred. The benefits include: The greatest amount of expansion for improved resistive coverage. These elements always expand back to the source. Memory action for all fault types. This is very important for close-in 3-phase faults. A common polarizing reference for all six distance-measuring loops. This is important for single-pole tripping, during a pole-open period.

There are however some situations that can cause security problems like reverse phase to phase faults and double phase to ground faults during high load periods. To solve these, additional directional element is used. For phase to ground faults, directional elements using sequence components are very reliable for directional discrimination. The directional element can be based on one of following types of polarization: Zero-sequence voltage Negative-sequence voltage Zero-sequence current

These additional directional criteria are evaluated in the function block ZDA. Zero-sequence voltage polarization is utilizing the phase relation between the zero-sequence voltage and the zero-sequence current at the location of the protection. The measurement principle is illustrated in figure 116.

- 3V 0
AngleOp AngleRCA

3I0
en06000417_ansi.vsd

Figure 116: Principle for zero-sequence voltage polarized additional directional element

201

Directional impedance Mho (RDIR)

Chapter 5 Impedance protection

Negative-sequence voltage polarization is utilizing the phase relation between the negative-sequence voltage and the negative-sequence current at the location of the protection. Zero-sequence current polarization is utilizing the phase relation between the zero-sequence current at the location of the protection and some reference zero-sequence current, for example the current in the neutral of a power transformer. The principle of zero-sequence voltage polarization with zero-sequence current compensation is described in figure 117. The same also applies for the negative-sequence function.

Z0 SA

I0

Z0 Line

Z0SB V0

I0
Characteristic angle

V0

K*I0 V0 + K*I0 IF
en06000418_ansi.vsd

Figure 117: Principle for zero sequence compensation Note that the sequence based additional directional element cannot give per phase information about direction to fault. This is why it is an AND-function with the normal directional element that works on a per phase base. The release signals are per phase and to have a release of a measuring element in a specific phase both the additional directional element, and the normal directional element, for that phase must indicate correct direction.

Normal directional element A, B, C Additional directional element

Release of distance measuring element A, B, C AND AND per phase


en06000419_ansi.vsd

Figure 118: Ground distance element directional supervision

202

Directional impedance Mho (RDIR)

Chapter 5 Impedance protection

8.3

Function block
ZDM1ZDMRDIR I3P V3P DIR_CURR DIR_VOLT DIR_POL PUFW PUREV STDIRCND en06000422_ansi.vsd

Figure 119: ZDM function block

ZDA1ZDARDIR I3P V3P I3PPOL DIRCND FWD_G REV_G DIREFCND

en06000425_ansi.vsd

Figure 120: ZDA function block

8.4

Input and output signals


Table 97:
Signal I3P V3P

Input signals for the ZDMRDIR (ZDM1-) function block


Description group connection for current abs 1 group connection for voltage abs 1

Table 98:
Signal DIR_CURR DIR_VOLT DIR_POL PUFW PUREV STDIRCND

Output signals for the ZDMRDIR (ZDM1-) function block


Description Group connection Group connection Group connection Pickup in forward direction Pickup in reverse direction Binary coded directional information per measuring loop

203

Directional impedance Mho (RDIR)

Chapter 5 Impedance protection

Table 99:
Signal I3P V3P I3PPOL DIRCND

Input signals for the ZDARDIR (ZDA1-) function block


Description Current signals Voltage signals Polarisation current signals Binary coded directional signal

Table 100: Output signals for the ZDARDIR (ZDA1-) function block
Signal FWD_G REV_G DIREFCND Description Forward start signal from phase-to-ground directional element Reverse start signal from phase-to-ground directional element Pickuo direction Binary coded

8.5

Setting parameters
Table 101: Basic parameter group settings for the ZDMRDIR (ZDM1-) function
Parameter IBase VBase DirEvalType Range 1 - 99999 0.05 - 2000.00 Impedance Comparator Imp/Comp 90 - 175 Step 1 0.05 Default 3000 400.00 Comparator Unit Description Base setting for current level Base setting for voltage level Directional evaluation mode Impedance / Comparator Angle of blinder in second quadrant for forward direction Angle of blinder in fourth quadrant for forward direction Minimum pickup phase current for Phase-to-ground loops Minimum pickup delta current (2 x current of lagging phase) for Phase-to-phase loops

AngNegRes

115

Deg

AngDir

5 - 45

15

Deg

IMinPUPG

5 - 30

%IB

IMinPUPP

5 - 30

10

%IB

204

Directional impedance Mho (RDIR)

Chapter 5 Impedance protection

Table 102: Basic parameter group settings for the ZDARDIR (ZDA1-) function
Parameter IBase VBase PolMode Range 1 - 99999 0.05 - 2000.00 -3U0 -V2 IPol Dual -3U0Comp -V2comp -90 - 90 1 - 200 1 - 100 5 - 100 Step 1 0.05 Default 3000 400.00 -3U0 Unit A kV Description Base setting for current values Base setting for voltage level in kV Polarization quantity for opt dir function for P-G faults

AngleRCA IPickup VPolPU IPolPU

1 1 1 1

75 5 1 10

Deg %IB %VB %IB

Characteristic relay angle (= MTA or base angle) Minimum operation current in % of IBase Minimum polarizing voltage in % of VBase Minimum polarizing current in % of IBase

Table 103: Advanced parameter group settings for the ZDARDIR (ZDA1-) function
Parameter AngleOp Kmag Range 90 - 180 0.50 - 3000.00 Step 1 0.01 Default 160 40.00 Unit Deg ohm Description Operation sector angle Boost-factor in -V0comp and -V2comp polarization

205

Phase preference logic

Chapter 5 Impedance protection

Phase preference logic


Function block name: PPL ANSI number: IEC 61850 logical node name: PPLPHIZ IEC 60617 graphical symbol:

9.1

Introduction
Phase Preference Logic (PPL) is intended to be used in isolated or high impedance grounded networks where there is a requirement to trip only one of the faulty lines at cross-country fault. The phase preference logic inhibits tripping for single-phase-to-ground faults in isolated and high impedance-grounded networks, where such faults are not to be cleared by distance protection. For cross-country faults, the logic selects either the leading or the lagging phase-ground loop for measurement and initiates tripping of the preferred fault based on the selected phase preference. A number of different phase preference combinations are available for selection.

9.2

Principle of operation
The phase preference logic can be activated or deactivated by setting the parameter Operation to On or Off. The function has 10 operation modes which can be set by the parameter Mode. The different modes and their explanation are shown in table 104 below.
Table 104: Operation modes for phase preference logic
Operation Mode 0 Description No filter, phase-to-phase measuring loops are not blocked during single phase-to-ground faults. Tripping is allowed without any particular phase preference at cross-country faults No preference, trip is blocked during single phase-to-ground faults, trip is allowed without any particular phase preference at cross-country fault Cyclic 1231c; A before B before C before C Cyclic 1321c; A before C before B before A Acyclic 123a; A before B beforeC Acyclic 132a;A before C beforeB Acyclic 213a; B before A before C Acyclic 231a; B before C beforeA Acyclic 312a; C before B beforeA Acyclic 321a; C before B before A

1 2 3 4 5 6 7 8 9

206

Phase preference logic

Chapter 5 Impedance protection

The function can be divided into two parts; one labeled Voltage and Current Discrimination and the second one labeled Phase Preference Evaluation, see figure 121. The aim with the voltage and current discrimination part is to discriminate faulty phases and to determine if there is a cross country fault. If cross country fault is detected, an internal signal Detected cross country fault is created and sent to the phase preference part to be used in the evaluation process for determining the condition for trip. The voltage discrimination part gives phase segregated pickup signals STVA, STVB or STVC if the respective measured phase voltage is below the setting parameter PU27PN at the same time as the zero sequence voltage is above the setting parameter 3V0Pickup, see figure 121. The internal signal for detection of cross country fault, DetectCrossContry, that come from the voltage and current discrimination part of the function can be achieved in three different ways: 1. The magnitude of 3I0 has been above the setting parameter IN for a time longer than the setting of pick-up timer tIN 2. The magnitude of 3I0 has been above the setting parameter IN at the same time as the magnitude of 3V0 has been above the setting parameter 3V0Pickup during a time longer than the setting of pick-up timer tVN 3. The magnitude of 3I0 has been above the setting parameter IN at the same time as one of the following conditions are fulfilled: the measured phase-to phase voltage in at least one of the phase combinations has been below the setting parameter PU27PP for more than 20 ms. At least one of the phase voltages are below the setting parameter PU27PN for more than 20 ms The second part, Phase preference evaluation, uses the internal signal DetectCrossCountry from the voltage and current evaluation together with the input signal STCND and the information from the setting parameter OperMode to determine the condition for trip. To release the phase preference logic at least two out of three phases must be faulty. The fault classification whether it is a single line to earth or cross country fault and which phase to be tripped at cross country fault is converted into a binary coded signal and sent to the distance protection measuring zone to release the correct measuring zone according to the setting of OperMode. This is done by activating the output ZREL and it shall be connected to the input STCND on the distance zone measuring element. The input signal PHSELC consist of binary information of fault type and is connected to the Phase selector output STCND. The fault must be activated in at least two phases to be classified as a cross country fault in the phase preference part of the logic. The input signals RELLx are additional fault release signals that can be connected to external protection functions through binary input. The trip output can be blocked by setting the parameter Blk1PhTr to On. The output pickup and trip signals can be blocked by activating the input BLOCK

207

Phase preference logic

Chapter 5 Impedance protection

V_A V_B V_C V_AB V_BC V_CA IN VN PU27PN PU27PP INPICKUP VNPICKUP Detect CrossCountry fault Voltage Discrimination OR AND PICKUP AND STVB AND STVA

AND

STVC

AND OperatingMode REL_AG REL_BG REL_CG STNDC Phase Preference Evaluation AND TR_C AND AND TR_A TR_B

AND AND AND Blk1PhTr BLOCK OR AND

en06000323_ansi.vsd

Figure 121: Simplified block diagram for phase preference logic

208

Phase preference logic

Chapter 5 Impedance protection

9.3

Function block
PPL1PPLPHIZ I3P V3P BLOCK RELAG RELBG RELCG PHSEL BFI_3P ZREL

en07000029_ansi.vsd

Figure 122: PPL function block

9.4

Input and output signals


Table 105: Input signals for the PPLPHIZ (PPL1-) function block
Signal I3P V3P BLOCK RELAG RELBG RELCG PHSEL Description Group signal for current input Group signal for voltage input Block of function Release condition for the A to ground loop Release condition for the B to ground loop Release condition for the C to ground loop Integer coded external release signals

Table 106: Output signals for the PPLPHIZ (PPL1-) function block
Signal BFI_3P ZREL Description Indicates start for earth fault(s), regardless of direction Integer coded output release signal

209

Phase preference logic

Chapter 5 Impedance protection

9.5

Setting parameters
Table 107: Basic parameter group settings for the PPLPHIZ (PPL1-) function
Parameter IBase VBase OperMode Range 1 - 99999 0.05 - 2000.00 No Filter NoPref 1231c 1321c 123a 132a 213a 231a 312a 321a 10.0 - 100.0 Step 1 0.01 Default 3000 400.00 No Filter Unit A kV Description Base current Base voltage Operating mode (c=cyclic,a=acyclic)

PU27PN

1.0

70.0

%VB

Pickup value of phase undervoltage (% of VBase) Pickup value of line to line undervoltage (% of VBase) Pickup value of residual voltage (% of VBase) Pickup value of residual current (% of IBase) Pickup-delay for residual voltage Dropoff-delay for residual voltage Pickup-delay for residual current

PU27PP

10.0 - 100.0

1.0

50.0

%VB

3V0PU Pickup_N tVN tOffVN tIN

5.0 - 70.0 10 - 200 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000

1.0 1 0.001 0.001 0.001

20.0 20 0.100 0.100 0.150

%VB %IB s s s

210

Power swing detection (RPSB, 78)

Chapter 5 Impedance protection

10

Power swing detection (RPSB, 78)


Function block name: PSD-ANSI number: 78 IEC 61850 logical node name: ZMRPSB IEC 60617 graphical symbol:

Zpsb

10.1

Introduction
Power swings may occur after disconnection of heavy loads or trip of big generation plants. Power swing detection function is used to detect power swings and initiate block of selected distance protection zones. Occurrence of ground fault currents during a power swing can block the power swing detection function to allow fault clearance.

10.2

Principle of operation
The PSD function comprises an inner and an outer quadrilateral measurement characteristic with load encroachment, see figure 123. Its principle of operation is based on the measurement of the time it takes for a power swing transient impedance to pass through the impedance area between the outer and the inner characteristics. Power swings are identified by transition times longer than a transition time set on corresponding timers. The impedance measuring principle is the same as that used for the distance protection zones. The impedance and the characteristic passing times are measured in all three phases separately. One-out-of-three or two-out-of-three operating modes can be selected according to the specific system operating conditions.

211

Power swing detection (RPSB, 78)

Chapter 5 Impedance protection

X1OutFw X1InFw

jX

ZL

R1LIn

Fw

Rv
LdAngle

R1FInRv

R1FInFw

Rv Fw Fw

Fw
LdAngle

R
Rv
RLdInRv RLdInFw

Fw Fw

Rv Rv

RLdOutRv RLdOutFw X1InRv X1OutRv


en05000175_ansi.vsd

Figure 123: Operating characteristic for the PSD function The impedance measurement within the PSD function is performed by solving equation 54 and equation 55(Typical equations are for phase A, similar equations are applicable for phases B and C as well).
VA Re Rset IA
(Equation 54)

V A Im Xset IA
(Equation 55)

The Rset and Xset are R and X boundaries which are more explained in the following sections.

212

Power swing detection (RPSB, 78)

Chapter 5 Impedance protection

10.2.1

Resistive reach in forward direction To avoid load encroachment the resistive reach is limited in forward direction by setting the parameter RLdOutFw which is the outer resistive load boundary value while the inner resistive boundary is calculated according to equation 56.

RLdInFw = kLdRFw RLdOutFw


(Equation 56)

where: kLdRFw is a settable multiplication factor less than 1

The slope of the load encroachment inner and outer boundary is defined by setting the parameter LdAngle. The load encroachment in the fourth quadrant uses the same settings as in the first quadrant (same LdAngle and RLdOutFw and calculated RLdInFw). The quadrilateral characteristic in the first quadrant is tilted to get a better adaptation to the distance zones. The angle is the same as the line angle and derived from the setting of the reactive reach inner boundary X1InFw and the line resistance for the inner boundary R1LIn. The fault resistance coverage for the inner boundary is set by the parameter R1FInFw. From the setting parameter RLdOutFw and the calculated value RLdInFw a distance between the inner and outer boundary, Fw, is calculated. This value is valid for R direction in first and fourth quadrant and for X direction in first and second quadrant.
10.2.2 Resistive reach in reverse direction To avoid load encroachment in reverse direction the resistive reach is limited by setting the parameter RLdOutRv for the outer boundary of the load encroachment cone. The distance to the inner resistive load boundary RLdInRv is determined by using the setting parameter kLdRRv in equation 57.

RLdInRv = kLdRRv RLdOutRv


(Equation 57)

From the setting parameter RLdOutRv and the calculated value RLdInRv a distance between the inner and outer boundary, Rv, is calculated. This value is valid for R direction in second and third quadrant and for X direction in third and fourth quadrant. The inner resistive characteristic in the second quadrant outside the load encroachment part corresponds to the setting parameter R1FInRv for the inner boundary. The outer boundary is internally calculated as the sum of Rv+R1FInRv.

213

Power swing detection (RPSB, 78)

Chapter 5 Impedance protection

The inner resistive characteristic in the third quadrant outside the load encroachment zone consist of the sum of the settings R1FInRv and the line resistance R1LIn. The angle of the tilted lines outside the load encroachment is the same as the tilted lines in the first quadrant. The distance between the inner and outer boundary is the same as for the load encroachment in reverse direction i.e. Rv.
10.2.3 Reactive reach in forward and reverse direction The inner characteristic for the reactive reach in forward direction correspond to the setting parameter X1InFw and the outer boundary is defined as X1InFw + Fw,
where: Fw = RLdOutFw - KLdRFw RLdOutFw

The inner characteristic for the reactive reach in reverse direction correspond to the setting parameter X1InRv for the inner boundary and the outer boundary is defined as X1InRv + Rv.
where: Rv = RLdOutRv - KLdRRv RLdOutRv

10.2.4

Basic detection logic The operation of the function is only released if the magnitude of the current is above the setting of the min operating current, IMinPUPG.

The PSD function can operate in two operating modes: The "1-of-3" operating mode is based on detection of power swing in any of the three phases. Figure 124 presents a composition of a detection signal PSD-DET-A in this particular phase. The "2-of-3" operating mode is based on detection of power swing in at least two out of three phases. Figure 125 presents a composition of the detection signals DET1of3 and DET2of3.

Signals (external boundary) and ZINL1ZIN_A (internal boundary) in figure 124 are related to the operation of the impedance measuring elements in each phase separately. They are internal signals, calculated by the PSD-function. The tP1 timer in figure 124 serve as detection of initial power swings, which are usually not as fast as the later swings are. The tP2 timer become activated for the detection of the consecutive swings, if the measured impedance exit the operate area and returns within the time delay, set on the tW waiting timer. The upper part of figure 124 (input signal ZOUT_A, ZIN_A, AND-gates and tP-timers etc.) are duplicated for phase B and C. All tP1 and tP2 timers in the figure have the same settings.

214

Power swing detection (RPSB, 78)

Chapter 5 Impedance protection

ZOUTA ZINA

AND

0-tP1 0

OR -loop -loop AND OR AND PSD-DET-A

AND

0-tP2 0

ZOUTB ZOUTC

OR

PSD -detected

0 0-tW en05000113_ansi.vsd

Figure 124: Detection of power-swing in phase A

PSD-DET-A PSD-DET-B PSD-DET-C

OR

DET1of3 - int.

AND DET2of3 - int.

AND

OR

AND

en01000057_ansi.vsd

Figure 125: Detection of power-swing for 1-of-3 and 2-of-3 operating mode

215

Power swing detection (RPSB, 78)

Chapter 5 Impedance protection

ZOUT_A ZOUT_B ZOUT_C

OR ZIN_A AND ZIN_B ZIN_C OR

ZOUT

ZIN

TRSP I0CHECK

0 0-tGF

AND

BLK_I0

AND

10ms 0

OR

AND -loop BLK_SS BLOCK -loop DET1of3 - int. REL1PH BLK1PH DET2of3 - int. REL2PH BLK2PH EXT_PSD AND 0 0-tH

0-tR1 0

OR

INHIBIT

AND OR AND OR AND PICKUP 0-tH 0

en05000114_ansi.vsd

Figure 126: PSD function-simplified block diagram


10.2.5 Operating and inhibit conditions Figure 126 presents a simplified logic diagram for the PSD function. The internal signals DET1of3 and DET2of3 relate to the detailed logic diagrams in figure 124 and figure 125 respectively.

Selection of the operating mode is possible by the proper configuration of the functional input signals REL1PH, BLK1PH, REL2PH, and BLK2PH. The load encroachment characteristic can be switched off by setting the parameter OperationLdCh = Off, but notice that the Fw and Rv will still be calculated. The characteristic will in this case be only quadrilateral. There are four different ways to form the internal INHIBIT signal:

216

Power swing detection (RPSB, 78)

Chapter 5 Impedance protection

Logical 1 on functional input BLOCK inhibits the output PICKUP signal instantaneously. The INHIBIT internal signal is activated, if the power swing has been detected and the measured impedance remains within its operate characteristic for the time, which is longer than the time delay set on tR2 timer. It is possible to disable this condition by connecting the logical 1 signal to the BLK_SS functional input. The INHIBIT internal signal is activated after the time delay, set on tR1 timer, if an ground fault appears during the power swing (input IOCHECK is high) and the power swing has been detected before the ground fault (activation of the signal I0CHECK). It is possible to disable this condition by connecting the logical 1 signal to the BLK_I0 functional input. The INHIBIT logical signals becomes logical 1, if the functional input I0CHECK appears within the time delay, set on tGF timer and the impedance has been seen within the outer characteristic of the PSD operate characteristic in all three phases. This function prevents the operation of the PSD function in cases, when the circuit breaker closes onto persistent single-phase fault after single-pole auto-reclosing dead time, if the initial single-phase fault and single-pole opening of the circuit breaker causes the power swing in the remaining two phases.

10.3

Function block
PSD1ZMRPSB_78 I3P V3P BLOCK BLK_SS BLK_I0 BLK1PH REL1PH BLK2PH REL2PH I0CHECK TRSP EXT_PSD PICKUP ZOUT ZIN

en06000264_ansi.vsd

Figure 127: PSD function block

10.4

Input and output signals


Table 108: Input signals for the ZMRPSB_78 (PSD1-) function block
Signal I3P V3P BLOCK BLK_SS BLK_I0 Description Group signal for current input Group signal for voltage input Block of function Block inhibit of start output for slow swing condition Block inhibit of start output for subsequent residual current detection

217

Power swing detection (RPSB, 78)

Chapter 5 Impedance protection

Signal BLK1PH REL1PH BLK2PH REL2PH I0CHECK TRSP EXT_PSD

Description Block one-out-of-three-phase operating mode Release one-out-of-three-phase operating mode Block two-out-of-three-phase operating mode Release two-out-of-three-phase operating mode Residual current (3I0) detection used to inhibit power swing detection output Single-pole tripping command issued by tripping function Input for external detection of power swing

Table 109: Output signals for the ZMRPSB_78 (PSD1-) function block
Signal PICKUP ZOUT ZIN Description Power swing detected Measured impedance within outer impedance boundary Measured impedance within inner impedance boundary

10.5

Setting parameters
Table 110: Basic parameter group settings for the ZMRPSB_78 (PSD1-) function
Parameter Operation X1InFw R1LIn R1FInFw Range Disabled Enabled 0.10 - 3000.00 0.10 - 1000.00 0.10 - 1000.00 Step 0.01 0.01 0.01 Default Off 30.00 30.00 30.00 Unit ohm ohm ohm Description Disbled/Enabled operation Inner reactive boundary, forward Line resistance for inner characteristic angle Fault resistance coverage to inner resistive line, forward Inner reactive boundary, reverse Fault resistance line to inner resistive boundary, reverse Operation of load discrimination characteristic Outer resistive load boundary, forward Load angle determining load impedance area Outer resistive load boundary, reverse

X1InRv R1FInRv

0.10 - 3000.00 0.10 - 1000.00

0.01 0.01

30.00 30.00

ohm ohm

OperationLdCh RLdOutFw LdAngle RLdOutRv

Disabled Enabled 0.10 - 3000.00 5 - 70 0.10 - 3000.00

0.01 1 0.01

On 30.00 25 30.00

ohm Deg ohm

218

Power swing detection (RPSB, 78)

Chapter 5 Impedance protection

Parameter kLdRFw

Range 0.50 - 0.90

Step 0.01

Default 0.75

Unit Mult

Description Multiplication factor for inner resistive load boundary, forward Multiplication factor for inner resistive load boundary, reverse Timer for overcoming single-pole reclosing dead time Minimum operate current in % of IBase Base setting for current level settings

kLdRRv

0.50 - 0.90

0.01

0.75

Mult

tGF

0.000 - 60.000

0.001

3.000

IMinPUPG IBase

5 - 30 1 - 99999

1 1

10 3000

%IB A

Table 111: Advanced parameter group settings for the ZMRPSB_78 (PSD1-) function
Parameter tP1 tP2 Range 0.000 - 60.000 0.000 - 60.000 Step 0.001 0.001 Default 0.045 0.015 Unit s s Description Timer for detection of initial power swing Timer for detection of subsequent power swings Waiting timer for activation of tP2 timer Timer for holding power swing PICKUP output Timer giving delay to inhibit by the residual current Timer giving delay to inhibit at very slow swing

tW tH tR1

0.000 - 60.000 0.000 - 60.000 0.000 - 60.000

0.001 0.001 0.001

0.250 0.500 0.300

s s s

tR2

0.000 - 60.000

0.001

2.000

10.6

Technical data
Table 112: Power swing detection (RPSB, 78)
Function Reactive reach Range or value (0.10-3000.00) /phase Accuracy 2.0% static accuracy Conditions: Voltage range: (0.1-1.1) x Vn Current range: (0.5-30) x In Resistive reach Timers (0.101000.00) /loop (0.000-60.000) s Angle: at 0 degrees and 85 degrees 0.5% 10 ms

219

Power swing logic (RPSL, 78)

Chapter 5 Impedance protection

11

Power swing logic (RPSL, 78)


Function block name: PSL-ANSI number: IEC 61850 logical node name: ZMRPSL IEC 60617 graphical symbol:

11.1

Introduction
Power Swing Logic (RPSL) is a complementary function to Power Swing Detection (PSD) function. It provides possibility for selective tripping of faults on power lines during system oscillations (power swings or pole slips), when the distance protection function should normally be blocked. The complete logic consists of two different parts: Communication and tripping part. It provides selective tripping on the basis of special distance protection zones and a scheme communication logic, which are not blocked during the system oscillations. Blocking part. It blocks unwanted operation of instantaneous distance protection zone 1 for oscillations, which are initiated by faults and their clearing on the adjacent power lines and other primary elements.

11.2
11.2.1

Principle of operation
Communication and tripping logic Communication and tripping logic as used by the power swing distance protection zones is schematically presented in figure 128.

220

Power swing logic (RPSL, 78)

Chapter 5 Impedance protection

PUDOG AR1P1 PUPSD BLOCK CSUR

AND
CS

AND

0-tCS 0

AND

AND
0-tTrip 0 0 0-tBlkTr

BLKZMUR

PLTR_CRD CR

AND

OR

TRIP

en06000236_ansi.en

Figure 128: Simplified logic diagram power swing communication and tripping logic The complete logic remains blocked as long as there is a logical one on the BLOCK functional input signal. Presence of the logical one on the PUDOG functional input signal also blocks the logic as long as this block is not released by the logical one on the AR1P1 functional input signal. The functional output signal BLKZMUR remains logical one as long as the function is not blocked externally (BLOCK is logical zero) and the ground-fault is detected on protected line (PUDOG is logical one), which is connected in three-phase mode (AR1P1 is logical zero). Timer tBlkTr prolongs the duration of this blocking condition, if the measured impedance remains within the operate area of the PSD function (PUPSD input active). The BLKZMUR can be used to block the operation of the power-swing zones. Logical one on functional input CSUR, which is normally connected to the TRIP functional output of a power swing carrier sending zone, activates functional output CS, if the function is not blocked by one of the above conditions. It also activates the TRIP functional output. Initiation of the CS functional output is possible only, if the PUPSD input has been active longer than the time delay set on the security timer tCS. Simultaneous presence of the functional input signals CACC and CR (local trip condition) also activates the TRIP functional output, if the function is not blocked by one of the above conditions and the PUPSD signal has been present longer then the time delay set on the trip timer tTrip.
11.2.2 Blocking logic Figure 129 presents the logical circuits, which control the operation of the underreaching zone (zone 1) at power swings, caused by the faults and their clearance on the remote power lines.

221

Power swing logic (RPSL, 78)

Chapter 5 Impedance protection

AND AND
PUZMUR BLOCK PUZMOR PUZMPSD PUPSD BLKZMOR

AND AND

0-tZL 0 0-tDZ 0

AND OR

OR

PUZMURPS

AND
-loop

en06000237_ansi.vsd

Figure 129: Control of underreaching distance protection (Zone 1) at power swings caused by the faults and their clearance on adjacent lines and other system elements The logic is disabled by a logical one on functional inputBLOCK. It can start only if the following conditions are simultaneously fulfilled: PUPSD functional input signal must be a logical zero. This means, that the PSD function must not detect power swinging over the protected power line. PUZMPSD functional input must be a logical one. This means that the impedance must be detected within the external boundary of the PSD function. PUZMOR functional input must be a logical one. This means that the fault must be detected by the overreaching distance protection zone, for example zone 2.

The PUZMLL functional output, which can be used in complete terminal logic instead of a normal distance protection zone 1, becomes active under the following conditions: If the PUZMUR signal appears at the same time as the PUZMOR or if it appears with a time delay, which is shorter than the time delay set on timer tDZ. If the PUZMUR signal appears after the PUZMOR signal with a time delay longer than the delay set on the tDZ timer, and remains active longer than the time delay set on the tZL timer.

The BLKZMH functional output signal can be used to block the operation of the higher distance protection zone, if the fault has moved into the zone 1 operate area after tDZ time delay.

222

Power swing logic (RPSL, 78)

Chapter 5 Impedance protection

11.3

Function block
PSL1ZMRPSL BLOCK PUZMUR PUZMOR PUPSD PUDOG PUZMPSD PLTR_CRD AR1P1 CSUR CR TRIP PUZMURPS BLKZMUR BLKZMOR CS

en07000026_ansi.vsd

Figure 130: PSL function block

11.4

Input and output signals


Table 113: Input signals for the ZMRPSL (PSL1-) function block
Signal Description

BLOCK PUZMUR PUZMOR PUPSD PUDOG PUZMPSD PLTR_CRD AR1P1 CSUR CR

Block of function Pickup of the underreaching zone Pickup of the overreaching zone Power swing detected Pickup from ground Fault Protection in forward or reverse direction Operation of Power Swing Detection external characteristic Overreaching ZM zone to be accelerated Single pole auto-reclosing in progress Carrier send by the underreaching power-swing zone Carrier receive signal during power swing detection operation

Table 114: Output signals for the ZMRPSL (PSL1-) function block
Signal Description

TRIP PUZMURPS BLKZMUR BLKZMOR CS

Trip through Power Swing Logic Pickup of Underreaching zone controlled by PSL to be used in configuration Block trip of underreaching impedance zone Block trip of overreaching distance protection zones Carrier send signal controlled by the power swing

223

Power swing logic (RPSL, 78)

Chapter 5 Impedance protection

11.5

Setting parameters
Table 115: Basic parameter group settings for the ZMRPSL (PSL1-) function
Parameter Range Step Default Unit Description

Operation tDZ

Disabled Enabled 0.000 - 60.000

0.001

Off 0.050

Disable/Enable Operation Permitted max oper time diff between higher and lower zone Delay for oper of underreach zone with detected diff in oper time Conditional timer for sending the CS at power swings Conditional timer for tripping at power swings Timer for blocking the overreaching zones trip

tDZMUR

0.000 - 60.000

0.001

0.200

tCS

0.000 - 60.000

0.001

0.100

tTrip tBlkTr

0.000 - 60.000 0.000 - 60.000

0.001 0.001

0.100 0.300

s s

11.6

Technical data

224

Pole Slip protection (PPAM, 78)

Chapter 5 Impedance protection

12

Pole Slip protection (PPAM, 78)


Function block name: ANSI number: 78 IEC 61850 logical node name: IEC 60617 graphical symbol:

<

12.1

Introduction
Sudden events in an electrical power system such as large changes in load, fault occurrence or fault clearance, can cause power oscillations referred to as power swings. In a non-recoverable situation, the power swings become so severe that the synchronism is lost, a condition referred to as pole slipping. The main purpose of the pole slip protection is to detect, evaluate, and take the required action for pole slipping occurrences in the power system. The electrical system parts swinging to each other can be separated with the line/s closest to the centre of the power swing allowing the two systems to be stable as separated islands.

12.2

Principle of operation
If the generator is faster than the power system, the rotor movement in the impedance and voltage diagram is from right to left and generating is signalled. If the generator is slower than the power system, the rotor movement is from left to right and motoring is signalled (the power system drives the generator as if it were a motor). The movements in the impedance plain can be seen in figure 131. The transient behaviour is described by the transient e.m.f's EA and EB, and by X'd, XT and the transient system impedance Z S.

225

Pole Slip protection (PPAM, 78)

Chapter 5 Impedance protection

Zone 1 EB Xd REG 670 jX XT

Zone 2 XS EA

A XS

Pole slip impedance movement

XT

Apparent generator impedance

Xd B

en06000437.vsd

where: X'd XT ZS = = = transient reactance of the generator short-circuit reactance of the step-up transformer impedance of the power system A

Figure 131: Movements in the impedance plain The detection of rotor angle is enabled when: the minimum current exceeds 0.10 IN (IN is IBase parameter set under general setting). the maximum voltage falls below 0.92 UBase

226

Pole Slip protection (PPAM, 78)

Chapter 5 Impedance protection

the voltage Ucos (the voltage in phase with the generator current) has an angular velocity of 0.2...8 Hz and the corresponding direction is not blocked.

en07000004.vsd

Figure 132: Different generator quantities as function of the angle between the equivalent generators An alarm is given when movement of the rotor is detected and the rotor angle exceeds the angle set for 'WarnAngle'. Slipping is detected when: a change of rotor angle of min. 50 ms is recognized the slip line is crossed between ZA and ZB.

When the impedance crosses the slip line between ZB and ZC it counts as being in zone 1 and between ZC and ZA in zone 2. The entire distance ZA-ZB becomes zone 1 when 'EnableZone1' is enabled (external device detects the direction of the centre of slipping). After the first slip, the signals 'Zone1' or 'Zone2' and depending on the direction of slip - either 'Generator' or 'Motor' are issued. Every time pole slipping is detected, the impedance of the point where the slip line is crossed and the instantaneous slip frequency are displayed as measurements.

227

Pole Slip protection (PPAM, 78)

Chapter 5 Impedance protection

Further slips are only detected, if they are in the same direction and if the rate of rotor movement has reduced in relation to the preceding slip or the slip line is crossed in the opposite direction outside ZA-ZB. A further slip in the opposite direction within ZA-ZB resets all the signals and is then signalled itself as a first slip. The 'Trip1' tripping command and signal are generated after n1 slips in zone 1, providing the rotor angle is less than 'TripAngle'. The 'Trip2' signal is generated after n2 slips in zone 2, providing the rotor angle is less than 'TripAngle'. All signals are reset if: the direction of movement reverses the rotor angle detector resets without a slip being counted or no rotor relative movement was detected during the time 't-Reset'.

Imin > 0.10 IBase

Vcos < 0.92 VBase

AND AND PICKUP

0.2 Slip.Freq. 8 Hz

startAngle ZONE1

Z cross line ZA - ZC

AND

Z cross line ZC - ZB

AND

ZONE2

Counter N1Limit a b ab AND TRIP1

tripAngle Counter N2Limit a b ab AND

OR

TRIP

TRIP2

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Figure 133: Simplified logic diagram for pole slip protection

228

Pole Slip protection (PPAM, 78)

Chapter 5 Impedance protection

12.3

Function block
PSP1PSPPPAM_78 I3P V3P BLOCK BLKGEN BLKMOTOR EXTZONE1 TRIP TRIP1 TRIP2 PICKUP ZONE1 ZONE2 GEN MOTOR SFREQ SLIPZOHM SLIPZPER UCOSKV UCOSPER en07000030_ansi.vsd

Figure 134: PSP function block

12.4

Input and output signals


Table 116: Input signals for the PSPPPAM_78 (PSP1-) function block
Signal Description

I3P V3P BLOCK BLKGEN BLKMOTOR EXTZONE1

Current group connection Voltage group connection Block of function Block operation in generating direction Block operation in motor direction Extension of zone1 with zone2 region

Table 117: Output signals for the PSPPPAM_78 (PSP1-) function block
Signal Description

TRIP TRIP1 TRIP2 PICKUP ZONE1 ZONE2 GEN MOTOR

Common trip signal Trip1 after the N1Limit slip in zone1 Trip2 after the N2Limit slip in zone2 Common start signal First slip in zone1 region First slip in zone2 region Generator is faster then the system Generator is slower then the system

229

Pole Slip protection (PPAM, 78)

Chapter 5 Impedance protection

Signal

Description

SFREQ SLIPZOHM SLIPZPER VCOSKV VCOSPER

Slip frequency Slip impedance in ohms Slip impedance in percent of ZBase VCosPhi voltage in kV VCosPhi voltage in percent of VBase

12.5

Setting parameters
Table 118: Basic general settings for the PSPPPAM_78 (PSP1-) function
Parameter Range Step Default Unit Description

IBase

0.1 - 99999.9

0.1

3000.0

Base Current (primary phase current in Amperes) Base Voltage (primary phase-to-phase voltage in kV) Measuring mode (PosSeq, AB, BC, CA)

Vbase

0.1 - 9999.9

0.1

20.0

kV

MeasureMode

PosSeq AB BC CA No Yes

PosSeq

InvertCTcurr

No

Invert current direction

Table 119: Basic parameter group settings for the PSPPPAM_78 (PSP1-) function
Parameter Range Step Default Unit Description

Operation OperationZ1 OperationZ2 ImpedanceZA ImpedanceZB ImpedanceZC

Disabled Enabled Disabled Enabled Disabled Enabled 0.00 - 1000.00 0.00 - 1000.00 0.00 - 1000.00

0.01 0.01 0.01

Disabled Enabled Enabled 10.00 10.00 10.00

% % %

Operation Enable / Disable Operation Enable/Disable zone Z1 Operation Enable/Disable zone Z2 Forward impedance in % of Zbase Reverse impedance in % of Zbase Impedance of zone1 limit in % of Zbase

230

Pole Slip protection (PPAM, 78)

Chapter 5 Impedance protection

Parameter

Range

Step

Default

Unit

Description

AnglePhi StartAngle TripAngle N1Limit N2Limit

72.00 - 90.00 0.0 - 180.0 0.0 - 180.0 1 - 20 1 - 20

0.01 0.1 0.1 1 1

85.00 110.0 90.0 1 3

Deg Deg Deg -

Angle of the slip impedance line Rotor angle for the pickup signal Rotor angle for the trip1 and trip2 signals Count limit for the trip1 signal Count limit for the trip2 signal

Table 120: Advanced parameter group settings for the PSPPPAM_78 (PSP1-) function
Parameter Range Step Default Unit Description

ResetTime

0.000 - 60.000

0.001

5.000

Time without slip to reset all signals

12.6

Technical data
Table 121: Pole slip protection (PPAM, 78)
Function Range or value Accuracy 2.0% of Vn/In 5.0 degrees 5.0 degrees

Impedance reach Characteristic angle Start and trip angles Zone 1 and Zone 2 trip counters

(0.001000.00)% of Zbase (72.0090.00) degrees (0.0180.0) degrees (1-20)

231

Automatic switch onto fault logic, voltage and current based (SFCV)

Chapter 5 Impedance protection

13

Automatic switch onto fault logic, voltage and current based (SFCV)
Function block name: SFV-ANSI number: IEC 61850 logical node name: IEC 60617 graphical symbol:

ZCVPSOF

13.1

Introduction
Automatic switch onto fault logic is a function that gives an instantaneous trip at closing of breaker onto a fault. A dead line detection check is provided to activate the function when the line is dead. Mho distance protections can not operate for switch on to fault condition when the phase voltages are close to zero. An additional logic based on VI Level is used for this purpose.

13.2

Principle of operation
The switch-onto-fault function (SFV) can be activated externally by Breaker Closed Input or internally (automatically) by using VI Level Based Logic see figure 135. The activation from the DLD function is released if the internal signal DeadLine from the VILevel function is activated at the same time as the input ZACC is not activated during at least for a duration tDLD and the setting parameter AutoInit is set to On. When the setting AutoInit is Off the function is activated by an external binary input BC. To get a trip also one of the following operation modes must be selected by the parameter Mode: Mode = Impedance; trip is released if the input ZACC is activated (normal connected to non directional distance protection zone) Mode = VILevel; trip is released if VILevel detector is activated Mode = Both; trip is initiated based on impedance measured criteria or VILevel detection The internal signal DeadLine from the VILevel detector is activated if all three phase currents and voltages are below the setting IPhPickup and UVPickup. VI Level based measurement detects the switch onto fault condition even though the voltage is very low. The logic is based on current change for activation, current level and voltage level. The internal signal SOTFLevel is activated if the phase voltage and corresponding phase current is below the setting IPhPickup and UVPickup in any phase. First of all AutoInit= On is not needed (or in some cases not even wanted) for external activation and secondly the information is already present in the first sentence of "Principle of operation" The function is released during a settable time tSOTF.

232

Automatic switch onto fault logic, voltage and current based (SFCV)

Chapter 5 Impedance protection

The function can be blocked by activating the input BLOCK.

BLOCK
AND 0
15

TRIP

BC

AutiInit=On ZACC
OR

AND

200 0

0 1000

IL1 IL2 IL3 VA VB VC IphPickup


VILevel detector

deadLine

SOTFVILevel

VphPickup

AND

Mode = Impedance

AND

Mode = UILevel
OR

OR

AND

Mode = UILvl&Imp

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233

Automatic switch onto fault logic, voltage and current based (SFCV)

Chapter 5 Impedance protection

Figure 135: Simplified logic diagram for current and voltage based switch onto fault logic.

13.3

Function block
SFV1ZCVPSOF I3P V3P BLOCK BC ZACC TRIP

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Figure 136: SFV1 function block

13.4

Input and output signals


Table 122: Input signals for the ZCVPSOF (SFV1-) function block
Signal Description

I3P V3P BLOCK BC ZACC

Current DFT Voltage DFT Block of function External enabling of SOTF Distance zone to be accelerated by SOTF

Table 123: Output signals for the ZCVPSOF (SFV1-) function block
Signal Description

TRIP

Trip by pilot communication scheme logic

13.5

Setting parameters
Table 124: Basic parameter group settings for the ZCVPSOF (SFV1-) function
Parameter Range Step Default Unit Description

Operation IBase VBase Mode

Disabled Enabled 1 - 99999 0.05 - 2000.00 Impedance VILevel VILvl&Imp Disabled Enabled

1 0.05 -

Enabled 3000 400.00 VILevel

A kV -

Disable/Enable Operation Base current (A) Base voltage Ph-Ph (kV) Mode of operation of SOTF Function Automatic switchonto fault initialization

AutoInit

Disabled

234

Automatic switch onto fault logic, voltage and current based (SFCV)

Chapter 5 Impedance protection

Parameter

Range

Step

Default

Unit

Description

IphPickup

1 - 100

20

%IB

Current level for detection of dead line in % of IBase Voltage level for detection of dead line in % of VBase Time delay for VI detection (s) Drop off delay time of switch onto fault function Delay time for activation of dead line detection

UVPickup

1 - 100

70

%VB

tDuration tSOTF tDLD

0.000 - 60.000 0.000 - 60.000 0.000 - 60.000

0.001 0.001 0.001

0.020 1.000 0.200

s s s

13.6

Technical data
Table 125: Automatic switch onto fault logic, voltage and current based (PSOF)
Parameter Range or value Accuracy 1.0% of Vn 1.0% of In 0.5% 10 ms 0.5% 10 ms

Operate voltage, detection of dead line Operate current, detection of dead line

(1100)% of Vbase (1100)% of Ibase

Delay following dead line detection input before SOTF (0.00060.000) s function is automatically enabled Time period after circuit breaker closure in which SOTF function is active (0.00060.000) s

235

Automatic switch onto fault logic, voltage and current based (SFCV)

Chapter 5 Impedance protection

236

About this chapter

Chapter 6 Current protection

Chapter 6 Current protection


About this chapter This chapter describes current protection functions. These include functions like Instantaneous phase overcurrent protection, Four step phase overcurrent protection, Pole discrepancy protection and Residual overcurrent protection.

237

Instantaneous phase overcurrent protection (PIOC, 50)

Chapter 6 Current protection

Instantaneous phase overcurrent protection (PIOC, 50)


Function block name: IOCxANSI number: 50 IEC 61850 logical node name: IEC 60617 graphical symbol:

PHPIOC

3I>>

1.1

Introduction
The instantaneous three phase overcurrent function has a low transient overreach and short tripping time to allow use as a high set short-circuit protection function, with the reach limited to less than typical eighty percent of the fault current line at minimum source impedance.

1.2

Principle of operation
The sampled analog phase currents are pre-processed in a discrete Fourier filter (DFT) block. From the fundamental frequency components of each phase current the RMS value of each phase current is derived. These phase current values are fed to the IOC function. In a comparator the RMS values are compared to the set operation current value of the function (50). If a phase current is larger than the set operation current a signal from the comparator for this phase is set to true. This signal will, without delay, activate the output signal TR_x(x=A, B or C) for this phase and the TRIP signal that is common for all three phases. There is an operation mode (OpModeSel) setting: 1 out of 3 or 2 out of 3. If the parameter is set to 1 out of 3 any phase trip signal will be activated. If the parameter is set to 2 out of 3 at least two phase signals must be activated for trip. There is also a possibility to activate a preset change of the set operation current (MultPU) via a binary input (MULTPU). In some applications the operation value needs to be changed, for example due to transformer inrush currents. The function can be blocked from the binary input BLOCK.

1.3

Function block
IOC1PHPIOC_50 I3P BLOCK MULTPU TRIP TR_A TR_B TR_C

en04000391_ansi.vsd

Figure 137: IOC function block

238

Instantaneous phase overcurrent protection (PIOC, 50)

Chapter 6 Current protection

1.4

Input and output signals


Table 126: Input signals for the PHPIOC_50 (IOC1-) function block
Signal Description

I3P BLOCK MULTPU

Three phase current Block of function Enable current pickup value multiplier

Table 127: Output signals for the PHPIOC_50 (IOC1-) function block
Signal Description

TRIP TR_A TR_B TR_C

Trip signal from any phase Trip signal from phase A Trip signal from phase B Trip signal from phase C

1.5

Setting parameters
Table 128: Basic parameter group settings for the PHPIOC_50 (IOC1-) function
Parameter Range Step Default Unit Description

Operation IBase OpModeSel Pickup

Disabled Enabled 1 - 99999 2 out of 3 1 out of 3 1 - 2500

1 1

Off 3000 1 out of 3 200

A %IB

Disable/Enable Operation Base current Select operation mode (2 of 3 / 1 of 3) Phase current pickup in % of IBase

Table 129: Advanced parameter group settings for the PHPIOC_50 (IOC1-) function
Parameter Range Step Default Unit Description

MultPU

0.5 - 5.0

0.1

1.0

Multiplier for operate current level

239

Instantaneous phase overcurrent protection (PIOC, 50)

Chapter 6 Current protection

1.6

Technical data
Table 130: Instantaneous phase overcurrent protection (PIOC, 50)
Function Range or value Accuracy 1.0% of In at I In 1.0% of I at I > In

Operate current

(1-2500)% of lbase > 95% 25 ms typically at 0 to 2 x Iset 25 ms typically at 2 to 0 x Iset 10 ms typically at 0 to 2 x Iset 10 ms typically at 0 to 10 x Iset 35 ms typically at 10 to 0 x Iset 2 ms typically at 0 to 10 x Iset < 5% at = 100 ms

Reset ratio Operate time Reset time Critical impulse time Operate time Reset time Critical impulse time Dynamic overreach

240

Four step phase overcurrent protection (PTOC, 51_67)

Chapter 6 Current protection

Four step phase overcurrent protection (PTOC, 51_67)


Function block name: TOCxANSI number: 51/67 IEC 61850 logical node name: IEC 60617 graphical symbol:

OC4PTOC

3I> 4 4 alt

2.1

Introduction
The four step phase overcurrent function has an inverse or definite time delay independent for each step separately. All IEC and ANSI time delayed characteristics are available together with an optional user defined time characteristic. The function can be set to be directional or non-directional independently for each of the steps.

2.2

Principle of operation
The function is divided into four different sub-functions, one for each step. For each step x an operation mode is set (DirModeSelx, x=1, 2, 3 or 4): Off/Non-directional/Forward/Reverse. The protection design can be decomposed in four parts: The direction element, indicates the over current fault direction The harmonic Restraint Blocking function The 4 step over current function The Mode Selection

Note!
If VT inputs are not available or not connected, func parameter DirModeSelx shall be left to default value, Non-directional.

241

Four step phase overcurrent protection (PTOC, 51_67)

Chapter 6 Current protection

faultState I3P V3P

Direction Element

dirPhAFlt dirPhBFlt dirPhCFlt

4 step over current element One element for each step

faultState

PICKUP

TRIP

I3P

Harmonic Restraint Element

harmRestrBlock

enableDir Mode Selection enableStep1-4 DirectionalMode1-4

en05000740_ansi.vsd

Figure 138: Functional overview of TOC. A common setting for all steps, StPhaseSel, is used to specify the number of phase currents to be high to enable operation. The settings can be chosen: 1 out of 3, 2 out of 3 or 3 out of 3. The sampled analog phase currents are pre-processed in a pre-processing function blocks. By a parameter setting within the general settings for the TOC function it is then possible to select type of measurement which shall be used by TOC function for all overcurrent stages. It is possible to select either discrete Fourier filter (DFT) or true RMS filer (RMS). If DFT option is selected then only the RMS value of the fundamental frequency components of each phase current is derived. Influence of DC current component and higher harmonic current components are almost completely suppressed. If RMS option is selected then the true RMS values is used. The true RMS value in addition to the fundamental frequency component includes the contribution from the current DC component as well as from higher current harmonic. The selected current values are fed to the TOC function. In a comparator, for each phase current, the DFT or RMS values are compared to the set operation current value of the function (Pickup1, Pickup2, Pickup3, Pickup4). If a phase current is larger than the set operation current a signal from the comparator for this phase and step is set to true. This signal will, without delay, activate the output signal Pickup for this phase/step, the Pickup signal common for all three phases for this step and a common Pickup signal. It shall be noted that the selection of measured value (i.e. DFT or

242

Four step phase overcurrent protection (PTOC, 51_67)

Chapter 6 Current protection

RMS) do not influence the operation of directional part of TOC function. Service value for individually measured phase currents are available from the TOC function. This feature simplifies testing, commissioning and in service operational checking of the function. A harmonic restrain of the function can be chosen. A set 2nd harmonic current in relation to the fundamental current is used. The 2nd harmonic current is taken from the pre-processing of the phase currents and the relation is compared to a set restrain current level. The function can use a directional option. The direction of the fault current is given as current angle in relation to the voltage angle. The fault current and fault voltage for the directional function is dependent of the fault type. To enable directional measurement at close in faults, causing low measured voltage, the polarization voltage is a combination of the apparent voltage (85%) and a memory voltage (15%). The following combinations are used.
Phase-phase short circuit:
Vref_AB = VA-VB Idir_AB = IA-IB Vref_BC = VB-VC Idir_BC = IB-IC Vref_CA = VCVA Idir_CA = IC-IA

Phase-ground short circuit:


Vref_A = VA Idir_A = IA Vref_B = VB Idir_B = IB Vref_C = VC IdirC = IC

The directional setting is given as a characteristic angle AngleRCA for the function and an angle window AngleROA.

243

Four step phase overcurrent protection (PTOC, 51_67)

Chapter 6 Current protection

Reverse

Vref RCA

ROA

ROA

Forward

Idir

en05000745_ansi.vsd

Figure 139: Directional characteristic of the phase overcurrent protection The default value of AngleRCA is 65. The parameters AngleROA gives the angle sector from AngleRCA for directional borders. A minimum current for directional phase pickup current signal can be set: PUMinOpPhSel. If no blockings are given the pickup signals will start the timers of the step. The time characteristic for each step can be chosen as definite time delay or some type of inverse time characteristic. A wide range of standardized inverse time characteristics is available. It is also possible to create a tailor made time characteristic. The possibilities for inverse time characteristics are described in chapter 21 "Time inverse characteristics". Different types of reset time can be selected as described in chapter21 "Time inverse characteristics". There is also a possibility to activate a preset change (,MultiPUx, x= 1, 2, 3 or 4) of the set operation current via a binary input (enable multiplier). In some applications the operation value needs to be changed, for example due to changed network switching state. The function can be

244

Four step phase overcurrent protection (PTOC, 51_67)

Chapter 6 Current protection

blocked from the binary input BLOCK. The pickup signals from the function can be blocked from the binary input BLK. The trip signals from the function can be blocked from the binary input BLKTR.

2.3

Function block
TOC1OC4PTOC_51_67 I3P V3P BLOCK BLKTR BLK1 BLK2 BLK3 BLK4 MULTPU1 MULTPU2 MULTPU3 MULTPU4 TRIP TRST1 TRST2 TRST3 TRST4 TR_A TR_B TR_C TRST1_A TRST1_B TRST1_C TRST2_A TRST2_B TRST2_C TRST3_A TRST3_B TRST3_C TRST4_A TRST4_B TRST4_C PICKUP PU_ST1 PU_ST2 PU_ST3 PU_ST4 PU_A PU_B PU_C PU_ST1_A PU_ST1_B PU_ST1_C PU_ST2_A PU_ST2_B PU_ST2_C PU_ST3_A PU_ST3_B PU_ST3_C PU_ST4_A PU_ST4_B PU_ST4_C 2NDHARM DIR_A DIR_B DIR_C en06000187_ansi.vsd

Figure 140: TOC function block

245

Four step phase overcurrent protection (PTOC, 51_67)

Chapter 6 Current protection

2.4

Input and output signals


Table 131: Input signals for the OC4PTOC_51_67 (TOC1-) function block
Signal Description

I3P V3P BLOCK BLKTR BLK1 BLK2 BLK3 BLK4 MULTPU1 MULTPU2 MULTPU3 MULTPU4

Group signal for current input Group signal for voltage input Block of function Block of trip Block of Step1 Block of Step2 Block of Step3 Block of Step4 When activated, the pickup multiplier is in use for step1 When activated, the pickup multiplier is in use for step2 When activated, the pickup multiplier is in use for step3 When activated, the pickup multiplier is in use for step4

Table 132: Output signals for the OC4PTOC_51_67 (TOC1-) function block
Signal Description

TRIP TRST1 TRST2 TRST3 TRST4 TR_A TR_B TR_C TRST1_A TRST1_B TRST1_C TRST2_A TRST2_B TRST2_C TRST3_A TRST3_B TRST3_C TRST4_A TRST4_B TRST4_C PICKUP

Trip Common trip signal from step1 Common trip signal from step2 Common trip signal from step3 Common trip signal from step4 Trip signal from phase A Trip signal from phase B Trip signal from phase C Trip signal from step1 phase A Trip signal from step1 phase B Trip signal from step1 phase C Trip signal from step2 phase A Trip signal from step2 phase B Trip signal from step2 phase C Trip signal from step3 phase A Trip signal from step3 phase B Trip signal from step3 phase C Trip signal from step4 phase A Trip signal from step4 phase B Trip signal from step4 phase C General pickup signal

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Chapter 6 Current protection

Signal

Description

PU_ST1 PU_ST2 PU_ST3 PU_ST4 PU_A PU_B PU_C PU_ST1_A PU_ST1_B PU_ST1_C PU_ST2_A PU_ST2_B PU_ST2_C PU_ST3_A PU_ST3_B PU_ST3_C PU_ST4_A PU_ST4_B PU_ST4_C 2NDHARM DIR_A DIR_B DIR_C

Common pickup signal from step1 Common pickup signal from step2 Common pickup signal from step3 Common pickup signal from step4 Pickup signal from phase A Pickup signal from phase B Pickup signal from phase C Pickup signal from step1 phase A Pickup signal from step1 phase B Pickup signal from step1 phase C Pickup signal from step2 phase A Pickup signal from step2 phase B Pickup signal from step2 phase C Pickup signal from step3 phase A Pickup signal from step3 phase B Pickup signal from step3 phase C Pickup signal from step4 phase A Pickup signal from step4 phase B Pickup signal from step4 phase C Block from second harmonic detection Direction for phase A Direction for phase B Direction for phase C

2.5

Setting parameters
Table 133: Basic general settings for the OC4PTOC_51_67 (TOC1-) function
Parameter Range Step Default Unit Description

MeasType

DFT RMS

DFT

Selection between DFT and RMS measurement

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Chapter 6 Current protection

Table 134: Basic parameter group settings for the OC4PTOC_51_67 (TOC1-) function
Parameter Range Step Default Unit Description

Operation IBase Vbase AngleRCA AngleROA NumPhSel

Disabled Enabled 1 - 99999 0.05 - 2000.00 40 - 65 40 - 89 Not Used 1 out of 3 2 out of 3 3 out of 3 Disabled Non-directional Forward Reverse ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500

1 0.05 1 1 -

Disabled 3000 400.00 55 80 1 out of 3

A kV Deg Deg -

Disable/Enable Operation Base current Base voltage Relay characteristic angle (RCA) Relay operation angle (ROA) Number of phases required for phase selection (1 of 3, 2 of 3, 3 of 3)

DirModeSel1

Non-directional

Directional mode of step 1 (Disabled, Nondir, Forward, Reverse) Selection of time delay curve type for step 1

Characterist1

ANSI Def. Time

Pickup1

1000

%IB

Phase current operate level for step1 in % of IBase Definitive time delay of step 1 Time multiplier for the inverse time delay for step 1 Minimum operate time for inverse curves for step 1

t1 TD1

0.000 - 60.000 0.05 - 999.00

0.001 0.01

0.000 0.05

s -

t1Min

0.000 - 60.000

0.001

0.000

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Four step phase overcurrent protection (PTOC, 51_67)

Chapter 6 Current protection

Parameter

Range

Step

Default

Unit

Description

MultPU1 DirModeSel2

1.0 - 10.0 Disabled Non-directional Forward Reverse ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500

0.1 -

2.0 Non-directional

Multiplier for current operate level for step 1 Directional mode of step 2 (Disabled, Nondir, Forward, Reverse)

Characterist2

ANSI Def. Time

Selection of time delay curve type for step 2

Pickup2

500

%IB

Phase current operate level for step2 in % of IBase Definitive time delay of step 2 Time multiplier for the inverse time delay for step 2 Multiplier for current operate level for step 2 Minimum operate time for inverse curves for step 2 Directional mode of step 3 (Disabled, Nondir, Forward, Reverse)

t2 TD2

0.000 - 60.000 0.05 - 999.00

0.001 0.01

0.400 0.05

s -

MultPU2 t2Min DirModeSel3

1.0 - 10.0 0.000 - 60.000 Disabled Non-directional Forward Reverse

0.1 0.001 -

2.0 0.000 Non-directional

s -

249

Four step phase overcurrent protection (PTOC, 51_67)

Chapter 6 Current protection

Parameter

Range

Step

Default

Unit

Description

Characterist3

ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500

ANSI Def. Time

Selection of time delay curve type for step 3

Pickup3

250

%IB

Phase current operate level for step3 in % of IBase Definitive time delay of step 3 Time multiplier for the inverse time delay for step 3 Minimum operate time for inverse curves for step 3 Multiplier for current operate level for step 3 Directional mode of step 4 (Disabled, Nondir, Forward, Reverse)

t3 TD3

0.000 - 60.000 0.05 - 999.00

0.001 0.01

0.800 0.05

s -

t3Min MultPU3 DirModeSel4

0.000 - 60.000 1.0 - 10.0 Disabled Non-directional Forward Reverse

0.001 0.1 -

0.000 2.0 Non-directional

s -

250

Four step phase overcurrent protection (PTOC, 51_67)

Chapter 6 Current protection

Parameter

Range

Step

Default

Unit

Description

Characterist4

ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500

ANSI Def. Time

Selection of time delay curve type for step 4

Pickup4

175

%IB

Phase current operate level for step4 in % of IBase Definitive time delay of step 4 Time multiplier for the inverse time delay for step 4 Minimum operate time for inverse curves for step 4 Multiplier for current operate level for step 4

t4 TD4

0.000 - 60.000 0.05 - 999.00

0.001 0.01

2.000 0.05

s -

t4Min MultPU4

0.000 - 60.000 1.0 - 10.0

0.001 0.1

0.000 2.0

s -

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Chapter 6 Current protection

Table 135: Advanced parameter group settings for the OC4PTOC_51_67 (TOC1-) function
Parameter Range Step Default Unit Description

PUMinOpPhSel

1 - 100

%IB

Minimum current for phase selection in % of IBase Pickup of second harm restraint in % of Fundamental Selection of reset curve type for step 1 Reset time delay used in IEC Definite Time curve step 1 Parameter P for customer programmable curve for step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1 Parameter PR for customer programmable curve for step 1 Parameter TR for customer programmable curve for step 1 Parameter CR for customer programmable curve for step 1 Enable block of step 1 from harmonic restrain Selection of reset curve type for step 2 Reset time delay used in IEC Definite Time curve step 2 Parameter P for customer programmable curve for step 2 Parameter A for customer programmable curve for step 2

2ndHarmStab

5 - 100

20

%IB

ResetTypeCrv1

Instantaneous IEC Reset ANSI reset 0.000 - 60.000

Instantaneous

tReset1

0.001

0.020

tPCrv1

0.005 - 3.000

0.001

1.000

tACrv1

0.005 - 200.000

0.001

13.500

tBCrv1

0.00 - 20.00

0.01

0.00

tCCrv1

0.1 - 10.0

0.1

1.0

tPRCrv1

0.005 - 3.000

0.001

0.500

tTRCrv1

0.005 - 100.000

0.001

13.500

tCRCrv1

0.1 - 10.0

0.1

1.0

HarmRestrain1 ResetTypeCrv2

Disabled Enabled Instantaneous IEC Reset ANSI reset 0.000 - 60.000

Disabled Instantaneous

tReset2

0.001

0.020

tPCrv2

0.005 - 3.000

0.001

1.000

tACrv2

0.005 - 200.000

0.001

13.500

252

Four step phase overcurrent protection (PTOC, 51_67)

Chapter 6 Current protection

Parameter

Range

Step

Default

Unit

Description

tBCrv2

0.00 - 20.00

0.01

0.00

Parameter B for customer programmable curve for step 2 Parameter C for customer programmable curve for step 2 Parameter PR for customer programmable curve for step 2 Parameter TR for customer programmable curve for step 2 Parameter CR for customer programmable curve for step 2 Enable block of step 2 from harmonic restrain Selection of reset curve type for step 3 Reset time delay used in IEC Definite Time curve step 3 Parameter P for customer programmable curve for step 3 Parameter A for customer programmable curve for step 3 Parameter B for customer programmable curve for step 3 Parameter C for customer programmable curve for step 3 Parameter PR for customer programmable curve for step 3 Parameter TR for customer programmable curve for step 3 Parameter CR for customer programmable curve for step 3 Enable block of step3 from harmonic restrain

tCCrv2

0.1 - 10.0

0.1

1.0

tPRCrv2

0.005 - 3.000

0.001

0.500

tTRCrv2

0.005 - 100.000

0.001

13.500

tCRCrv2

0.1 - 10.0

0.1

1.0

HarmRestrain2 ResetTypeCrv3

Disabled Enabled Instantaneous IEC Reset ANSI reset 0.000 - 60.000

Disabled Instantaneous

tReset3

0.001

0.020

tPCrv3

0.005 - 3.000

0.001

1.000

tACrv3

0.005 - 200.000

0.001

13.500

tBCrv3

0.00 - 20.00

0.01

0.00

tCCrv3

0.1 - 10.0

0.1

1.0

tPRCrv3

0.005 - 3.000

0.001

0.500

tTRCrv3

0.005 - 100.000

0.001

13.500

tCRCrv3

0.1 - 10.0

0.1

1.0

HarmRestrain3

Disabled Enabled

Disabled

253

Four step phase overcurrent protection (PTOC, 51_67)

Chapter 6 Current protection

Parameter

Range

Step

Default

Unit

Description

ResetTypeCrv4

Instantaneous IEC Reset ANSI reset 0.000 - 60.000

Instantaneous

Selection of reset curve type for step 4 Reset time delay used in IEC Definite Time curve step 4 Parameter P for customer programmable curve for step 4 Parameter A for customer programmable curve for step 4 Parameter B for customer programmable curve for step 4 Parameter C for customer programmable curve for step 4 Parameter PR for customer programmable curve for step 4 Parameter TR for customer programmable curve for step 4 Parameter CR for customer programmable curve for step 4 Enable block of step 4 from harmonic restrain

tReset4

0.001

0.020

tPCrv4

0.005 - 3.000

0.001

1.000

tACrv4

0.005 - 200.000

0.001

13.500

tBCrv4

0.00 - 20.00

0.01

0.00

tCCrv4

0.1 - 10.0

0.1

1.0

tPRCrv4

0.005 - 3.000

0.001

0.500

tTRCrv4

0.005 - 100.000

0.001

13.500

tCRCrv4

0.1 - 10.0

0.1

1.0

HarmRestrain4

Disabled Enabled

Disabled

2.6

Technical data
Table 136: Four step phase overcurrent protection (POCM, 51/67)
Function Setting range Accuracy 1.0% of In at I In 1.0% of I at I > In

Operate current

(1-2500)% of lbase > 95% (1-100)% of lbase (-70.0 -50.0) degrees (40.070.0) degrees (75.090.0) degrees (5100)% of fundamental (0.000-60.000) s (0.000-60.000) s

Reset ratio Min. operating current Relay characteristic angle (RCA) Maximum forward angle Minimum forward angle Second harmonic blocking Independent time delay Minimum operate time

1.0% of In 2.0 degrees 2.0 degrees 2.0 degrees 2.0% of In 0.5% 10 ms 0.5% 10 ms

254

Four step phase overcurrent protection (PTOC, 51_67)

Chapter 6 Current protection

Function

Setting range

Accuracy

Inverse characteristics, see table 577 and table 578 Operate time, pickup function Reset time, pickup function Critical impulse time Impulse margin time

19 curve types 25 ms typically at 0 to 2 x Iset 25 ms typically at 2 to 0 x Iset 10 ms typically at 0 to 2 x Iset 15 ms typically

See table 577 and table 578 -

255

Instantaneous residual overcurrent protection (PIOC, 50N)

Chapter 6 Current protection

Instantaneous residual overcurrent protection (PIOC, 50N)


Function block name: IEFxANSI number: 50N IEC 61850 logical node name: IEC 60617 graphical symbol:

EFPIOC

IN>>

3.1

Introduction
The single input overcurrent function has a low transient overreach and short tripping times to allow use for instantaneous earth fault protection, with the reach limited to less than typical eighty percent of the line at minimum source impedance. The function can be configured to measure the residual current from the three phase current inputs or the current from a separate current input.

3.2

Principle of operation
The sampled analog residual currents are pre-processed in a discrete Fourier filter (DFT) block. From the fundamental frequency components of the residual current the RMS value is derived. This current value is fed to the IEF function. In a comparator the RMS value is compared to the set operation current value of the function (50N). If the residual current is larger than the set operation current a signal from the comparator is set to true. This signal will, without delay, activate the output signal TRIP. There is also a possibility to activate a preset change of the set operation current via a binary input (enable multiplier ENMULT). In some applications the operation value needs to be changed, for example due to transformer inrush currents. The function can be blocked from the binary input BLOCK. The trip signals from the function can be blocked from the binary input BLKAR, that can be activated during single pole trip and autoreclosing sequences.

256

Instantaneous residual overcurrent protection (PIOC, 50N)

Chapter 6 Current protection

3.3

Function block
IEF1EFPIOC_50N I3P BLOCK BLKAR MULTPU TRIP

en06000269_ansi.vsd

Figure 141: IEF function block

3.4

Input and output signals


Table 137: Input signals for the EFPIOC_50N (IEF1-) function block
Signal Description

I3P BLOCK BLKAR MULTPU

Three phase currents Block of function Block from auto recloser Enable current multiplier

Table 138: Output signals for the EFPIOC_50N (IEF1-) function block
Signal Description

TRIP

Trip signal

3.5

Setting parameters
Table 139: Basic parameter group settings for the EFPIOC_50N (IEF1-) function
Parameter Range Step Default Unit Description

Operation IBase Pickup

Disabled Enabled 1 - 99999 1 - 2500

1 1

Off 3000 200

A %IB

Disable/Enable Operation Base current Operate residual current level in % of IBase

Table 140: Advanced parameter group settings for the EFPIOC_50N (IEF1-) function
Parameter Range Step Default Unit Description

MultPU

0.5 - 5.0

0.1

1.0

Multiplier for operate current level

257

Instantaneous residual overcurrent protection (PIOC, 50N)

Chapter 6 Current protection

3.6

Technical data
Table 141: Instantaneous residual overcurrent protection (PIOC, 50N)
Function Range or value Accuracy 1.0% of In at I In 1.0% of I at I > In

Operate current

(1-2500)% of lbase > 95% 25 ms typically at 0 to 2 x Iset 25 ms typically at 2 to 0 x Iset 10 ms typically at 0 to 2 x Iset 10 ms typically at 0 to 10 x Iset 35 ms typically at 10 to 0 x Iset 2 ms typically at 0 to 10 x Iset < 5% at = 100 ms

Reset ratio Operate time Reset time Critical impulse time Operate time Reset time Critical impulse time Dynamic overreach

258

Four step residual overcurrent protection (PTOC, 51N/67N)

Chapter 6 Current protection

Four step residual overcurrent protection (PTOC, 51N/67N)


Function block name: TEFxANSI number:51N/ 67N IEC 61850 logical node name: IEC 60617 graphical symbol:

EF4PTOC

IN 4 4 alt

4.1

Introduction
The four step residual single input overcurrent function has an inverse or definite time delay independent for each step separately. All IEC and ANSI time delayed characteristics are available together with an optional user defined characteristic. A second harmonic blocking can be set individually for each step. The function can be used as main protection for phase to ground faults. The function can be used to provide a system back-up e.g. in the case of the primary protection being out of service due to communication or voltage transformer circuit failure. Directional operation can be combined together with corresponding communication blocks into permissive or blocking teleprotection scheme. Current reversal and weak-end infeed functionality are available as well. The function can be configured to measure the residual current from the three phase current inputs or the current from a separate current input. The function can be selected to be voltage polarized, current polarized or dual polarized.

4.2

Principle of operation
This function has the following three Analog Inputs on its function block in the configuration tool: 1. I3P, input for the function Operating Quantity. 2. V3P, input for the function Voltage Polarizing Quantity. 3. IP3P, input for the function Current Polarizing Quantity. These inputs are connected from the corresponding pre-processing function blocks in the Configuration Tool within PCM.

259

Four step residual overcurrent protection (PTOC, 51N/67N)

Chapter 6 Current protection

4.2.1

Operating quantity within the function The function always uses Residual Current (i.e. 3Io) for its operating quantity. The residual current can be:

1. directly measured (when a dedicated CT input of IED 670 is connected in SMT tool to the fourth analog input of the pre-processing block connected to TEF (Ground TOC) function input I3P). This dedicated IED 670 CT input can be for example connected to: parallel connection of current instrument transformers in all three phases (well known Holm-Green connection). one single core balance, current instrument transformer (i.e. cable CT). one single current instrument transformer located between power system WYE point and ground (i.e. current transformer located in the neutral grounding of a WYE connected transformer winding). one single current instrument transformer located between two parts of a protected object (i.e. current transformer located between two WYE points of double WYE shunt capacitor bank). 2. calculated from three phase current input within IED 670 (when the fourth analog input into the pre-processing block connected to TEF (Ground TOC)function Analog Input I3P is not connected to a dedicated CT input of IED 670 in SMT tool). In such case the pre-processing block will calculate 3Io from the first three inputs into the pre-processing block by using the following formula:

I op = 3 Io = IA + IB + IC
(Equation 58)

where: IA, IB, IC are fundamental frequency phasors of three individual phase currents.

The residual current is pre-processed by a discrete Fourier filter. Thus the phasor of the fundamental frequency component of the residual current is derived. The phasor magnitude is used within the TEF function to compare it with the set operation current value of the four stages (Pickup1, Pickup2, Pickup3 or Pickup4). If the residual current is larger than the set operation current and the step is used in non-directional mode a signal from the comparator for this step is set to true. This signal will, without delay, activate the output signal PICKUP for this step and a common PICKUP signal.
4.2.2 Internal polarizing facility of the function A polarizing quantity is used within the function in order to determine the direction of the ground fault (i.e. Forward/Reverse).

The function can be set to use voltage polarizing, current polarizing or dual polarizing. When Voltage Polarizing is selected the function will use the Residual Voltage (i.e. 3Vo) as polarizing quantity V3P. This voltage can be:

260

Four step residual overcurrent protection (PTOC, 51N/67N)

Chapter 6 Current protection

1. directly measured (when a dedicated VT input of IED 670 is connected in SMT tool to the fourth analog input of the pre-processing block connected to TEF function input V3P). This dedicated IED 670 VT input shall be then connected to open delta winding of a three phase main VT. 2. calculated from three phase voltage input within IED 670 (when the fourth analog input into the pre-processing block connected to TEF function Analogue Input V3P is NOT connected to a dedicated VT input of IED 670 in SMT tool). In such case the pre-processing block will calculate 3Vo from the first three inputs into the pre-processing block by using the following formula:

VVPol = 3 Vo = VA + VB + VC
(Equation 59)

where: VA, VB, VC are fundamental frequency phasors of three individual phase voltages.

Note! In order to use this all three phase-to-ground voltages must be connected to three IED 670 VT inputs.

The residual voltage is pre-processed by a discrete Fourier filter. Thus the phasor of the fundamental frequency component of the residual voltage is derived. This phasor is used, together with the phasor of the operating current, in order to determine the direction of the ground fault (i.e. Forward/Reverse). In order to enable voltage polarizing the magnitude of polarizing voltage shall be bigger than a minimum level defined by setting parameter VpolMin. It shall be noted that 3Vo is used to determine the location of the ground fault.Thus the setting parameter ROT3V0, located under General Settings for Earth Fault function, has default value of ROT3V0=180 deg. This insures the required inversion of the polarizing voltage within the ground fault function. When Current Polarizing is selected the function will use the Residual Current (i.e. 3Io) as polarizing quantity IPol. This current can be: 1. directly measured (when a dedicated CT input of IED 670 is connected in SMT tool to the fourth analog input of the pre-processing block connected to TEF function input IP3P). This dedicated IED 670 CT input is then typically connected to one single current instrument transformer located between power system WYE point and ground (i.e. current transformer located in the WYE point of a WYE connected transformer winding). For some special line protection applications this dedicated IED 670 CT input can be connected to parallel connection of current instrument transformers in all three phases (well known Holm-Green connection) 2. calculated from three phase current input within IED 670 (when the fourth analog input into the pre-processing block connected to (Ground TOC) function Analog Input IP3P is NOT connected to a dedicated CT input of IED 670 in SMT tool). In such case the pre-processing block will calculate 3Io from the first three inputs into the pre-processing block by using the following formula:

261

Four step residual overcurrent protection (PTOC, 51N/67N)

Chapter 6 Current protection

I Pol = 3 Io = IA + IB + IC
where: IA, IB and IC are fundamental frequency phasors of three individual phase currents. However this option can be as well only used for some special line protection applications as explained in the Application Manual.

The residual polarizing current is pre-processed by a discrete Fourier filter. Thus the phasor of the fundamental frequency component of the residual current is derived. This phasor is then multiplied with pre-set equivalent Zero Sequence Source Impedance in order to calculate equivalent Polarizing Voltage VIPol in accordance with the following formula:

VIPol = Zo S I Pol = ( RNPol + j XNPOL ) I Pol


(Equation 60)

which will be then used, together with the phasor of the operating current, in order to determine the direction of the ground fault (i.e. Forward/Reverse). In order to enable current polarizing the magnitude of polarizing current shall be bigger than a minimum level defined by setting parameter IPollMin. When Dual Polarizing is selected the function will use the vectorial sum of the voltage based and current based polarizing in accordance with the following formula:

VTotPol = VVPol + VIPol = 3Vo + Zo S I Pol = 3Vo + ( RNPol + j XNPol ) I Pol


(Equation 61)

Then the phasor of the total polarizing voltage VTotPol will be used, together with the phasor of the operating current, to determine the direction of the ground fault (i.e. Forward/Reverse).
4.2.3 External polarizing facility for Ground Fault function The individual stages within the function can be set as non-directional. When this setting is selected it is then possible via function binary input BLKx(where x indicates the relevant step within the function) to provide external directional control (i.e. torque control) by for example using one of the following functions available in IED 670:

1. Distance protection directional unit. 2. Negative sequence polarized General current and voltage multi purpose protection function.

262

Four step residual overcurrent protection (PTOC, 51N/67N)

Chapter 6 Current protection

4.2.4

Base quantities within the function The base quantities shall be entered as setting parameters for everyGF function. Base current shall be entered as rated phase current of the protected object in primary amperes. Base voltage shall be entered as rated phase-to-phase voltage of the protected object in primary kV. Internal Ground Fault function structure The function is internally divided into the following parts:

4.2.5

1. Four residual overcurrent stages. 2. Directional supervision element for residual overcurrent stages with integrated Directional Comparison stage for communication based ground fault protection schemes (i.e. permissive or blocking). 3. Second harmonic blocking element with additional feature for sealed-in blocking during switching of parallel transformers. 4. Switch on to fault feature with integrated Under-Time logic for detection of breaker problems during breaker opening or closing sequence. Each part is described separately in the following paragraphs.
4.2.6 Four residual overcurrent stages Each overcurrent stage uses Operating Quantity IOp (i.e. Residual Current) as measuring quantity. Every of the four residual overcurrent stage has the following built-in facilities:

Operating mode (i.e. Disabled / Non-directional / Forward / Reverse). By this parameter setting the operating mode of the stage is selected. It shall be noted that the directional decision (i.e. Forward/Reverse) is not made within residual overcurrent stage itself. The direction of the fault is determined in common Directional Supervision Element described in the next paragraph. Residual current pickup value. Type of operating characteristic (Inverse or Definite Time). By this parameter setting it is possible to select Inverse or definite time delay for ground fault function. Most of the standard IEC and ANSI inverse characteristics are available. For the complete list of available inverse curves please refer to Chapter 21 "Time inverse characteristics" Type of reset characteristic (Instantaneous / IEC Reset /ANSI Rest). By this parameter setting it is possible to select the reset characteristic of the stage. For the complete list of available reset curves please refer to Chapter 21 "Time inverse characteristics" Time delay related settings. By these parameter settings the properties like definite time delay, minimum operating time for inverse curves, reset time delay and parameters to define user programmable inverse curve are defined. Supervision by second harmonic blocking feature (i.e. Enable / Disable). By this parameter setting it is possible to prevent operation of the stage if the second harmonic content in the residual current exceeds the pre-set level. Multiplier for scaling of the set residual current pickup value by external binary signal. By this parameter setting it is possible to increase residual current pickup value when function binary input MULTPUx has logical value 1.

Simplified logic diagram for one residual overcurrent stage is shown in the following figure:

263

Four step residual overcurrent protection (PTOC, 51N/67N)

Chapter 6 Current protection

BLKTR Characteristx=DefTime
a b AND a>b

|IOP| MULTPUx INxMult INxPU BLKx BLOCK 2ndH_BLOCK_Int HarmRestrain1=Disabled DirModex=Off DirModex=Non-directional DirModex=Forward DirModex=Reverse

tx 0

AND OR

TRINx

STINx

T F

Inverse

Characteristx=Inverse

OR

OR

STAGEx_DIR_Int

FORWARD_Int

AND

OR

REVERSE_Int

AND

en07000064_ansi.vsd

Figure 142: Simplified logic diagram for residual overcurrent stage x , where x=1, 2 ,3 or 4 The function can be completely blocked from the binary input BLOCK. The pickup signals from the function for each stage can be blocked from the binary input BLKx. The trip signals from the function can be blocked from the binary input BLKTR.
4.2.7 Directional supervision element with integrated directional comparision stage

Note!
It shall be noted that at least one of the four residual overcurrent stages shall be set as directional in order to enable execution of the directional supervision element and the integrated directional comparison stage. The function has integrated directional feature. As the operating quantity current IOp is always used. The polarizing method is determined by the parameter setting polMethod. The polarizing quantity will be selected by the function in one of the following three ways: 1. When polMethod=Voltage, VVPol will be used as polarizing quantity. 2. When polMethod=Current, VIPol will be used as polarizing quantity. 3. When polMethod=Dual, VTotPol will be used as polarizing quantity. The operating and polarizing quantity are then used inside the directional element, as shown in the following figure, in order to determine the direction of the ground fault.

264

Four step residual overcurrent protection (PTOC, 51N/67N)

Chapter 6 Current protection

Reverse Area

0.4*INDirPU

AngleRCA 0.4*INDirPU

Vpol=-3Vo

Forward Area Iop=3Io

en07000066_ansi.vsd

Figure 143: Operating characteristic for earth fault directional element Two relevant setting parameters for directional supervision element are: Operating Current Pickup INDirPU . However it shall be noted that the directional element will be internally enabled to operate as soon as IOp cos( - AngleRCA) is bigger then 40% of INDirPU . Relay characteristic angle AngleRCA which defines the position of Forward & Reverse areas in the operating characteristic.

Directional Comparison stage, built-in within directional supervision element, will set GF function output binary signal: 1. PUFW=1 when Operating Quantity magnitude is bigger than setting parameterINDirPU and directional supervision element detects fault in forward direction. 2. PUREV=1 when Operating Quantity magnitude is bigger than 60% of setting parameter IN>DirINDirPU and directional supervision element detects fault in reverse direction. These signals shall be used for communication based ground fault teleprotection schemes (i.e. permissive or blocking).

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Chapter 6 Current protection

Simplified logic diagram for directional supervision element with integrated directional comparison stage is shown in the following figure:

|IOP|

a a>b b

REVERSE_Int

AND

PUREV

0.6

X
a a>b b

INDirPU

FORWARD_Int

AND

PUFW

0.4

FWD AND

PolMethod=Voltage PolMethod=Current PolMethod=Dual

OR

UPolMin
OR

VPol 0.0

IPolMin

T F

IOP VTotPol

IPol
RVS

Directional Characteristic

AngleRCA

FORWARD_Int

AND

REVERSE_Int

RNPol XNPol

COMPLEX NUMBER

VIPol 0.0

T F
STAGE1_DIR_Int STAGE2_DIR_Int STAGE3_DIR_Int STAGE4_DIR_Int

OR

BLOCK

AND

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Figure 144: Simplified logic diagram for directional supervision element with integrated directional comparison stage
4.2.8 Second harmonic blocking element A harmonic restrain of the function can be chosen. If the ratio of the 2nd harmonic component in relation to the fundamental frequency component in the residual current exceeds the pre-set level (defined by parameter setting 2ndHarmStab) any of the four residual overcurrent stages can be selectively blocked by a parameter setting HarmRestrainx. When 2nd harmonic restraint feature is active the ground fault function output signal 2NDHARMD will be set to logical value one.

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In addition to the basic functionality explained above the 2nd harmonic blocking can be set in such way to seal-in until residual current disappears. This feature might be required to stabilize the ground fault function during switching of parallel transformers in the station. In case of parallel transformers there is a risk of sympathetic inrush current. If one of the transformers is in operation, and the parallel transformer is switched in, the asymmetric inrush current of the switched in transformer will cause partial saturation of the transformer already in service. This is called transferred saturation. The 2nd harmonic of the inrush currents of the two transformers will be in phase opposition. The summation of the two currents will thus give a small 2nd harmonic current. The residual fundamental current will however be significant. The inrush current of the transformer in service before the parallel transformer energizing, will be a little delayed compared to the first transformer. Therefore we will have high 2nd harmonic current component initially. After a short period this current will however be small and the normal 2nd harmonic blocking will reset. If the BlkParTransf function is activated the 2nd harmonic restrain signal will be latched as long as the residual current measured by the relay is larger than a selected step current level. This feature has been called Block for Parallel Transformers. This 2nd harmonic seal-in feature will be activated when all of the following three conditions are simultaneously fulfilled: 1. Feature is enabled by entering setting parameter BlkParTransf=On. 2. Basic 2nd harmonic restraint feature has been active for at least 70 ms. 3. Residual current magnitude is higher than the set pickup value for one of the four residual overcurrent stages. By a parameter setting Use_PUValue it is possible to select which one of the four pickup values that will be used (i.e.Pickup1 or Pickup2 or Pickup3 or Pickup4). Once Block for Parallel Transformers is activated the basic 2nd harmonic blocking signal will be sealed-in until the residual current magnitude falls below a value defined by parameter setting Use_PUValue (see condition 3 above). Simplified logic diagram for 2nd harmonic blocking feature is shown in the following figure:

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Chapter 6 Current protection

BLOCK 2ndHarmStab IOP

X
a b OR a>b

Extract second harmonic current component Extract fundamental current component


0-70ms 0 OR

2NDHARMD

q-1

AN D

OR

2ndH_BLOCK_Int

BlkParTransf=On
|IOP|
a b a>b

UseStartValue Pickup1 Pickup2 Pickup3 Pickup4

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Figure 145: Simplified logic diagram for 2nd harmonic blocking feature and Block for Parallel Transformers feature
4.2.9 Switch on to fault feature Integrated in the four step residual overcurrent protection are Switch on to fault logic (SOTF) and Under-Time logic. The setting parameter SOTF is set to activate either SOTF or Under-Time logic or both. When the circuit breaker is closing there is a risk to close it onto a permanent fault, for example during an autoreclosing sequence. The SOTF logic will enable fast fault clearance during such situations. The time during which SOTF and Under-Time logics will be active after activation is defined by the setting parameter t4U.

The SOTF logic uses the pickup signal from step 2 or step 3 for its operation, selected by setting parameter StepForSOTF. The SOTF logic can be activated either from change in circuit breaker position or from circuit breaker close command pulse. The setting parameter SOTFSel can be set for activation of CB position open change, CB position closed change or CB close command. In case of a residual current pickup from step 2 or 3 (dependent on setting) the function will give a trip after a set delay tSOTF. This delay is normally set to a short time (default 100 ms). The Under-Time logic always uses the pickup signal from the step 4. The Under-Time logic will normally be set to operate for a lower current level than the SOTF function. The Under-Time logic can also be blocked by the 2nd harmonic restraint feature. This enables high sensitivity even if power transformer inrush currents can occur at breaker closing. This logic is typically used to detect asymmetry of CB poles immediately after switching of the circuit breaker. The Under-Time logic is activated either from change in circuit breaker position or from circuit breaker close and open command pulses. This selection is done by setting parameter ActUnder-

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Chapter 6 Current protection

Time. In case of a pickup from step 4 this logic will give a trip after a set delay tUnderTime. This delay is normally set to a relatively short time (default 300 ms). Practically the Under-Time logic acts as circuit breaker pole-discrepancy protection, but it is only active immediately after breaker switching. The Under-Time logic can only be used in solidly or low impedance grounded systems.

269

270
Setting tpulse posClsPls AND PwrMode tpulse SOTFActive operationMode AND AND closeCBPls OR AND AND TON IN Q PT ET step2Or3in AND Setting False PwrMode pickup Exec NOT tpulse posOpnPls cbClosed activationSOTF

Four step residual overcurrent protection (PTOC, 51N/67N)

Exec

cbPosition

SOTF

Exec Exec Exec NOT Setting Setting PwrMode activationUnderTime switchOntoFaultDelayTime block

closeCB

PwrMode operate Exec

Under Time
tpulse UTimeActive

OR OR opnOrClsCBPls

onOrOffPos

Exec

AND Setting Exec Exec step4in AND harmonic2ndRestraint NOT cbSwitchingFaultDelayTime AND TON IN Q PT ET AND

Chapter 6 Current protection

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OR

Four step residual overcurrent protection (PTOC, 51N/67N)

Chapter 6 Current protection

Figure 146: Simplified logic diagram for SOTF and Under-Time features EF Logic Diagram Simplified logic diagram for the complete EF function is shown in the following Figure 1:

Directional Check Element

signal to communication scheme

INPol 3V0 3I0

Direction Element

4 operatingCurrent ground FaultDirection angleValid

step over current element One element for each step

TRIP

DirModeSel enableDir

3I0

Harmonic Restraint Element

harmRestrBlock

or

pickup step 2 , 3 and 4 Blocking at parallel transformers SwitchOnToFault TRIP

DirModeSel Mode Selection enableDir 1-4 enableStep 1-4 DirectionalMode

CB pos or cmd

en 06000376 _ansi. vsd

Figure 147: Functional overview of Ground TOC

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Chapter 6 Current protection

4.3

Function block
TEF1EF4PTOC_51N67N I3P V3P I3PPOL BLOCK BLKTR BLK1 BLK2 BLK3 BLK4 MULTPU1 MULTPU2 MULTPU3 MULTPU4 52A CLOSECMD OPENCMD TRIP TRST1 TRST2 TRST3 TRST4 TRSOTF PICKUP PUST1 PUST2 PUST3 PUST4 PUSOTF PUFW PUREV 2NDHARMD

en06000424_ansi.vsd

Figure 148: TEF1 function block

4.4

Input and output signals


Table 142: Input signals for the EF4PTOC_51N67N (TEF1-) function block
Signal Description

I3P V3P I3PPOL BLOCK BLKTR BLK1 BLK2 BLK3 BLK4 MULTPU1 MULTPU2 MULTPU3 MULTPU4 52a CLOSECMD OPENCMD

Current connection Polarizing voltage connection Polarizing current connection Block of function Block of trip Block of step 1 (Pickup and trip) Block of step 2 (Pickup and trip) Block of step 3 (Pickup and trip) Block of step 4 (Pickup and trip) When activated, the pickup multiplier is in use for step1 When activated, the pickup multiplier is in use for step2 When activated, the pickup multiplier is in use for step3 When activated, the pickup multiplier is in use for step4 Breaker position Breaker close command Breaker open command

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Table 143: Output signals for the EF4PTOC_51N67N (TEF1-) function block
Signal Description

TRIP TRST1 TRST2 TRST3 TRST4 TRSOTF PICKUP PUST1 PUST2 PUST3 PUST4 PUSOTF PUFW PUREV 2NDHARMD

Trip Trip signal from step 1 Trip signal from step 2 Trip signal from step 3 Trip signal from step 4 Trip signal from switch onto fault function General pickup signal Pickup signal step 1 Pickup signal step 2 Pickup signal step 3 Pickup signal step 4 Pickup signal from switch onto fault function Forward directional pickup signal Reverse directional pickup signal 2nd harmonic block signal

4.5

Setting parameters
Table 144: Basic parameter group settings for the EF4PTOC_51N67N (TEF1-) function
Parameter Range Step Default Unit Description

Operation IBase VBase AngleRCA polMethod

Disabled Enabled 1 - 99999 0.05 - 2000.00 -180 - 180 Voltage Current Dual 1 - 100

1 0.05 1 -

Off 3000 400.00 65 Voltage

A kV Deg -

Disable/Enable Operation Base value for current settings Base value for voltage settings Relay characteristic angle (RCA) Type of polarization

VPolMin

%VB

Minimum voltage level for polarization in % of VBase Minimum current level for polarization in % of IBase Real part of source Z to be used for current polarisation

IPolMin RNPol

2 - 100 0.50 - 1000.00

1 0.01

5 5.00

%IB ohm

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Chapter 6 Current protection

Parameter

Range

Step

Default

Unit

Description

XNPol

0.50 - 3000.00

0.01

40.00

ohm

Imaginary part of source Z to be used for current polarisation Residual current level for Direction release in % of IBase Second harmonic restrain operation in % of IN magnitude Enable blocking at parallel transformers Current pickup blocking at parallel transf (step1, 2, 3 or 4) SOTF operation mode (Disabled/SOTF/Undertime/SOTF+undertime) Select signal that shall activate SOTF Selection of step used for SOTF Enable harmonic restrain function in SOTF Time delay for SOTF Switch-onto-fault active time Directional mode of step 1 (Disabled, Nondir, Forward, Reverse)

INDirPU

1 - 100

10

%IB

2ndHarmStab

5 - 100

20

BlkParTransf Use_PUValue

Disabled Enabled ST1 ST2 ST3 ST4 Disabled SOTF UnderTime SOTF+UnderTime Open Closed CloseCommand Step 2 Step 3

Off IN4>

SOTF

Off

SOTFSel

Open

StepForSOTF

0.001 0.001 -

Step 2 Off 0.200 1.000 Non-directional

s s -

EnHarmRestSOTF Disabled Enabled tSOTF t4U DirModeSel1 0.000 - 60.000 0.000 - 60.000 Disabled Non-directional Forward Reverse

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Chapter 6 Current protection

Parameter

Range

Step

Default

Unit

Description

Characterist1

ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500 0.000 - 60.000 0.05 - 999.00

ANSI Def. Time

Time delay curve type for step 1

Pickup1 t1 TD1

1 0.001 0.01

100 0.000 0.05

%IB s -

Residual current pickup for step 1 in % of IBase Independent (defenite) time delay of step 1 Time multiplier for the dependent time delay for step 1 Multiplier for scaling the current setting value for step 1 Minimum operate time for inverse curves for step 1 Enable block of step 1 from harmonic restrain Directional mode of step 2 (Disabled, Nondir, Forward, Reverse)

MultPU1

1.0 - 10.0

0.1

2.0

t1Min HarmRestrain1 DirModeSel2

0.000 - 60.000 Disabled Enabled Disabled Non-directional Forward Reverse

0.001 -

0.000 On Non-directional

s -

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Four step residual overcurrent protection (PTOC, 51N/67N)

Chapter 6 Current protection

Parameter

Range

Step

Default

Unit

Description

Characterist2

ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500 0.000 - 60.000 0.05 - 999.00

ANSI Def. Time

Time delay curve type for step 2

Pickup2 t2 TD2

1 0.001 0.01

50 0.400 0.05

%IB s -

Residual current pickup for step 2 in % of IBase Independent (definitive) time delay of step 2 Time multiplier for the dependent time delay for step 2 Multiplier for scaling the current setting value for step 2 Minimum operate time for inverse curves step 2 Enable block of step 2 from harmonic restrain Directional mode of step 3 (Disabled, Nondir, Forward, Reverse)

MultPU2

1.0 - 10.0

0.1

2.0

t2Min HarmRestrain2 DirModeSel3

0.000 - 60.000 Disabled Enabled Disabled Non-directional Forward Reverse

0.001 -

0.000 On Non-directional

s -

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Four step residual overcurrent protection (PTOC, 51N/67N)

Chapter 6 Current protection

Parameter

Range

Step

Default

Unit

Description

Characterist3

ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500 0.000 - 60.000 0.05 - 999.00

ANSI Def. Time

Time delay curve type for step 3

Pickup3 t3 TD3

1 0.001 0.01

33 0.800 0.05

%IB s -

Residual current pickup for step 3 in % of IBase Independent time delay of step 3 Time multiplier for the dependent time delay for step 3 Multiplier for scaling the current setting value for step 3 Minimum operate time for inverse curves for step 3 Enable block of step 3 from harmonic restrain Directional mode of step 4 (Disabled, Nondir, Forward, Reverse)

MultPU3

1.0 - 10.0

0.1

2.0

t3Min HarmRestrain3 DirModeSel4

0.000 - 60.000 Disabled Enabled Disabled Non-directional Forward Reverse

0.001 -

0.000 On Non-directional

s -

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Four step residual overcurrent protection (PTOC, 51N/67N)

Chapter 6 Current protection

Parameter

Range

Step

Default

Unit

Description

Characterist4

ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 1 - 2500 0.000 - 60.000 0.05 - 999.00

ANSI Def. Time

Time delay curve type for step 4

Pickup4 t4 TD4

1 0.001 0.01

17 1.200 0.05

%IB s -

Residual current pickup for step 4 in % of IBase Independent (definitive) time delay of step 4 Time multiplier for the dependent time delay for step 4 Multiplier for scaling the current setting value for step 4 Minimum operate time in inverse curves step 4 Enable block of step 4 from harmonic restrain

MultPU4

1.0 - 10.0

0.1

2.0

t4Min HarmRestrain4

0.000 - 60.000 Disabled Enabled

0.001 -

0.000 On

s -

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Four step residual overcurrent protection (PTOC, 51N/67N)

Chapter 6 Current protection

Table 145: Advanced parameter group settings for the EF4PTOC_51N67N (TEF1-) function
Parameter Range Step Default Unit Description

ActUndrTimeSel

CB position CB command 0.000 - 60.000 Instantaneous IEC Reset ANSI reset 0.000 - 60.000 0.005 - 3.000

CB position

Select signal to activate under time (CB Pos/CBCommand) Time delay for under time Reset curve type for step 1 Reset curve type for step 1 Parameter P for customer programmable curve for step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1 Parameter PR for customer programmable curve for step 1 Parameter TR for customer programmable curve for step 1 Parameter CR for customer programmable curve for step 1 Reset curve type for step 2 Reset curve type for step 2 Parameter P for customer programmable curve for step 2 Parameter A for customer programmable curve for step 2 Parameter B for customer programmable curve for step 2

tUnderTime ResetTypeCrv1

0.001 -

0.300 Instantaneous

s -

tReset1 tPCrv1

0.001 0.001

0.020 1.000

s -

tACrv1

0.005 - 200.000

0.001

13.500

tBCrv1

0.00 - 20.00

0.01

0.00

tCCrv1

0.1 - 10.0

0.1

1.0

tPRCrv1

0.005 - 3.000

0.001

0.500

tTRCrv1

0.005 - 100.000

0.001

13.500

tCRCrv1

0.1 - 10.0

0.1

1.0

ResetTypeCrv2

Instantaneous IEC Reset ANSI reset 0.000 - 60.000 0.005 - 3.000

Instantaneous

tReset2 tPCrv2

0.001 0.001

0.020 1.000

s -

tACrv2

0.005 - 200.000

0.001

13.500

tBCrv2

0.00 - 20.00

0.01

0.00

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Four step residual overcurrent protection (PTOC, 51N/67N)

Chapter 6 Current protection

Parameter

Range

Step

Default

Unit

Description

tCCrv2

0.1 - 10.0

0.1

1.0

Parameter C for customer programmable curve for step 2 Parameter PR for customer programmable curve for step 2 Parameter TR for customer programmable curve for step 2 Parameter CR for customer programmable curve for step 2 Reset curve type for step 3 Reset curve type for step 3 Parameter P for customer programmable curve for step 3 Parameter A for customer programmable curve for step 3 Parameter B for customer programmable curve for step 3 Parameter C for customer programmable curve step 3 Parameter PR for customer programmable curve step 3 Parameter TR for customer programmable curve step 3 Parameter CR for customer programmable curve for step 3 Reset curve type for step 4 Reset curve type for step 4 Parameter P for customer programmable curve for step 4

tPRCrv2

0.005 - 3.000

0.001

0.500

tTRCrv2

0.005 - 100.000

0.001

13.500

tCRCrv2

0.1 - 10.0

0.1

1.0

ResetTypeCrv3

Instantaneous IEC Reset ANSI reset 0.000 - 60.000 0.005 - 3.000

Instantaneous

tReset3 tPCrv3

0.001 0.001

0.020 1.000

s -

tACrv3

0.005 - 200.000

0.001

13.500

tBCrv3

0.00 - 20.00

0.01

0.00

tCCrv3

0.1 - 10.0

0.1

1.0

tPRCrv3

0.005 - 3.000

0.001

0.500

tTRCrv3

0.005 - 100.000

0.001

13.500

tCRCrv3

0.1 - 10.0

0.1

1.0

ResetTypeCrv4

Instantaneous IEC Reset ANSI reset 0.000 - 60.000 0.005 - 3.000

Instantaneous

tReset4 tPCrv4

0.001 0.001

0.020 1.000

s -

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Four step residual overcurrent protection (PTOC, 51N/67N)

Chapter 6 Current protection

Parameter

Range

Step

Default

Unit

Description

tACrv4

0.005 - 200.000

0.001

13.500

Parameter A for customer programmable curve step 4 Parameter B for customer programmable curve for step 4 Parameter C for customer programmable curve step 4 Parameter PR for customer programmable curve step 4 Parameter TR for customer programmable curve step 4 Parameter CR for customer programmable curve step 4

tBCrv4

0.00 - 20.00

0.01

0.00

tCCrv4

0.1 - 10.0

0.1

1.0

tPRCrv4

0.005 - 3.000

0.001

0.500

tTRCrv4

0.005 - 100.000

0.001

13.500

tCRCrv4

0.1 - 10.0

0.1

1.0

4.6

Technical data
Table 146: Four step residual overcurrent protection (PEFM, 51N/67N)
Function Range or value Accuracy 1.0% of In at I In 1.0% of I at I > In

Operate current

(1-2500)% of lbase > 95% (1100)% of lbase (0.000-60.000) s 19 curve types (5100)% of fundamental (-180 to 180) degrees (1100)% of Vbase (130)% of Ibase (0.503000.00) /phase 25 ms typically at 0 to 2 x Iset 25 ms typically at 2 to 0 x Iset 10 ms typically at 0 to 2 x Iset 15 ms typically

Reset ratio Operate current for directional comparison Timers Inverse characteristics, see table 577 and table 578 Second harmonic restrain operation Relay characteristic angle Minimum polarizing voltage Minimum polarizing current RNS, XNS Operate time, pickup function Reset time, pickup function Critical impulse time Impulse margin time

1.0% of In 0.5% 10 ms

See table 577 and table 578


2.0% of In 2.0 degrees 0.5% of Vn 0.25% of In

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Chapter 6 Current protection

Sensitive directional residual overcurrent and power protection (PSDE, 67N)


Function block name: SDExANSI number: 67N IEC 61850 logical node name: IEC 60617 graphical symbol:

SDEPSDE

5.1

Introduction
In networks with high impedance grounding, the phase to ground fault current is significantly smaller than the short circuit currents. Another difficulty for ground fault protection is that the magnitude of the phase to ground fault current is almost independent of the fault location in the network. Directional residual current can be used to detect and give selective trip of phase to ground faults in high impedance grounded networks. The protection uses the residual current component 3I0 cos , where is the angle between the residual current and the residual voltage, compensated with a characteristic angle. Alternatively the function can be set to strict 3I0 level with an check of angle 3I0 and cos . Directional residual power can be used to detect and give selective trip of phase to ground faults in high impedance grounded networks. The protection uses the residual power component 3I0 3V0 cos , where is the angle between the residual current and the reference residual voltage, compensated with a characteristic angle. A normal undirectional residual current function can also be used and be with definite or inverse time delay. A back-up neutral point voltage function is also available for undirectional sensitive back-up protection. In an isolated network, i.e. the network is only coupled to ground via the capacitances between the phase conductors and ground, the residual current always has -90 phase shift compared to the reference residual voltage. The characteristic angle is chosen to -90 in such a network. In resistance grounded networks or in Petersen coil, with a parallel resistor, the active residual current component (in phase with the residual voltage) should be used for the ground fault detection. In such networks the characteristic angle is chosen to 0. As the magnitude of the residual current is independent of the fault location the selectivity of the ground fault protection is achieved by time selectivity. When should the sensitive directional residual overcurrent protection be used and when should the sensitive directional residual power protection be used? We have the following facts to consider: Sensitive directional residual overcurrent protection gives possibility for better sensitivity

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Chapter 6 Current protection

Sensitive directional residual power protection gives possibility to use inverse time characteristics. This is applicable in large high impedance grounded networks, with large capacitive ground fault current In some power systems a medium size neutral point resistor is used. Such a resistor will give a resistive ground fault current component of about 200 - 400 A at a zero resistive phase to ground fault. In such a system the directional residual power protection gives better possibilities for selectivity enabled by inverse time power characteristics.

5.2
5.2.1

Principle of operation
Introduction The function is using phasors of the residual current and voltage. Group signals I3P and V3P containing phasors of residual current and voltage is taken from pre-processor blocks.

The sensitive directional ground fault protection has the following sub-functions included:
Directional residual current protection measuring 3I0 cos is defined as the angle between the residual current 3I0 and the reference voltage compensated with the set characteristic angle RCADir (=ang(3I0)-ang(Vref) ). Vref = -3V0 ejRCADir. RCAdir is normally set equal to 0 in a high impedance grounded network with a neutral point resistor as the active current component is appearing out on the faulted feeder only. RCAdir is set equal to -90 in an isolated network as all currents are mainly capacitive. The function operates when 3I0 cos gets larger than the set value.
Vref

RCA = 0, ROA = 90

3I0

= ang(3I0) - ang(3Vref) 3I0 cos -3V0=Vref

en06000648_ansi.vsd

Figure 149: RCADir set to 0

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Sensitive directional residual overcurrent and power protection (PSDE, 67N)

Chapter 6 Current protection

Vref

RCA = -90, ROA = 90

3I0 3I0 cos = ang(3I0) ang(Vref) -3V0

en06000649_ansi.vsd

Figure 150: RCADir set to -90 For trip, both the residual current 3I0 cos and the release voltage 3V0, shall be larger than the set levels: INCosPhiPU and VNRelPU. Trip from this function can be blocked from the binary input BLKTRDIR. When the function is activated binary output signals PICKUP and PUDIRIN are activated. If the activation is active after the set delay tDef the binary output signals TRIP and TRDIRIN are activated. The trip from this sub-function has definite time delay. There is a possibility to increase the operate level for currents where the angle is larger than a set value as shown in the figure below. This is equivalent to blocking of the function if > ROADir. This option is used to handle angle error for the instrument transformers.

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Sensitive directional residual overcurrent and power protection (PSDE, 67N)

Chapter 6 Current protection

3I0

Operate area

3I0 cos ROA

-3V0=Vref

RCA = 0

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Figure 151: Characteristic with ROADir restriction The function will indicate forward/reverse direction to the fault. Reverse direction is defined as 3I0 cos ( + 180) the set value. It shall also be possible to tilt the characteristic to compensate for current transformer angle error with a setting RCAComp as shown in the figure below:

285

Sensitive directional residual overcurrent and power protection (PSDE, 67N)

Chapter 6 Current protection

Operate area

-3V0=Vref

RCA = 0

Instrument transformer angle error

RCAcomp Characteristic after angle compensation

3I0 (prim)

3I0 (to prot)

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Figure 152: Explanation of RCAcomp.


Directional residual power protection measuring 3I0 3V0 cos is defined as the angle between the residual current 3I0 and the reference voltage compensated with the set characteristic angle RCADir (=ang(3I0)ang(Vref) ). Vref = -3V0 ejRCA. The function operates when 3I03V0 cos gets larger than the set value.

For trip, both the residual power 3I0 3V0 cos , the residual current 3I0 and the release voltage 3V0, shall be larger than the set levels (SN_PU, INRelPU and VNRelPU). Trip from this function can be blocked from the binary input BLKTRDIR. When the function is activated binary output signals PICKUP and PUDIRIN are activated. If the activation is active after the set delay tDef or after the inverse time delay (setting TDSN) the binary output signals TRIP and TRDIRIN are activated. The function shall indicate forward/reverse direction to the fault. Reverse direction is defined as 3I03V0 cos ( + 180) 3 the set value. This variant has the possibility of choice between definite time delay and inverse time delay.

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Sensitive directional residual overcurrent and power protection (PSDE, 67N)

Chapter 6 Current protection

The inverse time delay is defined as:

t inv =

TDSN (3I 0 3U 0 cos (reference)) 3I 0 3U 0 cos (measured)


(Equation 62)

Directional residual current protection measuring 3I0 and The function will operate if the residual current is larger that the set value and the angle = ang(3I0)-ang(Vref) is within the sector RCADir ROADir
RCA = 0 ROA = 80

Operate area 3I0 80 -3V0

en06000652_ansi.vsd

Figure 153: Example of characteristic For trip, both the residual current 3I0 and the release voltage 3V0, shall be larger than the set levels (INDirPU and VNRelPU) and the angle shall be in the set sector (ROADir and RCADir). Trip from this function can be blocked from the binary input BLKTRDIR. When the function is activated binary output signals PICKUP and PUDIRIN are activated. If the activation is active after the set delay tDef the binary output signals TRIP and TRDIRIN are activated. The function indicate forward/reverse direction to the fault. Reverse direction is defined as is within the angle sector: RCADir + 180 ROADir

287

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Chapter 6 Current protection

This variant shall have definite time delay.

Directional functions For all the directional functions there are directional pickup signals PUFW: fault in the forward direction, and PUREV: Pickup in the reverse direction. Even if the directional function is set to operate for faults in the forward direction a fault in the reverse direction will give the pickup signal PUREV. Also if the directional function is set to operate for faults in the reverse direction a fault in the forward direction will give the pickup signal PUFW. Non-directional ground fault current protection This function will measure the residual current without checking the phase angle. The function will be used to detect cross-country faults. This function can serve as alternative or back-up to distance protection with phase preference logic. To assure selectivity the distance protection can block the non-directional ground fault current function via the input BLKNDN.

If available the non-directional function is using the calculated residual current, derived as sum of the phase currents. This will give a better ability to detect cross-country faults with high residual current, also when dedicated core balance CT for the sensitive ground fault protection will saturate. This variant shall have the possibility of choice between definite time delay and inverse time delay. The inverse time delay shall be according to IEC 60255-3. For trip, the residual current 3I0 shall be larger than the set levels (INNonDirPU). Trip from this function can be blocked from the binary input BLKNDN. When the function is activated binary output signal PUNDIN is activated. If the activation is active after the set delay tINNonDir or after the inverse time delay the binary output signals TRIP and TRNDIN are activated.
Residual overvoltage release and protection The directional function shall be released when the residual voltage gets higher than a set level.

There shall also be a separate trip, with its own definite time delay, from this set voltage level. For trip, the residual voltage 3V0 shall be larger than the set levels (UN_PU). Trip from this function can be blocked from the binary input BLKVN. When the function is activated binary output signal PUVN is activated. If the activation is active after the set delay tVNNonDir TRIP and TRUN are activated. A simplified logical diagram of the total function is shown in figure 154.

288

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Chapter 6 Current protection

INNonDirPU 0-t 0 UN_PU 0-t 0


OpMODE=INcosPhi

PUNDIN TRNDIN PUVN TRVN

Pickup_N

AND

INCosPhiPU

OpMODE=INVNCosPhi

AND INVNCosPhiPU

OR

AND
t

PUDIRIN

Phi in RCA +- ROA AND


TimeChar = DefTime

SN TimeChar = InvTime

AND

TRDIRIN

OpMODE=IN and Phi

AND

DirMode = Forw Forw DirMode = Rev Rev

AND

OR PUFW

AND

PUREV

en06000653_ansi.vsd

Figure 154: Simplified logical diagram of the sensitive ground fault current protection

289

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Chapter 6 Current protection

5.3

Function block
SDE1SDEPSDE_67N I3P V3P BLOCK BLKTR BLKTRDIR BLKNDN BLKVN TRIP TRDIRIN TRNDIN TRVN PICKUP PUDIRIN PUNDIN PUVN PUFW PUREV CND VNREL en07000032_ansi.vsd

Figure 155: SDE function block

5.4

Input and output signals


Table 147: Input signals for the SDEPSDE_67N (SDE1-) function block
Signal Description

I3P V3P BLOCK BLKTR BLKTRDIR BLKNDN BLKVN

Group signal for current Group signal for voltage Blocks all the outputs of the function Blocks the operate outputs of the function Blocks the directional operate outputs of the function Blocks the Non directional current residual outputs Blocks the Non directional voltage residual outputs

Table 148: Basic general settings for the SDEPSDE_67N (SDE1-) function
Parameter Range Step Default Unit Description

IBase VBase SBase

1 - 99999 0.05 - 2000.00 0.05 200000000.00

1 0.05 0.05

100 63.50 6350.00

A kV kVA

Base Current, in A Base Voltage, in kV Phase to Neutral Base Power, in kVA. IBase*VBase

290

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Chapter 6 Current protection

Table 149: Basic parameter group settings for the SDEPSDE_67N (SDE1-) function
Parameter Range Step Default Unit Description

Operation OpModeSel

Disabled Enabled 3I0Cosfi 3I03V0Cosfi 3I0 and fi Forward Reverse -179 - 180 -10.0 - 10.0 0 - 90

Disabled 3I0Cosfi

Operation Disabled/Enabled Selection of operation mode for protection Direction of operation forward or reverse Relay characteristic angle RCA, in deg Relay characteristic angle compensation Relay open angle ROA used as release in phase mode, in deg Set level for 3I0cosFi, directional res over current, in %Ib Set level for 3I03V0cosFi, pickup inv time count, in %Sb Set level for directional residual over current prot, in %Ib Definite time delay directional residual overcurrent, in sec Reference value of res power for inverse time count, in %Sb Time multiplier setting for directional residual power mode Operation of non-directional residual overcurrent protection Set level for non directional residual over current, in %Ib Time delay for non-directional residual over current, in sec

DirMode RCADir RCAComp ROADir

1 0.1 1

Forward -90 0.0 90

Deg Deg Deg

INCosPhiPU

0.25 - 200.00

0.01

1.00

%IB

SN_PU

0.25 - 200.00

0.01

10.00

%SB

INDirPU

0.25 - 200.00

0.01

5.00

%IB

tDef

0.000 - 60.000

0.001

0.100

SRef

0.03 - 200.00

0.01

10.00

%SB

TDSN

0.00 - 2.00

0.01

0.10

OpINNonDir

Disabled Enabled 1.00 - 400.00

Disabled

INNonDirPU

0.01

10.00

%IB

tINNonDir

0.000 - 60.000

0.001

1.000

291

Sensitive directional residual overcurrent and power protection (PSDE, 67N)

Chapter 6 Current protection

Parameter

Range

Step

Default

Unit

Description

TimeChar

ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 0.000 - 60.000 0.00 - 2.00

IEC Norm. inv.

Operation curve selection for IDMT operation

t_MinTripDelay TDIN

0.001 0.01

0.040 1.00

s -

Minimum operate time for IEC IDMT curves, in sec IDMT time mult for non-dir res over current protection Operation of non-directional residual overvoltage protection Set level for non-directional residual over voltage, in %Vb Time delay for non-directional residual over voltage, in sec Residual release current for all directional modes, in %Ib Residual release voltage for all direction modes, in %Vb

OpVN

Disabled Enabled 1.00 - 200.00

Disabled

VN_PU

0.01

20.00

%VB

tVNNonDir

0.000 - 60.000

0.001

0.100

INRelPU

0.25 - 200.00

0.01

1.00

%IB

VNRelPU

0.01 - 200.00

0.01

3.00

%VB

Table 150: Advanced general settings for the SDEPSDE_67N (SDE1-) function
Parameter Range Step Default Unit Description

RotResV

0 deg 180 deg

180 deg

Setting for rotating polarizing quantity if necessary

292

Sensitive directional residual overcurrent and power protection (PSDE, 67N)

Chapter 6 Current protection

Table 151: Advanced parameter group settings for the SDEPSDE_67N (SDE1-) function
Parameter Range Step Default Unit Description

tReset tPCrv tACrv tBCrv tCCrv ResetTypeCrv

0.000 - 60.000 0.005 - 3.000 0.005 - 200.000 0.00 - 20.00 0.1 - 10.0 Immediate IEC Reset ANSI reset 0.005 - 3.000 0.005 - 100.000 0.1 - 10.0

0.001 0.001 0.001 0.01 0.1 -

0.040 1.000 13.500 0.00 1.0 IEC Reset

s -

Time delay used for reset of definite timers, in sec Setting P for customer programmable curve Setting A for customer programmable curve Setting B for customer programmable curve Setting C for customer programmable curve Reset mode when current drops off. Setting PR for customer programmable curve Setting TR for customer programmable curve Setting CR for customer programmable curve

tPRCrv tTRCrv tCRCrv

0.001 0.001 0.1

0.500 13.500 1.0

5.5

Setting parameters
Table 152: Basic general settings for the SDEPSDE_67N (SDE1-) function
Parameter Range Step Default Unit Description

IBase VBase SBase

1 - 99999 0.05 - 2000.00 0.05 200000000.00

1 0.05 0.05

100 63.50 6350.00

A kV kVA

Base Current, in A Base Voltage, in kV Phase to Neutral Base Power, in kVA. IBase*Vbase

293

Sensitive directional residual overcurrent and power protection (PSDE, 67N)

Chapter 6 Current protection

Table 153: Basic parameter group settings for the SDEPSDE_67N (SDE1-) function
Parameter Range Step Default Unit Description

Operation OpModeSel

Disabled Enabled 3I0Cosfi 3I03V0Cosfi 3I0 and fi Forward Reverse -179 - 180 -10.0 - 10.0 0 - 90

Off 3I0Cosfi

Operation Disable / Enable Selection of operation mode for protection Direction of operation forward or reverse Relay characteristic angle RCA, in deg Relay characteristic angle compensation Relay open angle ROA used as release in phase mode, in deg Set level for 3I0cosFi, directional res over current, in %Ib Set level for 3I03V0cosFi, starting inv time count, in %Sb Set level for directional residual over current prot, in %Ib Definite time delay directional residual overcurrent, in sec Reference value of res power for inverse time count, in %Sb Time multiplier setting for directional residual power mode Operation of non-directional residual overcurrent protection Set level for non directional residual over current, in %Ib Time delay for non-directional residual over current, in sec

DirMode RCADir RCAComp ROADir

1 0.1 1

Forward -90 0.0 90

Deg Deg Deg

INCosPhiPU

0.25 - 200.00

0.01

1.00

%IB

SN_PU

0.25 - 200.00

0.01

10.00

%SB

INDirPU

0.25 - 200.00

0.01

5.00

%IB

tDef

0.000 - 60.000

0.001

0.100

SRef

0.03 - 200.00

0.01

10.00

%SB

TDSN

0.00 - 2.00

0.01

0.10

OpINNonDir

Disabled Enabled 1.00 - 400.00

Off

INNonDirPU

0.01

10.00

%IB

tINNonDir

0.000 - 60.000

0.001

1.000

294

Sensitive directional residual overcurrent and power protection (PSDE, 67N)

Chapter 6 Current protection

Parameter

Range

Step

Default

Unit

Description

TimeChar

ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Reserved Programmable RI type RD type 0.000 - 60.000 0.00 - 2.00

IEC Norm. inv.

Operation curve selection for IDMT operation

t_MinTripDelay TDIN

0.001 0.01

0.040 1.00

s -

Minimum operate time for IEC IDMT curves, in sec IDMT time mult for non-dir res over current protection Operation of non-directional residual overvoltage protection Set level for non-directional residual over voltage, in %Vb Time delay for non-directional residual over voltage, in sec Residual release current for all directional modes, in %Ib Residual release voltage for all direction modes, in %Vb

OpVN

Disabled Enabled 1.00 - 200.00

Off

VN_PU

0.01

20.00

%VB

tVNNonDir

0.000 - 60.000

0.001

0.100

INRelPU

0.25 - 200.00

0.01

1.00

%IB

VNRelPU

0.01 - 200.00

0.01

3.00

%VB

Table 154: Advanced general settings for the SDEPSDE_67N (SDE1-) function
Parameter Range Step Default Unit Description

RotResV

0 deg 180 deg

180 deg

Setting for rotating polarizing quantity if necessary

295

Sensitive directional residual overcurrent and power protection (PSDE, 67N)

Chapter 6 Current protection

Table 155: Advanced parameter group settings for the SDEPSDE_67N (SDE1-) function
Parameter Range Step Default Unit Description

tReset tPCrv tACrv tBCrv tCCrv ResetTypeCrv

0.000 - 60.000 0.005 - 3.000 0.005 - 200.000 0.00 - 20.00 0.1 - 10.0 Immediate IEC Reset ANSI reset 0.005 - 3.000 0.005 - 100.000 0.1 - 10.0

0.001 0.001 0.001 0.01 0.1 -

0.040 1.000 13.500 0.00 1.0 IEC Reset

s -

Time delay used for reset of definite timers, in sec Setting P for customer programmable curve Setting A for customer programmable curve Setting B for customer programmable curve Setting C for customer programmable curve Reset mode when current drops off. Setting PR for customer programmable curve Setting TR for customer programmable curve Setting CR for customer programmable curve

tPRCrv tTRCrv tCRCrv

0.001 0.001 0.1

0.500 13.500 1.0

296

Sensitive directional residual overcurrent and power protection (PSDE, 67N)

Chapter 6 Current protection

5.6

Technical data
Table 156: Sensitive directional residual overcurrent and power protection (PSDE, 67N)
Function Range or value Accuracy 1.0% of In at I In 1.0% of I at I > In

Operate level for 3I0 cos directional residual overcurrent

(0.25-200.00)% of lbase At low setting: (2.5-10) mA (10-50) mA

1.0 mA 0.5 mA 1.0% of Sn at S Sn 1.0% of S at S > Sn

Operate level for 3I03V0 cos directional residual power

(0.25-200.00)% of Sbase At low setting: (0.25-5.00)% of Sbase

10% of set value 1.0% of In at In 1.0% of I at I > In

Operate level for 3I0 and residual overcurrent

(0.25-200.00)% of Ibase At low setting: (2.5-10) mA (10-50) mA

1.0 mA 0.5 mA 1.0% of I at I In 1.0% of I at I > In

Operate level for non directional overcurrent

(1.00-400.00)% of Ibase At low setting: (10-50) mA

1.0 mA 0.5% of Vn at V Vn 0.5% of V at V > Vn 1.0% of In at I In 1.0% of I at I > In

Operate level for non directional residual overvoltage Residual release current for all directional modes

(1.00-200.00)% of Vbase (0.25-200.00)% of Ibase At low setting: (2.5-10) mA (10-50) mA

1.0 mA 0.5 mA 0.5% of Vn at V Vn 0.5% of V at > Vn

Residual release voltage for all directional modes Reset ratio Timers Inverse characteristics, see table 577 and table 578 Relay characteristic angle RCA

(0.01-200.00)% of Vbase > 95% (0.000-60.000) s 19 curve types (-179 to 180) degrees

0.5% 10 ms

See table 577 and table 578


2.0 degrees

297

Sensitive directional residual overcurrent and power protection (PSDE, 67N)

Chapter 6 Current protection

Function

Range or value

Accuracy 2.0 degrees

Relay open angle ROA Operate time, non directional residual over current

(0-90) degrees 60 ms typically at 0 to 2 x Iset

Reset time, non directinal residual 60 ms typically at 2 to 0 x Iset over current Operate time, pickup function Reset time, pickup function 150 ms typically at 0 to 2 x Iset 50 ms typically at 2 to 0 x Iset

298

Thermal overload protection, one time constant (PTTR, 26)

Chapter 6 Current protection

Thermal overload protection, one time constant (PTTR, 26)


Function block name: THLxANSI number: 49 IEC 61850 logical node name: IEC 60617 graphical symbol:

LPTTR

6.1

Introduction
The increasing utilizing of the power system closer to the thermal limits have generated a need of a thermal overload function also for power lines. A thermal overload will often not be detected by other protection functions and the introduction of the thermal overload function can allow the protected circuit to operate closer to the thermal limits. The three phase current measuring function has an I2t characteristic with settable time constant and a thermal memory. An alarm pickup gives early warning to allow operators to take action well before the line will be tripped.

6.2

Principle of operation
The sampled analog phase currents are pre-processed and for each phase current the RMS value of each phase current is derived. These phase current values are fed to the THL function. From the largest of the three phase currents a final temperature is calculated according to the expression:

final

I = I ref

T ref
(Equation 63)

where: I Iref Tref is the largest phase current, is a given reference current and is steady state temperature corresponding to Iref

299

Thermal overload protection, one time constant (PTTR, 26)

Chapter 6 Current protection

The ambient temperature is added to the calculated final temperature. If this temperature is larger than the set operate temperature level a pickup output signal PICKUP is activated. The actual temperature at the actual execution cycle is calculated as:

t n = n 1 + ( final n1 ) 1 e
(Equation 64)

where:
n n-1 final t

is the calculated present temperature, is the calculated temperature at the previous time step, is the calculated final temperature with the actual current, is the time step between calculation of the actual temperature and is the set thermal time constant for the protected device (line or cable)

The actual temperature of the protected component (line or cable) is calculated by adding the ambient temperature to the calculated temperature, as shown above. The ambient temperature can be given a constant value. The calculated component temperature can be monitored as it is exported from the function as a real figure. When the component temperature reaches the set alarm level AlarmTemp the output signal ALARM is set. When the component temperature reaches the set trip level TripTemp the output signal TRIP is set. There is also a calculation of the present time to operation with the present current. This calculation is only performed if the final temperature is calculated to be above the operation temperature:

operate toperate = ln final final n


(Equation 65)

The calculated time to trip can be monitored as it is exported from the function as a real figure TTRIP. After a trip, caused by the thermal overload protection function, there can be a lockout to reconnect the tripped circuit. The output lockout signal LOCKOUT is activated when the device temperature is above the set lockout release temperature setting ReclTemp. The time to lockout release is calculated, i.e. a calculation of the cooling time to a set value. The thermal content of the function can be reset with input RESET.

300

Thermal overload protection, one time constant (PTTR, 26)

Chapter 6 Current protection

lockout _ release tlockout _ release = ln final final n


(Equation 66)

Here the final temperature is equal to the set or measured ambient temperature. The calculated component temperature can be monitored as it is exported from the function as a real figure. In some applications the measured current can involve a number of parallel lines. This is often used for cable lines where one bay connects several parallel cables. By setting the parameter IMult to the number of parallel lines (cables) the actual current on one line is used in the protection algorithm. To activate this option the input MULTPU must be activated. The function has a reset input: RESET. By activating this input the calculated temperature is reset to its default initial value. This is useful during testing when secondary injected current has given a calculated false temperature level.

301

Thermal overload protection, one time constant (PTTR, 26)

Chapter 6 Current protection

Final Temp > TripTemp

PICKUP

Calculation of actual temperature

actual temperature

I3P

Calculation of final temperature Actual Temp > AlarmTemp ALARM

TRIP Actual Temp > TripTemp S R Actual Temp < Recl Temp

LOCKOUT

Calculation of time to trip

time to trip

Calculation of time to reset of lockout

time to reset of lockout

en05000736_ansi.vsd

Figure 156: Functional overview of THL

302

Thermal overload protection, one time constant (PTTR, 26)

Chapter 6 Current protection

6.3

Function block
THL1LPTTR_26 I3P BLOCK BLKTR MULTPU AMBTEMP SENSFLT RESET TRIP PICKUP ALARM LOCKOUT

en04000396_ansi.vsd

Figure 157: THL function block

6.4

Input and output signals


Table 157: Input signals for the LPTTR_26 (THL1-) function block
Signal Description

I3P BLOCK BLKTR MULTPU AMBTEMP SENSFLT RESET

Group connection Block of function Block of trip Current multiplyer used when THOL is for two or more lines Ambient temperature from external temperature sensor Validity status of ambient temperature sensor Reset of internal thermal load counter

Table 158: Output signals for the LPTTR_26 (THL1-) function block
Signal Description

TRIP PICKUP ALARM LOCKOUT

Trip Pickup Signal Alarm signal Lockout signal

303

Thermal overload protection, one time constant (PTTR, 26)

Chapter 6 Current protection

6.5

Setting parameters
Table 159: Basic parameter group settings for the LPTTR_26 (THL1-) function
Parameter Range Step Default Unit Description

Operation IBase TRef

Disabled Enabled 0 - 99999 0 - 600

1 1

Off 3000 90

A Deg

Disable/Enable Operation Base current in A End temperature rise above ambient of the line when loaded with IRef The load current (in % of IBase) leading to TRef temperature Current multiplier when function is used for two or more lines Time constant of the line in minutes. Temperature level for pickup (alarm) Temperature level for trip Temperature for reset of lockout after trip Operate pulse length. Minimum one execution cycle External temperature sensor availiable Ambient temperature used when AmbiSens is set to Off. Temperature raise above ambient temperature at startup

IRef

0 - 400

100

%IB

IMult

1-5

Tau AlarmTemp TripTemp ReclTemp tPulse

0 - 1000 0 - 200 0 - 600 0 - 600 0.05 - 0.30

1 1 1 1 0.01

45 80 90 75 0.1

Min Deg Deg Deg s

AmbiSens DefaultAmbTemp

Disabled Enabled -50 - 250

Off 20

Deg

DefaultTemp

-50 - 600

50

Deg

304

Thermal overload protection, one time constant (PTTR, 26)

Chapter 6 Current protection

6.6

Technical data
Table 160: Thermal overload protection, one time constant (PTTR, 26)
Function Range or value Accuracy 1.0% of In 1.0C

Reference current Pickup temperature reference Operate time:

(0-400)% of Ibase (0-400)C Ip = load current before overload occurs


2 2

IEC 60255-8, class 5 + 200 ms

I Ip t = ln 2 I Ib 2
I = Imeasured Alarm temperature Trip temperature Reset level temperature

Time constant = (01000) minutes

(0-200)C (0-400)C (0-400)C

2.0% of heat content trip 2.0% of heat content trip 2.0% of heat content trip

305

Breaker failure protection (RBRF, 50BF)

Chapter 6 Current protection

Breaker failure protection (RBRF, 50BF)


Function block name: BFPxANSI number: 50BF IEC 61850 logical node name: IEC 60617 graphical symbol:

CCRBRF

3I>BF

7.1

Introduction
The circuit breaker failure function ensures fast back-up tripping of surrounding breakers. The breaker failure protection operation can be current based, contact based or adaptive combination between these two principles. A current check with extremely short reset time is used as a check criteria to achieve a high security against unnecessary operation. The breaker failure protection can be single- or three-phase initiated to allow use with single pole tripping applications. For the three-phase version of the breaker failure protection the current criteria can be set to operate only if two out of four e.g. two phases or one phase plus the residual current pickups. This gives a higher security to the back-up trip command. The function can be programmed to give a single- or three phase re-trip of the own breaker to avoid unnecessary tripping of surrounding breakers at an incorrect initiation due to mistakes during testing.

7.2

Principle of operation
The breaker failure protection function is initiated from protection trip command, either from protection functions within the protection terminal or from external protection devices. The initiate signal can be phase selective or general (for all three phases). Phase selective initiate signals enable single pole re-trip function. This means that a second attempt to open the breaker is done. The re-trip attempt can be made after a set time delay. For transmission lines single pole trip and autoreclosing is often used. The re-trip function can be phase selective if it is initiated from phase selective line protection. The re-trip function can be done with or without current check. With the current check the re-trip is only performed if the current through the circuit breaker is larger than the operate current level. The initiate signal can be an internal or external protection trip signal. If this initiate signal gets high at the same time as current is detected through the circuit breaker, the back-up trip timer is started. If the opening of the breaker is successful this is detected by the function, both by detection of low RMS current and by a special adapted algorithm. The special algorithm enables a very fast detection of successful breaker opening, i.e. fast resetting of the current measurement. If the current detection has not detected breaker opening before the back-up timer has run its time a back-up trip is initiated. There is also a possibility to have a second back-up trip output activated after an added settable time after the first back-up trip.

306

Breaker failure protection (RBRF, 50BF)

Chapter 6 Current protection

Further the following possibilities are available: The minimum length of the re-trip pulse, the back-up trip pulse and the back-up trip pulse 2 are settable. The re-trip pulse, the back-up trip pulse and the back-up trip pulse 2 will however sustain as long as there is an indication of closed breaker. In the current detection it is possible to use three different options: 1 out of 3 where it is sufficient to detect failure to open (high current) in one pole, 1 out of 4 where it is sufficient to detect failure to open (high current) in one pole or high residual current and 2 out of 4 where at least two current (phase current and/or residual current) shall be high for breaker failure detection. The current detection for the residual current can be set different from the setting of phase current detection. It is possible to have different re-trip time delays for single phase faults and for multi-phase faults. The back-up trip can be made without current check. It is possible to have this option activated for small load currents only. It is possible to have instantaneous back-up trip function if a signal is high if the circuit breaker is insufficient to clear faults, for example at low gas pressure.

Current AND BLOCK tp AND 0-t1 0 TRRET_A

PU_IA AND BFI_3P BFI_A OR

Current & Contact

OR TRRET

OR 52a_A AND Contact B C AND

en05000832_ansi.vsd

Figure 158: Simplified logic scheme of the retrip function

307

Breaker failure protection (RBRF, 50BF)

Chapter 6 Current protection

1 out of 3 Current AND BLOCK 1 out of 4 AND OR OR OR 1 of 4 OR 1 of 3

PU_A AND BFI_3P BFI_A

Current & Contact

CBCLDL1

AND Contact

AND AND

Current AND BLOCK Current & Contact AND

PU_B AND BFI_3P BFI_B OR

AND

AND

OR AND AND Contact AND Current AND BLOCK Current & Contact AND OR AND 2 out of 4 OR 2 of 4 AND

CBCLDL2

PU_C AND BFI_3P BFI_C OR

CBCLDL3

AND Contact

AND

Current AND BLOCK

PU_N AND BFI_3P en05000485_ansi.vsd

308

Breaker failure protection (RBRF, 50BF)

Chapter 6 Current protection

Figure 159: Simplified logic scheme of the back-up trip function Internal logical signals PU_A, PU_B, PU_C have logical value 1 when current in respective phase has magnitude larger than setting parameter Pickup_PH. Internal logical signal PU_N has logical value 1 when neutral current has magnitude larger than setting parameter Pickup_N.

More than 1 current high AND 1 of 3 0-t2MPh 0 tp OR TRBU

1 of 4

OR

0-t2 0 0-t3 0

tp TRBU2

2 of 3 AND 52FAIL 0-CBALARM 0 CBALARM

en06000223_ansi.vsd

Figure 160: Simplified logic scheme of the back-up trip function

7.3

Function block
BFP1CCRBRF_50BF I3P BLOCK BFI_3P BFI_A BFI_B BFI_C 52A_A 52A_B 52A_C 52FAIL TRBU TRBU2 TRRET TRRET_A TRRET_B TRRET_C CBALARM

en06000188_ansi.vsd

Figure 161: BFP function block

309

Breaker failure protection (RBRF, 50BF)

Chapter 6 Current protection

7.4

Input and output signals


Table 161: Input signals for the CCRBRF_50BF (BFP1-) function block
Signal Description

I3P BLOCK BFI_3P BFI_A BFI_B BFI_C 52a_A 52a_B 52a_C 52FAIL

Current connection Block of function Three phase breaker failure initiation Phase A breaker failure initiation Phase B breaker failure initiation Phase C breaker failure initiation Circuit breaker closed in phase A Circuit breaker closed in phase B Circuit breaker closed in phase C CB faulty, unable to trip. Back-up trip instantanously.

Table 162: Output signals for the CCRBRF_50BF (BFP1-) function block
Signal Description

TRBU TRBU2 TRRET TRRET_A TRRET_B TRRET_C CBALARM

Back-up trip by breaker failure protection function Second back-up trip by breaker failure protection function Retrip by breaker failure protection function Retrip by breaker failure protection function phase A Retrip by breaker failure protection function phase B Retrip by breaker failure protection function phase C Alarm for faulty circuit breaker

7.5

Setting parameters
Table 163: Basic parameter group settings for the CCRBRF_50BF (BFP1-) function
Parameter Range Step Default Unit Description

Operation IBase FunctionMode

Disabled Enabled 1 - 99999 Current Contact Current&Contact 2 out of 4 1 out of 3 1 out of 4 Retrip Off CB Pos Check No CBPos Check

1 -

Disabled 3000 Current

A -

Disable/Enable Operation Base current Detection principle for back-up trip Back-up trip mode

BuTripMode

1 out of 3

RetripMode

Retrip Off

Operation mode of re-trip logic

310

Breaker failure protection (RBRF, 50BF)

Chapter 6 Current protection

Parameter

Range

Step

Default

Unit

Description

Pickup_PH Pickup_N t1 t2 t2MPh tPulse

5 - 200 2 - 200 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000

1 1 0.001 0.001 0.001 0.001

10 10 0.000 0.150 0.150 0.200

%IB %IB s s s s

Phase current pickup in % of IBase Operate residual current level in % of IBase Time delay of re-trip Time delay of back-up trip Time delay of back-up trip at multi-phase pickup Trip pulse duration

Table 164: Advanced parameter group settings for the CCRBRF_50BF (BFP1-) function
Parameter Range Step Default Unit Description

Pickup_BlkCont

5 - 200

20

%IB

Current for blocking of CB contact operation in % of IBase Additional time delay to 27P2TDLY for a second back-up trip Time delay for CB faulty signal

t3

0.000 - 60.000

0.001

0.030

tCBAlarm

0.000 - 60.000

0.001

5.000

7.6

Technical data
Table 165: Breaker failure protection (RBRF, 50BF)
Function Range or value Accuracy 1.0% of In at I In 1.0% of I at I > In

Operate phase current

(5-200)% of lbase > 95% (2-200)% of lbase > 95% (5-200)% of lbase > 95% (0.000-60.000) s

Reset ratio, phase current Operate residual current

1.0% of In at I In 1.0% of I at I > In

Reset ratio, residual current Phase current pickup for blocking of contact function Reset ratio Timers

1.0% of In at I In 1.0% of I at I > In

0.5% 10 ms

Operate time for current detection 10 ms typically Reset time for current detection 15 ms maximum

311

Stub protection (PTOC, 50STB)

Chapter 6 Current protection

Stub protection (PTOC, 50STB)


Function block name: STB-ANSI number: 50STB IEC 61850 logical node name: IEC 60617 graphical symbol:

STBPTOC

3I>STUB

8.1

Introduction
When a power line is taken out of service for maintenance and the line disconnector is opened in multi-breaker arrangements the voltage transformers will mostly be outside on the disconnected part. The primary line distance protection will thus not be able to operate and must be blocked. The stub protection covers the zone between the current transformers and the open disconnector. The three phase instantaneous overcurrent function is released from a 89b auxiliary contact on the line disconnector.

8.2

Principle of operation
The sampled analog phase currents are pre-processed in a discrete Fourier filter (DFT) block. From the fundamental frequency components of each phase current the RMS value of each phase current is derived. These phase current values are fed to the STB function. In a comparator the RMS values are compared to the set operation current value of the functionIPickup. If a phase current is larger than the set operation current the signal from the comparator for this phase is set to true. This signal will, in combination with the release signal from line disconnection (RELEASE input), activate the timer of this function. The function can be blocked by activation of the BLOCK input. If the fault current remains during the set timer delayt the function gives a trip signal.

312

Stub protection (PTOC, 50STB)

Chapter 6 Current protection

STUB PROTECTION FUNCTION

BLOCK TRIP

PU_A OR

AND

PU_B

PU_C ENABLE

en05000731_ansi.vsd

Figure 162: Simplified logic diagram for the stub protection

8.3

Function block
STB1STBPTOC_50STB I3P BLOCK BLKTR ENABLE TRIP PICKUP

en05000678_ansi.vsd

Figure 163: STB function block

8.4

Input and output signals


Table 166: Input signals for the STBPTOC_50STB (STB1-) function block
Signal Description

I3P BLOCK BLKTR ENABLE

Group signal for current input Block of function Block of trip Enable stub protection usually with open disconnect switch (89b)

313

Stub protection (PTOC, 50STB)

Chapter 6 Current protection

Table 167: Output signals for the STBPTOC_50STB (STB1-) function block
Signal Description

TRIP PICKUP

Trip Pickup

8.5

Setting parameters
Table 168: Basic parameter group settings for the STBPTOC_50STB (STB1-) function
Parameter Range Step Default Unit Description

Operation IBase EnableMode

Disabled Enabled 1 - 99999 Release Continuous 1 - 2500

1 -

Off 3000 Release

A -

Disable/Enable Operation Base current Enable stub protection usually with open disconnect switch (89b) Pickup current level in % of IBase

IPickup

200

%IB

Table 169: Advanced parameter group settings for the STBPTOC_50STB (STB1-) function
Parameter Range Step Default Unit Description

0.000 - 60.000

0.001

0.000

Time delay

8.6

Technical data
Table 170: Stub protection (PTOC, 50STB)
Function Range or value Accuracy 1.0% of In at I In 1.0% of I at I > In

Operate current

(1-2500)% of Ibase > 95% (0.000-60.000) s 25 ms typically at 0 to 2 x Iset 25 ms typically at 2 to 0 x Iset 10 ms typically at 0 to 2 x Iset 15 ms typically

Reset ratio Definite time Operate time, pickup function Reset time, pickup function Critical impulse time Impulse margin time

0.5% 10 ms

314

Pole discrepancy protection (RPLD, 52PD)

Chapter 6 Current protection

Pole discrepancy protection (RPLD, 52PD)


Function block name: PDx-ANSI number: 50PD IEC 61850 logical node name: IEC 60617 graphical symbol:

CCRPLD

PD

9.1

Introduction
Single pole operated circuit breakers can due to electrical or mechanical failures end up with the different poles in different positions (close-open). This can cause negative and zero sequence currents which gives thermal stress on rotating machines and can cause unwanted operation of zero sequence or negative sequence current functions. Normally the own breaker is tripped to correct the positions. If the situation warrants, the remote end as well as the local bus breakers can be intertripped to clear the unsymmetrical load situation. The pole discrepancy function operates based on information from auxiliary contacts of the circuit breaker for the three phases with additional criteria from unsymmetrical phase current when required.

9.2

Principle of operation
The detection of pole discrepancy can be made in two different ways. If the contact based function is used an external logic can be made by connecting the auxiliary contacts of the circuit breaker so that a pole discrepancy is indicated. This is shown in figure 164

C.B.

52a 52a 52a 52b 52b 52b

poleDiscrepancy Signal from C.B.


ANSI_en05000287.vsd

Figure 164: Pole discrepancy external detection logic

315

Pole discrepancy protection (RPLD, 52PD)

Chapter 6 Current protection

This single binary signal is connected to a binary input of the IED. The appearance of this signal will start a timer that will give a trip signal after the set delay. There is also a possibility to connect all phase selective auxiliary contacts (phase contact open and phase contact closed) to binary inputs of the IED. This is shown in figure 165

C.B.

52a 52a 52a + 52b 52b 52b

poleOneClosed from C.B. poleTwoClosed from C.B. poleThreeClosed from C.B. poleOneOpened from C.B. poleTwoOpened from C.B. poleThreeOpened from C.B.
en05000288_ansi.vsd

Figure 165: Pole discrepancy signals for internal logic In this case the logic is realized within the function. If the inputs are indicating pole discrepancy the trip timer is started. This timer will give a trip signal after the set delay. Pole discrepancy can also be detected by means of phase selective current measurement. The sampled analog phase currents are pre-processed in a discrete Fourier filter (DFT) block. From the fundamental frequency components of each phase current the RMS value of each phase current is derived. These phase current values are fed to the PD (RPLD) function. The difference between the smallest and the largest phase current is derived. If this difference is larger than a set ratio the trip timer is started. This timer will give a trip signal after the set delay. The current based pole discrepancy function can be set to be active either continuously or only directly in connection to breaker open or close command. The function also has a binary input that can be configured from the autoreclosing function, so that the pole discrepancy function can be blocked during sequences with a single pole open if single pole autoreclosing is used. The simplified block diagram of the current and contact based pole discrepancy function is shown in figure 166.

316

Pole discrepancy protection (RPLD, 52PD)

Chapter 6 Current protection

BLOCK BLKDBYAR OR

PolPosAuxCont 52b_A 52a_A 52b_B 52a_B 52b_C 52a_C AND Pole Disc repancy detection 150 ms AND OR PD signal from CB EXTPDIND CLOSECMD OPENCMD OR AND Unsymmetry current detection en 05000747 _ansi.vsd AND 0- t 0 TRIP

t+ 200 ms

Figure 166: Simplified block diagram of pole discrepancy function - contact and current based The pole discrepancy function is disabled if: The terminal is in TEST mode (TEST-ACTIVE is high) and the function has been blocked from the HMI (BlockPD=Yes) The input signal BLOCK is high The input signal BLKDBYAR is high

The BLOCK signal is a general purpose blocking signal of the pole discrepancy function. It can be connected to a binary input of the terminal in order to receive a block command from external devices or can be software connected to other internal functions of the terminal itself in order to receive a block command from internal functions. Through OR gate it can be connected to both binary inputs and internal function outputs. The BLKDBYAR signal blocks the pole discrepancy operation when a single phase autoreclosing cycle is in progress. It can be connected to the output signal AR01-1PT1 if the autoreclosing function is integrated in the terminal; if the autoreclosing function is an external device, then BLKDBYAR has to be connected to a binary input of the terminal and this binary input is connected to a signalization 1phase autoreclosing in progress from the external autoreclosing device. If the pole discrepancy function is enabled, then two different criteria will generate a trip signal TRIP: Pole discrepancy signalling from the circuit breaker.

317

Pole discrepancy protection (RPLD, 52PD)

Chapter 6 Current protection

9.2.1

Unsymmetrical current detection.

Pole discrepancy signalling from circuit breaker If one or two poles of the circuit breaker have failed to open or to close (pole discrepancy status), then the function input EXTPDIND is activated from the pole discrepancy signal derived from the circuit breaker auxiliary contacts (one NO contact for each phase connected in parallel, and in series with one NC contact for each phase connected in parallel) and, after a settable time interval t (0-60 s), a 150 ms trip pulse command TRIP is generated by the pole discrepancy function. Unsymmetrical current detection Unsymmetrical current detection is based on checking that:

9.2.2

any phase current is lower than CurrUnsymPU of the highest current in the remaining two phases the highest phase current is greater than CurrRelPU of the rated current

If these conditions are true, an unsymmetrical condition is detected and the internal signal INPS is turned high. This detection is enabled to generate a trip after a set time delay t (0-60 s) if the detection occurs in the next 200 ms after the circuit breaker has received a command to open trip or close and if the unbalance persists. The 200 ms limitation is for avoiding unwanted operation during unsymmetrical load conditions. The pole discrepancy function is informed that a trip or close command has been given to the circuit breaker through the inputs CLOSECMD (for closing command information) and OPENCMD (for opening command information). These inputs can be connected to terminal binary inputs if the information are generated from the field (i.e. from auxiliary contacts of the close and open push buttons) or may be software connected to the outputs of other integrated functions (i.e. close command from a control function or a general trip from integrated protections).

9.3

Function block
PD01CCRPLD_52PD I3P BLOCK BLKDBYAR CLOSECMD OPENCMD EXTPDIND 52B_A 52A_A 52B_B 52A_B 52B_C 52A_C TRIP PICKUP

en06000275_ansi.vsd

Figure 167: PD function block

318

Pole discrepancy protection (RPLD, 52PD)

Chapter 6 Current protection

9.4

Input and output signals


Table 171: Input signals for the CCRPLD_52PD (PD01-) function block
Signal Description

I3P BLOCK BLKDBYAR CLOSECMD OPENCMD EXTPDIND 52b_A 52a_A 52b_B 52a_B 52b_C 52a_C

Group signal for current input Block of function Block of function at CB single phase auto re-closing cycle Close command to CB Open command to CB Pole discrepancy signal from CB logic Phase A Pole opened indication from CB Phase A Pole closed indication from CB Phase B Pole opened indication from CB Phase B Pole closed indication from CB Phase C Pole opened indication from CB Phase C Pole closed indication from CB

Table 172: Output signals for the CCRPLD_52PD (PD01-) function block
Signal Description

TRIP PICKUP

Trip signal to CB Trip condition TRUE, waiting for time delay

9.5

Setting parameters
Table 173: Basic parameter group settings for the CCRPLD_52PD (PD01-) function
Parameter Range Step Default Unit Description

Operation IBase

Disabled Enabled 1 - 99999

Off 3000

Disable/Enable Operation Base current

319

Pole discrepancy protection (RPLD, 52PD)

Chapter 6 Current protection

Parameter

Range

Step

Default

Unit

Description

tTrip ContactSel

0.000 - 60.000

0.001

0.300 Off

s -

Time delay between trip condition and trip signal Contact function selection Current function selection

Disabled PD signal from CB Pole pos aux cont. Disabled CB oper monitor Continuous monitor 0 - 100 -

CurrentSel

Off

CurrUnsymPU

80

Unsym magn of lowest phase current compared to the highest. Current magnitude for release of the function in % of IBase

CurrRelPU

0 - 100

10

%IB

9.6

Technical data
Table 174: Pole discrepancy protection (RPLD, 52PD)
Function Range or value Accuracy 1.0% of In 0.5% 10 ms

Operate current Time delay

(0100)% of Ibase (0.000-60.000) s

320

Directional underpower protection (PDUP, 32)

Chapter 6 Current protection

10

Directional underpower protection (PDUP, 32)


Function block name: ANSI number: 32 IEC 61850 logical node name: IEC 60617 graphical symbol:

P><

10.1

Introduction
The task of a generator in a power plant is to convert mechanical energy available as a torque on a rotating shaft to electric energy. Sometimes, the mechanical power from a prime mover may decrease so much that it does not cover bearing losses and ventilation losses. Then, the synchronous generator becomes a synchronous motor and starts to take electric power from the rest of the power system. This operating state, where individual synchronous machines operate as motors, implies no risk for the machine itself. If the generator under consideration is very large and if it consumes lots of electric power, it may be desirable to disconnect it to ease the task for the rest of the power system. Often, the motoring condition may imply that the turbine is in a very dangerous state. The task of the reverse power protection is to protect the turbine and not to protect the generator itself. Figure 168 illustrates the reverse power protection with underpower relay and with overpower relay. The underpower relay gives a higher margin and should provide better dependability. On the other hand, the risk for unwanted operation immediately after synchronization may be higher. One should set the underpower relay to trip if the active power from the generator is less than about 2%. One should set the overpower relay to trip if the power flow from the network to the generator is higher than 1% depending on the type of turbine.

Underpower Relay Q

Overpower Relay Q

Operate Line Margin

Operate Line Margin

Operating point without turbine torque

Operating point without turbine torque

en06000315.vsd

Figure 168: Protection with underpower relay and overpower relay

321

Directional underpower protection (PDUP, 32)

Chapter 6 Current protection

10.2

Principle of operation
A simplified scheme showing the principle of the power protection function is shown in figure 169. The function has two stages with individual settings.

Chosen current phasors Complex power calculation

P Derivation of S(composant) in Char angle S(angle) S(angle) < Power1 t 0 Trip1 Pickup1

Chosen voltage phasors

S(angle) < Power2

t 0

Trip2 Pickup2

P = POWRE Q = POWIM

en06000438_ansi.vsd

Figure 169: Simplified logic diagram of the power protection function The function will use voltage and current phasors calculated in the pre-processing blocks. The apparent complex power is calculated according to chosen formula as shown in table 175.

322

Directional underpower protection (PDUP, 32)

Chapter 6 Current protection

Table 175: Complex power calculation


Set value: measureMode Formula used for complex power calculation

A, B, C

S = V A I A* + VB I B* + VC I C *

Arone

S = VAB I A* VBC IC *

PosSeq

S = 3 VPosSeq I PosSeq*

AB

S = VAB ( I A* I B* )

BC

S = VBC ( I B* IC * )

CA

S = VCA ( I C * I A* )

S = 3 V A I A*

S = 3 VB I B*

S = 3 VC I C *

NegSeq

S = 3 VNegSeq I NegSeq *

The active and reactive power is available from the function and can be used for monitoring and fault recording. The component of the complex power S = P + jQ in the direction Angle1(2) is calculated. If this angle is 0 the active power component P is calculated. If this angle is 90 the reactive power component Q is calculated.

323

Directional underpower protection (PDUP, 32)

Chapter 6 Current protection

The calculated power component is compared to the power pick up setting Power1(2). A pickup signal PICKUP1(2) is activated if the calculated power component is smaller than the pick up value. After a set time delay TripDelay1(2) a trip TRIP1(2) signal is activated if the pickup signal is still active. At activation of any of the two stages a common signal PICKUP will be activated. At trip from any of the two stages also a common signal TRIP will be activated. To avoid instability there is a settable hysteresis in the power function. The absolute hysteresis of the stage1(2) is Hysteresis1(2) = abs (Power1(2) + drop-power1(2)). For generator low forward power protection the power setting is very low, normally down to 0.02 pu of rated generator power. The hysteresis should therefore be set to a smaller value. The drop-power value of stage1 can be calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2) + Hysteresis1(2) For small power1 values the hysteresis1 may not be too big, because the drop-power1(2) would be too small. In such cases, the hysteresis1 greater than (0.5 * Power1(2)) is corrected to the minimal value. If the measured power drops under the drop-power1(2) value the function will reset after a set time DropDelay1(2). The reset means that the pickup signal will drop out ant that the timer of the stage will reset.
10.2.1 Low pass filtering In order to minimize the influence of the noise signal on the measurement it is possible to introduce the recursive, low pass filtering of the measured values for S (P, Q). This will make slower measurement response to the step changes in the measured quantity. Filtering is performed in accordance with the following recursive formula:

S = k SOld + (1 k ) SCalculated
(Equation 67)

Where S Sold SCalculated k is a new measured value to be used for the protection function is the measured value given from the function in previous execution cycle is the new calculated value in the present execution cycle is settable parameter by the end user which influence the filter properties

Default value for parameter k is 0.00. With this value the new calculated value is immediately given out without any filtering (i.e. without any additional delay). When k is set to value bigger than 0, the filtering is enabled. A typical value for k = 0.14.
10.2.2 Calibration of analog inputs Measured currents and voltages used in the Power function can be calibrated to get class 0.5 measuring accuracy. This is achieved by amplitude and angle compensation at 5, 30 and 100% of rated current and voltage. The compensation below 5% and above 100% is constant and linear in between, see example in figure 170.

324

Directional underpower protection (PDUP, 32)

Chapter 6 Current protection

% of In -10 IMagComp5 IMagComp30 IMagComp100

Magnitude compensation

Measured current 5 30 0-5%: Constant 5-30-100%: Linear >100%: Constant 100 % of In

-10

Degrees -10 IAngComp30 IAngComp5 IAngComp100

Angle compensation

Measured current 5 -10 30 100 % of In

en05000652_ansi.vsd

Figure 170: Calibration curves The first current and voltage phase in the group signals will be used as reference and the amplitude and angle compensation will be used for related input signals. Analog outputs from the function can be used for service values or in the disturbance report. The active power is provided as a MW value: P, or in percent of base power: PPERCENT. The reactive power is provided as a Mvar value: Q, or in percent of base power: QPERCENT.

325

Directional underpower protection (PDUP, 32)

Chapter 6 Current protection

10.3

Function block
GUP1GUPPDUP_37 I3P V3P BLOCK BLOCK1 BLOCK2 TRIP TRIP1 TRIP2 PICKUP PICKUP1 PICKUP2 P PPERCENT Q QPERCENT en07000027_ansi.vsd

Figure 171: GUP function block

10.4

Input and output signals


Table 176: Input signals for the GUPPDUP_37 (GUP1-) function block
Signal Description

I3P V3P BLOCK BLOCK1 BLOCK2

Current group connection Voltage group connection Block of function Block of stage 1 Block of stage 2

Table 177: Output signals for the GUPPDUP_37 (GUP1-) function block
Signal Description

TRIP TRIP1 TRIP2 PICKUP PICKUP1 PICKUP2 P PPERCENT Q QPERCENT

Common trip signal Trip of stage 1 Trip of stage 2 Common pickup Pickup of stage 1 Pickup of stage 2 Active Power in MW Active power in % of SBASE Reactive power in Mvar Reactive power in % of SBASE

326

Directional underpower protection (PDUP, 32)

Chapter 6 Current protection

10.5

Setting parameters
Table 178: Basic general settings for the GUPPDUP_37 (GUP1-) function
Parameter Range Step Default Unit Description

IBase VBase Mode

1 - 99999 0.05 - 2000.00 A, B, C Arone Pos Seq AB BC CA A B C

1 0.05 -

3000 400.00 Pos Seq

A kV -

Current-Reference (primary current A) Voltage-Reference (primary voltage kV) Selection of measured current and voltage

Table 179: Basic parameter group settings for the GUPPDUP_37 (GUP1-) function
Parameter Range Step Default Unit Description

Operation OpMode1 Power1 Angle1 TripDelay1 DropDelay1 OpMode2 Power2 Angle2 TripDelay2 DropDelay2

Disabled Enabled Disabled UnderPower 0.0 - 500.0 -180.0 - 180.0 0.010 - 6000.000 0.010 - 6000.000 Disabled UnderPower 0.0 - 500.0 -180.0 - 180.0 0.010 - 6000.000 0.010 - 6000.000

0.1 0.1 0.001 0.001 0.1 0.1 0.001 0.001

Off UnderPower 1.0 0.0 1.000 0.060 UnderPower 1.0 0.0 1.000 0.060

%SB Deg s s %SB Deg s s

Operation Disable / Enable Operation mode 1 Power setting for stage 1 in % of Sbase Angle for stage 1 Trip delay for stage 1 Drop delay for stage 1 Operation mode 2 Power setting for stage 2 in % of Sbase Angle for stage 2 Trip delay for stage 2 Drop delay for stage 2

327

Directional underpower protection (PDUP, 32)

Chapter 6 Current protection

Table 180: Advanced parameter group settings for the GUPPDUP_37 (GUP1-) function
Parameter Range Step Default Unit Description

TD

0.00 - 0.99

0.01

0.00

Low pass filter coefficient for power measurement, P and Q Absolute hysteresis of stage 1 Absolute hysteresis of stage 2 Magnitude factor to calibrate current at 5% of In Magnitude factor to calibrate current at 30% of In Magnitude factor to calibrate current at 100% of In Magnitude factor to calibrate voltage at 5% of Vn Magnitude factor to calibrate voltage at 30% of Vn Magnitude factor to calibrate voltage at 100% of Vn Angle calibration for current at 5% of In Angle calibration for current at 30% of In Angle calibration for current at 100% of In

Hysteresis1 Hysteresis2 IMagComp5 IMagComp30 IMagComp100

0.2 - 5.0 0.2 - 5.0 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000

0.1 0.1 0.001 0.001 0.001

0.5 0.5 0.000 0.000 0.000

pu pu % % %

VMagComp5 VMagComp30

-10.000 - 10.000 -10.000 - 10.000

0.001 0.001

0.000 0.000

% %

VMagComp100

-10.000 - 10.000

0.001

0.000

IAngComp5 IAngComp30 IAngComp100

-10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000

0.001 0.001 0.001

0.000 0.000 0.000

Deg Deg Deg

10.6

Technical data
Table 181: Directional underpower protection (PDUP)
Function Range or value Accuracy

Power level

(0.0500.0)% of Sbase At low setting: (0.5-2.5)% of Sbase (2.5-10)% of Sbase

< 0.5% of Sbase with calibration

< 20% of set value < 10% of set value 2 degrees


0.5% 10 ms

Characteristic angle Timers

(-180.0180.0) degrees (0.00-6000.00) s

328

Directional overpower protection (PDOP, 32)

Chapter 6 Current protection

11

Directional overpower protection (PDOP, 32)


Function block name: GOPx ANSI number: 32 IEC 61850 logical node name: IEC 60617 graphical symbol:

P><

GOPPDOP

11.1

Introduction
The task of a generator in a power plant is to convert mechanical energy available as a torque on a rotating shaft to electric energy. Sometimes, the mechanical power from a prime mover may decrease so much that it does not cover bearing losses and ventilation losses. Then, the synchronous generator becomes a synchronous motor and starts to take electric power from the rest of the power system. This operating state, where individual synchronous machines operate as motors, implies no risk for the machine itself. If the generator under consideration is very large and if it consumes lots of electric power, it may be desirable to disconnect it to ease the task for the rest of the power system. Often, the motoring condition may imply that the turbine is in a very dangerous state. The task of the reverse power protection is to protect the turbine and not to protect the generator itself. Figure 172 illustrates the reverse power protection with underpower relay and with overpower relay. The underpower relay gives a higher margin and should provide better dependability. On the other hand, the risk for unwanted operation immediately after synchronization may be higher. One should set the underpower relay to trip if the active power from the generator is less than about 2%. One should set the overpower relay to trip if the power flow from the network to the generator is higher than 1%.

Underpower Relay Q

Overpower Relay Q

Operate Line Margin

Operate Line Margin

Operating point without turbine torque

Operating point without turbine torque

en06000315.vsd

Figure 172: Reverse power protection with underpower relay and overpower relay

329

Directional overpower protection (PDOP, 32)

Chapter 6 Current protection

11.2

Principle of operation
A simplified scheme showing the principle of the power protection function is shown in figure 173. The function has two stages with individual settings.

Chosen current phasors Complex power calculation

P Derivation of S(composant) in Char angle S(angle) S(angle) > Power1 t 0 Trip1 Pickup1

Chosen voltage phasors

S(angle) > Power2

t 0

Trip2 Pickup2

P = POWRE Q = POWIM

en06000567_ansi.vsd

Figure 173: Simplified logic diagram of the power protection function The function will use voltage and current phasors calculated in the pre-processing blocks. The apparent complex power is calculated according to chosen formula as shown in table 182.

330

Directional overpower protection (PDOP, 32)

Chapter 6 Current protection

Table 182: Complex power calculation


Set value: measureMode Formula used for complex power calculation

A,B,C

S = V A IA + V B IB + V C IC
S = V AB I A V BC I C
* *

Arone

PosSeq

S = 3 V PosSeq I PosSeq
*

A,B

S = V AB (I A I B )

B,C

S = V BC (I B I C )

C,A

S = V CA (I C I A )

S = 3 V A IA

S = 3 V B IB

S = 3 V C IC

The active and reactive power is available from the function and can be used for monitoring and fault recording. The component of the complex power S = P + jQ in the direction Angle1(2) is calculated. If this angle is 0 the active power component P is calculated. If this angle is 90 the reactive power component Q is calculated. The calculated power component is compared to the power pick up setting Power1(2). A pickup signal PICKUP1(2) is activated if the calculated power component is larger than the pick up value. After a set time delay TripDelay1(2) a trip TRIP1(2) signal is activated if the pickup signal is still active. At activation of any of the two stages a common signal PICKUP will be activated. At trip from any of the two stages also a common signal TRIP will be activated.

331

Directional overpower protection (PDOP, 32)

Chapter 6 Current protection

To avoid instability there is a settable hysteresis in the power function. The absolute hysteresis of the stage1(2) is Hysteresis1(2) = abs (Power1(2) drop-power1(2)). For generator reverse power protection the power setting is very low, normally down to 0.02 pu of rated generator power. The hysteresis should therefore be set to a smaller value. The drop-power value of stage1 can be calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2) Hysteresis1(2) For small power1 values the hysteresis1 may not be too big, because the drop-power1(2) would be too small. In such cases, the hysteresis1 greater than (0.5 * Power1(2)) is corrected to the minimal value. If the measured power drops under the drop-power1(2) value the function will reset after a set time DropDelay1(2). The reset means that the pickup signal will drop out ant that the timer of the stage will reset.
11.2.1 Low pass filtering In order to minimize the influence of the noise signal on the measurement it is possible to introduce the recursive, low pass filtering of the measured values for S (P, Q). This will make slower measurement response to the step changes in the measured quantity. Filtering is performed in accordance with the following recursive formula:

S = k SOld + (1 k ) SCalculated
(Equation 68)

Where S Sold SCalculated

is a new measured value to be used for the protection function is the measured value given from the function in previous execution cycle is the new calculated value in the present execution cycle is settable parameter by the end user which influence the filter properties

Default value for parameter k is 0.00. With this value the new calculated value is immediately given out without any filtering (i.e. without any additional delay). When k is set to value bigger than 0, the filtering is enabled. A typical value for k = 0.14.
11.2.2 Calibration of analog inputs Measured currents and voltages used in the Power function can be calibrated to get class 0.5 measuring accuracy. This is achieved by amplitude and angle compensation at 5, 30 and 100% of rated current and voltage. The compensation below 5% and above 100% is constant and linear in between, see example in figure 174.

332

Directional overpower protection (PDOP, 32)

Chapter 6 Current protection

% of In -10 IMagComp5 IMagComp30 IMagComp100

Magnitude compensation

Measured current 5 30 0-5%: Constant 5-30-100%: Linear >100%: Constant 100 % of In

-10

Degrees -10 IAngComp30 IAngComp5 IAngComp100

Angle compensation

Measured current 5 -10 30 100 % of In

en05000652_ansi.vsd

Figure 174: Calibration curves The first current and voltage phase in the group signals will be used as reference and the amplitude and angle compensation will be used for related input signals. Analog outputs from the function can be used for service values or in the disturbance report. The active power is provided as a MW value: P, or in percent of base power: PPERCENT. The reactive power is provided as a Mvar value: Q, or in percent of base power: QPERCENT.

333

Directional overpower protection (PDOP, 32)

Chapter 6 Current protection

11.3

Function block
GOP1GOPPDOP_32 I3P V3P BLOCK BLOCK1 BLOCK2 TRIP TRIP1 TRIP2 PICKUP PICKUP1 PICKUP2 P PPERCENT Q QPERCENT en07000028_ansi.vsd

Figure 175: GOP function block

11.4

Input and output signals


Table 183: Input signals for the GOPPDOP_32 (GOP1-) function block
Signal Description

I3P V3P BLOCK BLOCK1 BLOCK2

Current group connection Voltage group connection Block of function Block of stage 1 Block of stage 2

Table 184: Output signals for the GOPPDOP_32 (GOP1-) function block
Signal Description

TRIP TRIP1 TRIP2 PICKUP PICKUP1 PICKUP2 P PPERCENT Q QPERCENT

Common trip signal Trip of stage 1 Trip of stage 2 Common pickup Pickup of stage 1 Pickup of stage 2 Active Power in MW Active power in % of SBASE Reactive power in Mvar Reactive power in % of SBASE

334

Directional overpower protection (PDOP, 32)

Chapter 6 Current protection

11.5

Setting parameters
Table 185: Basic general settings for the GOPPDOP_32 (GOP1-) function
Parameter Range Step Default Unit Description

IBase VBase Mode

1 - 99999 0.05 - 2000.00 A, B, C Arone Pos Seq AB BC CA A B C

1 0.05 -

3000 400.00 Pos Seq

A kV -

Current-Reference (primary current A) Voltage-Reference (primary voltage kV) Selection of measured current and voltage

Table 186: Basic parameter group settings for the GOPPDOP_32 (GOP1-) function
Parameter Range Step Default Unit Description

Operation OpMode1 Power1 Angle1 TripDelay1 DropDelay1 OpMode2 Power2 Angle2 TripDelay2 DropDelay2

Disabled Enabled Disabled OverPower 0.0 - 500.0 -180.0 - 180.0 0.010 - 6000.000 0.010 - 6000.000 Disabled OverPower 0.0 - 500.0 -180.0 - 180.0 0.010 - 6000.000 0.010 - 6000.000

0.1 0.1 0.001 0.001 0.1 0.1 0.001 0.001

Off OverPower 120.0 0.0 1.000 0.060 OverPower 120.0 0.0 1.000 0.060

%SB Deg s s %SB Deg s s

Operation Disable / Enable Operation mode 1 Power setting for stage 1 in % of Sbase Angle for stage 1 Trip delay for stage 1 Drop delay for stage 1 Operation mode 2 Power setting for stage 2 in % of Sbase Angle for stage 2 Trip delay for stage 2 Drop delay for stage 2

335

Directional overpower protection (PDOP, 32)

Chapter 6 Current protection

Table 187: Advanced parameter group settings for the GOPPDOP_32 (GOP1-) function
Parameter Range Step Default Unit Description

0.00 - 0.99

0.01

0.00

Low pass filter coefficient for power measurement, P and Q Absolute hysteresis of stage 1 in % of Sbase Absolute hysteresis of stage 2 in % of Sbase Magnitude factor to calibrate current at 5% of In Magnitude factor to calibrate current at 30% of In Magnitude factor to calibrate current at 100% of In Magnitude factor to calibrate voltage at 5% of Vn Magnitude factor to calibrate voltage at 30% of Vn Magnitude factor to calibrate voltage at 100% of Vn Angle calibration for current at 5% of In Angle calibration for current at 30% of In Angle calibration for current at 100% of In

Hysteresis1 Hysteresis2 IMagComp5 IMagComp30 IMagComp100

0.2 - 5.0 0.2 - 5.0 -10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000

0.1 0.1 0.001 0.001 0.001

0.5 0.5 0.000 0.000 0.000

pu pu % % %

VMagComp5 VMagComp30

-10.000 - 10.000 -10.000 - 10.000

0.001 0.001

0.000 0.000

% %

VMagComp100

-10.000 - 10.000

0.001

0.000

IAngComp5 IAngComp30 IAngComp100

-10.000 - 10.000 -10.000 - 10.000 -10.000 - 10.000

0.001 0.001 0.001

0.000 0.000 0.000

Deg Deg Deg

11.6

Technical data
Table 188: Directional overpower protection (PDOP)
Function Range or value Accuracy

Power level

(0.0500.0)% of Sbase At low setting: (0.5-2.5)% of Sbase (2.5-10)% of Sbase

< 0.5% of Sbase with calibration

< 20% of set value < 10% of set value 2 degrees


0.5% 10 ms

Characteristic angle Timers

(-180.0180.0) degrees (0.00-6000.00) s

336

Broken conductor check (PTOC, 46)

Chapter 6 Current protection

12

Broken conductor check (PTOC, 46)


Function block name: BRC ANSI number: 46 IEC 61850 logical node name: IEC 60617 graphical symbol:

BRCPTOC

12.1

Introduction
Conventional protection functions can not detect the broken conductor condition. The broken conductor monitoring function (BRC), consisting of continuous current unsymmetry check on the line where the terminal is connected will give alarm or trip at detecting broken conductors.

12.2

Principle of operation
The BRCPTOC function detects a broken conductor condition by detecting the unsymmetry between currents in the three phases. The current-measuring elements continuously measure the three-phase currents. The current unsymmetry signal output PICKUP is set on if : The difference in currents between the phase with the lowest current and the phase with the highest current is greater than set percentage Pickup_ub of the highest phase current The lowest phase current is below 50% of the minimum setting value Pickup_PH

The third condition is included to avoid problems in systems involving parallel lines. If a conductor breaks in one phase on one line the parallel line will experience an increase in current in the same phase. This might result in the first two conditions being satisfied. If the unsymmetrical detection lasts for a period longer than the set time tOper the TRIP output is activated. The simplified logic diagram of the broken conductor check function is shown in figure 176 The function is disabled (blocked) if: The IED is in TEST status and the function has been blocked from the HMI test menu (BlockBRC=Yes). The input signal BLOCK is high.

The BLOCK input can be connected to a binary input of the terminal in order to receive a block command from external devices or can be software connected to other internal functions of the terminal itself in order to receive a block command from internal functions. The output trip signal TRIP is a three phase trip. It can be used to command a trip to the circuit breaker or for alarm purpose only.

337

Broken conductor check (PTOC, 46)

Chapter 6 Current protection

TEST TEST-ACTIVE AND BlockBRC = Yes BRC--START BRC--BLOCK Unsymmetrical Current Detection PU_ub IA<50%Pickup_PN IB<50%Pickup_PN IC<50%Pickup_PN
en07000123.vsd

OR

Function Enable AND 0-t 0 BRC--TRIP

OR

Figure 176: Simplified logic diagram for broken conductor check function.

12.3

Function block
BRC1BRCPTOC_46 I3P BLOCK BLKTR TRIP PICKUP

en07000034_ansi.vsd

Figure 177: BRC function block

12.4

Input and output signals


Table 189: Input signals for the BRCPTOC_46 (BRC1-) function block
Signal Description

I3P BLOCK BLKTR

Group signal for current input Block of function Blocks the operate output

338

Broken conductor check (PTOC, 46)

Chapter 6 Current protection

Table 190: Output signals for the BRCPTOC_46 (BRC1-) function block
Signal Description

TRIP PICKUP

Operate signal of the protection logic Pickup signal of the protection logic

12.5

Setting parameters
Table 191: Basic parameter group settings for the BRCPTOC_46 (BRC1-) function
Parameter Range Step Default Unit Description

Operation IBase Pickup_ub

Disabled Enabled 0 - 99999 50 - 90

1 1

Disabled 3000 50

A %IM

Operation Disable / Enable IBase Unbalance current operation value in percent of max current Minimum phase current for operation of pickup_ub> in % of Ibase Operate time delay

Pickup_PH

5 - 100

20

%IB

tOper

0.000 - 60.000

0.001

5.000

Table 192: Advanced parameter group settings for the BRCPTOC_46 (BRC1-) function
Parameter Range Step Default Unit Description

tReset

0.010 - 60.000

0.001

0.100

Time delay in reset

12.6

Technical data
Table 193: Broken conductor check (PTOC, 46)
Function Range or value Accuracy 0.1% of In 0.1% of In 0.5% 10 ms

Minimum phase current for opera- (5100)% of Ibase tion Unbalance current operation Timers (0100)% of maximum current (0.00-6000.00) s

339

Broken conductor check (PTOC, 46)

Chapter 6 Current protection

340

About this chapter

Chapter 7 Voltage protection

Chapter 7 Voltage protection


About this chapter This chapter describes voltage related protection functions. The way the functions work, their setting parameters, function blocks, input and output signals and technical data are included for each function.

341

Two step undervoltage protection (PTUV, 27)

Chapter 7 Voltage protection

Two step undervoltage protection (PTUV, 27)


Function block name: TUVxANSI number: 27 IEC 61850 logical node name: IEC 60617 graphical symbol:

UV2PTUV

3U<

1.1

Introduction
Undervoltages can occur in the power system during faults or abnormal conditions. The function can be used to open circuit breakers to prepare for system restoration at power outages or as long-time delayed back-up to primary protection. The function has two voltage steps, each with inverse or definite time delay.

1.2

Principle of operation
The two-step undervoltage protection function (TUV) is used to detect low power system voltage. The function has two voltage measuring steps with separate time delays. If one, two or three phase voltages decrease below the set value, a corresponding pickup signal is issued. TUV can be set to pickup/trip based on "one out of three", "two out of three", or "three out of three" of the measured voltages, being below the set point. If the voltage remains below the set value for a time period corresponding to the chosen time delay, the corresponding trip signal is issued. To avoid an unwanted trip due to disconnection of the related high voltage equipment, a voltage controlled blocking of the function is available, i.e. if the voltage is lower than the set blocking level the function is blocked and no pickup or trip signal is issued. The time delay characteristic is individually chosen for each step and can be either definite time delay or inverse time delay. The undervoltage protection function can be set to measure phase to ground fundamental value, phase to phase fundamental value, phase to ground RMS value or phase to phase RMS value. The choise of the measuring is done by the parameter ConnType in PST or LHMI under Generall Settings/Voltage protection. The voltage related settings are made in percent of base voltage which is set i kV phase-phase voltage This means operation for phase to ground voltage under:

Vpickup < (%) VBase(kV


(Equation 69)

and operation for phase to phase voltage under:

342

Two step undervoltage protection (PTUV, 27)

Chapter 7 Voltage protection

U < (%) UBase(kV)

Vpickup < (%) VBase(kV)


(Equation 70)

1.2.1

Measurement principle All the three phase to ground voltages are measured continuously, and compared with the set values, Pickup1< and Pickup2<. The parameters OpMode1 and OpMode2 influence the requirements to activate the pickup outputs. Either "1 out of 3", "2 out of 3" or "3 out of 3" phases have to be lower than the corresponding set point to issue the corresponding pickup signal.

To avoid oscillations of the output pickup signal, a hysteresis has been included.
1.2.2 Time delay The time delay for the two steps can be either definite time delay (DT) or inverse time overcurrent (TOV). For the inverse time delay three different modes are available; inverse curve A, inverse curve B, and a programmable inverse curve.

The type A curve is described as:

t=

TD

V Vpickup Vpickup
(Equation 71)

The type B curve is described as:

t=

TD 480

Vpickup < -V 0.5 32 Vpickup <

2.0

+ 0.05

(Equation 72)

The programmable curve can be created as:

TD A t= P Vpickup < V C B Vpickup

(Equation 73)

343

Two step undervoltage protection (PTUV, 27)

Chapter 7 Voltage protection

When the denominator in the expression is equal to zero the time delay will be infinity. There will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate for this phenomenon. In the voltage interval Vpickup< down to Vpickup< *(1.0 CrvSatn/100) the used voltage will be: Vpickup<*(1.0 CrvSatn/100). If the programmable curve is used this parameter must be calculated so that:

CrvSatn C > 0 100


(Equation 74)

The lowest voltage is always used for the inverse time delay integration. The details of the different inverse time characteristics are shown in section 3 "Inverse characteristics". Trip signal issuing requires that the undervoltage condition continues for at least the user set time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by some special voltage level dependent time curves for the inverse time mode (TOV). If the pickup condition, with respect to the measured voltage ceases during the delay time, and is not fulfilled again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and tIReset2pickup for the inverse time) the corresponding pickup output is reset. Here it should be noted that after leaving the hysteresis area, the pickup condition must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area. Note that for the undervoltage function the TOV reset time is constant and does not depend on the voltage fluctuations during the drop-off period. However, there are three ways to reset the timer, either the timer is reset instantaneously, or the timer value is frozen during the reset time, or the timer value is linearly decreased during the reset time. See figure 178 and figure 179.

344

Two step undervoltage protection (PTUV, 27)

Chapter 7 Voltage protection

tReset1 Voltage tReset1 PICKUP Hysteresis Measured Voltage TRIP

PICKUP1

Time PICKUP TRIP


t1

Time Integrator t1

Froozen Timer

Instantaneous Reset

Time
Linear Decrease en05000010_ansi.vsd

Figure 178: Voltage profile not causing a reset of the pickup signal for step 1, and definite time delay

345

Two step undervoltage protection (PTUV, 27)

Chapter 7 Voltage protection

Voltage PICKUP

tReset1 tReset1 PICKUP Hysteresis TRIP Measured Voltage

PICKUP1

Time PICKUP t1

TRIP

Time Integrator t1

Frozen Timer

Time Instantaneous Reset Linear Decrease en05000011_ansi.vsd

Figure 179: Voltage profile causing a reset of the pickup signal for step 1, and definite time delay
1.2.3 Blocking The undervoltage function can be partially or totally blocked, by binary input signals or by parameter settings, where:

346

Two step undervoltage protection (PTUV, 27)

Chapter 7 Voltage protection

BLOCK: BLKTR1: BLK1: BLKTR2: BLK2:

blocks all outputs blocks all trip outputs of step 1 blocks all pickup and trip outputs related to step 1 blocks all trip outputs of step 2 blocks all pickup and trip outputs related to step 2

If the measured voltage level decreases below the setting of IntBlkStVal1, either the trip output of step 1, or both the trip and the pickup outputs of step 1, are blocked. The characteristic of the blocking is set by the IntBlkSel1 parameter. This internal blocking can also be set to "off" resulting in no voltage based blocking. Corresponding settings and functionality are valid also for step 2. In case of disconnection of the high voltage component the measured voltage will get very low. The event will pickup both the under voltage function and the blocking function, as seen in figure 180. The delay of the blocking function must be set less than the time delay of under voltage function.

347

Two step undervoltage protection (PTUV, 27)

Chapter 7 Voltage protection

Disconnection

Normal voltage Pickup1 Pickup2

tBlkUV1 < t1,t1Min IntBlkStVal1 IntBlkStVal2 Time Block step 1 Block step 2
en05000466_ansi.vsd

tBlkUV2 < t2,t2Min

Figure 180: Blocking function.


1.2.4 Design The voltage measuring elements continuously measure the three phase-to-neutral voltages or the three phase to phase voltages. Recursive Fourier filters or RMS filters based on one fundamental cycle filter the input voltage signals. The voltages are individually compared to the set value, and the lowest voltage is used for the inverse time characteristic integration. A special logic is included to achieve the "1 out of 3", "2 out of 3" and "3 out of 3" criteria to fulfill the pickup condition. The design of the TimeUnderVoltage function is schematically described in figure 181.

348

Two step undervoltage protection (PTUV, 27)

Chapter 7 Voltage protection

VL1

Comparator VL1 < V1< Comparator VL2 < V1< Comparator VL3 < V1<

ST1L1 Voltage Phase Selector OpMode1 1 out of 3 2 out of 3 3 out of 3


Phase 1

ST1L2
Phase 2

VL2

ST1L3
Phase 3

VL3

PICKUP Time integrator t1 tReset1 ResetTypeCrv1

Pickup & Trip Output Logic Step 1

OR

ST1 TR1L1 TR1L2

MinVoltSelector

TRIP TR1L3 TR1

OR

Comparator VL1 < V2< Comparator VL2 < V2< Comparator VL3 < V2<

ST2L1 Voltage Phase Selector OpMode2 1 out of 3 2 outof 3 3 out of 3


Phase 1

ST2L2
Phase 2

ST2L3
Phase 3

PICKUP Time integrator t2 tReset2 ResetTypeCrv2

Pickup & Trip Output Logic Step 2

OR

ST2 TR2L1 TR2L2

MinVoltSelector

TRIP TR2L3 TR2 OR PICKU P

OR

OR

TRIP

en05000012 ansi.vsd

Figure 181: Schematic design of the TUV function

349

Two step undervoltage protection (PTUV, 27)

Chapter 7 Voltage protection

1.3

Function block
TUV1UV2PTUV_27 V3P BLOCK BLKTR1 BLK1 BLKTR2 BLK2 TRIP TRST1 TRST1_A TRST1_B TRST1_C TRST2 TRST2_A TRST2_B TRST2_C PICKUP PU_ST1 PU_ST1_A PU_ST1_B PU_ST1_C PU_ST2 PU_ST2_A PU_ST2_B PU_ST2_C en06000276_ansi.vsd

Figure 182: TUV function block

1.4

Input and output signals


Table 194: Input signals for the UV2PTUV_27 (TUV1-) function block
Signal Description

V3P BLOCK BLKTR1 BLK1 BLKTR2 BLK2

Three phase voltages Block of function Block of trip signal, step 1 Block of step 1 Block of trip signal, step 2 Block of step 2

Table 195: Output signals for the UV2PTUV_27 (TUV1-) function block
Signal Description

TRIP TRST1 TRST1_A TRST1_B TRST1_C TRST2 TRST2_A

Trip Common trip signal from step1 Trip signal from step1 phase A Trip signal from step1 phase B Trip signal from step1 phase C Common trip signal from step2 Trip signal from step2 phase A

350

Two step undervoltage protection (PTUV, 27)

Chapter 7 Voltage protection

Signal

Description

TRST2_B TRST2_C PICKUP PU_ST1 PU_ST1_A PU_ST1_B PU_ST1_C PU_ST2 PU_ST2_A PU_ST2_B PU_ST2_C

Trip signal from step2 phase B Trip signal from step2 phase C General pickup signal Common pickup signal from step1 Pickup signal from step1 phase A Pickup signal from step1 phase B Pickup signal from step1 phase C Common pickup signal from step2 Pickup signal from step2 phase A Pickup signal from step2 phase B Pickup signal from step2 phase C

1.5

Setting parameters
Table 196: Basic general settings for the UV2PTUV_27 (TUV1-) function
Parameter Range Step Default Unit Description

ConnType

PhG DFT PhPh RMS PhG RMS PhG DFT

PhG DFT

Group selector for connection type

Table 197: Basic parameter group settings for the UV2PTUV_27 (TUV1-) function
Parameter Range Step Default Unit Description

Operation VBase OperationStep1 Characterist1

Disabled Enabled 0.05 - 2000.00 Disabled Enabled Definite time Inverse curve A Inverse curve B Prog. inv. curve 1 out of 3 2 out of 3 3 out of 3 1 - 100

0.05 -

Disabled 400.00 Enabled Definite time

kV -

Disable/Enable Operation Base voltage Enable execution of step 1 Selection of time delay curve type for step 1

OpMode1

1 out of 3

Number of phases required for op (1 of 3, 2 of 3, 3 of 3) from step 1 Voltage pickup value (Definite-Time & Inverse-Time curve) in % of VBase, step 1 Definitive time delay of step 1

Pickup1

70

%VB

t1

0.00 - 6000.00

0.01

5.00

351

Two step undervoltage protection (PTUV, 27)

Chapter 7 Voltage protection

Parameter

Range

Step

Default

Unit

Description

t1Min TD1

0.000 - 60.000 0.05 - 1.10

0.001 0.01

5.000 0.05

s -

Minimum operate time for inverse curves for step 1 Time multiplier for the inverse time delay for step 1 Internal (low level) blocking mode, step 1 Voltage setting for internal blocking in % of VBase, step 1 Time delay of internal (low level) blocking for step 1 Absolute hysteresis in % of VBase, step 1 Enable execution of step 2 Selection of time delay curve type for step 2

IntBlkSel1

Disabled Block of trip Block all 1 - 100

Disabled

IntBlkStVal1

20

%VB

tBlkUV1

0.000 - 60.000

0.001

0.000

HystAbs1 OperationStep2 Characterist2

0.0 - 100.0 Disabled Enabled Definite time Inverse curve A Inverse curve B Prog. inv. curve 1 out of 3 2 out of 3 3 out of 3 1 - 100

0.1 -

0.5 Enabled Definite time

%VB -

OpMode2

1 out of 3

Number of phases required for op (1 of 3, 2 of 3, 3 of 3) from step 2 Voltage pickup value (Definite-Time & Inverse-Time curve) in % of VBase, step 2 Definitive time delay of step 2 Minimum operate time for inverse curves for step 2 Time multiplier for the inverse time delay for step 2 Internal (low level) blocking mode, step 2 Voltage setting for internal blocking in % of VBase, step 2 Time delay of internal (low level) blocking for step 2 Absolute hysteresis in % of VBase, step 2

Pickup2

50

%VB

t2 t2Min TD2

0.000 - 60.000 0.000 - 60.000 0.05 - 1.10

0.001 0.001 0.01

5.000 5.000 0.05

s s -

IntBlkSel2

Disabled Block of trip Block all 1 - 100

Disabled

IntBlkStVal2

20

%VB

tBlkUV2

0.000 - 60.000

0.001

0.000

HystAbs2

0.0 - 100.0

0.1

0.5

%VB

352

Two step undervoltage protection (PTUV, 27)

Chapter 7 Voltage protection

Table 198: Advanced parameter group settings for the UV2PTUV_27 (TUV1-) function
Parameter Range Step Default Unit Description

tReset1

0.000 - 60.000

0.001

0.025

Reset time delay used in IEC Definite Time curve step 1 Selection of reset curve type for step 1 Time delay in Inverse-Time reset (s), step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1 Parameter D for customer programmable curve for step 1 Parameter P for customer programmable curve for step 1 Tuning param for prog. under voltage Inverse-Time curve, step 1 Reset time delay used in IEC Definite Time curve step 2 Selection of reset curve type for step 2 Time delay in Inverse-Time reset (s), step 2 Parameter A for customer programmable curve for step 2

ResetTypeCrv1

Instantaneous Frozen timer Linearly decreased 0.000 - 60.000 0.001

Instantaneous

tIReset1

0.025

ACrv1

0.005 - 200.000

0.001

1.000

BCrv1

0.50 - 100.00

0.01

1.00

CCrv1

0.0 - 1.0

0.1

0.0

DCrv1

0.000 - 60.000

0.001

0.000

PCrv1

0.000 - 3.000

0.001

1.000

CrvSat1

0 - 100

tReset2

0.000 - 60.000

0.001

0.025

ResetTypeCrv2

Instantaneous Frozen timer Linearly decreased 0.000 - 60.000 0.001

Instantaneous

tIReset2

0.025

ACrv2

0.005 - 200.000

0.001

1.000

353

Two step undervoltage protection (PTUV, 27)

Chapter 7 Voltage protection

Parameter

Range

Step

Default

Unit

Description

BCrv2

0.50 - 100.00

0.01

1.00

Parameter B for customer programmable curve for step 2 Parameter C for customer programmable curve for step 2 Parameter D for customer programmable curve for step 2 Parameter P for customer programmable curve for step 2 Tuning param for prog. under voltage Inverse-Time curve, step 2

CCrv2

0.0 - 1.0

0.1

0.0

DCrv2

0.000 - 60.000

0.001

0.000

PCrv2

0.000 - 3.000

0.001

1.000

CrvSat2

0 - 100

1.6

Technical data
Table 199: Two step undervoltage protection (PUVM, 27)
Function Range or value Accuracy 1.0% of Vn 1.0% of Vn 1.0% of Vn

Operate voltage, low and high step Absolute hysteresis Internal blocking level, low and high step Inverse time characteristics for low and high step, see table 579 Definite time delays Minimum operate time, inverse characteristics Operate time, pickup function Reset time, pickup function Critical impulse time Impulse margin time

(1100)% of Vbase (0100)% of Vbase (1100)% of Vbase (0.000-60.000) s (0.00060.000) s 25 ms typically at 2 to 0 x Vset 25 ms typically at 0 to 2 x Vset 10 ms typically at 2 to 0 x Vset 15 ms typically

See table 579


0.5% 10 ms 0.5% 10 ms

354

Two step overvoltage protection (PTOV, 59)

Chapter 7 Voltage protection

Two step overvoltage protection (PTOV, 59)


Function block name: TOVxANSI number: 59 IEC 61850 logical node name: IEC 60617 graphical symbol:

OV2PTOV

3U>

2.1

Introduction
Overvoltages will occur in the power system during abnormal conditions such as sudden power loss, tap changer regulating failures, open line ends on long lines. The function can be used as open line end detector, normally then combined with directional reactive over-power function or as system voltage supervision, normally then giving alarm only or switching in reactors or switch out capacitor banks to control the voltage. The function has two voltage steps, each of them with inverse or definite time delayed. The overvoltage function has an extremely high reset ratio to allow setting close to system service voltage.

2.2

Principle of operation
The two-step overvoltage protection function (TOV) is used to detect high power system voltage. The function has two steps with separate time delays. If one, two or three phase voltages increase above the set value, a corresponding pickup signal is issued. TOV can be set to pickup/trip based on "one out of three", "two out of three", or "three out of three" of the measured voltages, being above the set point. If the voltage remains above the set value for a time period corresponding to the chosen time delay, the corresponding trip signal is issued. The time delay characteristic is individually chosen for the two steps and can be either definite time delay or inverse time delay. The voltage related settings are made in percent of the base voltage, which is set in kV, phase-phase. The overvoltage protection function can be set to measure phase to ground fundamental value, phase to phase fundamental value, phase to ground RMS value or phase to phase RMS value. The choise of measuring is done by the parameter ConnType in PST or LHMI under Generall Settings/Voltage protection. The setting of the analog inputs are given as primary phase to phase voltage and secondary phase to phase voltage. The function will operate if the voltage gets higher than the set percentage of the set base voltage VBase. This means operation for phase to ground voltage over:

355

Two step overvoltage protection (PTOV, 59)

Chapter 7 Voltage protection

V > ( % ) VBase ( kV ) 3
(Equation 75)

and operation for phase for phase voltage over:

U > (%) UBase(kV)

Vpickup > (%) VBase(kV)


(Equation 76)

2.2.1

Measurement principle All the three phase voltages are measured continuously, and compared with the set values, PU_OverVolt1 and PU_OverVolt2. The parameters OpMode1 and OpMode2 influence the requirements to activate the pickup outputs. Either "1 out of 3", "2 out of 3" or "3 out of 3" phases have to be higher than the corresponding set point to issue the corresponding pickup signal.

To avoid oscillations of the output pickup signal, a hysteresis has been included.
2.2.2 Time delay The time delay for the two steps can be either definite time delay (DT) or inverse time delay (TOV). For the inverse time delay four different modes are available; inverse curve A, inverse curve B, inverse curve C, and a programmable inverse curve.

The type A curve is described as:

t=

TD V V > V>
(Equation 77)

The type B curve is described as:

356

Two step overvoltage protection (PTOV, 59)

Chapter 7 Voltage protection

t=

k 480 U U > 0.5 32 U>


TD 480 V Vpickup 32 Vpickup 0.5 0.035
(Equation 78)
2.0

2.0

0.035

t=

The type C curve is described as:

t=

TD 480 V Vpickup 32 Vpickup 0.5 0.035


(Equation 79)
3.0

The programmable curve can be created as:


TD A

t=

V Vpickup C B Vpickup

+D

(Equation 80)

When the denominator in the expression is equal to zero the time delay will be infinity. There will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate for this phenomenon. In the voltage interval Vpickup down to Vpickup *(1.0 CrvSatn/100) the used voltage will be: Vpickup *(1.0 CrvSatn/100). If the programmable curve is used this parameter must be calculated so that:

CrvSatn C > 0 100


(Equation 81)

The highest phase (or phase to phase) voltage is always used for the inverse time delay integration, see figure 183. The details of the different inverse time characteristics are shown in section 3 "Inverse characteristics".

357

Two step overvoltage protection (PTOV, 59)

Chapter 7 Voltage protection

Voltage Inverse Time Voltage

VA VB VC

Time
en05000016_ansi.vsd

Figure 183: Voltage used for the inverse time characteristic integration Trip signal issuing requires that the overvoltage condition continues for at least the user set time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by selected voltage level dependent time curves for the inverse time mode (TOV). If the pickup condition, with respect to the measured voltage ceases during the delay time, and is not fulfilled again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and tIReset2 for the inverse time) the corresponding pickup output is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the pickup condition must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area. The hysteresis value for each step is settable (HystAbs2) to allow an high and accurate reset of the function. It is also remarkable that for the overvoltage function the TOV reset time is constant and does not depend on the voltage fluctuations during the drop-off period. However, there are three ways to reset the timer, either the timer is reset instantaneously, or the timer value is frozen during the reset time, or the timer value is linearly decreased during the reset time..
2.2.3 Blocking The overvoltage function can be partially or totally blocked, by binary input signals where:

358

Two step overvoltage protection (PTOV, 59)

Chapter 7 Voltage protection

BLOCK: BLKTR1: BLK1: BLKTR2: BLK2:

blocks all outputs blocks all trip outputs of step 1 blocks all pickup and trip outputs related to step 1 blocks all trip outputs of step 2 blocks all pickup and trip outputs related to step 2

2.2.4

Design The voltage measuring elements continuously measure the three phase-to-ground voltages or the three phase to phasel voltages. Recursive Fourier filters filter the input voltage signals. The phase voltages are individually compared to the set value, and the highest voltage is used for the inverse time characteristic integration. A special logic is included to achieve the "1 out of 3", "2 out of 3" and "3 out of 3" criteria to fulfill the pickup condition. The design of the TimeOverVoltage function is schematically described in figure 184.

359

Two step overvoltage protection (PTOV, 59)

Chapter 7 Voltage protection

VA

Comparator VA > Pickup1 Comparator VB > Pickup1 Comparator VC > Pickup1

PU_ST1_A Voltage Phase Selector OpMode 1 1 out of3 2 outof3 3 out of3
PhaseA

VB

PU_ST1_B
PhaseB

PU_ST1_C
PhaseC

VC

PICKUP Time integrator t1 tReset 1 ResetTypeCrv 1

Pickup & Trip Output Logic Step1

OR

PU_ST1 TRST1-A TRST1_B

MaxVoltSelect or

TRIP TRST1_C TRST1

OR Comparator VA > Pickup2 Comparator VB > Pickup2 Comparator VC > Pickup2

PU_ST2_A Voltage Phase Selector OpMode 2 1 out of3 2 outof3 3 out of3
PhaseA

PU_ST2_B
PhaseB

PU_ST2_C
PhaseC

PICKUP Time integrator t2 tReset 2 ResetTypeCrv 2

Pickup & Trip Output Logic Step2

OR

PU_ST2 TRST2-A TRST2-B

MaxVoltSelect or

TRIP TRST2-C TRST2

OR OR

PICKUP

OR

TRIP

en 05000013 _ ansi. vsd

Figure 184: Schematic design of the TimeOverVoltage function

360

Two step overvoltage protection (PTOV, 59)

Chapter 7 Voltage protection

2.3

Function block
TOV1OV2PTOV_59 V3P BLOCK BLKTR1 BLK1 BLKTR2 BLK2 TRIP TRST1 TRST1_A TRST1_B TRST1_C TRST2 TRST2_A TRST2_B TRST2_C PICKUP PU_ST1 PU_ST1_A PU_ST1_B PU_ST1_C PU_ST2 PU_ST2_A PU_ST2_B PU_ST2_C en06000277_ansi.vsd

Figure 185: TOV function block

2.4

Input and output signals


Table 200: Input signals for the OV2PTOV_59 (TOV1-) function block
Signal Description

V3P BLOCK BLKTR1 BLK1 BLKTR2 BLK2

Group signal for three phase voltage input Block of function Block of trip signal, step 1 Block of step 1 Block of trip signal, step 2 Block of step 2

Table 201: Output signals for the OV2PTOV_59 (TOV1-) function block
Signal Description

TRIP TRST1 TRST1_A TRST1_B TRST1_C TRST2 TRST2_A

Trip Common trip signal from step1 Trip signal from step1 phase A Trip signal from step1 phase B Trip signal from step1 phase C Common trip signal from step2 Trip signal from step2 phase A

361

Two step overvoltage protection (PTOV, 59)

Chapter 7 Voltage protection

Signal

Description

TRST2_B TRST2_C PICKUP PU_ST1 PU_ST1_A PU_ST1_B PU_ST1_C PU_ST2 PU_ST2_A PU_ST2_B PU_ST2_C

Trip signal from step2 phase B Trip signal from step2 phase C General pickup signal Common pickup signal from step1 Pickup signal from step1 phase A Pickup signal from step1 phase B Pickup signal from step1 phase C Common pickup signal from step2 Pickup signal from step2 phase A Pickup signal from step2 phase B Pickup signal from step2 phase C

2.5

Setting parameters
Table 202: Basic general settings for the OV2PTOV_59 (TOV1-) function
Parameter Range Step Default Unit Description

ConnType

PhG PhPh PhG RMS PhPh RMS

PhG

Reference current signal input

Table 203: Basic parameter group settings for the OV2PTOV_59 (TOV1-) function
Parameter Range Step Default Unit Description

Operation VBase OperationStep1 Characterist1

Disabled Enabled 0.05 - 2000.00 Disabled Enabled Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 1 out of 3 2 out of 3 3 out of 3 1 - 200

0.05 -

Disabled 400.00 Enabled Definite time

kV -

Disable/Enable Operation Base voltage Enable execution of step 1 Selection of time delay curve type for step 1

OpMode1

1 out of 3

Number of phases required for op (1 of 3, 2 of 3, 3 of 3) from step 1 Voltage pickup value (Definite-Time & Inverse-Time curve) in % of VBase, step 1 Definitive time delay of step 1

Pickup1

120

%VB

t1

0.00 - 6000.00

0.01

5.00

362

Two step overvoltage protection (PTOV, 59)

Chapter 7 Voltage protection

Parameter

Range

Step

Default

Unit

Description

t1Min TD1

0.000 - 60.000 0.05 - 1.10

0.001 0.01

5.000 0.05

s -

Minimum operate time for inverse curves for step 1 Time multiplier for the inverse time delay for step 1 Absolute hysteresis in % of VBase, step 1 Enable execution of step 2 Selection of time delay curve type for step 2

HystAbs1 OperationStep2 Characterist2

0.0 - 100.0 Disabled Enabled Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 1 out of 3 2 out of 3 3 out of 3 1 - 200

0.1 -

0.5 Enabled Definite time

%VB -

OpMode2

1 out of 3

Number of phases required for op (1 of 3, 2 of 3, 3 of 3) from step 2 Voltage pickup value (Definite-Time & Inverse-Time curve) in % of VBase, step 2 Definitive time delay of step 2 Minimum operate time for inverse curves for step 2 Time multiplier for the inverse time delay for step 2 Absolute hysteresis in % of VBase, step 2

Pickup2

150

%VB

t2 t2Min TD2

0.000 - 60.000 0.000 - 60.000 0.05 - 1.10

0.001 0.001 0.01

5.000 5.000 0.05

s s -

HystAbs2

0.0 - 100.0

0.1

0.5

%VB

363

Two step overvoltage protection (PTOV, 59)

Chapter 7 Voltage protection

Table 204: Advanced parameter group settings for the OV2PTOV_59 (TOV1-) function
Parameter Range Step Default Unit Description

tReset1

0.000 - 60.000

0.001

0.025

Reset time delay used in IEC Definite Time curve step 1 Selection of reset curve type for step 1 Time delay in Inverse-Time reset (s), step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1 Parameter D for customer programmable curve for step 1 Parameter P for customer programmable curve for step 1 Tuning param for programmable over voltage TOV curve, step 1 Reset time delay used in IEC Definite Time curve step 2 Selection of reset curve type for step 2 Time delay in Inverse-Time reset (s), step 2 Parameter A for customer programmable curve for step 2

ResetTypeCrv1

Instantaneous Frozen timer Linearly decreased 0.000 - 60.000 0.001

Instantaneous

tIReset1

0.025

ACrv1

0.005 - 200.000

0.001

1.000

BCrv1

0.50 - 100.00

0.01

1.00

CCrv1

0.0 - 1.0

0.1

0.0

DCrv1

0.000 - 60.000

0.001

0.000

PCrv1

0.000 - 3.000

0.001

1.000

CrvSat1

0 - 100

tReset2

0.000 - 60.000

0.001

0.025

ResetTypeCrv2

Instantaneous Frozen timer Linearly decreased 0.000 - 60.000 0.001

Instantaneous

tIReset2

0.025

ACrv2

0.005 - 200.000

0.001

1.000

364

Two step overvoltage protection (PTOV, 59)

Chapter 7 Voltage protection

Parameter

Range

Step

Default

Unit

Description

BCrv2

0.50 - 100.00

0.01

1.00

Parameter B for customer programmable curve for step 2 Parameter C for customer programmable curve for step 2 Parameter D for customer programmable curve for step 2 Parameter P for customer programmable curve for step 2 Tuning param for programmable over voltage TOV curve, step 2

CCrv2

0.0 - 1.0

0.1

0.0

DCrv2

0.000 - 60.000

0.001

0.000

PCrv2

0.000 - 3.000

0.001

1.000

CrvSat2

0 - 100

2.6

Technical data
Table 205: Two step overvoltage protection (POVM, 59)
Function Range or value Accuracy 1.0% of Vn at V < Vn 1.0% of V at V > Vn 1.0% of Vn at V < Vn 1.0% of V at V > Vn

Operate voltage, low and high step Absolute hysteresis

(1-200)% of Vbase (0100)% of Vbase (0.000-60.000) s (0.000-60.000) s 25 ms typically at 0 to 2 x Vset 25 ms typically at 2 to 0 x Vset 10 ms typically at 0 to 2 x Vset 15 ms typically

Inverse time characteristics for low and high step, see table 580 Definite time delays Minimum operate time, Inverse characteristics Operate time, pickup function Reset time, pickup function Critical impulse time Impulse margin time

See table 580


0.5% 10 ms 0.5% 10 ms

365

Two step residual overvoltage protection (PTOV, 59N)

Chapter 7 Voltage protection

Two step residual overvoltage protection (PTOV, 59N)


Function block name: TRVxANSI number: 59N IEC 61850 logical node name: IEC 60617 graphical symbol:

ROV2PTOV

3U0

3.1

Introduction
Residual voltages will occur in the power system during ground faults. The function can be configured to calculate the residual voltage from the three phase voltage input transformers or from a single phase voltage input transformer fed from an open delta or neutral point voltage transformer. The function has two voltage steps, each with inverse or definite time delayed.

3.2

Principle of operation
The two-step residual overvoltage protection function (TRV) is used to detect high single-phase voltage, such as high residual voltage, also called 3V0. The residual voltage can be measured directly from a voltage transformer in the neutral of a power transformer or from a three-phase voltage transformer, where the secondary windings are connected in an open delta. Another possibility is to measure the three phase voltages and internally in the protection terminal calculate the corresponding residual voltage and connect this calculated residual voltage to the TRV function block. The function has two steps with separate time delays. If the single-phase (residual) voltage remains above the set value for a time period corresponding to the chosen time delay, the corresponding trip signal is issued. The time delay characteristic is individually chosen for the two steps and can be either definite time delay or inverse time delay The voltage related settings are made in percent of the base voltage, which is set in kV, phase-phase.

3.2.1

Measurement principle The residual voltage is measured continuously, and compared with the set values, PU_OverVolt1 and PU_OverVolt2.

To avoid oscillations of the output pickup signal, a hysteresis has been included.
3.2.2 Time delay The time delay for the two steps can be either definite time delay (DT) or inverse time delay (TOV). For the inverse time delay four different modes are available; inverse curve A, inverse curve B, inverse curve C, and a programmable inverse curve.

The type A curve is described as:

366

Two step residual overvoltage protection (PTOV, 59N)

Chapter 7 Voltage protection

t=

TD V V > V>
(Equation 82)

The type B curve is described as:

t=

TD

V Vpickup Vpickup
(Equation 83)

The type C curve is described as:

t=

TD 480 V Vpickup 32 Vpickup 0.5 0.03


(Equation 84)
3.0

The programmable curve can be created as:

t=

TD A

V Vpickup C B Vpickup

+D

(Equation 85)

When the denominator in the expression is equal to zero the time delay will be infinity. There will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate for this phenomenon. In the voltage interval Vpickup up to Vpickup *(1.0 + CrvSatn/100) the used voltage will be: Vpickup *(1.0 + CrvSatn/100). If the programmable curve is used this parameter must be calculated so that:

CrvSatn C > 0 100


(Equation 86)

367

Two step residual overvoltage protection (PTOV, 59N)

Chapter 7 Voltage protection

The details of the different inverse time characteristics are shown in chapter 3 "Inverse characteristics". Trip signal issuing requires that the residual overvoltage condition continues for at least the user set time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by some special voltage level dependent time curves for the inverse time mode (TOV). If the pickup condition, with respect to the measured voltage ceases during the delay time, and is not fulfilled again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and tIReset2 for the inverse time) the corresponding pickup output is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the pickup condition must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area. It is also remarkable that for the overvoltage function the TOV reset time is constant and does not depend on the voltage fluctuations during the drop-off period. However, there are three ways to reset the timer, either the timer is reset instantaneously, or the timer value is frozen during the reset time, or the timer value is linearly decreased during the reset time. See figure 186 and figure 187.

368

Two step residual overvoltage protection (PTOV, 59N)

Chapter 7 Voltage protection

tReset 1 tReset1 Voltage PICKUP TRIP

Pickup1

Hysteresis

Measured Voltage

Time PICKUP t1

TRIP

Time Integrator Froozen Timer t1

Linear Decrease

Instantaneous Reset

Time
en 05000019 _ ansi. vsd

Figure 186: Voltage profile not causing a reset of the pickup signal for step 1, and definite time delay

369

Two step residual overvoltage protection (PTOV, 59N)

Chapter 7 Voltage protection

Voltage PICKUP

tReset1 tReset1 PICKUP Hysteresis TRIP

Pickup1

Measured Voltage

Time PICKUP t1

TRIP

Time Integrator Frozen Timer

t1

Time Instantaneous Reset Linear Decrease


en 05000020_ansi.vsd

Figure 187: Voltage profile causing a reset of the pickup signal for step 1, and definite time delay
3.2.3 Blocking The residual overvoltage function can be partially or totally blocked, by binary input signals where:

370

Two step residual overvoltage protection (PTOV, 59N)

Chapter 7 Voltage protection

BLOCK: BLKTR1: BLK1: BLKTR2: BLK2:

blocks all outputs blocks all trip outputs of step 1 blocks all pickuprip outputs related to step 1 blocks all trip outputs of step 2 blocks all pickup and trip inputs related to step 2

3.2.4

Design The voltage measuring elements continuously measure the residual voltage. Recursive Fourier filters filter the input voltage signal. The single input voltage is compared to the set value, and is also used for the inverse time characteristic integration. The design of the TRV function is schematically described in figure 188.

VN

Comparator VN > Pickup1 PICKUP

Phase 1 Pickup & Trip Output Logic Step 1

PU_ST1 TRST1

Time integrator t1 tReset1 ResetTypeCrv 1

TRIP

Comparator VN > Pickup2 PICKUP Time integrator t2 tReset2 ResetTypeCrv 2

PU_ST2 Phase 1 TRST2 Pickup & Trip Output Logic Step 2 OR

OR

PICKUP

TRIP

TRIP

en 05000748_ ansi. vsd

Figure 188: Schematic design of the TRV function

371

Two step residual overvoltage protection (PTOV, 59N)

Chapter 7 Voltage protection

3.3

Function block
TRV1ROV2PTOV_59N V3P BLOCK BLKTR1 BLK1 BLKTR2 BLK2 TRIP TRST1 TRST2 PICKUP PU_ST1 PU_ST2 en06000278_ansi.vsd

Figure 189: TRV function block

3.4

Input and output signals


Table 206: Input signals for the ROV2PTOV_59N (TRV1-) function block
Signal Description

V3P BLOCK BLKTR1 BLK1 BLKTR2 BLK2

Three phase voltages Block of function Block of trip signal, step 1 Block of step 1 Block of trip signal, step 2 Block of step 2

Table 207: Output signals for the ROV2PTOV_59N (TRV1-) function block
Signal Description

TRIP TRST1 TRST2 PICKUP PU_ST1 PU_ST2

Trip Common trip signal from step1 Common trip signal from step2 General pickup signal Common pickup signal from step1 Common pickup signal from step2

372

Two step residual overvoltage protection (PTOV, 59N)

Chapter 7 Voltage protection

3.5

Setting parameters
Table 208: Basic parameter group settings for the ROV2PTOV_59N (TRV1-) function
Parameter Range Step Default Unit Description

Operation VBase OperationStep1 Characterist1

Disabled Enabled 0.05 - 2000.00 Disabled Enabled Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 1 - 200

0.05 -

Disabled 400.00 Enabled Definite time

kV -

Disable/Enable Operation Base voltage Enable execution of step 1 Selection of time delay curve type for step 1

Pickup1

30

%VB

Voltage setting/pickup value (DT & TOV), step 1 in % of VBase Definitive time delay of step 1 Minimum operate time for inverse curves for step 1 Time multiplier for the inverse time delay for step 1 Absolute hysteresis in % of VBase, step 1 Enable execution of step 2 Selection of time delay curve type for step 2

t1 t1Min TD1

0.00 - 6000.00 0.000 - 60.000 0.05 - 1.10

0.01 0.001 0.01

5.00 5.000 0.05

s s -

HystAbs1 OperationStep2 Characterist2

0.0 - 100.0 Disabled Enabled Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 1 - 100

0.1 -

0.5 Enabled Definite time

%VB -

Pickup2

45

%VB

Voltage setting/pickup value (DT & TOV), step 2 in % of VBase Definitive time delay of step 2 Minimum operate time for inverse curves for step 2 Time multiplier for the inverse time delay for step 2 Absolute hysteresis in % of VBase, step 2

t2 t2Min TD2

0.000 - 60.000 0.000 - 60.000 0.05 - 1.10

0.001 0.001 0.01

5.000 5.000 0.05

s s -

HystAbs2

0.0 - 100.0

0.1

0.5

%VB

373

Two step residual overvoltage protection (PTOV, 59N)

Chapter 7 Voltage protection

Table 209: Advanced parameter group settings for the ROV2PTOV_59N (TRV1-) function
Parameter Range Step Default Unit Description

tReset1

0.000 - 60.000

0.001

0.025

Reset time delay used in IEC Definite Time curve step 1 Selection of reset curve type for step 1 Time delay in Inverse-Time reset (s), step 1 Parameter A for customer programmable curve for step 1 Parameter B for customer programmable curve for step 1 Parameter C for customer programmable curve for step 1 Parameter D for customer programmable curve for step 1 Parameter P for customer programmable curve for step 1 Tuning param for programmable over voltage TOV curve, step 1 Time delay in Definite-Time reset (s), step 2 Selection of reset curve type for step 2 Time delay in Inverse-Time reset (s), step 2 Parameter A for customer programmable curve for step 2

ResetTypeCrv1

Instantaneous Frozen timer Linearly decreased 0.000 - 60.000 0.001

Instantaneous

tIReset1

0.025

ACrv1

0.005 - 200.000

0.001

1.000

BCrv1

0.50 - 100.00

0.01

1.00

CCrv1

0.0 - 1.0

0.1

0.0

DCrv1

0.000 - 60.000

0.001

0.000

PCrv1

0.000 - 3.000

0.001

1.000

CrvSat1

0 - 100

tReset2 ResetTypeCrv2

0.000 - 60.000

0.001

0.025 Instantaneous

s -

Instantaneous Frozen timer Linearly decreased 0.000 - 60.000 0.001

tIReset2

0.025

ACrv2

0.005 - 200.000

0.001

1.000

374

Two step residual overvoltage protection (PTOV, 59N)

Chapter 7 Voltage protection

Parameter

Range

Step

Default

Unit

Description

BCrv2

0.50 - 100.00

0.01

1.00

Parameter B for customer programmable curve for step 2 Parameter C for customer programmable curve for step 2 Parameter D for customer programmable curve for step 2 Parameter P for customer programmable curve for step 2 Tuning param for programmable over voltage TOV curve, step 2

CCrv2

0.0 - 1.0

0.1

0.0

DCrv2

0.000 - 60.000

0.001

0.000

PCrv2

0.000 - 3.000

0.001

1.000

CrvSat2

0 - 100

3.6

Technical data
Table 210: Two step residual overvoltage protection (PTOV, 59N)
Function Range or value Accuracy 1.0% of Vn at V < Vn 1.0% of V at V > Vn 1.0% of Vn at V < Vn 1.0% of V at V > Vn

Operate voltage, low and high step Absolute hysteresis

(1-200)% of Vbase (0100)% of Vbase (0.00060.000) s (0.000-60.000) s 25 ms typically at 0 to 2 x Vset 25 ms typically at 2 to 0 x Vset 10 ms typically at 0 to 2 x Vset 15 ms typically

Inverse time characteristics for low and high step, see table 581 Definite time setting Minimum operate time Operate time, pickup function Reset time, pickup function Critical impulse time Impulse margin time

See table 581


0.5% 10 ms 0.5% 10 ms

375

Overexcitation protection (PVPH, 24)

Chapter 7 Voltage protection

Overexcitation protection (PVPH, 24)


Function block name: OEXxANSI number: 24 IEC 61850 logical node name: IEC 60617 graphical symbol:

OEXPVPH

U/f >

4.1

Introduction
When the laminated core of a power transformer or generator is subjected to a magnetic flux density beyond its design limits, stray flux will flow into non-laminated components not designed to carry flux and cause eddy currents to flow. The eddy currents can cause excessive heating and severe damage to insulation and adjacent parts in a relatively short time. Function has settable inverse operating curve and independent alarm stage.

4.2

Principle of operation
The importance of overexcitation protection is growing as the power transformers as well as other power system elements today operate most of the time near their designated limits. Modern design transformers are more sensitive to overexcitation than earlier types. This is a result of the more efficient designs and designs which rely on the improvement in the uniformity of the excitation level of modern systems. Thus, if emergency that includes overexcitation does occur, transformers may be damaged unless corrective action is promptly taken. Transformer manufacturers recommend an overexcitation protection as a part of the transformer protection system. Overexcitation results from excessive applied voltage, possibly in combination with below-normal frequency. Such condition may occur when a unit is on load, but are more likely to arise when it is on open circuit, or at a loss of load occurrence. Transformers directly connected to generators are in particular danger to experience overexcitation condition. It follows from the fundamental transformer equation, see equation 87, that peak flux density Bmax is directly proportional to induced voltage E, and inversely proportional to frequency f, and turns n.

E = 4.44 f n B max A
(Equation 87)

The relative excitation M (relative V/Hz) is therefore according to equation 88.

M = relative

V = Hz

E/f (Vn) /(fn)


(Equation 88)

376

Overexcitation protection (PVPH, 24)

Chapter 7 Voltage protection

Disproportional variations in quantities E and f may give rise to core overfluxing. If the core flux density Bmax increases to a point above saturation level (typically 1.9 Tesla), the flux will no longer be contained within the core only but will extend into other (non-laminated) parts of the power transformer and give rise to Eddy current circulations. Overexcitation will result in: overheating of the non-laminated metal parts, a large increase in magnetizing currents, an increase in core and winding temperature, an increase in transformer vibration and noise.

Protection against overexcitation is based on calculation of the relative Volts per Hertz (V / Hz) ratio. The action of the protection is usually to initiate a reduction of excitation and, if this should fail, or is not possible, to trip the transformer after a delay which can be from seconds to minutes, typically 5 - 10 seconds. Overexcitation protection may be of particular concern on directly connected generator unit transformers. Directly connected generator-transformers are subjected to a wide range of frequencies during the acceleration and deceleration of the turbine. In such cases, the overexcitation protection may trip the field breaker during a start-up of a machine, by means of the overexcitation ALARM signal from the transformer terminal. If this is not possible, the power transformer can be disconnected from the source, after a delay, by the TRIP signal. The IEC 60076 - 1 standard requires that transformers shall be capable of operating continuously at 10% above rated voltage at no load, and rated frequency. At no load, the ratio of the actual generator terminal voltage to the actual frequency should not exceed 1.1 times the ratio of transformer rated voltage to the rated frequency on a sustained basis, see equation 89.

E f

1.1

Vn fn
(Equation 89)

or equivalently, with 1.1 Vn = PUV/Hz according to equation 90.

E f

PUV / Hz fn
(Equation 90)

where:
PUV/Hz

is the maximum continuously allowed voltage at no load, and rated frequency.

PUV/Hz is an OEX setting parameter. The setting range is 100% to 150%. If the user does not know exactly what to set, then the standard IEC 60076 - 1, section 4.4, the default value PUV/Hz = 110% shall be used. In OEX protection function the relative excitation M (relative V/Hz) is expressed according to equation 91.

377

Overexcitation protection (PVPH, 24)

Chapter 7 Voltage protection

M = relative

V = Hz

E/f Vn / fn
(Equation 91)

It is clear from the above formula that, for an unloaded power transformer, M = 1 for any E and f, where the ratio E / f is equal to Vn/fn. A power transformer is not overexcited as long as the relative excitation is M PUV/Hz, PUV/Hz expressed in %. The relative overexcitation is thus defined as shown in equation 92.
overexcitation = M PUV / Hz
(Equation 92)

The overexcitation protection algorithm is fed with an input voltage V which is in general not the induced voltage E from the fundamental transformer equation. For no load condition, these two voltages are the same, but for a loaded power transformer the internally induced voltage E may be lower or higher than the voltage V which is measured and fed to OEX, depending on the direction of the power flow through the power transformer, the power transformer side where OEX is applied, and the power transformer leakage reactance of the winding. It is important to specify on the OEX function block in CAP 531 configuration tool worksheet on which side of the power transformer OEX is placed As an example, at a transformer with a 15% short circuit impedance Xsc, the full load, 0.8 power factor, 105% voltage on the load side, the actual flux level in the transformer core, will not be significantly different from that at the 110% voltage, no load, rated frequency, provided that the short circuit impedance X can be equally divided between the primary and the secondary winding: XLeakage = XLeakage1 = XLeakage2 = Xsc / 2 = 0.075 pu.. OEX calculates the internal induced voltage E if XLeakage (meaning the leakage reactance of the winding where OEX is connected) is known to the user. The assumption taken for 2-winding power transformers that XLeakage = Xsc / 2 is unfortunately most often not true. For a 2-winding power transformer the leakage reactances of the two windings depend on how the windings are located on the core with respect to each other. In the case of three-winding power transformers the situation is still more complex. If a user has the knowledge on the leakage reactance, then it should applied. If a user has no idea about it, Xleak can be set to Xc/2. The OEX protection will then take the given measured terminal voltage V, as the induced voltage E. It is assumed that overexcitation is a symmetrical phenomenon, caused by events such as loss of load, etc. It will be observed that a high phase-to-ground voltage does not mean overexcitation. For example, in an ungrounded power system, a single-phase-to-ground fault means high voltages of the healthy two phases to ground, but no overexcitation on any winding. The phase-to-phase voltages will remain essentially unchanged. The important voltage is the voltage between the two ends of each winding.

378

Overexcitation protection (PVPH, 24)

Chapter 7 Voltage protection

4.2.1

Measured voltage If one phase-to-phase voltage is available from the side where OEX protection is applied, then OEX protection function block shall be set to measure this voltage, MeasuredV. The particular voltage which is used determines the two currents that must be used.This must be chosen with the setting MeasuredI.

Note!
It is extremely important that MeasuredV and MeasuredI is set to same value!

If, for example, voltage Vab is fed to OEX, then currents Ia, and Ib must be applied, etc. From these two input currents, current Iab = Ia - Ib is calculated internally by the OEX protection algorithm. The phase-to-phase voltage must be higher than 70% of the rated value, otherwise the OEX protection algorithm is exited without calculating the excitation. ERROR output is set to 1, and the displayed value of relative excitation V / Hz shows 0.000. If three phase-to-ground voltages are available from the side where OEX is connected, then OEX protection function block shall be set to measure positive sequence voltage. In this case the positive sequence voltage and the positive sequence current are used by OEX protection. A check is made within OEX protection if the positive sequence voltage is higher than 70% rated phase-to-ground voltage; below this value, OEX is exited immediately, and no excitation is calculated. ERROR output is set to 1, and the displayed value of relative excitation V / Hz shows 0.000. The frequency value is received from the pre-processing block. The function is in operation for frequencies within the range of 33-60 Hz and of 42-75 Hz for 50 and 60 Hz respectively.
4.2.2

OEX protection function can be connected to any power transformer side, independent from the power flow. The side with a possible On-Load-Tap-Changer (OLTC) must not be used.

Operate time of the overexcitation protection. The operate time of the overexcitation protection is a function of the relative overexcitation. Basically there are two different delay laws available to choose between:

the so called IEEE law, and a tailor-made law.

The so called IEEE law approximates a square law and has been chosen based on analysis of the various transformers overexcitation capability characteristics. They can match well a transformer core capability. The square law is according to equation 93.

379

Overexcitation protection (PVPH, 24)

Chapter 7 Voltage protection

t op =

0.18 TD (M PUV / Hz)


2

0.18 TD overexcitation
2

(Equation 93)

where: M
PUV/Hz

is excitation, mean value in the interval from t = 0 to t = top is maximum continuously allowed voltage at no load, and rated frequency, in pu and is time multiplier setting for inverse time functions, see figure 191. Parameter TD (time delay multiplier setting) selects one delay curve from the family of curves.

TD

An analog overexcitation relay would have to evaluate the following integral expression, which means to look for the instant of time t = top according to equation 94.

t op

( M(t) PUV / Hz )
0

dt 0.18 TD
(Equation 94)

A digital, numerical relay will instead look for the lowest j (i.e. j = n) where it becomes true that:

( M( j) PUV / Hz )
j=k

0.18 TD
(Equation 95)

where:
t

is the time interval between two successive executions of overexcitation function and is the relative excitation at (time j) in excess of the normal (rated) excitation which is given as Vn/fn.

M(j) - PUV/Hz

As long as M > PUV/Hz (i.e. overexcitation condition), the above sum can only be larger with time, and if the overexcitation persists, the protected transformer will be tripped at j = n. Inverse delays as per figure 191, can be modified (limited) by two special definite delay settings, namely t_MaxTripDelay and t_MinTripDelay, see figure 190.

380

Overexcitation protection (PVPH, 24)

Chapter 7 Voltage protection

delay in s

t_MaxTripDelay

under excitation

inverse delay law

overexcitation t_MinTripDelay 0 M=V/Hz> V/Hz> M max - PUV/Hz Overexcitation M-PUV/Hz M max Emax Excitation M E (only if f = fn = const)

99001067_ansi.vsd

Figure 190: Restrictions imposed on inverse delays by t_MaxTripDelay, and t_MinTripDelay A definite maximum time, t_MaxTripDelay, can be used to limit the operate time at low degrees of overexcitation. Inverse delays longer than t_MaxTripDelay will not be allowed. In case the inverse delay is longer than t_MaxTripDelay, OEX trips after t_MaxTripDelay seconds. A definite minimum time, t_MinTripDelay, can be used to limit the operate time at high degrees of overexcitation. In case the inverse delay is shorter than t_MinTripDelay, OEX function trips after t_MinTripDelay seconds. Also, the inverse delay law is no more valid beyond excitation Mmax. Beyond Mmax (beyond overexcitation Mmax - PUV), the delay will always be tMin, no matter what overexcitation.

381

Overexcitation protection (PVPH, 24)

Chapter 7 Voltage protection

Time (s)

IEEE OVEREXCITATION CURVES

1000

100 TD = 60

TD = 20

10

TD = 10 TD = 9 TD = 8 TD = 7 TD = 6 TD = 5 TD = 4 TD = 3 TD = 2

TD = 1 1 1 2 3 4 5 10 20 30 40

OVEREXCITATION IN %

(M-Emaxcont)*100)
en01000373_ansi.vsd

Figure 191: Delays inversely proportional to the square of the overexcitation. The critical value of excitation Mmax is determined indirectly via OEX protection function setting Pickup2. Pickup2 can be thought of as a no-load-rated-frequency voltage, where the inverse law should be replaced by a short definite delay, t_MinTripDelay. If, for example, Pickup2 = 140 %, then Mmax is according to equation 96.

M max =

Pickup 2 / f Vn / fn

= 1.40
(Equation 96)

382

Overexcitation protection (PVPH, 24)

Chapter 7 Voltage protection

The Tailor-Made law allows a user to design an arbitrary delay characteristic. In this case the interval between M = PUV/Hz, and M = Mmax is automatically divided into five equal subintervals, with six delays. (settings t1, t2, t3, t4, t5, and t6) as shown in the figure 192. These times should be set so that t1 => t2 => t3 => t4 => t5 => t6.

delay in s

t_MaxTripDelay

underexcitation 0 Emaxcont

t_MinTripDelay Overexcitation M-E maxcont M max - E maxcont Excitation M M max 99001068_ansi.vsd

Figure 192: An example of a Tailor-Made delay characteristic Delays between two consecutive points, for example t3 and t4, are obtained by linear interpolation. Should it happen that t_MaxTripDelay be lower than, for example, delays t1, and t2, the actual delay would be t_MaxTripDelay. Above Mmax, the delay can only be t_MinTripDelay.
4.2.3 Cooling The overexcitation protection OEX is basically a thermal protection; therefore a cooling process has been introduced. Exponential cooling process is applied. Parameter Tcool is an OEX setting, with a default time constant tCoolingK of 20 minutes. This means that if the voltage and frequency return to their previous normal values (no more overexcitation), the normal temperature is assumed to be reached not before approximately 5 times tCoolingK minutes. If an overexcitation condition would return before that, the time to trip will be shorter than it would be otherwise. OEX protection function measurands A service value data item called Time to trip, and designated on the display by tTRIP is available in seconds on the local HMI, or monitoring tool. This value is an estimation of the remaining time to trip if the overexcitation remained on the level it had when the estimation was done. This information can be useful with small or moderate overexcitations. If the overexcitation is so low that the valid delay is t_MaxTripDelay, then the estimation of the remaining time to trip is done against t_MaxTripDelay.

4.2.4

The displayed relative excitation M, designated on the display by V/Hz is calculated from the expression:

383

Overexcitation protection (PVPH, 24)

Chapter 7 Voltage protection

M = relative

V = Hz

E/f Uf / fn
(Equation 97)

If less than V / Hz = PUV/Hz (in pu) is shown on the HMI display (or read via SM/RET521), the power transformer is underexcited. If the value of V/Hz is shown which is equal to PUV/Hz (in pu), it means that the excitation is exactly equal to the power transformer continuous capability. If a value higher than the value of PUV/Hz is shown, the protected power transformer is overexcited. For example, if V/Hz = 1.100 is shown, while PUV/Hz = 110 %, then the power transformer is exactly on its maximum continuous excitation limit. The third item of the OEX protection service report is the thermal status of the protected power transformer iron core, designated on the display by ThermalStatus. This gives the thermal status in % of the trip value which corresponds to 100%. Thermal Status should reach 100% at the same time, when tTRIP reaches 0 seconds. If the protected power transformer is then for some reason not switched off, the ThermalStaus shall go over 100%. If the delay as per IEEE law, or Tailor-made Law, is limited by t_MaxTripDelay, and/or t_MinTripDelay, then the Thermal Status will generally not reach 100% at the same time, when tTRIP reaches 0 seconds. For example, if, at low degrees of overexcitation, the very long delay is limited by t_MaxTripDelay, then the OEX TRIP output signal will be set to 1 before the Thermal status reaches 100%.
4.2.5 Overexcitation alarm A separate step, AlarmPickup, is provided for alarming purpose. The voltages are normally set 2% lower and has a definite time delay, tAlarm. This will give the operator an early abnormal voltages warning.

384

Overexcitation protection (PVPH, 24)

Chapter 7 Voltage protection

OVEX: FS = 1 = 2*SI + SU BLOCK SIDE Prepool I SI1


Pickup1 M>Pickup1 0-tMax 0 Calculation of internal induced voltage Ei t>tMin

AlarmLevel 0-tMax 0 tAlarm t>tAlarm

&

ALARM

&

TRIP

t_MinTripDelay TD M OR

SI2

Ei

Prepool O

SU12

M= (Ei / f) (Vn / fn)

IEEE law

0-tMax M 0 Tailor-made law t_MaxTripDelay M>Pickup2 Xleak ERROR Pickup2

M = relative Pickup as service value

en05000162_ansi.vsd

Figure 193: A logic diagram over Overexcitation protection function.


4.2.6 Logic diagram

Figure 194: A simplified diagram of the OEX protection function

385

Overexcitation protection (PVPH, 24)

Chapter 7 Voltage protection

Simplification of the diagram is in the way the IEEE and Tailor-made delays are calculated. The cooling process is not shown. It is not shown that voltage and frequency are separately checked against their respective limit values.

4.3

Function block
OEX1OEXPVPH_24 I3P V3P BLOCK RESET TRIP PICKUP ALARM

en05000329_ansi.vsd

Figure 195: OEX function block

4.4

Input and output signals


Table 211: Input signals for the OEXPVPH_24 (OEX1-) function block
Signal Description

I3P V3P BLOCK RESET

Current connection Voltage connection Block of function Reset operation

Table 212: Output signals for the OEXPVPH_24 (OEX1-) function block
Signal Description

TRIP PICKUP ALARM

Trip from overexcitation function Overexcitation above set trip pickup (instantaneous) Overexcitation above set alarm pickup (delayed)

4.5

Setting parameters
Table 213: Basic general settings for the OEXPVPH_24 (OEX1-) function
Parameter Range Step Default Unit Description

MeasuredV

PosSeq AB BC CA AB BC CA PosSeq

AB

Selection of measured voltage

MeasuredI

AB

Selection of measured current

386

Overexcitation protection (PVPH, 24)

Chapter 7 Voltage protection

Table 214: Basic parameter group settings for the OEXPVPH_24 (OEX1-) function
Parameter Range Step Default Unit Description

Operation IBase VBase Pickup1

Disabled Enabled 1 - 99999 0.05 - 2000.00 100.0 - 180.0

1 0.05 0.1

Disabled 3000 400.00 110.0

A kV %VB/f

Disable/Enable Operation Base current (rated phase current) in A Base voltage (main voltage) in kV Operate level of V/Hz at no load and rated freq in % of (Vbase/frated) High level of V/Hz above which tMin is used, in % of (Vbase/fn) Winding leakage reactance in primary ohms Length of the pulse for trip signal (in sec) Minimum trip delay for V/Hz inverse curve, in sec Maximum trip delay for V/Hz inverse curve, in sec Transformer magnetic core cooling time constant, in sec Inverse time curve selection, IEEE/Tailor made Time multiplier for IEEE inverse type curve Alarm pickup level as % of Step1 trip pickup level Alarm time delay, in sec

Pickup2

100.0 - 200.0

0.1

140.0

%VB/f

XLeakage t_TripPulse t_MinTripDelay

0.000 - 200.000 0.000 - 60.000 0.000 - 60.000

0.001 0.001 0.001

0.000 0.100 7.000

ohm s s

t_MaxTripDelay

0.00 - 9000.00

0.01

1800.00

t_CoolingK

0.10 - 9000.00

0.01

1200.00

CurveType TDForIEEECurve AlarmPickup tAlarm

IEEE Tailor made 1 - 60 50.0 - 120.0 0.00 - 9000.00

1 0.1 0.01

IEEE 1 100.0 5.00

% s

387

Overexcitation protection (PVPH, 24)

Chapter 7 Voltage protection

Table 215: Advanced parameter group settings for the OEXPVPH_24 (OEX1-) function
Parameter Range Step Default Unit Description

t1_UserCurve

0.00 - 9000.00

0.01

7200.00

Time delay t1 (longest) for tailor made curve, in sec Time delay t2 for tailor made curve, in sec Time delay t3 for tailor made curve, in sec Time delay t4 for tailor made curve, in sec Time delay t5 for tailor made curve, in sec Time delay t6 (shortest) for tailor made curve, in sec

t2_UserCurve t3_UserCurve t4_UserCurve t5_UserCurve t6_UserCurve

0.00 - 9000.00 0.00 - 9000.00 0.00 - 9000.00 0.00 - 9000.00 0.00 - 9000.00

0.01 0.01 0.01 0.01 0.01

3600.00 1800.00 900.00 450.00 225.00

s s s s s

4.6

Technical data
Table 216: Overexcitation protection (PVPH, 24)
Function Range or value Accuracy 1.0% of V 1.0% of Vn at V Vn 1.0% of V at V > Vn 1.0% of V

Pickup value, pickup Pickup value, alarm

(100180)% of (Vbase/fn) (50120)% of pickup level

Pickup value, high level Curve type

(100200)% of (Vbase/fn) IEEE or customer defined

Class 5 + 40 ms

IEEE : t =

(0.18 TD) ( M 1) 2

where M = relative (V/Hz) = (E/f)/(Vn/fn) Minimum time delay for inverse function Maximum time delay for inverse function Alarm time delay (0.00060.000) s (0.009000.00) s (0.00060.000) s
0.5% 10 ms 0.5% 10 ms 0.5% 10 ms

388

Voltage differential protection (PTOV, 60)

Chapter 7 Voltage protection

Voltage differential protection (PTOV, 60)


Function block name: VDC ANSI number: 60 IEC 61850 logical node name: IEC 60617 graphical symbol:

VDCPTOV

5.1

Introduction
A voltage differential monitoring function is available. It compares the voltages from two three phase sets of voltage transformers and has one sensitive alarm step and one trip step. It can be used to supervise the voltage from two fuse groups or two different voltage transformers fuses as a fuse/MCB supervision function.

5.2

Principle of operation
The function is based on comparison of the magnitudes of the two voltages connected in each phase. Possible differences between the ratios of the two Voltage/Capacitive voltage transformers can be compensated for with a ratio correction factors RF_X The voltage difference is evaluated and if it exceeds the alarm level VDAlarm or trip level VDTrip signals for alarm (ALARM output) or trip (TRIP output) is given after definite time delay tAlarm respectively tTrip. The two three phase voltage supplies are also supervised with undervoltage settings V1Low and V2Low. The outputs for loss of voltage V1LOW resp V2LOW will be activated. The V1 voltage is supervised for loss of individual phases whereas the V2 voltage is supervised for loss of all three phases. Loss of one U1or all U2 voltages will block the differential measurement. This blocking can be switched off with setting BlkDiffAtULow=No. The function can be blocked from an external condition with the binary BLOCK input. It can e.g. be activated from a fuse failure supervision function block. To allow easy commissioning the measured differential voltage is available as service value. This allows simple setting of the ratio correction factor to achieve full balance in normal service. The principle logic diagram is shown in figure 196.

389

Voltage differential protection (PTOV, 60)

Chapter 7 Voltage protection

VDTrip_A

AND O R

VDTrip_B

AND

0 0-tReset

0-tTrip 0

AND

TRIP

VDTrip_C

AND AND PICKUP

VDAlarm_A

AND O R

VDAlarm_B

AND

0-tAlarm 0

AND

ALARM

VDAlarm_C

AND

V1Low_A V1Low_B V1Low_C BlkDiffAtULow V2Low_A V2Low_B V2Low_C BLOCK AND 0-t1 0 V2LOW OR OR 0-tAlarm 0 AND

AND

V1LOW

AND

en06000382_ansi.vsd

Figure 196: Principle logic for voltage differential function

5.3

Function block
VDC1VDCPTOV_60 V3P1 V3P2 BLOCK TRIP PICKUP ALARM V1LOW V2LOW VDIFF_A VDIFF_B VDIFF_C en06000528_ansi.vsd

Figure 197: VDC function block

390

Voltage differential protection (PTOV, 60)

Chapter 7 Voltage protection

5.4

Input and output signals


Table 217: Input signals for the VDCPTOV_60 (VDC1-) function block
Signal Description

V3P1 V3P2 BLOCK

Bus voltage Capacitor voltage Block of function

Table 218: Output signals for the VDCPTOV_60 (VDC1-) function block
Signal Description

TRIP PICKUP ALARM V1LOW V2LOW VDIFF_A VDIFF_B VDIFF_C

Voltage differential protection operated Pickup of voltage differential protection Voltage differential protection alarm Loss of V1 voltage Loss of V2 voltage Differential Voltage phase A Differential Voltage phase B Differential Voltage phase C

5.5

Setting parameters
Table 219: Basic parameter group settings for the VDCPTOV_60 (VDC1-) function
Parameter Range Step Default Unit Description

Operation VBase BlkDiffAtULow VDTrip tTrip

Disabled Enabled 0.50 - 2000.00 No Yes 0.0 - 100.0 0.000 - 60.000

0.01 0.1 0.001

Off 400.00 Yes 5.0 1.000

kV %UB s

Operation Enable/Disable Base Voltage Block operation at low voltage Operate level, in % of VBase Time delay for voltage differential operate, in milliseconds Time delay for voltage differential reset, in seconds

tReset

0.000 - 60.000

0.001

0.000

391

Voltage differential protection (PTOV, 60)

Chapter 7 Voltage protection

Parameter

Range

Step

Default

Unit

Description

V1Low V2Low tBlock VDAlarm tAlarm

0.0 - 100.0 0.0 - 100.0 0.000 - 60.000 0.0 - 100.0 0.000 - 60.000

0.1 0.1 0.001 0.1 0.001

70.0 70.0 0.000 2.0 2.000

%UB %UB s %UB s

Input 1 undervoltage level, in % of VBase Input 2 undervoltage level, in % of VBase Reset time for undervoltage block Alarm level, in % of VBase Time delay for voltage differential alarm, in seconds

Table 220: Advanced parameter group settings for the VDCPTOV_60 (VDC1-) function
Parameter Range Step Default Unit Description

RF_A

0.000 - 3.000

0.001

1.000

Ratio compensation factor phase A VCap*RF_A=VBus_A Ratio compensation factor phase B VCap*RF_B=VBus_B Ratio compensation factor phase C VCap*RF_C=VBus_C

RF_B

0.000 - 3.000

0.001

1.000

RF_C

0.000 - 3.000

0.001

1.000

5.6

Technical data
Table 221: Voltage differential protection (PTOV)
Function Range or value Accuracy 0.5 % of Vn 0.5% of Vn 0.5% 10 ms

Voltage difference for alarm and trip Under voltage level Timers

(0.0100.0) % of Vbase (0.0100.0) % of Vbase (0.00060.000)s

392

Loss of voltage check (PTUV, 27)

Chapter 7 Voltage protection

Loss of voltage check (PTUV, 27)


Function block name: LOV ANSI number: 27 IEC 61850 logical node name: IEC 60617 graphical symbol:

LOVPTUV

6.1

Introduction
The loss of voltage detection, (PTUV, 27), is suitable for use in networks with an automatic System restoration function. The function issues a three-pole trip command to the circuit breaker, if all three phase voltages fall below the set value for a time longer the set time and the circuit breaker remains closed.

6.2

Principle of operation
The operation of LOVPTUV function is based on line voltage measurement. The function is provided with a logic, which automatically recognises if the line was restored for at least tRestore before starting the tTrip timer. All three phases are required to be low before the output TRIP is activated. Pickup is available on outputPICKUP. Additionally, the function is automatically blocked if only one or two phase voltages have been detected low for more than tBlock. The LOVPTUV function operates again only if the line has been restored to full voltage for at least tRestore. Operation of the function is also inhibited by fuse failure and open circuit breaker information signals, by their connection to dedicated inputs of the function block. Due to undervoltage conditions being continuous the trip pulse is limited to a length set by setting tPulse. The operation of the function is supervised by the fuse-failure function (VTSU input) and the information about the open position (CBOPEN) of the associated circuit breaker. The BLOCK input can be connected to a binary input of the terminal in order to receive a block command from external devices or can be software connected to other internal functions of the terminal itself in order to receive a block command from internal functions. The function is also blocked when the IED is in TEST status and the function has been blocked from the HMI test menu. (BlockLOV=Yes).

393

Loss of voltage check (PTUV, 27)

Chapter 7 Voltage protection

LOV - LOSS OF VOLTAGE CHECK FUNCTION


TEST TEST-ACTIVE AND BlockLOV = Yes

LOV--BLOCK

LOV-START OR Function Enable tPulse AND


0-tTrip 0

LOVTRIP

PU_V_A

PU_V_B Latched Enable

AND only 1 or 2 phases are low for at least 10 s (not three) AND

PU_V_C

OR

0-tBlock 0

LOV--CBOPEN OR LOV--VTSU OR Set Enable

Reset Enable AND

0-tRestore
0

OR Line restored for at least 3 s

en07000089_ansi.vsd

Figure 198: Simplified diagram of loss of voltage check protection function

394

Loss of voltage check (PTUV, 27)

Chapter 7 Voltage protection

6.3

Function block
LOV1LOVPTUV_27 V3P BLOCK CBOPEN VTSU TRIP PICKUP

en07000039_ansi.vsd

Figure 199: LOV function block

6.4

Input and output signals


Table 222: Input signals for the LOVPTUV_27 (LOV1-) function block
Signal Description

V3P BLOCK CBOPEN VTSU

Voltage connection Block the all outputs Circuit breaker open Block from voltage circuit supervision

Table 223: Output signals for the LOVPTUV_27 (LOV1-) function block
Signal Description

TRIP PICKUP

Trip signal Pickup signal

6.5

Setting parameters
Table 224: Basic parameter group settings for the LOVPTUV_27 (LOV1-) function
Parameter Range Step Default Unit Description

Operation VBase VPG tTrip

Disabled Enabled 0.1 - 9999.9 1 - 100 0.000 - 60.000

0.1 1 0.001

Off 400.0 70 7.000

kV %VB s

Operation Enable/Disable Base voltage Pickup voltage in % of base voltage Vbase Operate time delay

395

Loss of voltage check (PTUV, 27)

Chapter 7 Voltage protection

Table 225: Advanced parameter group settings for the LOVPTUV_27 (LOV1-) function
Parameter Range Step Default Unit Description

tPulse tBlock

0.050 - 60.000 0.000 - 60.000

0.001 0.001

0.150 5.000

s s

Duration of TRIP pulse Time delay to block when all 3ph voltages are not low Time delay for enable the function after restoration

tRestore

0.000 - 60.000

0.001

3.000

396

About this chapter

Chapter 8 Frequency protection

Chapter 8 Frequency protection


About this chapter This chapter describes the frequency protection functions. The way the functions work, their setting parameters, function blocks, input and output signals and technical data are included for each function.

397

Underfrequency protection (PTUF, 81)

Chapter 8 Frequency protection

Underfrequency protection (PTUF, 81)


Function block name: TUFxANSI number: 81 IEC 61850 logical node name: IEC 60617 graphical symbol:

SAPTUF

f<

1.1

Introduction
Underfrequency occurs as a result of lack of generation in the network. The function can be used for load shedding systems, remedial action schemes, gas turbine start-up etc. The function is provided with an undervoltage blocking. The operation may be based on single phase, phase-to-phase or positive sequence voltage measurement.

1.2

Principle of operation
The underfrequency (TUF) function is used to detect low power system frequency. The function can either have a definite time delay or a voltage magnitude dependent time delay. If the voltage magnitude dependent time delay is applied the time delay will be longer if the voltage is higher and shorter if the voltage is lower. If the frequency remains below the set value for a time period corresponding to the chosen time delay, the corresponding trip signal is issued. To avoid an unwanted trip due to uncertain frequency measurement at low voltage magnitude, a voltage controlled blocking of the function is available, i.e. if the voltage is lower than the set blocking voltage the function is blocked and no pickup or trip signal is issued.

1.2.1

Measurement principle The fundamental frequency of the measured input voltage is measured continuously, and compared with the set value, PUFrequency. The frequency function is also dependent on the voltage magnitude. If the voltage magnitude decreases the setting IntBlkPuVal, the underfrequency function is blocked, and the output BLKDMAGN is issued. All voltage settings are made in percent of the setting VBase, which should be set as a phase-phase voltage in kV.

To avoid oscillations of the output pickup signal, a hysteresis has been included.
1.2.2 Time delay The time delay for the underfrequency function can be either a settable definite time delay or a voltage magnitude dependent time delay, where the time delay depends on the voltage level; a high voltage level gives a longer time delay and a low voltage level causes a short time delay. For the definite time delay, the setting tTrip sets the time delay

398

Underfrequency protection (PTUF, 81)

Chapter 8 Frequency protection

For the voltage dependent time delay the measured voltage level and the settings VNom, VMin, Exponent, t_MaxTripDelay and t_MinTripDelay set the time delay according to figure 200 and equation 98. The setting TimerOperation is used to decide what type of time delay to apply. The output STARTDUR, gives the time elapsed from the issue of the pickup output, in percent of the total operation time available in PST. Trip signal issuing requires that the underfrequency condition continues for at least the user set time delay. If the pickup condition, with respect to the measured frequency ceases during the delay time, and is not fulfilled again within a user defined reset time, tReset, the pickup output is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the pickup condition must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area. On the output of the underfrequency function a 100 ms pulse is issued, after a time delay corresponding to the setting of TimeDlyRestore, when the measured frequency returns to the level corresponding to the setting RestoreFreq.
1.2.3 Voltage dependent time delay Since the fundamental frequency in a power system is the same all over the system, except some deviations during power oscillations, another criterion is needed to decide, where to take actions, based on low frequency. In many applications the voltage level is very suitable, and in most cases is load shedding preferable in areas with low voltage. Therefore, a voltage dependent time delay has been introduced, to make sure that load shedding, or other actions, take place at the right location. At constant voltage, V, the voltage dependent time delay is calculated according to equation 98. At non-constant voltage, the actual time delay is integrated in a similar way as for the inverse time characteristic for the undervoltage and overvoltage functions.

t=

V VMin VNom VMin

Exponent

( t _ MaxTripDelay t _ MinTripDelay ) + t _ MinTripDelay

(Equation 98)

where: t V Exponent VMin, VNom t_MaxTripDelay, t_MinTripDelay is the voltage dependent time delay (at constant voltage), is the measured voltage is a setting, are voltage settings corresponding to are time settings.

The inverse time characteristics are shown in figure 200, for:

399

Underfrequency protection (PTUF, 81)

Chapter 8 Frequency protection

VMin VNom

= 90% = 100%

t_MaxTripD = 1.0 s elay t_MinTripD elay Exponent = 0.0 s = 0, 1, 2, 3 and 4

0 TimeDlyOperate [s] Exponenent 2 3


0.5

90

95

100

V [% of VBase]
en05000075_ansi.vsd

Figure 200: Voltage dependent inverse time characteristics for the underfrequency function. The time delay to operate is plotted as a function of the measured voltage, for the Exponent = 0, 1, 2, 3, 4 respectively.
1.2.4 Blocking The underfrequency function can be partially or totally blocked, by binary input signals or by parameter settings, where:
BLOCK: BLKTRIP: BLKREST: blocks all outputs blocks the TRIP output blocks the RESTORE output

If the measured voltage level decreases below the setting of IntBlkPuVal, both the pickup and the trip outputs, are blocked.

400

Underfrequency protection (PTUF, 81)

Chapter 8 Frequency protection

1.2.5

Design The frequency measuring element continuously measures the frequency of the positive sequence voltage and compares it to the setting PUFrequency. The frequency signal is filtered to avoid transients due to switchings and faults. The time integrator can operate either due to a definite delay time or to the special voltage dependent delay time. When the frequency has returned back to the setting of RestoreFreq, the RESTORE output is issued after the time delay TimeDlyRestore. The design of the underfrequency function is schematically described in figure 201.

Block OR Comparator V < IntBlockLevel BLOCK BLKDMAGN

Voltage

Time integrator TimerOperation Mode Selector TimeDlyOperate TimeDlyReset PICKUP TRIP Pickup & Trip Output Logic PICKUP

Frequency

Comparator f < PuFrequency

TRIP

100 ms Comparator f > RestoreFreq TimeDlyRestore RESTORE

en05000726_ansi.vsd

Figure 201: Schematic design of the underfrequency function

401

Underfrequency protection (PTUF, 81)

Chapter 8 Frequency protection

1.3

Function block
TUF1SAPTUF_81 V3P BLOCK BLKTRIP BLKREST TRIP PICKUP RESTORE BLKDMAGN Frequency en06000279_ansi.vsd

Figure 202: TUF function block

1.4

Input and output signals


Table 226: Input signals for the SAPTUF_81 (TUF1-) function block
Signal Description

V3P BLOCK BLKTRIP BLKREST

Voltage connection Block of function Blocking operate output. Blocking restore output.

Table 227: Output signals for the SAPTUF_81 (TUF1-) function block
Signal Description

TRIP PICKUP RESTORE BLKDMAGN Frequency

Operate/trip signal for frequency. Start/pick-up signal for frequency. Restore signal for load restoring purposes. Blocking indication due to low magnitude. Measured frequency

402

Underfrequency protection (PTUF, 81)

Chapter 8 Frequency protection

1.5

Setting parameters
Table 228: Basic parameter group settings for the SAPTUF_81 (TUF1-) function
Parameter Range Step Default Unit Description

Operation Vbase PUFrequency IntBlockLevel TimeDlyOperate

Disabled Enabled 0.05 - 2000.00 35.00 - 75.00 0 - 100 0.000 - 60.000

0.05 0.01 1 0.001

Disabled 400.00 48.80 50 0.200

kV Hz %VB s

Disable/Enable Operation Base voltage Frequency setting pickup value. Internal blocking level in % of VBase. Operate time delay in over/under-frequency mode. Time delay for reset. Restore time delay. Restore frequency if frequency is above frequency value. Setting for choosing timer mode. Nominal voltage in % of VBase for voltage based timer. Lower operation limit in % of VBase for voltage based timer. For calculation of the curve form for voltage based timer. Maximum time operation limit for voltage based timer. Minimum time operation limit for voltage based timer.

TimeDlyReset TimeDlyRestore RestoreFreq

0.000 - 60.000 0.000 - 60.000 45.00 - 65.00

0.001 0.001 0.01

0.000 0.000 50.10

s s Hz

TimerOperation VNom

Definite timer Volt based timer 50 - 150

Definite timer 100

%VB

VMin

50 - 150

90

%VB

Exponent

0.0 - 5.0

0.1

1.0

t_MaxTripDelay

0.000 - 60.000

0.001

1.000

t_MinTripDelay

0.000 - 60.000

0.001

1.000

1.6
Function

Technical data
Table 229: Underfrequency protection (PTUF, 81)
Range or value Accuracy 2.0 mHz

Operate value, pickup function

(35.00-75.00) Hz

403

Underfrequency protection (PTUF, 81)

Chapter 8 Frequency protection

Function

Range or value

Accuracy

Operate time, pickup function Reset time, pickup function Operate time, definite time function Reset time, definite time function Voltage dependent time delay

100 ms typically 100 ms typically (0.000-60.000)s (0.000-60.000)s Settings: VNom=(50-150)% of Vbase

0.5% + 10 ms 0.5% + 10 ms

Class 5 + 200 ms

V VMin t= VNom VMin

Exponent

( t _ MaxTripDelay t _ MinTripDelay ) + t _ MinTripDelay

VMin=(50-150)% of Vbase Exponent=0.0-5.0 t_MaxTripDelay=(0.000-60.000) s t_MinTripDelay=(0.000-60.000)s

V=Vmeasured

404

Overfrequency protection (PTOF, 81)

Chapter 8 Frequency protection

Overfrequency protection (PTOF, 81)


Function block name: TOFxANSI number: 81 IEC 61850 logical node name: IEC 60617 graphical symbol:

SAPTOF

f>

2.1

Introduction
Overfrequency will occur at sudden load drops or shunt faults in the power network. In some cases close to generating part governor problems can also cause overfrequency. The function can be used for generation shedding, remedial action schemes etc. It can also be used as a sub-nominal frequency stage initiating load restoring. The function is provided with an undervoltage blocking. The operation may be based on single phase, phase-to-phase or positive sequence voltage measurement.

2.2

Principle of operation
The Overfrequency (TOF) function is used to detect high power system frequency. The function has a settable definite time delay. If the frequency remains above the set value for a time period corresponding to the chosen time delay, the corresponding trip signal is issued. To avoid an unwanted trip due to uncertain frequency measurement at low voltage magnitude, a voltage controlled blocking of the function is available, i.e. if the voltage is lower than the set blocking voltage the function is blocked and no pickup or trip signal is issued.

2.2.1

Measurement principle The fundamental frequency of the positive sequence voltage is measured continuously, and compared with the set value, PUFrequency. The frequency function is also dependent on the voltage magnitude. If the voltage magnitude decreases below the setting IntBlkStVal, the overfrequency function is blocked, and the output BLKDMAGN is issued. All voltage settings are made in percent of the VBase, which should be set as a phase-phase voltage in kV. To avoid oscillations of the output pickup signal, a hysteresis has been included. Time delay The time delay for the overfrequency function is a settable definite time delay, specified by the setting tTrip. The output STARTDUR, gives the time elapsed from the issue of the pickup output, in percent of the total operation time available in PST.

2.2.2

Trip signal issuing requires that the overfrequency condition continues for at least the user set time delay. If the pickup condition, with respect to the measured frequency ceases during the delay time, and is not fulfilled again within a user defined reset time, tReset, the pickup output

405

Overfrequency protection (PTOF, 81)

Chapter 8 Frequency protection

is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the pickup condition must be fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area.
2.2.3 Blocking The overfrequency function can be partially or totally blocked, by binary input signals or by parameter settings, where:
TOF-BLOCK: TOF-BLKTRIP: blocks all outputs blocks the TOF-TRIP output

If the measured voltage level decreases below the setting of IntBlkPuVal, both the pickup and the trip outputs, are blocked.
2.2.4 Design The frequency measuring element continuously measures the frequency of the positive sequence voltage and compares it to the setting PUFrequency. The frequency signal is filtered to avoid transients due to switchings and faults in the power system. The time integrator operates due to a definite delay time. The design of the overfrequency function is schematically described in figure 203.

BLOCK BLKTRIP OR Comparator V < IntBlockLevel Pickup & Trip Output Logic BLOCK BLKDMAGN

Voltage

Time integrator Definite Time Delay PICKUP

PICKUP

Frequency

Comparator f > PuFrequency

TimeDlyOperate TRIP TimeDlyReset TRIP

en05000735_ansi.vsd

Figure 203: Schematic design of the overfrequency function

406

Overfrequency protection (PTOF, 81)

Chapter 8 Frequency protection

2.3

Function block
TOF1SAPTOF_81 V3P BLOCK BLKTRIP TRIP PICKUP BLKDMAGN FREQ en06000280_ansi.vsd

Figure 204: TOF function block

2.4

Input and output signals


Table 230: Input signals for the SAPTOF_81 (TOF1-) function block
Signal Description

V3P BLOCK BLKTRIP

Voltage connection Block of function Blocking operate output.

Table 231: Output signals for the SAPTOF_81 (TOF1-) function block
Signal Description

TRIP PICKUP BLKDMAGN Frequency

Operate/trip signal for frequency. Start/pick-up signal for frequency. Blocking indication due to low magnitude. Measured frequency

2.5

Setting parameters
Table 232: Basic parameter group settings for the SAPTOF_81 (TOF1-) function
Parameter Range Step Default Unit Description

Operation VBase PUFrequency IntBlockLevel TimeDlyOperate

Disabled Enabled 0.05 - 2000.00 35.00 - 75.00 0 - 100 0.000 - 60.000

0.05 0.01 1 0.001

Off 400.00 51.20 50 0.000

kV Hz %UB s

Disable/Enable Operation Base voltage Frequency setting pickup value. Internal blocking level in % of VBase. Operate time delay in over/under-frequency mode. Time delay for reset.

TimeDlyReset

0.000 - 60.000

0.001

0.000

407

Overfrequency protection (PTOF, 81)

Chapter 8 Frequency protection

2.6

Technical data
Table 233: Overfrequency protection (PTOF, 81)
Function Range or value Accuracy 2.0 mHz

Operate value, pickup function Operate time, pickup function Reset time, pickup function Operate time, definite time function Reset time, definite time function

(35.00-75.00) Hz 100 ms typically 100 ms typically (0.000-60.000)s (0.000-60.000)s

0.5% + 10 ms 0.5% + 10 ms

408

Rate-of-change frequency protection (PFRC, 81)

Chapter 8 Frequency protection

Rate-of-change frequency protection (PFRC, 81)


Function block name: RCFxANSI number: 81 IEC 61850 logical node name: IEC 60617 graphical symbol:

SAPFRC

df/dt > <

3.1

Introduction
Rate of change of frequency function gives an early indication of a main disturbance in the system. The function can be used for generation shedding, load shedding, remedial action schemes etc. The function is provided with an undervoltage blocking. The operation may be based on single phase, phase-to-phase or positive sequence voltage measurement. Each step can discriminate between positive or negative change of frequency.

3.2

Principle of operation
The rate-of-change of frequency (RCF) function is used to detect fast power system frequency changes, increase as well as decrease, at an early stage. The function has a settable definite time delay. If the rate-of-change of frequency remains below the set value, for negative rate-of-change, for a time period equal to the chosen time delay, the trip signal is issued. If the rate-of-change of frequency remains above the set value, for positive rate-of-change, for a time period equal to the chosen time delay, the trip signal is issued. To avoid an unwanted trip due to uncertain frequency measurement at low voltage magnitude, a voltage controlled blocking of the function is available, i.e. if the voltage is lower than the set blocking voltage, the function is blocked and no pickup or trip signal is issued. If the frequency recovers, after a frequency decrease, a restore signal is issued.

3.2.1

Measurement principle The rate-of-change of the fundamental frequency of the selected voltage is measured continuously, and compared with the set value, PUFreqGrad. The rate-of-change of frequency function is also dependent on the voltage magnitude. If the voltage magnitude decreases below the setting IntBlockLevel, the rate-of-change of frequency function is blocked, and the output BLKDMAGN is issued. The sign of the setting PUFreqGrad, controls if the rate-of-change of frequency function reacts on a positive or on a negative change in frequency. If the rate-of-change of frequency function is used for decreasing frequency, i.e. the setting PUFreqGrad has been given a negative value, and a trip signal has been issued, then a 100 ms pulse is issued on the RESTORE output, when the frequency recovers to a value higher than the setting RestoreFreq. A positive setting of PUFreqGrad, sets the rate-of-change of frequency function to pickup and trip for frequency increases.

409

Rate-of-change frequency protection (PFRC, 81)

Chapter 8 Frequency protection

To avoid oscillations of the output pickup signal, a hysteresis has been included.
3.2.2 Time delay The rate-of-change of frequency function has a settable definite time delay, tTrip. The output STARTDUR, gives the time elapsed from the issue of the pickup output, in percent of the total operation time.

Trip signal issuing requires that the rate-of-change of frequency condition continues for at least the user set time delay, tTrip. If the pickup condition, with respect to the measured frequency ceases during the delay time, and is not fulfilled again within a user defined reset time, tReset, the pickup output is reset, after that the defined reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the pickup condition must be fulfilled again and it is not sufficient for the signal to only return back into the hysteresis area. The RESTORE output of the rate-of-change of frequency function is set, after a time delay equal to the setting of tRestore, when the measured frequency has returned to the level corresponding to RestoreFreq, after an issue of the TRIP output signal. If tRestore is set to 0.000 s the restore functionality is disabled, and no output will be given. The restore functionality is only active for lowering frequency conditions and the restore sequence is disabled if a new negative frequency gradient is detected during the restore period, defined by the settings RestoreFreq and tRestore.
3.2.3 Blocking The rate-of-change of frequency function can be partially or totally blocked, by binary input signals or by parameter settings, where:
BLOCK: BLKTRIP: BLKREST: blocks all outputs blocks the TRIP output blocks the RESTORE output

If the measured voltage level decreases below the setting of IntBlockLevel, both the pickup and the trip outputs, are blocked.
3.2.4 Design The rate-of-change of frequency measuring element continuously measures the frequency of the selected voltage and compares it to the setting PUFreqGrad. The frequency signal is filtered to avoid transients due to power system switchings and faults. The time integrator operates with a definite delay time. When the frequency has returned back to the setting of RestoreFreq, the RESTORE output is issued after the time delay tRestore, if the TRIP signal has earlier been issued. The sign of the setting PUFreqGrad is essential, and controls if the function is used for raising or lowering frequency conditions. The design of the rate-of-change of frequency function is schematically described in figure 205.

410

Rate-of-change frequency protection (PFRC, 81)

Chapter 8 Frequency protection

BLOCK BLKTRIP BLKRESET OR BLOCK

Voltage

Comparator V < IntBlockLevel Pickup & Trip Output Logic

BLKDMAGN

Rate-of-Change of Frequency

Comparator If [PickupFreqGrad<0 PICKUP AND df/dt < PickupFreqGrad] OR [PickupFreqGrad>0 AND df/dt > PickupFreqGrad] Then PICKUP

Time integrator Definite Time Delay TimeDlyOperate TimeDlyReset

PICKUP

TRIP

100 ms Frequency Comparator f > RestoreFreq RESTORE

TimeDlyRestore

en05000835_ansi.vsd

Figure 205: Schematic design of the rate-of-change of frequency function

3.3

Function block
RCF1SAPFRC_81 V3P BLOCK BLKTRIP BLKREST TRIP PICKUP RESTORE BLKDMAGN en06000281_ansi.vsd

Figure 206: RCF function block

411

Rate-of-change frequency protection (PFRC, 81)

Chapter 8 Frequency protection

3.4

Input and output signals


Table 234: Input signals for the SAPFRC_81 (RCF1-) function block
Signal Description

V3P BLOCK BLKTRIP BLKREST

Group signal for voltage input Block of function Blocking operate output. Blocking restore output.

Table 235: Output signals for the SAPFRC_81 (RCF1-) function block
Signal Description

TRIP PICKUP RESTORE BLKDMAGN

Operate/trip signal for frequencyGradient Start/pick-up signal for frequencyGradient Restore signal for load restoring purposes. Blocking indication due to low magnitude.

3.5

Setting parameters
Table 236: Basic parameter group settings for the SAPFRC_81 (RCF1-) function
Parameter Range Step Default Unit Description

Operation VBase

Disabled Enabled 0.05 - 2000.00

0.05

Off 400.00

kV

Disable/Enable Operation Base setting for the phase-phase voltage in kV Frequency gradient start value. Sign defines direction. Internal blocking level in % of VBase. Operate time delay in pos./neg. frequency gradient mode. Restore frequency if frequency is above frequency value (Hz) Restore time delay. Time delay for reset.

PUFreqGrad

-10.00 - 10.00

0.01

0.50

Hz/s

IntBlockLevel tTrip

0 - 100 0.000 - 60.000

1 0.001

50 0.200

%UB s

RestoreFreq

45.00 - 65.00

0.01

49.90

Hz

tRestore tReset

0.000 - 60.000 0.000 - 60.000

0.001 0.001

0.000 0.000

s s

412

Rate-of-change frequency protection (PFRC, 81)

Chapter 8 Frequency protection

3.6

Technical data
Table 237: Rate-of-change frequency protection (PFRC, 81)
Function Range or value Accuracy 10.0 mHz/s 1.0% of Vn

Operate value, pickup function Operate value, internal blocking level Operate time, pickup function

(-10.00-10.00) Hz/s (0-100)% of Vbase 100 ms typically

413

Rate-of-change frequency protection (PFRC, 81)

Chapter 8 Frequency protection

414

About this chapter

Chapter 9 Multipurpose protection

Chapter 9 Multipurpose protection


About this chapter This chapter describes Multipurpose protection and includes the General current and voltage function. The way the functions work, their setting parameters, function blocks, input and output signals and technical data are included for each function.

415

General current and voltage protection (GAPC)

Chapter 9 Multipurpose protection

General current and voltage protection (GAPC)


Function block name: GFxxANSI number: 46, 51, 67, 51N, 67N, 27, 59, 21, 40 IEC 60617 graphical symbol:

I<

I>

IEC 61850 logical node name: CVGAPC

U<

U>

1.1

Introduction
The function can be utilized as a negative sequence current protection detecting unsymmetrical conditions such as open phase or unsymmetrical faults. The function can also be used to improve phase selection for high resistive ground faults, outside the distance protection reach, for the transmission line. Three functions are used which measures the neutral current and each of the three phase voltages. This will give an independence from load currents and this phase selection will be used in conjunction with the detection of the ground fault from the directional ground fault protection function.

1.1.1

Inadvertent generator energization When the generator is taken out of service, and stand-still, there is a risk that the generator circuit breaker flashes over or is closed by mistake.

To prevent damages on the generator or turbine, it is essential that high speed tripping is provided in case of inadvertent energization of the generator. This tripping should be almost instantaneous (< 100 ms). There is a risk that the current into the generator at inadvertent energization will be limited so that the normal overcurrent or underimpedance protection will not detect the dangerous situation. The delay of these protection functions might be too long. For big and important machines, fast protection against inadvertent energizing should, therefore, be included in the protective scheme.

416

General current and voltage protection (GAPC)

Chapter 9 Multipurpose protection

1.2
1.2.1

Principle of operation
Measured quantities within the function The function is always connected to three-phase current and three-phase voltage input in the configuration tool, but it will always measure only one current and one voltage quantity selected by the end user in the setting tool.

The user can select to measure one of the current quantities shown in table 238.
Table 238: Current selection for the GF function
Set value for the parameter CurrentInput

Comment

1 2 3 4 5 6 7 8 9

PhaseA PhaseB PhaseC PosSeq NegSeq 3ZeroSeq MaxPh MinPh UnbalancePh

GF function will measure the phase A current phasor GF function will measure the phase B current phasor GF function will measure the phase C current phasor GF function will measure internally calculated positive sequence current phasor GF function will measure internally calculated negative sequence current phasor GF function will measure internally calculated zero sequence current phasor multiplied by factor 3 GF function will measure current phasor of the phase with maximum magnitude GF function will measure current phasor of the phase with minimum magnitude GF function will measure magnitude of unbalance current, which is internally calculated as the algebraic magnitude difference between the current phasor of the phase with maximum magnitude and current phasor of the phase with minimum magnitude. Phase angle will be set to 0 all the time GF function will measure the current phasor internally calculated as the vector difference between the phase A current phasor and phase B current phasor (i.e. IA-IB) GF function will measure the current phasor internally calculated as the vector difference between the phase B current phasor and phase C current phasor (i.e. IB-IC) GF function will measure the current phasor internally calculated as the vector difference between the phase C current phasor and phase L1 current phasor (i.e. IC-IA) GF function will measure ph-ph current phasor with the maximum magnitude GF function will measure ph-ph current phasor with the minimum magnitude GF function will measure magnitude of unbalance current, which is internally calculated as the algebraic magnitude difference between the ph-ph current phasor with maximum magnitude and ph-ph current phasor with minimum magnitude. Phase angle will be set to 0 all the time

10

PhaseA-PhaseB

11

PhaseB-PhaseC

12

PhaseC-PhaseA

13 14 15

MaxPh-Ph MinPh-Ph UnbalancePh-Ph

417

General current and voltage protection (GAPC)

Chapter 9 Multipurpose protection

The user can select to measure one of the voltage quantities shown in table 239:
Table 239: Voltage selection for the GF function
Set value for the parameter VoltageInput

Comment

1 2 3 4 5

PhaseA PhaseB PhaseC PosSeq -NegSeq

GF function will measure the phase A voltage phasor GF function will measure the phase B voltage phasor GF function will measure the phase C voltage phasor GF function will measure internally calculated positive sequence voltage phasor GF function will measure internally calculated negative sequence voltage phasor. This voltage phasor will be intentionally rotated for 180 in order to enable easier settings for the directional feature when used. GF function will measure internally calculated zero sequence voltage phasor multiplied by factor 3. This voltage phasor will be intentionally rotated for 180 in order to enable easier settings for the directional feature when used. GF function will measure voltage phasor of the phase with maximum magnitude GF function will measure voltage phasor of the phase with minimum magnitude GF function will measure magnitude of unbalance voltage, which is internally calculated as the algebraic magnitude difference between the voltage phasor of the phase with maximum magnitude and voltage phasor of the phase with minimum magnitude. Phase angle will be set to 0 all the time GF function will measure the voltage phasor internally calculated as the vector difference between the phase A voltage phasor and phase B voltage phasor (i.e. VA-VB) GF function will measure the voltage phasor internally calculated as the vector difference between the phase B voltage phasor and phase C voltage phasor (i.e. VB-VC) GF function will measure the voltage phasor internally calculated as the vector difference between the phase C voltage phasor and phase A voltage phasor (i.e. VC-VA) GF function will measure ph-ph voltage phasor with the maximum magnitude GF function will measure ph-ph voltage phasor with the minimum magnitude GF function will measure magnitude of unbalance voltage, which is internally calculated as the algebraic magnitude difference between the ph-ph voltage phasor with maximum magnitude and ph-ph voltage phasor with minimum magnitude. Phase angle will be set to 0 all the time

-3ZeroSeq

7 8 9

MaxPh MinPh UnbalancePh

10

PhaseA-PhaseB

11

PhaseB-PhaseC

12

PhaseC-PhaseA

13 14 15

MaxPh-Ph MinPh-Ph UnbalancePh-Ph

It is important to notice that the voltage selection from table 239 is always applicable regardless the actual external VT connections. The three-phase VT inputs can be connected to IED as either three phase-to-ground voltages VA, VB & VC or three phase-to-phase voltages VAB, VBC & VCA). This information about actual VT connection is entered as a setting parameter for the pre-processing block, which will then take automatic care about it.

418

General current and voltage protection (GAPC)

Chapter 9 Multipurpose protection

The user can select one of the current quantities shown in table 240 for built-in current restraint feature:
Table 240: Restraint current selection for the GF function
Set value for the parameter RestrComment Curr

1 2 3 4

PosSeq NegSeq 3ZeroSeq MaxPh

GF function will measure internally calculated positive sequence current phasor GF function will measure internally calculated negative sequence current phasor GF function will measure internally calculated zero sequence current phasor multiplied by factor 3 GF function will measure current phasor of the phase with maximum magnitude

1.2.2

Base quantities for GF function The parameter settings for the base quantities, which represent the base (i.e. 100%) for pickup levels of all measuring stages shall be entered as setting parameters for every GF function.

Base current shall be entered as: 1. rated phase current of the protected object in primary amperes, when the measured Current Quantity is selected from 1 to 9, as shown in table 238. 2. rated phase current of the protected object in primary amperes multiplied by 3 (i.e. 1,732 x Iphase), when the measured Current Quantity is selected from 10 to 15, as shown in table 238. Base voltage shall be entered as: 1. rated phase-to-ground voltage of the protected object in primary kV, when the measured Voltage Quantity is selected from 1 to 9, as shown in table 239. 2. rated phase-to-phase voltage of the protected object in primary kV, when the measured Voltage Quantity is selected from 10 to 15, as shown in table 239.
1.2.3 Built-in overcurrent protection steps Two overcurrent protection steps are available. They are absolutely identical and therefore only one will be explained here.

Overcurrent step simply compares the magnitude of the measured current quantity (see table 238) with the set pickup level. Non-directional overcurrent step will pickup if the magnitude of the measured current quantity is bigger than this set level. Reset ratio is settable, with default value of 0.96. However depending on other enabled built-in features this overcurrent pickup might not cause the overcurrent step pickup signal. Pickup signal will only come if all of the enabled built-in features in the overcurrent step are fulfilled at the same time.

419

General current and voltage protection (GAPC)

Chapter 9 Multipurpose protection

Second harmonic feature The overcurrent protection step can be restrained by a second harmonic component in the measured current quantity (see table 238). However it shall be noted that this feature is not applicable when one of the following measured currents is selected:

PosSeq (i.e. positive sequence current) NegSeq (i.e. negative sequence current) UnbalancePh (i.e. unbalance phase current) UnbalancePh-Ph (i.e. unbalance ph-ph current)

This feature will simple prevent overcurrent step pickup if the second-to-first harmonic ratio in the measured current exceeds the set level.
Directional feature The overcurrent protection step operation can be can be made dependent on the relevant phase angle between measured current phasor (see table 238) and measured voltage phasor (see table 239). In protection terminology it means that the PGPF function can be made directional by enabling this built-in feature. In that case overcurrent protection step will only operate if the current flow is in accordance with the set direction (i.e. Forward, which means towards the protected object, or Reverse, which means from the protected object). For this feature it is of the outmost importance to understand that the measured voltage phasor (see table 239) and measured current phasor (see table 238) will be used for directional decision. Therefore it is the sole responsibility of the end user to select the appropriate current and voltage signals in order to get a proper directional decision. The PGPF function will NOT do this automatically. It will just simply use the current and voltage phasors selected by the end user to check for the directional criteria.

Table 241 gives an overview of the typical choices (but not the only possible ones) for these two quantities for traditional directional relays.
Table 241: Typical current and voltage choices for directional feature
Set value for the parameter CurrentInput Set value for the parameter VoltageInput

Comment

PosSeq

PosSeq

Directional positive sequence overcurrent function is obtained. Typical setting for RCADir is from -45 to -90 depending on the power

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Set value for the parameter CurrentInput

Set value for the parameter VoltageInput

Comment

NegSeq

-NegSeq

Directional negative sequence overcurrent function is obtained. Typical setting for RCADir is from -45 to -90 depending on the power system voltage level (i.e. X/R ratio) Directional zero sequence overcurrent function is obtained. Typical setting for RCADir is from 0 to -90 depending on the power system grounding (i.e. solidly grounding, grounding via resistor, etc.) Directional overcurrent function for the first phase is obtained. Typical setting for RCADir is +30 or +45 Directional overcurrent function for the second phase is obtained. Typical setting for RCADir is +30 or +45 Directional overcurrent function for the third phase is obtained. Typical setting for RCADir is +30 or +45

3ZeroSeq

-3ZeroSeq

Phase1 Phase2 Phase3

Phase2-Phase3 Phase3-Phase1 Phase1-Phase2

Unbalance current or voltage measurement shall not be used when the directional feature is enabled. Two types of directional measurement principles are available, I & V and IcosPhi&V. The first principle, referred to as "I & V" in the parameter setting tool, checks that: the magnitude of the measured current is bigger than the set pick-up level the phasor of the measured current is within the operating region (defined by the relay operate angle, ROADir parameter setting; see figure 207).

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V=-3V0 RCADir Ipickup ROADir I=3Io

Operate region mta line

en05000252_anis.vsd

where:
RCADir ROADir

is -75 is 50

Figure 207: I & V directional operating principle for the GF function The second principle, referred to as "IcosPhi&V" in the parameter setting tool, checks that: that the product Icos() is bigger than the set pick-up level, where is angle between the current phasor and the mta line that the phasor of the measured current is within the operating region (defined by the Icos() straight line and the relay operate angle, ROADir parameter setting; see figure 207).

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RCADir Ipickup ROADir I=3Io

V=-3V0

Operate region mta line

en05000253_ansi.vsd

where: RCADir ROADir is -75 is 50

Figure 208: GF, IcosPhi&V directional operating principle Note that it is possible to decide by a parameter setting how the directional feature shall behave when the magnitude of the measured voltage phasor falls below the pre-set value. User can select one of the following three options: Non-directional (i.e. operation allowed for low magnitude of the reference voltage) Block (i.e. operation prevented for low magnitude of the reference voltage) Memory (i.e. memory voltage shall be used to determine direction of the current)

It shall also be noted that the memory duration is limited in the algorithm to 100 ms. After that time the current direction will be locked to the one determined during memory time and it will re-set only if the current fails below set pickup level or voltage goes above set voltage memory limit.
Voltage restraint/control feature The overcurrent protection step operation can be can be made dependent of a measured voltage quantity (see table 239). Practically then the pickup level of the overcurrent step is not constant but instead decreases with the decrease in the magnitude of the measured voltage quantity. Two different types of dependencies are available:

Voltage restraint overcurrent (when setting parameter VDepMode_OC1=Slope)

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OC1 Stage Pickup Level

PickupCurr_OC1

VDepFact_OC1 * PickupCurr_OC1

VLowLimit_OC1

VHighLimit_OC1 Selected Voltage Magnitude


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Figure 209: Example for OC1 step current pickup level variation as function of measured voltage magnitude in Slope mode of operation Voltage controlled overcurrent (when setting parameter VDepMode_OC1=Step has value = step)

OC1 Stage Pickup Level

PickupCurr_OC1

VDepFact_OC1 * PickupCurr_OC1

VHighLimit_OC1

Selected Voltage Magnitude


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Figure 210: Example for OC1 step current pickup level variation as function of measured voltage magnitude in Step mode of operation

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This feature will simple change the set overcurrent pickup level in accordance with magnitude variations of the measured voltage. It shall be noted that this feature will as well affect the pickup current value for calculation of operate times for IDMT curves (i.e. overcurrent with IDMT curve will operate faster during low voltage conditions).
Current restraint feature The overcurrent protection step operation can be can be made dependent of a restraining current quantity (see table 240). Practically then the pickup level of the overcurrent step is not constant but instead increases with the increase in the magnitude of the restraining current.

IMeasured
e at er p O ea ar
es I>R tr es *I r f f oe trC ain

IsetHigh

IsetLow

atan(RestrCoeff) Restraint
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Figure 211: Current pickup variation with restraint current magnitude This feature will simple prevent overcurrent step to pickup if the magnitude of the measured current quantity is smaller than the set percentage of the restrain current magnitude. However this feature will not affect the pickup current value for calculation of operate times for IDMT curves. This means that the IDMT curve operate time will not be influenced by the restrain current magnitude. When set, the pickup signal will start definite time delay or inverse (i.e. IDMT) time delay in accordance with the end user setting. If the pickup signal has value one for longer time than the set time delay, the overcurrent step will set its trip signal to one. Reset of the pickup and trip signal can be instantaneous or time delay in accordance with the end user setting.
1.2.4 Built-in undercurrent protection steps Two undercurrent protection steps are available. They are absolutely identical and therefore only one will be explained here. Undercurrent step simply compares the magnitude of the measured current quantity (see table 238) with the set pickup level. The undercurrent step will pickup and set its pickup signal to one if the magnitude of the measured current quantity is smaller than this set level. The pickup signal will start definite time delay with set time delay. If the pickup signal

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has value one for longer time than the set time delay the undercurrent step will set its trip signal to one. Reset of the pickup and trip signal can be instantaneous or time delay in accordance with the setting.
1.2.5 Built-in overvoltage protection steps Two overvoltage protection steps are available. They are absolutely identical and therefore only one will be explained here.

Overvoltage step simply compares the magnitude of the measured voltage quantity (see table 239) with the set pickup level. The overvoltage step will pickup if the magnitude of the measured voltage quantity is bigger than this set level. Reset ratio is settable, with default value of 0.99. The pickup signal will start definite time delay or inverse (i.e. IDMT) time delay in accordance with the end user setting. If the pickup signal has value one for longer time than the set time delay, the overvoltage step will set its trip signal to one. Reset of the pickup and trip signal can be instantaneous or time delay in accordance with the end user setting.
1.2.6 Built-in undervoltage protection steps Two undervoltage protection steps are available. They are absolutely identical and therefore only one will be explained here.

Undervoltage step simply compares the magnitude of the measured voltage quantity (see table 239 with the set pickup level. The undervoltage step will pickup if the magnitude of the measured voltage quantity is smaller than this set level. Reset ratio is settable, with default value of 1.01. The pickup signal will start definite time delay or inverse (i.e. IDMT) time delay in accordance with the end user setting. If the pickup signal has value one for longer time than the set time delay, the undervoltage step will set its trip signal to one. Reset of the pickup and trip signal can be instantaneous or time delay in accordance with the end user setting.
1.2.7 Inadvertent generator energization The inadvertent energization function is realized by means of the general current and voltage protection function (CAGVPC). The function is configured as shown in figure 212.

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CVGAPC 3IP 3VP TROC1

TROV1 or TRUV1 BLKOC1

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Figure 212: Configuration of the inadvertent energization function The setting of the general current and voltage function (typical values) is done as shown in table 242.
Table 242: The setting of the general current and voltage function
Measured Quantity UndervoltagePickup Pickup in % of generator rating Time delay in seconds

< 70% Maximum generator Phase to Phase voltage > 85% Maximum generator Phase to Phase voltage Maximum > 50% generator Phase current

10.0 s

Overvoltage Pickup

1.0 s

OvercurrentPickup

0.05 s

In normal operation the overvoltage trip signal is activated and the undervotage trip signal is deactivated. This means that the overcurrent function is blocked.

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When the generator is taken out of service the generator voltage gets low. The overvoltage trip signal will be deactivated and the undervoltage trip signal will be activated after the set delay. At this moment the block signal to the overcurrent function will be deactivated. It the generator is energized at stand still conditions, i.e. when the voltage is zero, the overcurrent function will operate after the short set delay if the generator current is larger than the set value. When the generator is started the overvoltage trip signal will be activared the set time delay after the moment when the voltage has reached the set value. At this moment the blocking of the overcurrent function is activated. The delay of the undervoltage function will prevent false operation at short circuits in the external power grid.
1.2.8 Logic diagram The simplified internal logics, for the PGPF function are shown in the following figures.

REx670
ADM PGPF function
Current and voltage selection settings

52

Phasor calculation of individual currents

A/D conversion scaling with CT ratio

Phasors & samples

Selection of which current and voltage shall be given to the built-in protection elements

Selected current Selected voltage

Restraint current selection

A/D conversion scaling with CT ratio

Phasor calculation of individual voltages

Selection of restraint current

Selected restraint current

Phasors & samples

en05000169_ansi.vsd

Figure 213: Treatment of measured currents within IED for PGPF function Figure 213 shows how internal treatment of measured currents is done for multipurpose protection function

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The following currents and voltages are inputs to the multipurpose protection function. They must all be expressed in true power system (primary) Amperes and kilovolts. 1. Instantaneous values (samples) of currents & voltages from one three-phase current and one three-phase voltage input. 2. Fundamental frequency phasors from one three-phase current and one three-phase voltage input calculated by the pre-processing modules. 3. Sequence currents & voltages from one three-phase current and one three-phase voltage input calculated by the pre-processing modules. The multipurpose protection function: 1. Selects one current from the three phase input system (see table 243) for internally measured current. 2. Selects one voltage from the three phase input system (see table 244) for internally measured voltage. 3. Selects one current from the three phase input system (see table 244) for internally measured restraint current.

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CURRENT

UC1
Selected current

2nd Harmonic restraint UC2 2 Harmonic restraint


nd

TRUC1

STUC2 TRUC2

STOC1

OC1 2nd Harmonic restraint


Selected restraint current

TROC1

BLK2ND

Current restraint Directionality Voltage control / restraint

DIROC1

OC2 2nd Harmonic restraint Current restraint Directionality Voltage control / restraint 1

STOC2 TROC2

UDIRLOW DIROC2

STOV1

OV1

TROV1 STOV2

OV2

TROV2 STUV1

Selected voltage

UV1

TRUV1 STUV2

UV2

TRUV2

VOLTAGE

en05000170.vsd

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General current and voltage protection (GAPC)

Chapter 9 Multipurpose protection

CURRENT

UC1
Selected current

2nd Harmonic restraint UC2 2nd Harmonic restraint OC1 2 Harmonic restraint
nd

TRUC1

PU_UC2 TRUC2

PU_OC1 TROC1 BLK2ND

OR

Selected restraint current

Current restraint Directionality Voltage control / restraint

DIROC1

OC2 2nd Harmonic restraint Current restraint Directionality Voltage control / restraint OR

PU_OC2 TROC2

VDIRLOW DIROC2

PU_OV1

OV1

TROV1 PU_OV2

OV2

TROV2 PU_UV1

Selected voltage

UV1

TRUV1 PU_UV2

UV2

TRUV2

VOLTAGE

en05000170_ansi.vsd

Figure 214: PGPF function main logic diagram for built in protection elements

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Logic in figure 214 can be summarized as follows: 1. The selected currents and voltage are given to built-in protection elements. Each protection element and step makes independent decision about status of its PICKUP and TRIP output signals. 2. More detailed internal logic for every protection element is given in the following four figures 3. Common PICKUP and TRIP signals from all built-in protection elements & steps (internal OR logic) are available from multipurpose function as well.

Enable second harmonic

Second harmonic check

NOT

DEF time selected

0-DEF 0
OR

BLKTROC1

AND

TROC1

Selected current

a a>b b

OC1=On BLKOC1

PickupCurr_OC1

AND

PU_OC1

Inverse Voltage control or restraint feature Directionality check DIR_OK Inverse time selected

Selected voltage

Selected restrain current

Current Restraint Feature Imeasured > k Irestraint

en05000831_ansi.vsd

Figure 215: Simplified internal logic diagram for built-in first overcurrent step i.e. OC1 (step OC2 has the same internal logic)

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General current and voltage protection (GAPC)

Chapter 9 Multipurpose protection

Bin input: BLKUC1TR

Selected current

a b>a b

PickupCurr_UC1

AND

0-DEF 0

AND

TRUC1

Operation_UC1=On Bin input: BLKUC1

PU_UC1

en05000750_ansi.vsd

Figure 216: Simplified internal logic diagram for built-in first undercurrent step i.e. UC1 (step UC2 has the same internal logic)

DEF time selected Selected voltage

0-DEF 0

BLKTROV1

AND

TROV1

OR
PU_OV1

a a>b b

PickupVolt_OV1

AND
Inverse

Operation_OV1=On BLKOV1 Inverse time selected

en05000751_ansi.vsd

Figure 217: Simplified internal logic diagram for built-in first overvoltage step i.e.OV1 (step OV2 has the same internal logic)

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General current and voltage protection (GAPC)

Chapter 9 Multipurpose protection

DEF time selected Selected voltage

0-DEF 0 OR

BLKTRUV1

AND

TRUV1

a b>a b

PickupVolt_UV1

AND

PU_UV1

Inverse Operation_UV1=On BLKUV1 Inverse time selected

en05000752_ansi.vsd

Figure 218: Simplified internal logic diagram for built-in first undervoltage step i.e.UV1 (step UV2 has the same internal logic)

1.3

Function block
GF01CVGAPC I3P V3P BLOCK BLKOC1 BLKOC1TR ENMLTOC1 BLKOC2 BLKOC2TR ENMLTOC2 BLKUC1 BLKUC1TR BLKUC2 BLKUC2TR BLKOV1 BLKOV1TR BLKOV2 BLKOV2TR BLKUV1 BLKUV1TR BLKUV2 BLKUV2TR TRIP TROC1 TROC2 TRUC1 TRUC2 TROV1 TROV2 TRUV1 TRUV2 PICKUP PU_OC1 PU_OC2 PU_UC1 PU_UC2 PU_OV1 PU_OV2 PU_UV1 PU_UV2 BLK2ND DIROC1 DIROC2 VDIRLOW CURRENT ICOSFI VOLTAGE VIANGLE en05000372_ansi.vsd

Figure 219: GF function block

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Chapter 9 Multipurpose protection

1.4

Input and output signals


Table 243: Input signals for the CVGAPC (GF01-) function block
Signal Description

I3P V3P BLOCK BLKOC1 BLKOC1TR ENMLTOC1 BLKOC2 BLKOC2TR ENMLTOC2 BLKUC1 BLKUC1TR BLKUC2 BLKUC2TR BLKOV1 BLKOV1TR BLKOV2 BLKOV2TR BLKUV1 BLKUV1TR BLKUV2 BLKUV2TR

Group signal for current input Group signal for voltage input Block of function Block of over current function OC1 Block of trip for over current function OC1 When activated, the current multiplier is in use for OC1 Block of over current function OC2 Block of trip for over current function OC2 When activated, the current multiplier is in use for OC2 Block of under current function UC1 Block of trip for under current function UC1 Block of under current function UC2 Block of trip for under current function UC2 Block of over voltage function OV1 Block of trip for over voltage function OV1 Block of over voltage function OV2 Block of trip for over voltage function OV2 Block of under voltage function UV1 Block of trip for under voltage function UV1 Block of under voltage function UV2 Block of trip for under voltage function UV2

Table 244: Output signals for the CVGAPC (GF01-) function block
Signal Description

TRIP TROC1 TROC2 TRUC1 TRUC2 TROV1 TROV2 TRUV1 TRUV2 PICKUP PU_OC1 PU_OC2

Common trip signal Trip signal from overcurrent function OC1 Trip signal from overcurrent function OC2 Trip signal from undercurrent function UC1 Trip signal from undercurrent function UC2 Trip signal from overvoltage function OV1 Trip signal from overvoltage function OV2 Trip signal from undervoltage function UV1 Trip signal from undervoltage function UV2 General pickup signal Pickup signal from overcurrent function OC1 Pickup signal from overcurrent function OC2

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Signal

Description

PU_UC1 PU_UC2 PU_OV1 PU_OV2 PU_UV1 PU_UV2 BLK2ND DIROC1 DIROC2 VDIRLOW CURRENT ICOSFI VOLTAGE VIANGLE

Pickup signal from undercurrent function UC1 Pickup signal from undercurrent function UC2 Pickup signal from overvoltage function OV1 Pickup signal from overvoltage function OV2 Pickup signal from undervoltage function UV1 Pickup signal from undervoltage function UV2 Second harmonic block signal Directional mode of OC1 (nondir, forward,reverse) Directional mode of OC2 (nondir, forward,reverse) Low voltage for directional polarization Measured current value Measured current multiplied with cos (Phi) Measured voltage value Angle between voltage and current

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1.5

Setting parameters
Table 245: Basic parameter group settings for the CVGAPC (GF01-) function
Parameter Range Step Default Unit Description

Operation CurrentInput

Disabled Enabled Phase A Phase B Phase C PosSeq NegSeq 3*ZeroSeq MaxPh MinPh UnbalancePh Phase AB Phase BC Phase CA MaxPh-Ph MinPh-Ph UnbalancePh-Ph 1 - 99999 Phase A Phase B Phase C PosSeq -NegSeq -3*ZeroSeq MaxPh MinPh UnbalancePh Phase AB Phase BC Phase CA MaxPh-Ph MinPh-Ph UnbalancePh-Ph 0.05 - 2000.00 Disabled Enabled 10.0 - 50.0

Disabled MaxPh

Disable/Enable Operation Select current signal which will be measured inside function

IBase VoltageInput

1 -

3000 MaxPh

A -

Base Current Select voltage signal which will be measured inside function

VBase OperHarmRestr

0.05 -

400.00 Disabled

kV -

Base Voltage Disable/Enable operation of 2nd harmonic restrain Ratio of second to fundamental current harmonic in % Harm analyze disabled above this current level in % of Ibase Disable/Enable current restrain function

l_2nd/l_fund

1.0

20.0

BlkLevel2nd

10 - 5000

5000

%IB

EnRestrainCurr

Disabled Enabled

Disabled

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General current and voltage protection (GAPC)

Chapter 9 Multipurpose protection

Parameter

Range

Step

Default

Unit

Description

RestrCurrInput

PosSeq NegSeq 3*ZeroSeq Max 0.00 - 5.00 -180 - 180 1 - 90 0.0 - 5.0

PosSeq

Select current signal which will be used for current restrain Restraining current coefficient Relay Characteristic Angle Relay Operate Angle Below this level in % of Vbase setting ActLowVolt takes over Disable/Enable Operation of OC1 Pickup current for OC1 in % of Ibase Selection of time delay curve type for OC1

RestrCurrCoeff RCADir ROADir LowVolt_VM

0.01 1 1 0.1

0.00 -75 75 0.5

Deg Deg %VB

Operation_OC1 PickupCurr_OC1 CurveType_OC1

Disabled Enabled 2.0 - 5000.0 ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Programmable RI type RD type 0.00 - 6000.00 0.05 - 999.00

1.0 -

Disabled 120.0 ANSI Def. Time

%IB -

tDef_OC1 TD_OC1

0.01 0.01

0.50 0.30

s -

Independent (definitive) time delay of OC1 Time multiplier for the dependent time delay for OC1 Minimum operate time for IEC IDMT curves for OC1 Control mode for voltage controlled OC1 function

tMin_OC1 VCntrlMode_OC1

0.00 - 6000.00 Voltage control Input control Volt/Input control Disabled Step Slope

0.01 -

0.05 Disabled

s -

VDepMode_OC1

Step

Voltage dependent mode OC1 (step, slope)

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General current and voltage protection (GAPC)

Chapter 9 Multipurpose protection

Parameter

Range

Step

Default

Unit

Description

VDepFact_OC1

0.02 - 5.00

0.01

1.00

Multiplying factor for current pickup when OC1 is voltage dependent Voltage low limit setting OC1 in % of Vbase Voltage high limit setting OC1 in % of Vbase Enable block of OC1 by 2nd harmonic restrain Directional mode of OC1 (nondir, forward,reverse) Measuring on IandV or IcosPhiandV for OC1 Low voltage level action for Dir_OC1 (Nodir, Blk, Mem) Disable/Enable Operation od OC2 Pickup current for OC2 in % of Ibase Selection of time delay curve type for OC2

VLowLimit_OC1 VHighLimit_OC1 HarmRestr_OC1 DirMode_OC1

1.0 - 200.0 1.0 - 200.0 Disabled Enabled Non-directional Forward Reverse I&V IcosPhi&U Non-directional Block Memory Disabled Enabled 2.0 - 5000.0 ANSI Ext. inv. ANSI Very inv. ANSI Norm. inv. ANSI Mod. inv. ANSI Def. Time L.T.E. inv. L.T.V. inv. L.T. inv. IEC Norm. inv. IEC Very inv. IEC inv. IEC Ext. inv. IEC S.T. inv. IEC L.T. inv. IEC Def. Time Programmable RI type RD type 0.00 - 6000.00 0.05 - 999.00

0.1 0.1 -

50.0 100.0 Disabled Non-directional

%VB %VB -

DirPrinc_OC1 ActLowVolt1_VM

I&V Non-directional

Operation_OC2 PickupCurr_OC2 CurveType_OC2

1.0 -

Disabled 120.0 ANSI Def. Time

%IB -

tDef_OC2 TD_OC2

0.01 0.01

0.50 0.30

s -

Independent (definitive) time delay of OC2 Time multiplier for the dependent time delay for OC2 Minimum operate time for IEC IDMT curves for OC2

tMin_OC2

0.00 - 6000.00

0.01

0.05

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General current and voltage protection (GAPC)

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Parameter

Range

Step

Default

Unit

Description

VCntrlMode_OC2

Voltage control Input control Volt/Input control Disabled Step Slope 0.02 - 5.00

Disabled

Control mode for voltage controlled OC2 function

VDepMode_OC2 VDepFact_OC2

0.01

Step 1.00

Voltage dependent mode OC2 (step, slope) Multiplying factor for current pickup when OC2 is voltage dependent Voltage low limit setting OC2 in % of Vbase Voltage high limit setting OC2 in % of Vbase Enable block of OC2 by 2nd harmonic restrain Directional mode of OC2 (nondir, forward,reverse) Measuring on IandV or IcosPhiandV for OC2 Low voltage level action for Dir_OC2 (Nodir, Blk, Mem) Disable/Enable operation of UC1 Enable internal low current level blocking for UC1 Internal low current blocking level for UC1 in % of Ibase Operate undercurrent level for UC1 in % of Ibase Independent (definitive) time delay of UC1 Reset time delay used in IEC Definite Time curve UC1 Enable block of UC1 by 2nd harmonic restrain Disable/Enable operation of UC2 Enable internal low current level blocking for UC2

VLowLimit_OC2 VHighLimit_OC2 HarmRestr_OC2 DirMode_OC2

1.0 - 200.0 1.0 - 200.0 Disabled Enabled Non-directional Forward Reverse I&V IcosPhi&U Non-directional Block Memory Disabled Enabled Disabled Enabled 0 - 150

0.1 0.1 -

50.0 100.0 Disabled Non-directional

%VB %VB -

DirPrinc_OC2 ActLowVolt2_VM

I&V Non-directional

Operation_UC1 EnBlkLowI_UC1

Disabled Disabled

BlkLowCurr_UC1

20

%IB

PickupCurr_UC1

2.0 - 150.0

1.0

70.0

%IB

tDef_UC1 tResetDef_UC1

0.00 - 6000.00 0.00 - 6000.00

0.01 0.01

0.50 0.00

s s

HarmRestr_UC1 Operation_UC2 EnBlkLowI_UC2

Disabled Enabled Disabled Enabled Disabled Enabled

Disabled Disabled Disabled

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Parameter

Range

Step

Default

Unit

Description

BlkLowCurr_UC2

0 - 150

20

%IB

Internal low current blocking level for UC2 in % of Ibase Operate undercurrent level for UC2 in % of Ibase Independent (definitive) time delay of UC2 Enable block of UC2 by 2nd harmonic restrain Disable/Enable operation of OV1 Operate voltage level for OV1 in % of Vbase Selection of time delay curve type for OV1

PickupCurr_UC2

2.0 - 150.0

1.0

70.0

%IB

tDef_UC2 HarmRestr_UC2 Operation_OV1 PickupVolt_OV1 CurveType_OV1

0.00 - 6000.00 Disabled Enabled Disabled Enabled 2.0 - 200.0 Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 0.00 - 6000.00

0.01 0.1 -

0.50 Disabled Disabled 150.0 Definite time

s %VB -

tDef_OV1

0.01

1.00

Operate time delay in sec for definite time use of OV1 Minimum operate time for Inverse-Time curves for OV1 Time multiplier for the dependent time delay for OV1 Disable/Enable operation of OV2 Pickup voltage for OV2 in % of Vbase Selection of time delay curve type for OV2

tMin_OV1

0.00 - 6000.00

0.01

0.05

TD_OV1

0.05 - 999.00

0.01

0.30

Operation_OV2 PickupVolt_OV2 CurveType_OV2

Disabled Enabled 2.0 - 200.0 Definite time Inverse curve A Inverse curve B Inverse curve C Prog. inv. curve 0.00 - 6000.00

0.1 -

Disabled 150.0 Definite time

%VB -

tDef_OV2

0.01

1.00

Operate time delay in sec for definite time use of OV2 Minimum operate time for Inverse-Time curves for OV2 Time multiplier for the dependent time delay for OV2

tMin_OV2

0.00 - 6000.00

0.01

0.05

TD_OV2

0.05 - 999.00

0.01

0.30

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Parameter

Range

Step

Default

Unit

Description

Operation_UV1 PickupVolt_UV1

Disabled Enabled 2.0 - 150.0

0.1

Disabled 50.0

%VB

Disable/Enable operation of UV1 Operate undervoltage level for UV1 in % of Vbase Selection of time delay curve type for UV1

CurveType_UV1

Definite time Inverse curve A Inverse curve B Prog. inv. curve 0.00 - 6000.00

Definite time

tDef_UV1

0.01

1.00

Operate time delay in sec for definite time use of UV1 Minimum operate time for Inverse-Time curves for UV1 Time multiplier for the dependent time delay for UV1 Enable internal low voltage level blocking for UV1 Internal low voltage blocking level for UV1 in % of Vbase Disable/Enable operation of UV2 Pickup undervoltage for UV2 in % of Vbase Selection of time delay curve type for UV2

tMin_UV1

0.00 - 6000.00

0.01

0.05

TD_UV1

0.05 - 999.00

0.01

0.30

EnBlkLowV_UV1

Disabled Enabled 0.0 - 5.0

Enabled

BlkLowVolt_UV1

0.1

0.5

%VB

Operation_UV2 PickupVolt_UV2 CurveType_UV2

Disabled Enabled 2.0 - 150.0 Definite time Inverse curve A Inverse curve B Prog. inv. curve 0.00 - 6000.00

0.1 -

Disabled 50.0 Definite time

%VB -

tDef_UV2

0.01

1.00

Operate time delay in sec for definite time use of UV2 Minimum operate time for Inverse-Time curves for UV2 Time multiplier for the dependent time delay for UV2 Enable internal low voltage level blocking for UV2 Internal low voltage blocking level for UV2 in % of Vbase

tMin_UV2

0.00 - 6000.00

0.01

0.05

TD_UV2

0.05 - 999.00

0.01

0.30

EnBlkLowV_UV2

Disabled Enabled 0.0 - 5.0

Enabled

BlkLowVolt_UV2

0.1

0.5

%VB

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Table 246: Advanced parameter group settings for the CVGAPC (GF01-) function
Parameter Range Step Default Unit Description

MultPU_OC1

1.0 - 10.0

0.1

2.0

Multiplier for scaling the current setting value for OC1 Selection of reset curve type for OC1 Reset time delay used in IEC Definite Time curve OC1 Parameter P for customer programmable curve for OC1 Parameter A for customer programmable curve for OC1 Parameter B for customer programmable curve for OC1 Parameter C for customer programmable curve for OC1 Parameter PR for customer programmable curve for OC1 Parameter TR for customer programmable curve for OC1 Parameter CR for customer programmable curve for OC1 Multiplier for scaling the current setting value for OC2 Selection of reset curve type for OC2 Reset time delay used in IEC Definite Time curve OC2 Parameter P for customer programmable curve for OC2 Parameter A for customer programmable curve for OC2

ResCrvType_OC1

Instantaneous IEC Reset ANSI reset 0.00 - 6000.00

Instantaneous

tResetDef_OC1

0.01

0.00

P_OC1

0.0001 - 10.0000

0.0001 0.0200

A_OC1

0.0000 - 999.0000

0.0001 0.1400

B_OC1

0.0000 - 99.0000

0.0001 0.0000

C_OC1

0.0000 - 1.0000

0.0001 1.0000

PR_OC1

0.005 - 3.000

0.001

0.500

TR_OC1

0.005 - 600.000

0.001

13.500

CR_OC1

0.1 - 10.0

0.1

1.0

MultPU_OC2

1.0 - 10.0

0.1

2.0

ResCrvType_OC2

Instantaneous IEC Reset ANSI reset 0.00 - 6000.00

Instantaneous

tResetDef_OC2

0.01

0.00

P_OC2

0.0001 - 10.0000

0.0001 0.0200

A_OC2

0.0000 - 999.0000

0.0001 0.1400

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Parameter

Range

Step

Default

Unit

Description

B_OC2

0.0000 - 99.0000

0.0001 0.0000

Parameter B for customer programmable curve for OC2 Parameter C for customer programmable curve for OC2 Parameter PR for customer programmable curve for OC2 Parameter TR for customer programmable curve for OC2 Parameter CR for customer programmable curve for OC2 Reset time delay used in IEC Definite Time curve UC2 Selection of reset curve type for OV1 Reset time delay in sec for definite time use of OV1 Reset time delay in sec for Inverse-Time curves for OV1 Parameter A for customer programmable curve for OV1 Parameter B for customer programmable curve for OV1 Parameter C for customer programmable curve for OV1 Parameter D for customer programmable curve for OV1 Parameter P for customer programmable curve for OV1 Selection of reset curve type for OV2 Reset time delay in sec for definite time use of OV2

C_OC2

0.0000 - 1.0000

0.0001 1.0000

PR_OC2

0.005 - 3.000

0.001

0.500

TR_OC2

0.005 - 600.000

0.001

13.500

CR_OC2

0.1 - 10.0

0.1

1.0

tResetDef_UC2

0.00 - 6000.00

0.01

0.00

ResCrvType_OV1

Instantaneous Frozen timer Linearly decreased 0.00 - 6000.00 0.01

Instantaneous

tResetDef_OV1

0.00

tResetIDMT_OV1

0.00 - 6000.00

0.01

0.00

A_OV1

0.0050 - 999.0000

0.0001 0.1400

B_OV1

0.5000 - 99.0000

0.0001 1.0000

C_OV1

0.0000 - 1.0000

0.0001 1.0000

D_OV1

0.000 - 10.000

0.001

0.000

P_OV1

0.0001 - 10.0000

0.0001 0.0200

ResCrvType_OV2

Instantaneous Frozen timer Linearly decreased 0.00 - 6000.00 0.01

Instantaneous

tResetDef_OV2

0.00

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General current and voltage protection (GAPC)

Chapter 9 Multipurpose protection

Parameter

Range

Step

Default

Unit

Description

tResetIDMT_OV2

0.00 - 6000.00

0.01

0.00

Reset time delay in sec for Inverse-Time curves for OV2 Parameter A for customer programmable curve for OV2 Parameter B for customer programmable curve for OV2 Parameter C for customer programmable curve for OV2 Parameter D for customer programmable curve for OV2 Parameter P for customer programmable curve for OV2 Selection of reset curve type for UV1 Reset time delay in sec for definite time use of UV1 Reset time delay in sec for Inverse-Time curves for UV1 Parameter A for customer programmable curve for UV1 Parameter B for customer programmable curve for UV1 Parameter C for customer programmable curve for UV1 Parameter D for customer programmable curve for UV1 Parameter P for customer programmable curve for UV1 Selection of reset curve type for UV2 Reset time delay in sec for definite time use of UV2

A_OV2

0.0050 - 999.0000

0.0001 0.1400

B_OV2

0.5000 - 99.0000

0.0001 1.0000

C_OV2

0.0000 - 1.0000

0.0001 1.0000

D_OV2

0.000 - 10.000

0.001

0.000

P_OV2

0.0001 - 10.0000

0.0001 0.0200

ResCrvType_UV1

Instantaneous Frozen timer Linearly decreased 0.00 - 6000.00 0.01

Instantaneous

tResetDef_UV1

0.00

tResetIDMT_UV1

0.00 - 6000.00

0.01

0.00

A_UV1

0.0050 - 999.0000

0.0001 0.1400

B_UV1

0.5000 - 99.0000

0.0001 1.0000

C_UV1

0.0000 - 1.0000

0.0001 1.0000

D_UV1

0.000 - 10.000

0.001

0.000

P_UV1

0.0001 - 10.0000

0.0001 0.0200

ResCrvType_UV2

Instantaneous Frozen timer Linearly decreased 0.00 - 6000.00 0.01

Instantaneous

tResetDef_UV2

0.00

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General current and voltage protection (GAPC)

Chapter 9 Multipurpose protection

Parameter

Range

Step

Default

Unit

Description

tResetIDMT_UV2

0.00 - 6000.00

0.01

0.00

Reset time delay in sec for Inverse-Time curves for UV2 Parameter A for customer programmable curve for UV2 Parameter B for customer programmable curve for UV2 Parameter C for customer programmable curve for UV2 Parameter D for customer programmable curve for UV2 Parameter P for customer programmable curve for UV2

A_UV2

0.0050 - 999.0000

0.0001 0.1400

B_UV2

0.5000 - 99.0000

0.0001 1.0000

C_UV2

0.0000 - 1.0000

0.0001 1.0000

D_UV2

0.000 - 10.000

0.001

0.000

P_UV2

0.0001 - 10.0000

0.0001 0.0200

1.6

Technical data
Table 247: General current and voltage protection (GAPC)
Function Range or value Accuracy

Measuring current input

Phase A, Phase B, Phase C, PosSeq, NegSeq, 3*ZeroSeq, MaxPh, MinPh, UnbalancePh, Phase A-Phase B, Phase B-Phase C, Phase C-Phase A, MaxPh-Ph, MinPh-Ph, UnbalancePh-Ph (1 - 99999) A Phase A, Phase B, Phase C, PosSeq, -NegSeq, -3*ZeroSeq, MaxPh, MinPh, UnbalancePh, Phase A-Phase B, Phase B-Phase C, Phase C-Phase A, MaxPh-Ph, MinPh-Ph, UnbalancePh-Ph (0.05 - 2000.00) kV

Base current Measuring voltage input

Base voltage

1.0% of In for I<In 1.0% of I for I>In 1.0% of In for I<In 1.0% of I for I>In 0.5% 10 ms

Pickup overcurrent, step 1 and 2 (2 - 5000)% of Ibase Pickup undercurrent, step 1 and 2 Definite time delay (2 - 150)% of Ibase (0.00 - 6000.00) s

Operate time pickup overcurrent 25 ms typically at 0 to 2 x Iset Reset time pickup overcurrent 25 ms typically at 2 to 0 x Iset

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Chapter 9 Multipurpose protection

Function

Range or value

Accuracy

Operate time pickup undercurrent Reset time pickup undercurrent See table 577 and table 578

25 ms typically at 2 to 0 x Iset 25 ms typically at 0 to 2 x Iset Parameter ranges for customer defined characteristic no 17: TD: 0.05 - 999.00 A: 0.0000 - 999.0000 B: 0.0000 - 99.0000 C: 0.0000 - 1.0000 P: 0.0001 - 10.0000 PR: 0.005 - 3.000 TR: 0.005 - 600.000 CR: 0.1 - 10.0

See table 577 and table 578

Voltage level where voltage memory takes over

(0.0 - 5.0)% of Vbase

1.0% of Vn 1.0% of Vn for V<Vn 1.0% of V for V>Vn 1.0% of Vn for V<Vn 1.0% of V for V>Vn

Pickup overvoltage, step 1 and 2 (2.0 - 200.0)% of Vbase Pickup undervoltage, step 1 and 2 Operate time, pickup overvoltage Reset time, pickup overvoltage Operate time pickup undervoltage Reset time pickup undervoltage High and low voltage limit, voltage dependent operation Directional function Relay characteristic angle Relay operate angle Reset ratio, overcurrent Reset ratio, undercurrent Reset ratio, overvoltage Reset ratio, undervoltage Overcurrent: Critical impulse time Impulse margin time Undercurrent: Critical impulse time Impulse margin time 10 ms typically at 2 to 0 x Iset 15 ms typically 10 ms typically at 0 to 2 x Iset 15 ms typically (2.0 - 150.0)% of Vbase 25 ms typically at 0 to 2 x Vset 25 ms typically at 2 to 0 x Vset 25 ms typically 2 to 0 x Vset 25 ms typically at 0 to 2 x Vset (1.0 - 200.0)% of Vbase Settable: NonDir, forward and reverse (-180 to +180) degrees (1 to 90) degrees > 95% < 105% > 95% < 105%

1.0% of Vn for V<Vn 1.0% of V for V>Vn

2.0 degrees 2.0 degrees

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General current and voltage protection (GAPC)

Chapter 9 Multipurpose protection

Function

Range or value

Accuracy

Overvoltage: Critical impulse time Impulse margin time Undervoltage: Critical impulse time Impulse margin time 10 ms typically at 2 to 0 x Vset 15 ms typically 10 ms typically at 0 to 2 x Vset 15 ms typically -

448

About this chapter

Chapter 10 Secondary system supervision

Chapter 10 Secondary system supervision


About this chapter This chapter describes functions like Current circuit supervision and Fuse failure supervision. The way the functions work, their setting parameters, function blocks, input and output signals and technical data are included for each function.

449

Current circuit supervision (RDIF)

Chapter 10 Secondary system supervision

Current circuit supervision (RDIF)


Function block name: CCSxANSI number: IEC 61850 logical node name: CCSRDIF IEC 60617 graphical symbol:

1.1

Introduction
Open or short circuited current transformer cores can cause unwanted operation of many protection functions such as differential, ground fault current and negative sequence current functions. It must be remembered that a blocking of protection functions at an occurring open CT circuit will mean that the situation will remain and extremely high voltages will stress the secondary circuit. The current circuit supervision function compares the residual current from a three phase set of current transformer cores with the neutral point current on a separate input taken from another set of cores on the current transformer. A detection of a difference indicates a fault in the circuit and is used as alarm or to block protection functions expected to give unwanted tripping.

1.2

Principle of operation
The supervision function compares the absolute value of the vectorial sum of the three phase currents |Iphase| and the numerical value of the residual current |Iref| from another current transformer set, see figure 220. The FAIL output will be set to a logical one when the following criteria are fulfilled: The numerical value of the difference |Iphase| |Iref| is higher than 80% of the numerical value of the sum |Iphase| + |Iref|. The numerical value of the current |Iphase| |Iref| is equal to or higher than the set operate value IMinOp. No phase current has exceeded >PUBlock during the last 10 ms. The current circuit supervision is enabled by setting Operation = Enable.

The FAIL output remains activated 100 ms after the AND-gate resets when being activated for more than 20 ms. If the FAIL lasts for more than 150 ms a ALARM will be issued. In this case the FAIL and ALARM will remain activated 1 s after the AND-gate resets. This prevents unwanted resetting of the blocking function when phase current supervision element(s) operate, e.g. during a fault.

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Current circuit supervision (RDIF)

Chapter 10 Secondary system supervision

I>Pickup_Block BLOCK
IA IB IC I ref IA IB IC I ref

+ + +

I>IMinOp + -

x 0,8

1,5 x Ir
OR

10 ms

AND

OR

FAIL

20 ms 100 ms

OPERATION BLOCK

150 ms

1s

ALARM

en05000463_ansi.vsd

Figure 220: Simplified logic diagram for the current circuit supervision The operate characteristic is percentage restrained, see figure 221.

451

Current circuit supervision (RDIF)

Chapter 10 Secondary system supervision

| I phase | - | I ref |

Slope = 1

Slope = 0.8 I MinOp

Operation area

| I phase | + | I ref |
99000068.vsd

Figure 221: Operate characteristics

Note!
Due to the formulas for the axis compared, |Iphase | - |I ref | and | I phase | + | I ref | respectively, the slope can not be above 2.

1.3

Function block
CCS1CCSRDIF I3P IREF BLOCK FAIL ALARM

en05000389_ansi.vsd

Figure 222: CCS function block

1.4

Input and output signals


Table 248: Input signals for the CCSRDIF (CCS1-) function block
Signal Description

I3P IREF BLOCK

Group signal for three phase current input Reference current signal input Block of function

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Current circuit supervision (RDIF)

Chapter 10 Secondary system supervision

Table 249: Output signals for the CCSRDIF (CCS1-) function block
Signal Description

FAIL ALARM

Detection of current circuit failure Alarm for current circuit failure

1.5

Setting parameters
Table 250: Basic parameter group settings for the CCSRDIF (CCS1-) function
Parameter Range Step Default Unit Description

Operation IBase IMinOp

Disabled Enabled 1 - 99999 5 - 200

1 1

Off 3000 20

A %IB

Disable/Enable Operation IBase value for current pickup detectors Minimum operate current differential pickup in % of IBase

Table 251: Advanced parameter group settings for the CCSRDIF (CCS1-) function
Parameter Range Step Default Unit Description

Pickup_Block

5 - 500

150

%IB

Block of the function at high phase current, in % of IBase

1.6

Technical data
Table 252: Current circuit supervision (RDIF)
Function Range or value Accuracy 10.0% of In at I In 10.0% of I at I > In 5.0% of In at I In 5.0% of I at I > In

Operate current

(5-200)% of In (5-500)% of In

Block current

453

Fuse failure supervision (RFUF)

Chapter 10 Secondary system supervision

Fuse failure supervision (RFUF)


Function block name: FSDxANSI number: IEC 61850 logical node name: SDDRFUF IEC 60617 graphical symbol:

2.1

Introduction
The aim of the fuse failure supervision function (FSD) is to block voltage measuring functions at failures in the secondary circuits between the voltage transformer and the IED in order to avoid unwanted operations that otherwise might occur. The fuse failure supervision function basically has two different algorithms, negative sequence and zero sequence based algorithm and an additional delta voltage and delta current algorithm. The negative sequence detection algorithm is recommended for IEDs used in isolated or high-impedance grounded networks. It is based on the negative-sequence measuring quantities, a high value of voltage without the presence of the negative-sequence current 3I2. The zero sequence detection algorithm is recommended for IEDs used in directly or low impedance grounded networks. It is based on the zero sequence measuring quantities, a high value of voltage 3V0 without the presence of the residual current 3I0. A criterion based on delta current and delta voltage measurements can be added to the fuse failure supervision function in order to detect a three phase fuse failure, which in practice is more associated with voltage transformer switching during station operations. For better adaptation to system requirements, an operation mode setting has been introduced which makes it possible to select the operating conditions for negative sequence and zero sequence based function. The selection of different operation modes makes it possible to choose different interaction possibilities between the negative sequence and zero sequence based algorithm.

2.2
2.2.1

Principle of operation
Zero sequence The function can be set in five different modes by setting the parameter OpModeSel. The zero sequence function continuously measure the internal currents and voltages in all three phases and calculate:

the zero-sequence voltage 3V0 the zero-sequence current 3I0.

The measured signals are compared with their respective set values 3V0Pickup and 3I0Pickup. The function enable the internal signal fuseFailDetected if the measured zero sequence voltage is higher than the set value 3V0Pickup, the measured zero sequence current is below the set value 3I0Pickup and the operation mode selector OpModeSel) is set to 2 (zero sequence mode). This

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will activate the output signal BLKV, intended to block voltage related protection functions in the IED. The output signal BLKZ will be activated as well if not the internal dead line detection is activaded at the same time. If the fuseFailDetected signal is present for more than 5 seconds at the same time as all phase voltages are below the set value VPPU and the setting parameter ISealIn is set to Enable, the function will activate the output signals 3PH, BLKV and BLKZ. The same signals will aslo be activated if all phase voltages are below the value VPPU, SealIn=On and any of the phase voltages below the setting value for more than 5 seconds. It is recommended to always set SealIn to Enable since this will secure that no unwanted operation of fuse failure will occur at closing command of breaker when the line is already energized from the other end. The system voltages shall be normal before fuse failure is allowed to be activated and initiate block of different protection functions. The output signal BLKV can also be activated if no phase voltages is below the setting VPPU for more than 60 seconds at the same time as the zero sequence voltage is above the set value 3V0Pickup for more than 5 seconds, all phase currents are below the setting IDLDPU (operate level for dead line detection) and the circuit breaker is closed (input52a is activated). This condition covers for fuse failure at open breaker position. Fuse failure condition is unlatched when the normal voltage conditions are restored. Fuse failure condition is stored in the non volatile memory in the IED. In the new start-up procedure the IED checks the stored value in its non volatile memory and establishes the corresponding starting conditions.

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Chapter 10 Secondary system supervision

20 ms STORE3PH From non volatile memory AND 1:All voltages are low AND OR

Store in non volatile (FUSE-STORE3PH)

3PH 0: All voltages are high (Reset Latch) OR OR

27PU_VA 27PU_VB PUDVDIA IA>IPPU PUDVDIB IB>IPPU PUDVDIC IC>IPPU OR OR AND OR OR STDVDI AND AND 52a 1:Function Enable 27PU_VC 1:Fuse Failure Detection

1:Fuse failure for more than 5 s - loop AND OR 5s 0 OR 0 150 ms Dead-Line Block 0 200 ms AND OR BLKZ BLKV

(Set Latch)

DLCND MCBOP DISCPOS BLKSP DISABLE OpMode = Off TEST OperationDVDI = On TEST-ACTIVE AND AND

OR

AND BlockFUSE= Yes

en05000655_ansi.vsd

Figure 223: Simplified logic diagram for fuse failure supervision function, zero sequence based
Input and output signals The output signals 3PH, BLKV and BLKZ can be blocked in the following conditions:

The input BLOCK is activated The input BLKTRIP is activated at the same time as the internal signal fufailStarted is not present The operation mode selector OpModeSel is set to Disable. The IED is in TEST status (TEST-ACTIVE is high) and the function has been blocked from the HMI (BlockFUSE=Yes)

The input BLOCK signal is a general purpose blocking signal of the fuse failure supervision function. It can be connected to a binary input of the IED in order to receive a block command from external devices or can be software connected to other internal functions of the IED itself in order to receive a block command from internal functions. Through OR gate it can be connected to both binary inputs and internal function outputs. The input BLKSP is intended to be connected to the trip output at any of the protection functions included in the IED. When activated for more than 20 ms, the operation of the fuse failure is blocked during a fixed time of 100 ms. The aim is to increase the security against unwanted operations during the opening of the breaker, which might cause unbalance conditions for which the fuse failure might operate.

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The output signal BLKZ will also be blocked if the internal dead line detection is activated. The block signal has a 200 ms drop-off time delay. The input signal MCBOP is supposed to be connected via a terminal binary input to the N.C. auxiliary contact of the miniature circuit breaker protecting the VT secondary circuit. The MCBOP signal sets the output signals BLKU and BLKZ in order to block all the voltage related functions when the MCB is open independent of the setting of OpModeSel selector. The additional drop-off timer of 150 ms prolongs the presence of MCBOP signal to prevent the unwanted operation of voltage dependent function due to non simultaneous closing of the main contacts of the miniature circuit breaker. The input signal 89b is supposed to be connected via a terminal binary input to the N.C. auxiliary contact of the line disconnector. The 89b signal sets the output signal BLKU in order to block the voltage related functions when the line disconnector is open. The impedance protection function is not affected by the position of the line disconnector since there will be no line currents that can cause maloperation of the distance protection. If DISCPOS=0 it signifies that the line is connected to the system and when the DISCPOS=1 it signifies that the line is disconnected from the system and the block signal BLKU is generated. The output BLKU can be used for blocking the voltage related measuring functions (undervoltage protection, synchro-check etc.) except for the impedance protection. The function output BLKZ can be used for blocking the impedance protection function. The BLKZ will only be activated if not the internal dead line detection is activated at the same time. The fuse failure condition is unlatched when the normal voltage conditions are restored. When the output 3PH is activated, all three voltage are low.
2.2.2 Negative sequence The negative sequence operates in the same way as the zero sequence, but it calculates the negative sequence component of current and voltage.

the negative sequence current 3I2 the negative sequence voltage 3U2

The function enable the internal signal fuseFailDetected if the measured negative sequence voltage is higher than the set value 3V2PU, the measured negative sequence current is below the value 3I2PU and the operation mode selector (OpModeSel) is set to 1 (negative sequence mode).
2.2.3 du/dt and di/dt The delta function can be activated by setting the parameter OperationDVDI to On. When it is selected On it operates in parallel with the sequence based algorithm.

The current and voltage is continuously measured in all three phases and the following quantities are calculated: The change of voltage U/t The change of current I/t

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The calculated delta quantities are compared with their respective set values DIPU and DUPU. The delta current and delta voltage algorithm, detects a fuse failure if a sufficient negative change in voltage amplitude without a sufficient change in current amplitude is detected in each phase separately. This check is performed if the circuit breaker is closed. Information about the circuit breaker position is brought to the function input 52a through a binary input of the IED. There are two conditions for activating the internal STDU signal and set the latch: The magnitude of U is higher than the corresponding setting DUPU and I is below the setting DIPU in any phase at the same time as the circuit breaker is closed (CBCLOSED = 1) The magnitude U is higher than the setting DUDP and the magnitude of I is below the setting DIPU in any phase at the same time as the magnitude of the phase current in the same phase is higher than the setting IPPU.

The first criterion requires that the delta condition shall be fulfilled in any phase at the same time as circuit breaker is closed. Opening circuit breaker at one end and energizing the line from other end onto a fault could lead to wrong start of the fuse failure function at the end with the open breaker. If this is considering to bee an important disadvantage, connect the 52a input to FALSE. In this way only the second criterion can activate the delta function. The second criterion means that detection of failure in one phase together with high current for the same phase will set the latch. The measured phase current is used to reduce the risk of false fuse failure detection. If the current on the protected line is low, a voltage drop in the system (not caused by fuse failure) is not by certain followed by current change and a false fuse failure might occur. To prevent that the phase current criterion is introduced. If the signal setLatchUI is set (see figure 223) and if all measured voltages are low (lower than the setting UPh>) the output 3PH will be activated indicating fuse failure in all three phases. The output BLKU and BLKZ will be activated as well. If the signal setLatchUI is activated but not all three phases are below the setting UPh> only BLKU will be activated. The BLKZ will be activated as well if not the internal dead line detection is activated.
2.2.4 Operation modes The fuse failure supervision function can be switched on or off by the setting parameter Operation to Enable or Disable. Negative and zero sequence algorithm For increased flexibility and adaptation to system requirements, an operation mode selector, OperationMode has been introduced to make it possible to select different operating modes for the negative and zero sequence based algorithm. The different operation modes are:

OpModeSel = 0, the negative and zero sequence function is switched off OpModeSel = 1; Negative sequence is selected OpModeSel = 2; Zero sequence is selected OpModeSel = 3; Both negative and zero sequence is activated and working in parallel in an OR-condition

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OpModeSel = 4; Both negative and zero sequence is activated and working in series (AND-condition for operation) OpModeOpModeSel = 5; Optimum of negative and zero sequence (the function that has the highest magnitude of measured negative and zero sequence current will be activated).

du/dt and di/dt algorithm The U and I function can be switched on or off by the setting parameter OpDUDI to Enable or Disable. 2.2.5 Dead line detection The function input signal deadLineCondition (see figure 223) is related to the internal dead line detection function. This signal is activated from the dead line condition function when the voltage and the current in at least one phase is below their respective setting values VDLDPU and IDLDPU. It prevents the blocking of the impedance protection by a fuse failure detection during dead line condition (that occurs also during single pole auto-reclosing). The 200 ms drop-off timer prolongs the dead line condition after the line-energization in order to prevent the blocking of the impedance protection for unequal pole closing.

2.3

Function block
FSD1SDDRFUF I3P V3P BLOCK 52A MCBOP 89B BLKTRIP BLKZ BLKV 3PH DLD1PH DLD3PH

en05000700_ansi.vsd

Figure 224: FSD function block

2.4

Input and output signals


Table 253: Input signals for the SDDRFUF (FSD1-) function block
Signal Description

I3P V3P BLOCK 52a MCBOP 89b BLKTRIP

Current connection Voltage connection Block of function Active when circuit breaker is closed Active when external Miniature Circuit Breaker opens protected voltage circuit Active when line disconnect switch is open Blocks operation of function when active

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Table 254: Output signals for the SDDRFUF (FSD1-) function block
Signal Description

BLKZ BLKV 3PH DLD1PH DLD3PH

Start of current and voltage controlled function General pickup Three-phase pickup Dead line condition in at least one phase Dead line condition in all three phases

2.5

Setting parameters
Table 255: Basic parameter group settings for the SDDRFUF (FSD1-) function
Parameter Range Step Default Unit Description

Operation IBase VBase OpModeSel

Disabled Enabled 1 - 99999 0.05 - 2000.00 Disabled V2I2 V0I0 V0I0 OR V2I2 V0I0 AND V2I2 OptimZsNs 1 - 100

1 0.05 -

Enabled 3000 400.00 V0I0

A kV -

Disable/Enable Operation Base current Base voltage Operating mode selection

3V0PU

30

%VB

Pickup of residual overvoltage element in % of VBase Pickup of residual undercurrent element in % of IBase Pickup of negative sequence overvoltage element in % of VBase Pickup of negative sequence undercurrent element in % of IBase Operation of change based function Disable/Enable Pickup of change in phase voltage in % of VBase Pickup of change in phase current in % of IBase Pickup of phase voltage in % of VBase

3I0PU

1 - 100

10

%IB

3V2PU

1 - 100

30

%VB

3I2PU

1 - 100

10

%IB

OpDVDI

Disabled Enabled 1 - 100

Disabled

DVPU

60

%VB

DIPU

1 - 100

15

%IB

VPPU

1 - 100

70

%VB

460

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Chapter 10 Secondary system supervision

Parameter

Range

Step

Default

Unit

Description

IPPU SealIn VSealInPU IDLDPU

1 - 100 Disabled Enabled 1 - 100 1 - 100

1 1 1

10 Enabled 70 5

%IB %VB %IB

Pickup of phase current in % of IBase Seal in functionality Disable/Enable Pickup of seal-in phase voltage in % of VBase Pickup for phase current detection in % of IBase for dead line detection Pickup for phase voltage detection in % of VBase for dead line detection

VDLDPU

1 - 100

60

%VB

2.6

Technical data
Table 256: Fuse failure supervision (RFUF)
Function Range or value Accuracy 1.0% of Vn 1.0% of In 1.0% of Vn 1.0% of In 5.0% of Vn 5.0% of In

Operate voltage, zero sequence Operate current, zero sequence Operate voltage, negative sequence Operate current, negative sequence Operate voltage change pickup Operate current change pickup

(1-100)% of Vbase (1100)% of Ibase (1100)% of Vbase (1100)% of Ibase (1100)% of Vbase (1100)% of Ibase

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462

About this chapter

Chapter 11 Control

Chapter 11 Control
About this chapter This chapter describes the control functions. The way the functions work, their setting parameters, function blocks, input and output signals and technical data are included for each function.

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Synchronizing, synchronism check and energizing check (RSYN, 25)


Function block name: SYNxANSI number: 25 IEC 61850 logical node name: IEC 60617 graphical symbol:

SESRSYN

sc/vc

1.1

Introduction
The Synchronizing function allows closing of asynchronous networks at the correct moment including the breaker closing time. The systems can thus be reconnected after an auto-reclose or manual closing which improves the network stability. The synchronism check, enerigizing check function checks that the voltages on both sides of the circuit breaker are in synchronism, or with at least one side dead to ensure that closing can be done safely. The function includes a built-in voltage selection scheme for double bus and breaker-and-a-half or ring busbar arrangements. Manual closing as well as automatic reclosing can be checked by the function and can have different settings. For systems which are running asynchronous a synchronizing function is provided. The main purpose of the synchronizing function is to provide controlled closing of circuit breakers when two asynchronous systems are going to be connected. It is used for slip frequencies that are larger than those for synchronism check and lower than a set maximum level for the synchronizing function.

1.2
1.2.1

Principle of operation
Basic functionality The synchronism check function measures the conditions across the circuit breaker and compares them to set limits. The output is only given when all measured quantities are simultaneously within their set limits.

The energizing check function measures the bus and line voltages and compares them to both high and low threshold detectors. The output is only given when the actual measured quantities match the set conditions. The synchronizing measures the conditions across the circuit breaker, and it also determines the angle change occurring during the closing delay of the circuit breaker, from the measured slip frequency. The output is only given when all measured conditions are simultaneously within their set limits. The issue of the output is timed to give closure at the optimal time including the time for the circuit breaker and the closing circuit.

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For single circuit breaker and breaker-and-a-half circuit breaker arrangements, the SYN function blocks have the capability to make the necessary voltage selection. For single circuit breaker arrangements, selection of the correct voltage is made using auxiliary contacts of the bus disconnectors. For breaker-and-a-half circuit breaker arrangements, correct voltage selection is made using auxiliary contacts of the bus disconnectors as well as the circuit breakers The internal logic for each function block as well as the Input and Outputs and the setting parameters with default setting and setting ranges is described in this document. For application related information, please refer to the Application manual.
1.2.2 Logic diagrams The logic diagrams that follow illustrate the main principles of the Synchrocheck function components such as Synchronism check, Energizing check and Voltage selection, and are intended to simplify the understanding of the function. Synchronism check The voltage difference, frequency difference and phase angle difference values are measured in the IED centrally and are available for the Synchrocheck function for evaluation. If the bus voltage is connected as phase-phase and the line voltage as phase-neutral (or the opposite), this need to be compensated. This is done with a setting, which scales up the line voltage to a level equal to the bus voltage.

When the function is set to OperationSC = On, the measuring will start. The function will compare the bus and line voltage values with the set values for VHighBusSC and VHighLineSC. If both sides are higher than the set values the measured values are compared with the set values for acceptable frequency, phase angle and voltage difference FreqDiff, PhaseDiff and VDiff. If a compensation factor is set due to the use of different voltages on the Bus and Line, the factor is deducted from the line voltage before the comparison of the phase angle values. The frequency on both sides of the circuit breaker is also measured. The frequencies must not deviate from the rated frequency more than +/-5Hz. The frequency difference between the bus frequency and the line frequency is measured and may not exceed the set value. Two sets of settings for frequency difference and phase angle difference are available and used for the Manual closing and Auto-Reclose functions respectively as required. The inputs BLOCK and BLKSC are available for total block of the complete Synchrocheck function and block of the Synchronism check function respectively. TSTSC will allow testing of the function where the fulfilled conditions are connected to a separate test output Two outputs MANSYOK resp. AUTOSYOK are activated when the actual measured conditions match the set conditions for the respective output. The output signal can be delayed independently for MANSYOK conditions and for AUTOSYOK. A number of outputs are available as information about fulfilled checking conditions. VOKSC shows that the voltages are high, VDIFFSC, FRDIFFM/A, PHDIFFM/A shows when the voltage difference, frequency difference and phase angle difference conditions are met.

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Synchronizing When the function is set to OperationSynch=On the measuring will be performed.

The function will compare the values for the bus and line voltage with the set values for UHighBusSynch and UHighLineSynch which is a supervision that the voltages are both live. If both sides are higher than the set values the measured values are compared with the set values for acceptable frequency, rate of change of frequency, phase angle and voltage difference FreqDiffMax, FreqDiffMin and UDiffSynch. Measured frequencies between the settings for the maximum and minimum frequency will initiate the measuring and the evaluation of the angle change to allow operation to be sent in the right moment including the set tBreaker time. There is a phase angle release internally to block any incorrect closing pulses. At operation the SYNOK output will be activated with a pulse tClosePulse and the function reset. The function will also reset if the syncronizing conditions are not fulfilled within the set tMaxSynch time. This will then prevent that the functions is by mistake maintained in operation a long time waiting for conditions to be fulfilled. The inputs BLOCK and BLKSYNCH are available for total block of the complete function resp. of the Synchronizing part.

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SYN1 OPERATION SYNCH OFF ON TEST MODE OFF ON


STARTSYN
AND

AND

SYNPROGR

BLKSYNCH OR

S R

UDiffSynch
50 ms

UHighBusSynch UHighLineSynch FreqDiffMax

AND

AND

SYNOK

t OR

AND

FreqDiffMin
tClose Pulse AND AND tMax Synch

OR

TSTSYNOK

FreqRateChange fBus&fLine 5 Hz PhaseDiff < 15 deg PhaseDiff=closing angle

SYNFAIL

en06000636.vsd

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SYN1 OPERATION SYNCH OFF ON TEST MODE OFF ON


STARTSYN
AND

AND

SYNPROGR

BLKSYNCH OR

S R

VDiffSynch
50 ms

VHighBusSynch VHighLineSynch FreqDiffMax

AND

AND

SYNOK

t OR

AND

FreqDiffMin
tClose Pulse AND AND tMax Synch

OR

TSTSYNOK

FreqRateChange fBus&fLine 5 Hz PhaseDiff < 15 deg PhaseDiff=closing angle

SYNFAIL

en06000636_ansi.vsd

Figure 225: Simplified logic diagram for the synchronizing function


Energizing check Voltage values are measured in the IED centrally and are available for evaluation by the Synchronism check function. If the bus voltage is connected as phase-phase and the line voltage as phase-neutral, (or the opposite) this needs to be compensated. This is done with a setting, which scales the line voltage to a level equal to the bus voltage.

The function measures voltages on the busbar and the line to verify whether they are live or dead. This is done by comparing with the set values VHighBusEnerg and VLowBusEnerg for bus energizing and VHighBusEnergand VLowBusEnerg for line energizing.

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The frequency on both sides of the circuit breaker is also measured. The frequencies must not deviate from the rated frequency more than +/-5Hz. The frequency difference between the bus frequency and the line frequency is measured and shall not exceed a set value. The Energizing direction can be selected individually for the Manual and the Automatic functions respectively. When the conditions are met the outputs AUTOENOK and MANENOK respectively will be activated if the fuse supervision conditions are fulfilled. The output signal can be delayed independently for MANENOK conditions and for AUTOENOK. The Energizing direction can also be selected by an integer input AENMODE resp MENMODE, which e.g. can be connected to a Binary to Integer function block BI 16 (BAxx or BBxx). Integers supplied shall be 1=off, 2=DLLB, 3=DBLL and 4= Both. Not connected input with connection of INTZERO output from Fixed Signals function block will mean that the setting is done from PST tool. The active position can be read on outputs MODEAEN resp MODEMEN. The modes are 0=OFF, 1=DLLB, 2=DBLL and 3=Both. The inputs BLOCK and BLKENERG are available for total block of the complete Synchronism check function resp. block of the Energizing check function. TSTENOK will allow testing of the function where the fulfilled conditions are connected to a separate test output.

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Note! Similar logic for Manual Synchronism check.


OperationSC = Enabled
AND AND

TSTAUTOSY

TSTSC BLKSC BLOCK


OR AND tSCA AND
0-60 ms 0

AND

AUTOSYOK

VDiffSC
AND
50 ms 0

VHighBusSC VHighLineSC
AND

VOKSC VDIFFSC FRDIFFA PHDIFFA VDIFFME FRDIFFME


PHDIFFME

FreqDiffA PhaseDiffA voltageDifferenceValue frequencyDifferenceValue phaseAngleDifferenceValue

1 1

en07000114_ansi.vsd

Figure 226: Simplified logic diagram for the Synchronism check function
Voltage selection The voltage selection module including supervision of included voltage transformer fuses for the different arrangements is a basic part of the Synchrocheck function and determines the parameters fed to the Synchronism check and Energizing check functions. This includes the selection of the appropriate Line and Bus voltages and fuse supervision.

The voltage selection type to be used is set with the parameter CBConfig. The different alternatives are described below.

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If NoVoltageSel is set the default voltages used will be VLine1 and VBus1. This is also the case when external voltage selection is provided. Fuse failure supervision for the used inputs must also be connected. The voltage selection function selected voltages and fuse conditions are the Synchronism check and Energizing check inputs. For the disconnector positions it is advisable to use (NO) a and (NC) b type contacts to supply Disconnector Open and Closed positions but it is of course also possible to use an inverter for one of the positions.
Fuse failure supervision External fuse-failure signals or signals from a tripped fuse switch/MCB are connected to binary inputs that are configured to the inputs of the Synchronism check functions in the terminal. Alternatively the internal signals from fuse failure supervision can be used when available. There are two alternative connection possibilities. Inputs labelled OK must be connected if the available contact indicates that the voltage circuit is healthy. Inputs labelled FF must be connected if the available contact indicates that the voltage circuit is faulty.

The SYN1(2)-VB1/2OK and SYN1(2)-VB1/2FF inputs are related to the busbar voltage and the SYN1(2)-VL1/2OK and SYN1(2)-VL1/2FF inputs are related to the line voltage. Configure them to the binary inputs or function outputs that indicate the status of the external fuse failure of the busbar and line voltages. In the event of a fuse failure, the energizing check functions are blocked. The synchronism check requires full voltage on both sides and will be blocked automatically in the event of fuse failures.
Voltage selection for a single circuit breaker with double busbars This function uses the binary input from the disconnectors auxiliary contacts BUS1_OP-BUS1_CL for Bus 1, and BUS2_OP-BUS2_CL for Bus 2 to select between bus 1 and bus 2 voltages. If the disconnector connected to bus 2 is closed and the disconnector connected to bus 1 is opened the bus 2 voltage is used. All other combinations use the bus 1 voltage. The Outputs B1SEL and B2SEL respectively indicate the selected Bus voltage.

The function also checks the fuse-failure signals for bus 1, bus 2 and line voltage transformers. Inputs VB1OK-VB1FF supervise the fuse for Bus 1. VB2OK-VB2FF supervises the fuse for Bus 2 and VLN1OK-VLN1FF supervises the fuse for the Line voltage transformer. The inputs fail (FF) or healthy (OK) can alternatively be used dependent on the available signal. If a fuse-failure is detected in the selected voltage source an output signal VSELFAIL is set. This output signal is true if the selected bus or line voltages have a fuse failure. This output as well as the function can be blocked with the input signal BLOCK. The function logic diagram is shown in figure 227.

471

Synchronizing, synchronism check and energizing check (RSYN, 25)

Chapter 11 Control

BUS1_OP BUS1_CL BUS2_OP BUS2_CL


AND AND

B1SEL

NOT

B2SEL

AND

invalidSelection busVoltage

bus1Voltage bus2Voltage

VB1OK VB1FF VB2OK VB2FF VL1OK VL1FF

OR

AND OR AND AND AND

selectedFuseOK VSELFAIL

OR

OR

BLOCK

en05000779_ansi.vsd

Figure 227: Logic diagram for the voltage selection function of a single circuit breaker with double busbars
Voltage selection for a breaker-and-a-half circuit breaker arrangement Note that with breaker-and-a-half schemes two Synchronism check functions must be used in the IED (three for two IEDs in a complete bay). Below, the scheme for one Bus breaker and the Tie breakers is described.

This voltage selection function uses the binary inputs from the disconnectors and circuit breakers auxiliary contacts to select the right voltage for the Synchrocheck (Synchronism and Energizing check) function. For the bus circuit breaker one side of the circuit breaker is connected to the busbar and the other side is connected either to line 1, line 2 or the other busbar depending on the arrangement. Inputs LINE1_OP-LINE1_CL, BUS1_OP-BUS1_CL, BUS2_OP-BUS2_CL, LINE2_OP-LINE2_CL are inputs for the position of the Line disconnectors respectively the Bus and Tie breakers. The Outputs L1SEL, L2SEL and B2SEL will give indication of the selected Line voltage as a reference to the fixed Bus 1 voltage. The fuse supervision is connected to VLNOK-VLNFF etc. and with alternative Healthy or Failing fuse signals depending on what is available for each of fuse (MCB).

472

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The tie circuit breaker is connected either to bus 1 or line 1 on one side and the other side is connected either to bus 2 or line 2. Four different output combinations are possible, bus to bus, bus to line, line to bus and line to line. The line 1 voltage is selected if the line 1 disconnector is closed. The bus 1 voltage is selected if the line 1 disconnector is open and the bus 1 circuit breaker is closed. The line 2 voltage is selected if the line 2 disconnector is closed. The bus 2 voltage is selected if the line 2 disconnector is open and the bus 2 Circuit breaker is closed.

The function also checks the fuse-failure signals for bus 1, bus 2, line 1 and line 2. If a fuse-failure is detected in the selected voltage an output signal VSELFAIL is set. This output signal is true if the selected bus or line voltages have a fuse failure. This output as well as the function can be blocked with the input signal BLOCK.The function block diagram for the voltage selection of a bus circuit breaker is shown in Figure 228: and for the tie circuit breaker in Figure 229:

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Synchronizing, synchronism check and energizing check (RSYN, 25)

Chapter 11 Control

LINE1_OP LINE1_CL BUS1_OP BUS1_CL LINE2_OP LINE2_CL BUS2_OP BUS2_CL


AND AND AND AND AND OR AND AND

L1SEL

L2SEL B2SEL invalidSelection

line1Voltage line2Voltage bus2Voltage VB1OK VB1FF VB2OK VB2FF VL1OK VL1FF


OR OR OR AND AND

lineVoltage

selectedFuseOK VSELFAIL

OR

AND

AND

VL2OK VL2FF BLOCK

OR

AND

en05000780_ansi.vsd

Figure 228: Simplified logic diagram for the voltage selection function for a bus circuit breaker in a breaker-and-a-half arrangement.

474

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Chapter 11 Control

LINE1_OP LINE1_CL
AND

L1SEL NOT B1SEL


AND

BUS1_OP BUS1_CL
AND

AND

line1Voltage bus1Voltage LINE2_OP LINE2_CL


AND

busVoltage

L2SEL NOT B2SEL


AND OR

BUS2_OP BUS2_CL
AND

invalidSelection

AND

line2Voltage bus2Voltage

lineVoltage

VB1OK VB1FF VB2OK VB2FF VL1OK VL1FF VL2OK VL2FF BLOCK

OR

AND OR AND

OR

AND

selectedFuseOK VSELFAIL

OR

AND

AND

OR

AND

en05000781_ansi.vsd

Figure 229: Simplified logic diagram for the voltage selection function for the tie circuit breaker in breaker-and-a-half arrangement.

1.3

Function block
The Synchrocheck function block is shown in Figure 230:. Tables describing the inputs, outputs and setting parameters of this function are presented in the following sections of this document. Refer to the Application manual for the use of inputs and outputs in your particular application.

475

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SYN1SESRSYN_25 V3PB1 V3PB2 V3PL1 V3PL2 BLOCK BLKSYNCH BLKSC BLKENERG BUS1_OP BUS1_CL BUS2_OP BUS2_CL LINE1_OP LINE1_CL LINE2_OP LINE2_CL VB1OK VB1FF VB2OK VB2FF VL1OK VL1FF VL2OK VL2FF STARTSYN TSTSYNCH TSTSC TSTENERG AENMODE MENMODE SYNOK AUTOSYOK AUTOENOK MANSYOK MANENOK TSTSYNOK TSTAUTSY TSTMANSY TSTENOK VSELFAIL B1SEL B2SEL L1SEL L2SEL SYNPROGR SYNFAIL VOKSYN VDIFFSYN FRDIFSYN FRDIFFOK FRDERIVA VOKSC VDIFFSC FRDIFFA PHDIFFA FRDIFFM PHDIFFM VDIFFME FRDIFFME PHDIFFME MODEAEN MODEMEN

en06000534_ansi.vsd

Figure 230: SYN function block

1.4

Input and output signals


Table 257: Input signals for the SESRSYN_25 (SYN1-) function block
Signal Description

V3PB1 V3PB2 V3PL1 V3PL2 BLOCK BLKSYNCH BLKSC BLKENERG BUS1_OP BUS1_CL BUS2_OP

Group signal for voltage input busbar 1 Group signal for voltage input busbar 2 Group signal for voltage input line 1 Group signal for voltage input line 2 General block Block synchronizing Block synchro check Block energizing check Open status for CB or disconnector connected to bus1 Close status for CB and disconnector connected to bus1 Open status for CB or disconnector connected to bus2

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Signal

Description

BUS2_CL LINE1_OP LINE1_CL LINE2_OP LINE2_CL VB1OK VB1FF VB2OK VB2FF VL1OK VL1FF VL2OK VL2FF STARTSYN TSTSYNCH TSTSC TSTENERG AENMODE MENMODE

Close status for CB and disconnector connected to bus2 Open status for CB or disconnector connected to line1 Close status for CB and disconnector connected to line1 Open status for CB or disconnector connected to line2 Close status for CB and disconnector connected to line2 Bus1 voltage transformer OK Bus1 voltage transformer fuse failure Bus2 voltage transformer OK Bus2 voltage transformer fuse failure Line1 voltage transformer OK Line1 voltage transformer fuse failure Line2 voltage transformer OK Line2 voltage transformer fuse failure Start synchronizing Set synchronizing in test mode Set synchro check in test mode Set energizing check in test mode Input for setting of automatic energizing mode Input for setting of manual energizing mode

Table 258: Output signals for the SESRSYN_25 (SYN1-) function block
Signal Description

SYNOK AUTOSYOK AUTOENOK MANSYOK MANENOK TSTSYNOK TSTAUTSY TSTMANSY TSTENOK VSELFAIL B1SEL B2SEL L1SEL L2SEL SYNPROGR SYNFAIL

Synchronizing OK output Auto synchronism-check OK Automatic energizing check OK Manual synchronism-check OK Manual energizing check OK Synchronizing OK test output Auto synchronism-check OK test output Manual synchronism-check OK test output Energizing check OK test output Selected voltage transformer fuse failed Bus1 selected Bus2 selected Line1 selected Line2 selected Synchronizing in progress Synchronizing failed

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Signal

Description

VOKSYN VDIFFSYN FRDIFSYN FRDIFFOK FRDERIVA VOKSC VDIFFSC FRDIFFA PHDIFFA FRDIFFM PHDIFFM VDIFFME FRDIFFME PHDIFFME MODEAEN MODEMEN

Voltage amplitudes for synchronizing above set limits Voltage difference out of limit for synchronizing Frequency difference out of limit for synchronizing Frequency difference in band for synchronizing Frequency derivative out of limit for synchronizing Voltage amplitudes above set limits Voltage difference out of limit Frequency difference out of limit for Auto operation Phase angle difference out of limit for Auto operation Frequency difference out of limit for Manual operation Phase angle difference out of limit for Manual Operation Calculated difference in voltage Calculated difference in frequency Calculated difference of phase angle Selected mode for automatic energizing Selected mode for manual energizing

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1.5

Setting parameters
Table 259: Basic parameter group settings for the SESRSYN_25 (SYN1-) function
Parameter Range Step Default Unit Description

Operation SelPhaseBus1

Disabled Enabled Phase A Phase B Phase C Phase AB Phase BC Phase CA Phase A Phase B Phase C Phase AB Phase BC Phase CA Phase A Phase B Phase C Phase AB Phase BC Phase CA Phase A Phase B Phase C Phase AB Phase BC Phase CA No voltage sel. Double bus 1 1/2 bus CB 1 1/2 bus alt. CB Tie CB 0.001 - 9999.999 -180 - 180 0.20 - 5.00 Disabled Enabled 50.0 - 120.0

Disabled Phase B

Disable/Enable Operation Select phase for bus1

SelPhaseBus2

Phase B

Select phase for bus2

SelPhaseLine1

Phase B

Select phase for line1

SelPhaseLine2

Phase B

Select phase for line2

CBConfig

No voltage sel.

Select CB configuration

VBase PhaseShift VRatio OperationSynch VHighBusSynch

0.001 5 0.01 1.0

400.000 0 1.00 Disabled 80.0

kV Deg %VB

Base voltage in kV Phase shift Voltage ratio Operation for synchronizing function Off/On Voltage high limit bus for synchronizing in % of VBase Voltage high limit line for synchronizing in % of VBase Voltage difference limit for synchronizing in % of VBase

VHighLineSynch

50.0 - 120.0

1.0

80.0

%VB

VDiffSynch

2.0 - 50.0

1.0

10.0

%VB

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Parameter

Range

Step

Default

Unit

Description

FreqDiffMin

0.003 - 0.250

0.001

0.010

Hz

Minimum frequency difference limit for synchronizing Maximum frequency difference limit for synchronizing Maximum allowed frequency rate of change Closing time of the breaker Breaker closing pulse duration Resets synch if no close has been made before set time Minimum time to accept synchronizing conditions Operation for synchronism-check function Off/On Live bus voltage pickup for synchronism-check in % of VBase Live line voltage pickup for synchronism-check in % of VBase Voltage difference limit in % of VBase Frequency difference limit between bus and line Auto Frequency difference limit between bus and line Manual Phase angle difference limit between bus and line Auto Phase angle difference limit between bus and line Manual Time delay output for synchrocheck Auto Time delay output for synchrocheck Manual Automatic energizing check mode

FreqDiffMax

0.050 - 0.250

0.001

0.200

Hz

FreqRateChange tBreaker tClosePulse tMaxSynch

0.000 - 0.500 0.000 - 60.000 0.050 - 60.000 0.00 - 6000.00

0.001 0.001 0.001 0.01

0.300 0.080 0.200 600.00

Hz/s s s s

tMinSynch OperationSC

0.000 - 60.000 Disabled Enabled 50.0 - 120.0

0.001 -

2.000 Enabled

s -

VHighBusSC

1.0

80.0

%VB

VHighLineSC

50.0 - 120.0

1.0

80.0

%VB

VDiffSC FreqDiffA

2.0 - 50.0 0.003 - 1.000

1.0 0.001

15.0 0.010

%VB Hz

FreqDiffM

0.003 - 1.000

0.001

0.010

Hz

PhaseDiffA

5.0 - 90.0

1.0

25.0

Deg

PhaseDiffM

5.0 - 90.0

1.0

25.0

Deg

tSCA tSCM AutoEnerg

0.000 - 60.000 0.000 - 60.000 Disabled DLLB DBLL Both

0.001 0.001 -

0.100 0.100 DBLL

s s -

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Synchronizing, synchronism check and energizing check (RSYN, 25)

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Parameter

Range

Step

Default

Unit

Description

ManEnerg

Disabled DLLB DBLL Both Disabled Enabled 50.0 - 120.0

Both

Manual energizing check mode

ManEnergDBDL VLiveBusEnerg

1.0

Disabled 80.0

%VB

Manual dead bus, dead line energizing Live bus voltage pickup for energizing check in % of VBase Live line voltage pickup for energizing check in % of VBase Dead bus voltage pickup for energizing check in % of VBase Dead line voltage pickup for energizing check in % of VBase Maximum voltage for energizing in % of VBase Time delay for automatic energizing check Time delay for manual energizing check

VLiveLineEnerg

50.0 - 120.0

1.0

80.0

%VB

VDeadBusEnerg

10.0 - 80.0

1.0

40.0

%VB

VDeadLineEnerg

10.0 - 80.0

1.0

40.0

%VB

VMaxEnerg tAutoEnerg tManEnerg

80.0 - 140.0 0.000 - 60.000 0.000 - 60.000

1.0 0.001 0.001

115.0 0.100 0.100

%VB s s

1.6

Technical data
Table 260: Synchronizing, synchronism check and energizing check (RSYN, 25)
Function Range or value Accuracy

Phase shift, line - bus Voltage ratio, Vbus/Vline Voltage high limit for synchronism check Reset ratio, synchronism check Frequency difference limit between bus and line Phase angle difference limit between bus and line Voltage difference limit between bus and line Time delay output for synchronism check Voltage high limit for energizing check

(-180 to 180) degrees (0.20-5.00)% of Vbase (50.0-120.0)% of Vbase > 95% (0.003-1.000) Hz (5.0-90.0) degrees (2.0-50.0)% of Vbase (0.000-60.000) s (50.0-120.0)% of Vbase

1.0% of Vn at V Vn 1.0% of V at V > Vn

2.0 mHz 2.0 degrees 1.0% of Vn 0.5% 10 ms 1.0% of Vn at V Vn 1.0% of V at V > Vn

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Function

Range or value

Accuracy

Reset ratio, voltage high limit Voltage low limit for energizing check Reset ratio, voltage low limit Maximum voltage for energizing

> 95% (10.0-80.0)% of Vbase < 105% (80.0-140.0)% of Vbase (0.000-60.000) s 160 ms typically 80 ms typically

1.0% of Vn

1.0% of Vn at V Vn 1.0% of V at V > Vn 0.5% 10 ms

Time delay for energizing check Operate time for synchronism check function Operate time for energizing function

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Chapter 11 Control

Autorecloser (RREC, 79)


Function block name: ARx-ANSI number: 79 IEC 61850 logical node name: IEC 60617 graphical symbol:

SMBRREC

O->I

2.1

Introduction
The autoreclosing function provides high-speed and/or delayed auto-reclosing for single or multi-breaker applications. Up to five reclosing attempts can be programmed. The first attempt can be single-, two and/or three pole for single phase or multi-phase faults respectively. Multiple autoreclosing functions are provided for multi-breaker arrangements. A priority circuit allows one circuit breaker to close first and the second will only close if the fault proved to be transient. Each autoreclosing function can be configured to co-operate with a synchronism check function.

2.2
2.2.1

Principle of operation
Logic Diagrams The logic diagrams below illustrate the principles applicable in the understanding of the functionality. Auto-reclosing operation Off and On Operation of the automatic reclosing can be set to Off or On via the setting parameters and through external control. With the setting Operation=ON, the function is activated while with the setting Operation=OFF the function is deactivated. With the setting Operation=External ctrl, the activation/deactivation is made by input signal pulses, for example from a control system.

2.2.2

When the function is set On and is operative the output SETON is activated (high). Other input conditions such as 52a and CBREADY must also be fulfilled. At this point the automatic recloser is prepared to start the reclosing cycle and the output signal READY on the AR function block is activated (high).
2.2.3 Auto-reclosing mode selection The Auto-reclosing mode is selected with setting ARMode=3phase(0),1/2/3ph(1),1/2ph(2),1ph+1*2ph(3),1/2ph+1*3ph(4)1ph+1*2+3ph(5) The selected mode can be read as integer as per above list on output MODE.

As an alternative to setting the mode can be selected by connecting an integer, e.g. from function block B16I (BAxx respBBxx) to input MODEINT

483

Autorecloser (RREC, 79)

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Following integers shall be used. 1=3phase,2=1/2/3ph,3=1/2ph,4=1ph+1*2ph,5=1/2ph+1*3ph or 5=1ph+1*2/3ph. When INTZERO from Fixed signal function block is connected to the input MODEINT the parameter setting selected will be valid.
2.2.4 Initiate auto-reclosing and conditions for initiation of a reclosing cycle The usual way in which to initiate a reclosing cycle, or sequence, is to initiate it when a line protection tripping has occurred, by applying a signal to the RI input. Should it be necessary to adjust three-phase auto-reclosing open time, (dead time) for different power system configurations or during tripping at different protection stages, the input RI_HS (reclose initiation of high-speed reclosing) can also be used.

For a new auto-reclosing cycle to be started, a number of conditions need to be met. They are linked to dedicated inputs. The inputs are: a) CBREADY, CB ready for a reclosing cycle, e.g. charged operating gear, b) 52a to ensure that the CB was closed when the line fault occurred and initiation was applied, c) No blocking or inhibit signal shall be present. After the initiation has been accepted, it is latched in and an internal signal Started is set. It can be interrupted by certain events, like an inhibit signal. To initiate auto-reclosing by CB position Open instead of from protection trip signals, one has to configure the CB Open position signal to inputs 52a and RI and set a parameter StartByCBOpen = ON and CBAuxContType = NormClosed (normally closed, 52b). One also has to configure and connect signals from manual trip commands to input INHIBIT. The logic for switching the auto-recloser Enable/Disable and the starting of the reclosing is shown in figure 231. The following should be considered. Setting Operation can be set to Off, External ctrl or ON. External ctrl offers the possibility of switching by external switches to inputs ON and OFF, communication commands to the same inputs etc. Autoreclose AR is normally started by tripping. It is either a Zone 1 and Communication aided trip or a general trip. If the general trip is used the function must be blocked from all back-up tripping connected to INHIBIT. In both alternatives the breaker failure function must be connected to inhibit the function. RI makes a first attempt with synchronism-check, RI_HS makes its first attempt without synchronism-check. TRSOTF starts shots 2-5. Circuit breaker checks that the breaker was closed for a certain length of time before the starting occurred and that the CB has sufficient stored energy to perform an auto-reclosing sequence and is connected to inputs 52a and CBREADY.

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Autorecloser (RREC, 79)

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Operation:On Operation:Off
Operation:External Ctrl

ON OFF RI RI_HS
autoInitiate

AND AND OR

OR AND OR S R

SETON

OR Additional conditions AND

initiate

TRSOTF CBREADY 52a

PICKUP
0 0-t120

AND

AND

S R

AND

CB Closed

0-tCBClosedMin 0

AND
Blocking conditions

OR Inhibit conditions count 0

AND

READY

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Figure 231: Auto-reclosing Disable/Enable and start


2.2.5 Control of the auto-reclosing open time for shot 1 It is possible to use up to four different time settings for the first shot, and one extension time. There are separate settings for single-, two- and three-phase auto-reclosing open times, t1 1Ph, t1 2Ph, t1 3Ph. If no particular input signal is applied, and an auto-reclosing program with single-phase reclosing is selected, the auto-reclosing open time t1 1Ph will be used. If one of the inputs TR2P or TR3P is activated in connection with the start, the auto-reclosing open time for two-phase or three-phase reclosing is used. There is also a separate time setting facility for three-phase high-speed auto-reclosing, t1 3PhHS available for use when required. It is activated by input RI_HS.

An auto-reclosing open time extension delay, tExtended t1, can be added to the normal shot 1 delay. It is intended to come into use if the communication channel for permissive line protection is lost. In a case like this there can be a significant time difference in fault clearance at the two line ends. A longer auto-reclosing open time can then be useful. This extension time is controlled by setting parameter Extended t1 = On and the input PLCLOST.
2.2.6 Long trip signal In normal circumstances the trip command resets quickly due to fault clearing. The user can set a maximum trip pulse duration tTrip. When trip signals are longer, the auto-reclosing open time is extended by tExtended t1. If Extended t1 = Off. A long trip signal interrupts the reclosing sequence in the same way as a signal to input INHIBIT.

485

Autorecloser (RREC, 79)

Chapter 11 Control

Extended t1

PLCLOST initiate pickup

AND 0-tTrip 0

OR

AND

AND

Extend t1

AND

AND

long duration (block AR)

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Figure 232: Control of extended auto-reclosing open time and long trip pulse detection
Reclosing checks and the reset timer When dead time has elapsed during the auto-reclosing procedure certain conditions must be fulfilled before the CB closing command is issued. To achieve this, signals are exchanged between program modules to check that these conditions are met. In three-phase reclosing a synchronizing and/or energizing check can be used. It is possible to use a synchronism check function in the same physical device or an external one. The release signal is configured by connecting to the auto-reclosing function input SYNC. If reclosing without checking is preferred the SYNC input can be set to TRUE (set high). Another possibility is to set the output of the synchronism check function to a permanently activated state. At confirmation from the synchronism check, or if the reclosing is of single-phase or two-phase type, the signal passes on. At single-phase, two-phase reclosing and at three-phase high-speed reclosing started by RI_HS, synchronization is not checked, and the state of the SYNC input is disregarded.

By choosing CBReadyType = CO (CB ready for a Close-Open sequence) the readiness of the circuit breaker is also checked before issuing the CB closing command. If the CB has a readiness contact of type CBReadyType = OCO (CB ready for an Open-Close-Open sequence) this condition may not be complied with after the tripping and at the moment of reclosure. The Open-Close-Open condition was however checked at the start of the reclosing cycle and it is then likely that the CB is prepared for a Close-Open sequence. The synchronism check or energizing check must be fulfilled within a set time interval, tSync. If it is not, or if other conditions are not met, the reclosing is interrupted and blocked. The reset timer defines a time from the issue of the reclosing command, after which the reclosing function resets. Should a new trip occur during this time, it is treated as a continuation of the first fault. The reset timer is started when the CB closing command is given. A number of outputs for Autoreclosing state control keeps track of the actual state in the reclosing sequence.

486

Autorecloser (RREC, 79)

Chapter 11 Control

0-t1 1Ph 0 From logic for reclosing programs 1P2PTO 3PHSTO 3PT1TO 3PT2TO 3PT3TO 3PT4TO 3PT5TO SYNC initiate CBREADY AND AND 0-t1 3Ph HS 0 0-t1 3Ph 0 OR AND 0-t1 2Ph 0

"AR Open time" timers OR 1P2PTO

3PHSTO

3PT1TO Pulse AR

OR

AND

OR

Blocking AR State Control COUNTER CL 0 1 2 3

AND

0-tSync 0

Shot 0 Shot 1 Shot 2 Shot 3 Shot 4 Shot 5

Pulse AR (above) OR TR2P TR3P PICKUP RI Shot 0 Shot 1 Shot 2 Shot 3 Shot 4 Shot 5 LOGIC reclosing programs

AND

0-tReset 0 Reset Timer On

4 5

1PT1 2PT1 3PHS 3PT1 3PT2 3PT3 3PT4 3PT5 1 PERMIT1P PREP3P Inhibit Y OR INPROGR

Y INHIBIT

Blocking OR

0 tInhibit

en05000784_ansi.vsd

Figure 233: Reclosing Reset and Inhibit timers


Pulsing of the CB closing command The CB closing command, CLOSECMD is a pulse with a duration set by parameter tPulse. For circuit-breakers without anti-pumping function, the close pulse cutting described below can be used. This is done by selecting the parameter CutPulse=On. In case of a new trip pulse, the closing command pulse is cut (interrupted). The minimum duration of the pulse is always 50 ms. See figure 234

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Autorecloser (RREC, 79)

Chapter 11 Control

When a reclosing command is issued, the appropriate reclosing operation counter is incremented. There is a counter for each type of reclosing and one for the total number of reclosing commands issued.

pulse initiate

tPulse ** AND ) 50 ms O R CLOSECMD

1PT1

AND

counter

COUNT1P

2PT1

AND

counter

COUNT2P

3PT1

AND

counter

COUNT3P1

3PT2

AND

counter

COUNT3P2

3PT3

AND

counter

COUNT3P3

3PT4

AND

counter

COUNT3P4

3PT5

AND

counter counter

COUNT3P5 COUNTAR

RSTCOUNT **) Only if "CutPulse" = On

en05000785_ansi.vsd

Figure 234: Pulsing of closing command and driving the operation counters
Transient fault After the reclosing command the reset timer tReset starts running for the set time. If no tripping occurs within this time, the auto-reclosing will reset. Permanent fault and reclosing unsuccessful signal If a new trip occurs after the CB closing command, and a new input signal RI or TRSOTF appears, the output UNSUCCL (unsuccessful closing) is set high. The timers for the first shot can no longer be started. Depending on the setting for the number of reclosing shots, further shots

488

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may be made or the reclosing sequence will be ended. After the reset time has elapsed, the auto-reclosing function resets but the CB remains open. The CB closed data at the 52a input will be missing. Because of this, the reclosing function will not be ready for a new reclosing cycle. Normally the signal UNSUCCL appears when a new trip and initiate is received after the last reclosing shot has been made and the auto-reclosing function is blocked. The signal resets once the reset time has elapsed. The unsuccessful signal can also be made to depend on CB position input. The parameter UnsucClByCBChk should then be set to CBCheck, and a timer tUnsucCl should also be set. If the CB does not respond to the closing command and does not close, but remains open, the output UNSUCCL is set high after time tUnsucCl.

initiate block start

AND

OR

AND

UNSUCCL

shot 0 UnsucClByCBchk = CBcheck

Pulse AR (Closing) 52a

OR AND 0-tUnsucCl 0

AND

CBclosed

en05000786_ansi.vsd

Figure 235: Issue of signal UNSUCCL, unsuccessful reclosing


Automatic continuation of the reclosing sequence The auto-reclosing function can be programmed to proceed to the following reclosing shots (if selected) even if the initiate signals are not received from the protection functions, but the breaker is still not closed. This is done by setting parameter AutoCont = On and to the required delay for the function to proceed without a new initiate.

489

Autorecloser (RREC, 79)

Chapter 11 Control

0-tAutoContWait 0 AND

CLOSECMD
AND

S Q R

AND

52a

CBClosed

OR

RI

OR

initiate

en05000787_ansi.vsd

Figure 236: Automatic proceeding of shot 2 to 5


Initiation of reclosing from CB open information If a user wants to apply initiation of auto-reclosing from CB open position instead of from protection trip signals, the function offers such a possibility. This starting mode is selected by a setting parameter StartByCBOpen = On. One needs then to block reclosing at all manual trip operations. Typically one also set CBAuxContType = NormClosed and connect a CB auxiliary contact of type NC (normally closed, 52b) to inputs 52a and START. When the signal changes from CB closed to CB open an auto-reclosing start pulse of limited length is generated and latched in the function, subject to the usual checks. Then the reclosing sequence continues as usual. One needs to connect signals from manual tripping and other functions, which shall prevent reclosing, to the input INHIBIT.

490

Autorecloser (RREC, 79)

Chapter 11 Control

PickupByCBOpen = On
NOT

RI

AND

RI_HS

AND 100 ms AND 100 ms AND

PICKUP

en05000788_ansi.vsd

Figure 237: Pulsing of the start inputs at "StartByCBOpen=On"


2.2.7 Time sequence diagrams Some examples of the timing of internal and external signals at typical transient and permanent faults are shown below in figures 238 to 241.

Fault
CB POS
Closed Open Closed

CB READY RECL. INT. (Trip) SYNC READY INPROG 1PT1 ACTIVE CLOSE CMD PREP3P SUCCL
Time t1 1Ph tPulse tReset

en04000196_ansi.vsd

Figure 238: Transient single-phase fault. Single -phase reclosing

491

Autorecloser (RREC, 79)

Chapter 11 Control

Fault
CB POS
Closed Open C Open C

CB READY RECL. INT. (Trip) TR3P SYNC READY INPROGR 3PT1 3PT2 ACTIVE CLOSE CMD PREP3P UNSUCCL
Time
en04000197_ansi.vsd

t1 3Ph t2 3Ph tReset tPulse tPulse

Figure 239: Permanent fault. Three-pole trip. Two-shot reclosing

492

Autorecloser (RREC, 79)

Chapter 11 Control

Fault
AR01-CBCLOSED AR01-CBREADY(CO) AR01-RI AR01-TR3P AR01-SYNC AR01-READY AR01-INPROGR AR01-1PT1 AR01-T1 AR01-T2 AR01-CLOSECMD AR01-P3P AR01-UNSUC
tReset t1s

en04000198_ansi.vsd

Figure 240: Permanent single-phase fault. Program 1/2/3ph, single-phase single-shot reclosing

493

Autorecloser (RREC, 79)

Chapter 11 Control

Fault
AR01-CBCLOSED AR01-CBREADY(CO) AR01-RI AR01-TR3P AR01-SYNC AR01-READY AR01-INPROGR AR01-1PT1 AR01-T1 AR01-T2 AR01-CLOSECMD AR01-P3P AR01-UNSUC
tReset t1s t2

en04000199_ansi.vsd

Figure 241: Permanent single-phase fault. Program 1ph + 3ph or 1/2ph + 3ph, two-shot reclosing

494

Autorecloser (RREC, 79)

Chapter 11 Control

2.3

Function block
AR01SMBRREC_79 ON BLOCKED OFF SETON BLKON READY BLKOFF ACTIVE RESET SUCCL INHIBIT UNSUCCL RI INPROGR RI_HS 1PT1 TRSOTF 2PT1 SKIPHS 3PT1 ZONESTEP 3PT2 TR2P 3PT3 TR3P 3PT4 THOLHOLD 3PT5 CBREADY PERMIT1P 52A PREP3P PLCLOST CLOSECMD SYNC WFMASTER WAIT COUNT1P RSTCOUNT COUNT2P MODEINT COUNT3P1 COUNT3P2 COUNT3P3 COUNT3P4 COUNT3P5 COUNTAR MODE

Figure 242: AR function block

2.4

Input and output signals


Table 261: Input signals for the SMBRREC_79 (AR01-) function block
Signal Description

ON OFF BLKON BLKOFF RESET INHIBIT RI RI_HS TRSOTF SKIPHS ZONESTEP TR2P TR3P THOLHOLD

Switches the AR On (at Operation = ExternalCtrl) Switches the AR Off (at Operation = ExternalCtrl) Sets the AR in blocked state Releases the AR from the blocked state Resets the AR to initial conditions Interrupts and inhibits reclosing sequence Reclosing sequence starts by a protection trip signal Start High Speed reclosing without Synchronism-Check: t13PhHS Makes AR to continue to shots 2-5 at a trip from SOTF Will skip the high speed shot and continue on delayed shots Coordination between local AR and down stream devices Signal to the AR that a two-pole tripping occurred Signal to the AR that a three-pole tripping occurred Holds the AR in wait state

495

Autorecloser (RREC, 79)

Chapter 11 Control

Signal

Description

CBREADY 52a PLCLOST SYNC WAIT RSTCOUNT MODEINT

CB must be ready for CO/OCO operation to allow start / close Status of the circuit breaker Closed/Open Power line carrier or other form of permissive signal lost Synchronism-check fulfilled (for 3Ph attempts) Wait for master (in Multi-breaker arrangements) Resets all counters Integer input used to set the reclosingMode, alternative to setting

Table 262: Output signals for the SMBRREC_79 (AR01-) function block
Signal Description

BLOCKED SETON READY ACTIVE SUCCL UNSUCCL INPROGR 1PT1 2PT1 3PT1 3PT2 3PT3 3PT4 3PT5 PERMIT1P PREP3P CLOSECMD WFMASTER COUNT1P COUNT2P COUNT3P1 COUNT3P2 COUNT3P3 COUNT3P4 COUNT3P5 COUNTAR MODE

The AR is in blocked state The AR operation is switched on, operative Indicates that the AR function is ready for a new sequence Reclosing sequence in progress Activated if CB closes during the time tUnsucCl Reclosing unsuccessful, signal resets after the reclaim time Reclosing shot in progress, activated during open reset Single-phase reclosing is in progress, shot 1 Two-phase reclosing is in progress, shot 1 Three-phase reclosing in progress, shot 1 Three-phase reclosing in progress, shot 2 Three-phase reclosing in progress, shot 3 Three-phase reclosing in progress, shot 4 Three-phase reclosing in progress, shot 5 Permit single-pole trip, inverse signal to PREP3P Prepare three-pole trip, control of the next trip operation Closing command for CB Signal to Slave issued by Master for sequential reclosing Counting the number of single-phase reclosing shots Counting the number of two-phase reclosing shots Counting the number of three-phase reclosing shot 1 Counting the number of three-phase reclosing shot 2 Counting the number of three-phase reclosing shot 3 Counting the number of three-phase reclosing shot 4 Counting the number of three-phase reclosing shot 5 Counting total number of reclosing shots Integer output for reclosing mode

496

Autorecloser (RREC, 79)

Chapter 11 Control

2.5

Setting parameters
Table 263: Basic parameter group settings for the SMBRREC_79 (AR01-) function
Parameter Range Step Default Unit Description

Operation

Disabled External ctrl Enabled 3 phase 1/2/3ph 1/2ph 1ph+1*2ph 1/2ph+1*3ph 1ph+1*2/3ph 0.000 - 60.000 0.000 - 60.000 0.000 - 60.000 0.00 - 6000.00 0.00 - 6000.00 0.000 - 60.000 0.000 - 60.000 0.00 - 6000.00

External ctrl

Off, ExternalCtrl, On

ARMode

1/2/3ph

The AR mode selection e.g. 3ph, 1/3ph

t1 1Ph t1 3Ph t1 3PhHS tReset tSync tTrip tPulse tCBClosedMin

0.001 0.001 0.001 0.01 0.01 0.001 0.001 0.01

1.000 6.000 0.400 60.00 30.00 0.200 0.200 5.00

s s s s s s s s

Open time for shot 1, single-phase Open time for shot 1, delayed reclosing 3ph Open time for shot 1, high speed reclosing 3ph Duration of the reset time Maximum wait time for synchronism-check OK Maximum trip pulse duration Duration of the circuit breaker closing pulse Minimum time that CB must be closed before new sequence allows Wait time for CB before indicating Unsuccessful/Successful Priority selection between adjacent terminals None/Low/High Maximum wait time for release from Master

tUnsucCl

0.00 - 6000.00

0.01

30.00

Priority

None Low High 0.00 - 6000.00

None

tWaitForMaster

0.01

60.00

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Autorecloser (RREC, 79)

Chapter 11 Control

Table 264: Advanced parameter group settings for the SMBRREC_79 (AR01-) function
Parameter Range Step Default Unit Description

NoOfShots

1 2 3 4 5 Disabled Enabled NormClosed NormOpen CO OCO 0.000 - 60.000 0.00 - 6000.00 0.00 - 6000.00 0.00 - 6000.00 0.00 - 6000.00 Disabled Enabled 0.000 - 60.000

Max number of reclosing shots 1-5

StartByCBOpen

Off

To be set ON if AR is to be started by CB open position Select the CB aux contact type NC/NO for 52a input Select type of circuit breaker ready signal CO/OCO Open time for shot 1, two-phase Open time for shot 2, three-phase Open time for shot 3, three-phase Open time for shot 4, three-phase Open time for shot 5, three-phase Extended open time at loss of permissive channel Off/On 3Ph Dead time is extended with this value at loss of perm ch Inhibit reclosing reset time Shorten closing pulse at a new trip Off/On Advance to next shot if CB has been closed during dead time

CBAuxContType

NormOpen

CBReadyType

CO

t1 2Ph t2 3Ph t3 3Ph t4 3Ph t5 3Ph Extended t1

0.001 0.01 0.01 0.01 0.01 -

1.000 30.00 30.00 30.00 30.00 Off

s s s s s -

tExtended t1

0.001

0.500

tInhibit CutPulse Follow CB

0.000 - 60.000 Disabled Enabled Disabled Enabled

0.001 -

5.000 Off Off

s -

498

Autorecloser (RREC, 79)

Chapter 11 Control

Parameter

Range

Step

Default

Unit

Description

AutoCont

Disabled Enabled 0.000 - 60.000

Off

Continue with next reclosing-shot if breaker did not close Wait time after close command before proceeding to next shot Unsuccessful closing signal obtained by checking CB position Block AR at unsuccessful reclosing Coordination of down stream devices to local prot unit's AR

tAutoContWait

0.001

2.000

UnsucClByCBChk

NoCBCheck CB check Disabled Enabled Disabled Enabled

NoCBCheck

BlockByUnsucCl ZoneSeqCoord

Off Off

2.6

Technical data
Table 265: Autorecloser (RREC, 79)
Function Range or value Accuracy

Number of autoreclosing shots Number of autoreclosing programs

1-5 8

499

Autorecloser (RREC, 79)

Chapter 11 Control

Function

Range or value

Accuracy 0.5% 10 ms

Autoreclosing open time: shot 1 - t1 1Ph shot 1 - t1 2Ph shot 1 - t1 3PhHS shot 1 - t1 3PhDld shot 2 - t2 shot 3 - t3 shot 4 - t4 shot 5 - t5 Extended autorecloser open time Autorecloser maximum wait time for sync Maximum trip pulse duration Inhibit reset time Reset time Minimum time CB must be closed before AR becomes ready for autoreclosing cycle Circuit breaker closing pulse length CB check time before unsuccessful Wait for master release Wait time after close command before proceeding to next shot (0.000-60.000) s (0.00-6000.00) s (0.000-60.000) s (0.000-60.000) s (0.00-6000.00) s (0.00-6000.00) s (0.00-6000.00) s (0.000-60.000) s

(0.000-60.000) s (0.00-6000.00) s (0.00-6000.00) s (0.000-60.000) s

500

Apparatus control (APC)

Chapter 11 Control

3
3.1

Apparatus control (APC)


Introduction
The apparatus control is a function for control and supervision of circuit breakers, disconnectors and grounding switches within a bay. Permission to operate is given after evaluation of conditions from other functions such as interlocking, synchronism check, operator place selection and external or internal blockings.

3.2

Principle of operation
A bay can handle, for example a power line, a transformer, a reactor, or a capacitor bank. The different primary apparatuses within the bay can be controlled via the apparatus control function directly by the operator or indirectly by automatic sequences. Because a primary apparatus can be allocated to many functions within a Substation Automation system, the object-oriented approach with a function module that handles the interaction and status of each process object ensures consistency in the process information used by higher-level control functions. Primary apparatuses such as breakers and disconnectors are controlled and supervised by one software module (SCSWI) each. Because the number and type of signals connected to a breaker and a disconnector are almost the same, the same software is used to handle these two types of apparatuses. The software module is connected to the physical process in the switchyard via an interface module by means of a number of digital inputs and outputs. One type of interface module is intended for a circuit breaker (SXCBR) and another type is intended for a disconnector or grounding switch (SXSWI). Four types of function blocks are available to cover most of the control and supervision within the bay. These function blocks are interconnected to form a control function reflecting the switchyard configuration. The total number used depends on the switchyard configuration. These four types are: Bay control QCBAY Switch controller SCSWI Circuit breaker SXCBR Circuit switch SXSWI

The three latter functions are logical nodes according to IEC 61850. The function blocks LocalRemote and LocRemControl, to handle the local/remote switch, and the function blocks QCRSV and RESIN, for the reservation function, also belong to the apparatus control function. The principles of operation, function block, input and output signals and setting parameters for all these functions are described below.

501

Apparatus control (APC)

Chapter 11 Control

3.3
3.3.1

Bay control (QCBAY)


Introduction This function is used to handle the selection of the operator place per bay. The bay control function also provides blocking functions that can be distributed to different apparatuses within the bay. Principle of operation The functionality of the bay control function is not defined in the IEC 6185081 standard, which means that the function is a vendor specific logical node. The function sends information about the Permitted Source To Operate (PSTO) and blocking conditions to other functions within the bay e.g. switch control functions, voltage control functions and measurement functions. Local panel switch The local panel switch is a switch that defines the operator place selection. The switch connected to this function can have three positions remote/local/off. The positions are here defined so that remote means that operation is allowed from station/remote level and local from the IED level. The local/remote switch is normally situated on the control/protection IED itself, which means that the position of the switch and its validity information are connected internally, and not via I/O boards. When the switch is mounted separately on the IED the signals are connected to the function via I/O boards. When the local panel switch is in Off position all commands from remote and local level will be ignored. If the position for the local/remote switch is not valid the PSTO output will always be set to faulty state (3), which means no possibility to operate. To adapt the signals from the local HMI or from an external local/remote switch, the function blocks LocalRemote and LocRemControl are needed and connected to QCBAY. For more information, see section 3.4 "Local/Remote switch (LocalRemote, LocRemControl)". Permitted Source To Operate (PSTO) The actual state of the operator place is presented by the value of the Permitted Source To Operate, PSTO signal. The PSTO value is evaluated from the local/remote switch position according to table 266. In addition, there is one configuration parameter that affects the value of the PSTO signal. If the parameter AllPSTOValid is set and LR-switch position is in Local or Remote state, the PSTO value is set to 5 (all), i.e. it is permitted to operate from both local and remote level without any priority. When the external panel switch is in Off position the PSTO value shows the actual state of switch, i.e. 0. In this case it is not possible to control anything.

3.3.2

502

Apparatus control (APC)

Chapter 11 Control

Table 266: PSTO values for different Local panel switch positions
Local panel switch positions PSTO value AllPSTOValid (configuration parameter) 0 1 5 2 5 3 -FALSE TRUE FALSE TRUE -Possible locations that shall be able to operate

0 = Off 1 = Local 1 = Local 2 = Remote 2 = Remote 3 = Faulty

Not possible to operate Local Panel Local or Remote level without any priority Remote level Local or Remote level without any priority Not possible to operate

Blockings The blocking states for position indications and commands are intended to provide the possibility for the user to make common blockings for the functions configured within a complete bay. The blocking facilities provided by the bay control function are the following: Blocking of position indications, BL_UPD. This input will block all inputs related to apparatus positions for all configured functions within the bay. Blocking of commands, BL_CMD. This input will block all commands for all configured functions within the bay. Blocking of function, BLOCK, signal from DO (Data Object) Behavior (IEC 6185081). If DO Behavior is set to "blocked" it means that the function is active, but no outputs are generated, no reporting, control commands are rejected and functional and configuration data is visible.

The switching of the Local/Remote switch requires at least system operator level. The password will be requested at an attempt to operate if authority levels have been defined in the IED. Otherwise the default authority level, SuperUser, can handle the control without LogOn. The users and passwords are defined with the UMT. 3.3.3 Function block
CB01QCBAY LR_OFF LR_LOC LR_REM LR_VALID BL_UPD BL_CMD PSTO UPD_BLKD CMD_BLKD

en05000796_ansi.vsd

Figure 243: CB function block

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3.3.4

Input and output signals


Table 267: Input signals for the QCBAY (CB01-) function block
Signal LR_OFF LR_LOC LR_REM LR_VALID BL_UPD BL_CMD Description External Local/Remote switch is in Off position External Local/Remote switch is in Local position External Local/Remote switch is in Remote position Data representing the L/R switch position is valid Steady signal to block the position updates Steady signal to block the command

Table 268: Output signals for the QCBAY (CB01-) function block
Signal PSTO UPD_BLKD CMD_BLKD Description The value for the operator place allocation The update of position is blocked The function is blocked for commands

3.3.5

Setting parameters
Table 269: General settings for the QCBAY (CB01-) function
Parameter AllPSTOValid Range Priority No priority Step Default Priority Unit Description The priority of originators

3.4
3.4.1

Local/Remote switch (LocalRemote, LocRemControl)


Introduction The signals from the local LCD HMI or from an external local/remote switch are applied via function blocks LocalRemote and LocRemControl to the Bay control QCBAY function block. A parameter in function block LocalRemote is set to choose if the switch signals are coming from the local LCD HMI or from an external hardware switch connected via binary inputs. Principle of operation The function block LocalRemote handles the signals coming from the local/remote switch. The connections are seen in figure 244, where the inputs on function block LocalRemote are connected to binary inputs if an external switch is used. When a local LCD HMI is used, the inputs are not used and are set to FALSE in the configuration. The outputs from the LocalRemote function block control the output PSTO (Permitted Source To Operate) on QCBAY.

3.4.2

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LR01LocalRemote CTRLOFF OFF LOCCTRL LOCAL REMCTRL REMOTE LHMICTRL VALID

CB01QCBAY LR_OFF PSTO LR_LOC UPD_BLKD LR_REM CMD_BLKD LR_VALID BL_UPD BL_CMD CB02QCBAY LR_OFF PSTO LR_LOC UPD_BLKD LR_REM CMD_BLKD LR_VALID BL_UPD BL_CMD

LR02LocalRemote CTRLOFF OFF LOCCTRL LOCAL REMCTRL REMOTE LHMICTRL VALID

LRC1LocRemControl PSTO1 HMICTR1 PSTO2 HMICTR2 PSTO3 HMICTR3 PSTO4 HMICTR4 PSTO5 HMICTR5 PSTO6 HMICTR6 PSTO7 HMICTR7 PSTO8 HMICTR8 PSTO9 HMICTR9 PSTO10 HMICTR10 PSTO11 HMICTR11 PSTO12 HMICTR12 en05000250.vsd

Figure 244: Configuration for the local/remote handling for a local LCD HMI with two bays and two screen pages If the IED contains control functions for several bays, the local/remote position can be different for the included bays. When the local LCD HMI is used the position of the local/remote switch can be different depending on which single line diagram screen page that is presented on the local HMI. The function block LocRemControl controls the presentation of the LEDs for the local/remote position to applicable bay and screen page. The switching of the Local/Remote switch requires at least system operator level. The password will be requested at an attempt to operate if authority levels have been defined in the IED. Otherwise the default authority level, SuperUser, can handle the control without LogOn. The users and passwords are defined with the UMT.

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3.4.3

Function block
LR01LocalRemote CT RLOFF OFF LOCCT RL LOCAL REMCT RL REMOT E LHMICT RL VALID en05000360.vsd

Figure 245: LR function block

LRC1LocRemControl PST O1 HMICT R1 PST O2 HMICT R2 PST O3 HMICT R3 PST O4 HMICT R4 PST O5 HMICT R5 PST O6 HMICT R6 PST O7 HMICT R7 PST O8 HMICT R8 PST O9 HMICT R9 PST O10 HMICT R10 PST O11 HMICT R11 PST O12 HMICT R12 en05000361.vsd

Figure 246: LRC function block 3.4.4 Input and output signals
Table 270: Input signals for the LocalRemote (LR01-) function block
Signal CTRLOFF LOCCTRL REMCTRL LHMICTRL Description Disable control Local in control Remote in control LHMI control

Table 271: Output signals for the LocalRemote (LR01-) function block
Signal OFF LOCAL REMOTE VALID Description Control is disabled Local control is activated Remote control is activated Outputs are valid

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Table 272: Input signals for the LocRemControl (LRC1-) function block
Signal PSTO1 PSTO2 PSTO3 PSTO4 PSTO5 PSTO6 PSTO7 PSTO8 PSTO9 PSTO10 PSTO11 PSTO12 Description PSTO input channel 1 PSTO input channel 2 PSTO input channel 3 PSTO input channel 4 PSTO input channel 5 PSTO input channel 6 PSTO input channel 7 PSTO input channel 8 PSTO input channel 9 PSTO input channel 10 PSTO input channel 11 PSTO input channel 12

Table 273: Output signals for the LocRemControl (LRC1-) function block
Signal HMICTR1 HMICTR2 HMICTR3 HMICTR4 HMICTR5 HMICTR6 HMICTR7 HMICTR8 HMICTR9 HMICTR10 HMICTR11 HMICTR12 Description Bitmask output 1 to local remote LHMI input Bitmask output 2 to local remote LHMI input Bitmask output 3 to local remote LHMI input Bitmask output 4 to local remote LHMI input Bitmask output 5 to local remote LHMI input Bitmask output 6 to local remote LHMI input Bitmask output 7 to local remote LHMI input Bitmask output 8 to local remote LHMI input Bitmask output 9 to local remote LHMI input Bitmask output 10 to local remote LHMI input Bitmask output 11 to local remote LHMI input Bitmask output 12 to local remote LHMI input

3.4.5

Setting parameters
Table 274: Basic general settings for the LocalRemote (LR01-) function
Parameter ControlMode Range Step Default Internal LR-switch Unit Description Control mode for internal/external LR-switch

Internal LR-switch External LR-switch

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3.5
3.5.1

Switch controller (SCSWI)


Introduction The Switch controller (SCSWI) initializes and supervises all functions to properly select and operate switching primary apparatuses. The Switch controller may handle and operate on one three-phase device or three one-phase switching devices. Principle of operation The function is provided with verification checks for the select - execute sequence, i.e. checks the conditions prior each step of the operation. The involved functions for these condition verifications are interlocking, reservation, blockings and synchronism-check. Command handling Two types of command models can be used. The two command models are "direct with enhanced security" and "SBO (Select-Before-Operate) with enhanced security". Which one of these two command models that are used is defined by the parameter CtlModel. The meaning with "direct with enhanced security" model is that no select is required. The meaning with "SBO with enhanced security" model is that a select is required before execute. In this function only commands with enhanced security is supported regarding changing of the position. With enhanced security means that the command sequence is supervised in three steps, the selection, command evaluation and the supervision of position. Each step ends up with a pulsed signal to indicate that the respective step in the command sequence is finished. If an error occurs in one of the steps in the command sequence, the sequence is terminated and the error is mapped into the enumerated variable "cause" attribute belonging to the pulsed response signal for the IEC61850 communication. The last cause L_CAUSE can be read from the function block and used for example at commissioning. The meaning of the cause signals can be found in table 2.

3.5.2

Note!
There is not any relation between the command direction and the actual position. For example, if the switch is in close position it is possible to execute a close command. Before an executing command, an evaluation of the position is done. If the parameter PosDependent is true and the position is in intermediate state or in bad state no executing command is send. If the parameter is false the execution command is send independent of the position value. Evaluation of position In the case when there are three one-phase switches connected to the switch control function, the switch control will "merge" the position of the three switches to the resulting three-phase position. In the case when the position differ between the one-phase switches, following principles will be applied:

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All switches in open position: All switches in close position: One switch =open, two switches= close (or inversely): Any switch in intermediate position: Any switch in bad state:

switch control position = open switch control position = close switch control position = intermediate switch control position = intermediate switch control position = bad state

The time stamp of the output three-phase position from switch control will have the time stamp of the last changed phase when it goes to end position. When it goes to intermediate position or bad state, it will get the time stamp of the first changed phase. In addition, there is also the possibility that one of the one-phase switches will change position at any time due to a trip. Such situation is here called pole discrepancy and is supervised by this function. In case of a pole discrepancy situation, i.e. the position of the one-phase switches are not equal for a time longer than the setting tPoleDiscord, an error signal POLEDISC will be set. In the supervision phase, the switch controller function evaluates the "cause" values from the switch modules XCBR/XSWI. At error the "cause" value with highest priority is shown. Blocking principles The blocking signals are normally coming from the bay control function (QCBAY) and via the IEC61850 communication from the operator place. The different blocking possibilities are: Block/deblock of command. It is used to block command for operation of position. Blocking of function, BLOCK, signal from DO (Data Object) Behavior (IEC61850). If DO Behavior is set to "blocked" it means that the function is active, but no outputs are generated, no reporting, control commands are rejected and functional and configuration data is visible.

Note!
The different block conditions will only affect the operation of this function, i.e. no blocking signals will be "forwarded" to other functions. The above blocking outputs are stored in a non-volatile memory. Interaction with synchronism-check and synchronizing functions The switch controller works in conjunction with the synchronism-check and the synchronizing function SECRSYN. It is assumed that the synchronism-check function is continuously in operation and gives the result to the SCSWI. The result from the synchronism-check function is evaluated during the close execution. If the operator performs an override of the synchronism-check, the evaluation of the synchronism-check state is omitted. When there is a positive confirmation from the synchronism-check function, the switch controller SCSWI will send the close signal EXE_CL to the switch function SXCBR.

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When there is no positive confirmation from the synchronism-check function, the SCSWI will send a start signal START_SY to the synchronizing function, which will send the closing command to the SXCBR when the synchronizing conditions are fulfilled, see figure 247. If no synchronizing function is included, the timer for supervision of the "synchronizing in progress signal" is set to 0, which means no start of the synchronizing function. The SCSWI will then set the attribute "blocked-by-synchronism-check" in the "cause" signal. See also the time diagram in figure 251.

SCSWI EXE_CL OR

SXCBR CLOSE

SYNC_OK START_SY SY_INPRO SECRSYN . CB CLOSE Synchro Check Synchronizing function

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Figure 247: Example of interaction between SCSWI, SECRSYN (synchronism check and synchronizing function) and SXCBR function Time diagrams The SCSWI function has timers for evaluating different time supervision conditions. These timers are explained here. The timer tSelect is used for supervising the time between the select and the execute command signal, i.e. the time the operator has to perform the command execution after the selection of the object to operate.

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select execute command tSelect timer t1 t1>tSelect, then longoperation-time in 'cause' is set

en05000092.vsd

Figure 248: tSelect The parameter tResResponse is used to set the maximum allowed time to make the reservation, i.e. the time between reservation request and the feedback reservation granted from all bays involved in the reservation function.

select reservation request RES_RQ reservation granted RES_GRT command termination tResResponse timer t1 t1>tResResponse, then 1-of-n-control in 'cause' is set
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Figure 249: tResResponse The timer tExecutionFB supervises the time between the execute command and the command termination, see figure 250.

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execute command phase A open close phase B open close phase C open close command termination phase A command termination phase B command termination phase C command termination circuit breaker open close tExecutionFB timer t1>tExecutionFB, then long-operation-time in 'cause' is set *

t1

* The command termination will be delayed one execution sample.


en05000094_ansi.vsd

Figure 250: tExecutionFB The parameter tSynchrocheck is used to define the maximum allowed time between the execute command and the input SYNC_OK to become true. If SYNC_OK=true at the time the execute command signal is received, the timer "tSynchrocheck" will not start. The start signal for the synchronizing is obtained if the synchronism-check conditions are not fulfilled.

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execute command SYNC_OK tSynchrocheck START_SY SY_INPRO tSynchronizing t2 t2>tSynchronizing, then blocked-by-synchronism check in 'cause' is set t1

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Figure 251: tSynchroCheck and tSynchronizing Error handling Depending on what error that occurs during the command sequence the error signal will be set with a value. Table 275 describes vendor specific cause values in addition to these specified in IEC 61850-8-1 standard. The list of values of the cause are in order of priority. The values are available over the IEC 61850. An output L_CAUSE on the function block indicates the latest value of the error during the command.
Table 275: Values for "cause" signal in priority order
Apparatus control function 22 23 24 25 30 31 32 33 34 35 Description wrongCTLModel blockedForCommand blocked-for-open-command blocked-for-close-command longOperationTime switch-not-start-moving persistent-intermediate-state switch-returned-to-initial-position switch-in-bad-state not-expected-final-position

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3.5.3

Function block
CS01SCSWI BLOCK PSTO L_SEL L_OPEN L_CLOSE AU_OPEN AU_CLOSE BL_CMD RES_GRT RES_EXT SY_INPRO SYNC_OK EN_OPEN EN_CLOSE XPOS1 XPOS2 XPOS3 EXE_OP EXE_CL SELECTED RES_RQ START_SY POSITION OPENPOS CLOSEPOS POLEDISC CMD_BLK L_CAUSE XOUT

en05000337.vsd

Figure 252: CS function block 3.5.4 Input and output signals


Table 276: Input signals for the SCSWI (CS01-) function block
Signal BLOCK PSTO L_SEL L_OPEN L_CLOSE AU_OPEN AU_CLOSE BL_CMD RES_GRT RES_EXT SY_INPRO SYNC_OK EN_OPEN EN_CLOSE XPOS1 XPOS2 XPOS3 Description Block of function Operator place selection Select signal from local panel Open signal from local panel Close signal from local panel Used for local automation function Used for local automation function Steady signal for block of the command Positive acknowledge that all reservations are made Reservation is made externally Synchronizing function in progress Closing is permitted by the synchronism-check Enables open operation Enables close operation Group signal for XCBR input Group signal for XCBR input Group signal for XCBR input

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Table 277: Output signals for the SCSWI (CS01-) function block
Signal EXE_OP EXE_CL SELECTED RES_RQ START_SY POSITION OPENPOS CLOSEPOS POLEDISC CMD_BLK L_CAUSE XOUT Description Execute Open command Execute Close command The select conditions are fulfilled Request signal to the reservation function Starts the synchronizing function Position indication Open position indication Closed position indication The positions for poles A, B and C are not equal after a set time Commands are blocked Latest value of the error indication during command Execution information to XCBR/XSWI

3.5.5

Setting parameters
Table 278: Basic general settings for the SCSWI (CS01-) function
Parameter CtlModel Range Dir Norm SBO Enh (ABB) Dir Norm (ABB) SBO Enh Always permitted Not perm at 00/11 0.000 - 60.000 0.000 - 60.000 Step Default SBO Enh Unit Description Specifies the type for control model according to IEC 61850

PosDependent

Always permitted

Permission to operate depending on the position Max time between select and execute signals Allowed time from reservation request to reservation granted Allowed time for synchronism-check to fulfil close conditions Supervision time to get the signal synchronizing in progress Max time from command execution to termination Allowed time to have discrepancy between the poles

tSelect tResResponse

0.001 0.001

30.000 5.000

s s

tSynchrocheck

0.00 - 6000.00

0.01

10.00

tSynchronizing

0.000 - 60.000

0.001

0.000

tExecutionFB tPoleDiscord

0.000 - 60.000 0.000 - 60.000

0.001 0.001

30.000 2.000

s s

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3.6
3.6.1

Circuit breaker (SXCBR)


Introduction The purpose of this function is to provide the actual status of positions and to perform the control operations, i.e. pass all the commands to primary apparatuses in the form of circuit breakers via output boards and to supervise the switching operation and position. Principle of operation The intended user of this function is other functions such as e.g. Switch controller, protection functions, autorecloser function or an IEC 61850 client residing in another IED or the operator place. This switch function executes commands, evaluate block conditions and evaluate different time supervision conditions. Only if all conditions indicate a switch operation to be allowed, the function performs the execution command. In case of erroneous conditions, the function indicates an appropriate "cause" value. The function has an operation counter for closing and opening commands. The counter value can be read remotely from the operator place. The value is reset from a binary input or remotely from the operator place. Local/Remote switch One binary input signal LR_SWI is included in this function to indicate the local/remote switch position from switchyard provided via the I/O board. If this signal is set to TRUE it means that change of position is allowed only from switchyard level. If the signal is set to FALSE it means that command from IED or higher level is permitted. When the signal is set to TRUE all commands (for change of position) from internal IED clients are rejected, even trip commands from protection functions are rejected. The functionality of the local/remote switch is described in figure 253.

3.6.2

TR

UE

Local= Operation at switch yard level

From I/O

switchLR
FAL SE

Remote= Operation at IED or higher level


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Figure 253: Local/Remote switch Blocking principles The function includes several blocking principles. The basic principle for all blocking signals is that they will affect commands from all other clients e.g. operators place, protection functions, autoreclosure etc. The blocking possibilities are: Block/deblock for open command. It is used to block operation for open command. Note that this block signal also affects the input OPEN for immediate command.

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Block/deblock for close command. It is used to block operation for close command. Note that this block signal also affects the input CLOSE for immediate command. Update block/deblock of positions. It is used to block the updating of position values. Other signals related to the position will be reset. Blocking of function, BLOCK, signal from DO (Data Object) Behavior (IEC61850). If DO Behavior is set to "blocked" it means that the function is active, but no outputs are generated, no reporting, control commands are rejected and functional and configuration data is visible.

The above blocking outputs are stored in a non-volatile memory. Substitution The substitution part in this function is used for manual set of the position for the switch. The typical use of substitution is that an operator enters a manual value because that the real process value is erroneous of some reason. The function will then use the manually entered value instead of the value for positions determined by the process.

Note!
It is always possible to make a substitution, independently of the position indication and the status information of the I/O board. When substitution is enabled, the position values are blocked for updating and other signals related to the position are reset. The substituted values are stored in a non-volatile memory. Time diagrams There are two timers for supervising of the execute phase, tStartMove and tIntermediate. tStartMove supervises that the primary device starts moving after the execute output pulse is sent. tIntermediate defines the maximum allowed time for intermediate position. Figure 254 explains these two timers during the execute phase.

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EXE_CL Close pulse duration

AdaptivePulse = TRUE

OPENPOS

CLOSEPOS

tStartMove timer t1 tStartMove

if t1 > tStartMove then "switch-not-start-moving" attribute in 'cause' is set

tIntermediate timer t2 tIntermediate

if t2 > tIntermediate then "persisting-intermediate-state" attribute in 'cause' is set

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Figure 254: The timers tStartMove and tIntermediate The timers tOpenPulse and tClosePulse are the length of the execute output pulses to be sent to the primary equipment. Note that the output pulses for open and close command can have different pulse lengths. The pulses can also be set to be adaptive with the configuration parameter AdaptivePulse. Figure 255 shows the principle of the execute output pulse. The adaptively parameter will have affect on both execute output pulses.

OPENPOS

CLOSEPOS

EXE_CL tClosePulse

AdaptivePulse=FALSE

EXE_CL tClosePulse

AdaptivePulse=TRUE

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Figure 255: Execute output pulse

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If the pulse is set to be adaptive, it is not possible for the pulse to exceed tOpenPulse or tClosePulse. The execute output pulses are reset when: the new expected final position is reached and the configuration parameter AdaptivePulse is set to true the timer tOpenPulse or tClosePulse has elapsed an error occurs due to the switch does not start moving, i.e. tStartMove has elapsed.

Note!
If the start position indicates bad state (OPENPOS=1 and CLOSEPOS =1) when a command is executed the execute output pulse resets only when timer "tOpenPulse" or "tClosePulse" has elapsed. There is one exception from the first item above. If the primary device is in open position and an open command is executed or if the primary device is in close position and a close command is executed. In these cases, with the additional condition that the configuration parameter AdaptivePulse is true, the execute output pulse is always activated and resets when tStartMove has elapsed. If the configuration parameter AdaptivePulse is set to false the execution output remains active until the pulse duration timer has elapsed. An example of when a primary device is open and an open command is executed is shown in figure 256 .

OPENPOS

CLOSEPOS

EXE_OP tOpenPulse

AdaptivePulse=FALSE

EXE_OP tOpenPulse

AdaptivePulse=TRUE

tStartMove timer

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Figure 256: Open command with open position indication

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Error handling Depending on what error that occurs during the command sequence the error signal will be set with a value. Table 279 describes vendor specific cause values in addition to these specified in IEC 61850-8-1 standard. The list of values of the cause are in order of priority. The values are available over the IEC 61850. An output L_CAUSE on the function block indicates the latest value of the error during the command.
Table 279: Vendor specific cause values for Apparatus control in priority order
Apparatus control function 22 23 24 25 30 31 32 33 34 35 Description wrongCTLModel blockedForCommand blocked-for-open-command blocked-for-close-command longOperationTime switch-not-start-moving persistent-intermediate-state switch-returned-to-initial-position switch-in-bad-state not-expected-final-position

3.6.3

Function block
XC01SXCBR GRPConABS1 EXE_OP GRPConABS2 EXE_CL SUBSTED OP_BLKD CL_BLKD UPD_BLKD POSITION OPENPOS CLOSEPOS TR_POS CNT_VAL L_CAUSE

BLOCK LR_SWI OPEN CLOSE BL_OPEN BL_CLOSE BL_UPD POSOPEN POSCLOSE TR_OPEN TR_CLOSE RS_CNT XIN TERVALUE OSEVALUE PENVALUE

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Figure 257: XC function block

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3.6.4

Input and output signals


Table 280: Input signals for the SXCBR (XC01-) function block
Signal BLOCK LR_SWI OPEN CLOSE BL_OPEN BL_CLOSE BL_UPD POSOPEN POSCLOSE TR_OPEN TR_CLOSE RS_CNT XIN Description Block of function Local/Remote switch indication from switchyard Pulsed signal used to immediately open the switch Pulsed signal used to immediately close the switch Signal to block the open command Signal to block the close command Steady signal for block of the position updating Signal for open position of apparatus from I/O Signal for close position of apparatus from I/O Signal for open position of truck from I/O Signal for close position of truck from I/O Resets the operation counter Execution information from CSWI

Table 281: Output signals for the SXCBR (XC01-) function block
Signal XPOS EXE_OP EXE_CL SUBSTED OP_BLKD CL_BLKD UPD_BLKD POSITION OPENPOS CLOSEPOS TR_POS CNT_VAL L_CAUSE Description Group signal for XCBR output Executes the command for open direction Executes the command for close direction Indication that the position is substituted Indication that the function is blocked for open commands Indication that the function is blocked for close commands The update of position indication is blocked Apparatus position indication Apparatus open position Apparatus closed position Truck position indication The value of the operation counter Latest value of the error indication during command

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3.6.5

Setting parameters
Table 282: Basic general settings for the SXCBR (XC01-) function
Parameter tStartMove Range 0.000 - 60.000 Step 0.001 Default 0.100 Unit s Description Supervision time for the apparatus to move after a command Allowed time for intermediate position The output resets when a new correct end position is reached Output pulse length for open command Output pulse length for close command

tIntermediate AdaptivePulse

0.000 - 60.000 Not adaptive Adaptive 0.000 - 60.000 0.000 - 60.000

0.001 -

0.150 Not adaptive

s -

tOpenPulse tClosePulse

0.001 0.001

0.200 0.200

s s

3.7
3.7.1

Circuit switch (SXSWI)


Introduction The purpose of this function is to provide the actual status of positions and to perform the control operations, i.e. pass all the commands to primary apparatuses in the form of disconnectors or grounding switches via output boards and to supervise the switching operation and position. Principle of operation The intended user of this function is other functions such as e.g. Switch controller, protection functions, autorecloser function or a 61850 client residing in another IED or the operator place. This switch function executes commands, evaluate block conditions and evaluate different time supervision conditions. Only if all conditions indicate a switch operation to be allowed, the function performs the execution command. In case of erroneous conditions, the function indicates an appropriate "cause" value. The function has an operation counter for closing and opening commands. The counter value can be read remotely from the operator place. The value is reset from a binary input or remotely from the operator place. Local/Remote switch One binary input signal LR_SWI is included in this function to indicate the local/remote switch position from switchyard provided via the I/O board. If this signal is set to TRUE it means that change of position is allowed only from switchyard level. If the signal is set to FALSE it means that command from IED or higher level is permitted. When the signal is set to TRUE all commands (for change of position) from internal IED clients are rejected, even trip commands from protection functions are rejected. The functionality of the local/remote switch is described in figure 258.

3.7.2

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TR

UE

Local= Operation at switch yard level

From I/O

switchLR
FAL SE

Remote= Operation at IED or higher level


en05000096.vsd

Figure 258: Local/Remote switch Blocking principles The function includes several blocking principles. The basic principle for all blocking signals is that they will affect commands from all other clients e.g. operators place, protection functions, autoreclosure etc. The blocking possibilities are: Block/deblock for open command. It is used to block operation for open command. Note that this block signal also affects the input OPEN for immediate command. Block/deblock for close command. It is used to block operation for close command. Note that this block signal also affects the input CLOSE for immediate command. Update block/deblock of positions. It is used to block the updating of position values. Other signals related to the position will be reset. Blocking of function, BLOCK, signal from DO (Data Object) Behavior (IEC61850). If DO Behavior is set to "blocked" it means that the function is active, but no outputs are generated, no reporting, control commands are rejected and functional and configuration data is visible.

The above blocking outputs are stored in a non-volatile memory. Substitution The substitution part in this function is used for manual set of the position for the switch. The typical use of substitution is that an operator enters a manual value because that the real process value is erroneous of some reason. The function will then use the manually entered value instead of the value for positions determined by the process.

Note!
It is always possible to make a substitution, independently of the position indication and the status information of the I/O board. When substitution is enabled, the position values are blocked for updating and other signals related to the position are reset. The substituted values are stored in a non-volatile memory.

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Time diagrams There are two timers for supervising of the execute phase, tStartMove and tIntermediate. tStartMove supervises that the primary device starts moving after the execute output pulse is sent. tIntermediate defines the maximum allowed time for intermediate position. Figure 259 explains these two timers during the execute phase.

EXE_CL Close pulse duration

AdaptivePulse = TRUE

OPENPOS

CLOSEPOS

tStartMove timer t1 tStartMove

if t1 > tStartMove then "switch-not-start-moving" attribute in 'cause' is set

tIntermediate timer t2 tIntermediate

if t2 > tIntermediate then "persisting-intermediate-state" attribute in 'cause' is set

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Figure 259: The timers tStartMove and tIntermediate The timers tOpenPulse and tClosePulse are the length of the execute output pulses to be sent to the primary equipment. Note that the output pulses for open and close command can have different pulse lengths. The pulses can also be set to be adaptive with the configuration parameter AdaptivePulse. Figure 260 shows the principle of the execute output pulse. The adaptively parameter will have affect on both execute output pulses.

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OPENPOS

CLOSEPOS

EXE_CL tClosePulse

AdaptivePulse=FALSE

EXE_CL tClosePulse

AdaptivePulse=TRUE

en05000098.vsd

Figure 260: Execute output pulse If the pulse is set to be adaptive, it is not possible for the pulse to exceed tOpenPulse or tClosePulse. The execute output pulses are reset when: the new expected final position is reached and the configuration parameter AdaptivePulse is set to true the timer tOpenPulse or tClosePulse has elapsed an error occurs due to the switch does not start moving, i.e. tStartMove has elapsed.

Note!
If the start position indicates bad state (OPENPOS=1 and CLOSEPOS =1) when a command is executed the execute output pulse resets only when timer "tOpenPulse" or "tClosePulse" has elapsed. There is one exception from the first item above. If the primary device is in open position and an open command is executed or if the primary device is in close position and a close command is executed. In these cases, with the additional condition that the configuration parameter AdaptivePulse is true, the execute output pulse is always activated and resets when tStartMove has elapsed. If the configuration parameter AdaptivePulse is set to false the execution output remains active until the pulse duration timer has elapsed. An example when a primary device is open and an open command is executed is shown in figure 261.

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OPENPOS

CLOSEPOS

EXE_OP tOpenPulse

AdaptivePulse=FALSE

EXE_OP tOpenPulse

AdaptivePulse=TRUE

tStartMove timer

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Figure 261: Open command with open position indication Error handling Depending on what error that occurs during the command sequence the error signal will be set with a value. Table 283 describes vendor specific cause values in addition to these specified in IEC 61850-8-1 standard. The list of values of the cause are in order of priority. The values are available over the IEC 61850. An output L_CAUSE on the function block indicates the latest value of the error during the command.
Table 283: Values for "cause" signal in priority order
Apparatus control function 22 23 24 25 30 31 32 33 34 35 Description wrongCTLModel blockedForCommand blocked-for-open-command blocked-for-close-command longOperationTime switch-not-start-moving persistent-intermediate-state switch-returned-to-initial-position switch-in-bad-state not-expected-final-position

526

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3.7.3

Function block
XS01SXSWI BLOCK LR_SWI OPEN CLOSE BL_OPEN BL_CLOSE BL_UPD POSOPEN POSCLOSE RS_CNT XIN XPOS EXE_OP EXE_CL SUBSTED OP_BLKD CL_BLKD UPD_BLKD POSITION OPENPOS CLOSEPOS CNT_VAL L_CAUSE en05000339.vsd

Figure 262: XS function block 3.7.4 Input and output signals


Table 284: Input signals for the SXSWI (XS01-) function block
Signal BLOCK LR_SWI OPEN CLOSE BL_OPEN BL_CLOSE BL_UPD POSOPEN POSCLOSE RS_CNT XIN Description Block of function Local/Remote switch indication from switchyard Pulsed signal used to immediately open the switch Pulsed signal used to immediately close the switch Signal to block the open command Signal to block the close command Steady signal for block of the position updating Signal for open position of apparatus from I/O Signal for close position of apparatus from I/O Resets the operation counter Execution information from CSWI

Table 285: Output signals for the SXSWI (XS01-) function block
Signal XPOS EXE_OP EXE_CL SUBSTED OP_BLKD CL_BLKD UPD_BLKD Description Group signal for XSWI output Executes the command for open direction Executes the command for close direction Indication that the position is substituted Indication that the function is blocked for open commands Indication that the function is blocked for close commands The update of position indication is blocked

527

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Signal POSITION OPENPOS CLOSEPOS CNT_VAL L_CAUSE

Description Apparatus position indication Apparatus open position Apparatus closed position The value of the operation counter Latest value of the error indication during command

3.7.5

Setting parameters
Table 286: Basic general settings for the SXSWI (XS01-) function
Parameter tStartMove Range 0.000 - 60.000 Step 0.001 Default 3.000 Unit s Description Supervision time for the apparatus to move after a command Allowed time for intermediate position The output resets when a new correct end position is reached Output pulse length for open command Output pulse length for close command Switch Type

tIntermediate AdaptivePulse

0.000 - 60.000 Not adaptive Adaptive 0.000 - 60.000 0.000 - 60.000 Load Break Disconnector Earthing Switch HS Earthing Switch

0.001 -

15.000 Not adaptive

s -

tOpenPulse tClosePulse SwitchType

0.001 0.001 -

0.200 0.200 Disconnector

s s -

3.8
3.8.1

Bay reserve (QCRSV)


Introduction The purpose of the reservation function is primarily to transfer interlocking information between IEDs in a safe way and to prevent double operation in a bay, switchyard part, or complete substation. Principle of operation The function block QCRSV handles the reservation. The function starts to operate in two ways. It starts when there is a request for reservation of the own bay or if there is a request for reservation from another bay. It is only possible to reserve the function if it is not currently reserved. The signal that can reserve the own bay is the input signal RES_RQx (x=1-8) coming from switch controller SCWI. The signals for request from another bay are the outputs RE_RQ_B and V_RE_RQ from function block RESIN. These signals are included in signal EXCH_OUT from RESIN and are connected to RES_DATA in QCRSV.

3.8.2

528

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The parameters ParamRequestx (x=1-8) are chosen at reservation of the own bay only (TRUE) or other bays (FALSE). To reserve the own bay only means that no reservation request RES_BAYS is created. Reservation request of own bay If the reservation request comes from the own bay, the function QCRSV has to know which apparatus the request comes from. This information is available with the input signal RES_RQx and parameter ParamRequestx (where x=1-8 is the number of the requesting apparatus). In order to decide if a reservation request of the current bay can be permitted QCRSV has to know whether the own bay already is reserved by itself or another bay. This information is available in the output signal RESERVED. If the RESERVED output is not set, the selection is made with the output RES_GRTx (where x=1-8 is the number of the requesting apparatus), which is connected to switch controller SCSWI. If the bay already is reserved the command sequence will be reset and the SCSWI will set the attribute "1-of-n-control" in the "cause" signal. Reservation of other bays When the function QCRSV receives a request from an apparatus in the own bay that requires other bays to be reserved as well, it checks if it already is reserved. If not, it will send a request to the other bays that are predefined (to be reserved) and wait for their response (acknowledge). The request of reserving other bays is done by activating the output RES_BAYS. When it receives acknowledge from the bays via the input RES_DATA, it sets the output RES_GRTx (where x=1-8 is the number of the requesting apparatus). If not acknowledgement from all bays is received within a certain time defined in SCSWI (tResResponse), the SCSWI will reset the reservation and set the attribute "1-of-n-control" in the "cause" signal. Reservation request from another bay When another bay requests for reservation, the input BAY_RES in corresponding function block RESIN is activated. The signal for reservation request is grouped into the output signal EXCH_OUT in RESIN, which is connected to input RES_DATA in QCRSV. If the bay is not reserved, the bay will be reserved and the acknowledgment from output ACK_T_B is sent back to the requested bay. If the bay already is reserved the reservation is kept and no acknowledgment is sent. Blocking and overriding of reservation If the function QCRSV is blocked (input BLK_RES is set to true) the reservation is blocked. That is, no reservation can be made from the own bay or any other bay. This can be set, for example, via a binary input from an external device to prevent operations from another operator place at the same time. The reservation function can also be overridden in the own bay with the OVERRIDE input signal, i.e. reserving the own bay without waiting for the external acknowledge. Bay with more than eight apparatuses If only one instance of QCRSV is used for a bay i.e. use of up to eight apparatuses, the input EXCH_IN must be set to FALSE.

529

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If there are more than eight apparatuses in the bay there has to be one additional QCRSV. The both functions QCRSV have to communicate and this is done through the input EXCH_IN and EXCH_OUT according to figure 10. If more then one QCRSV are used, the execution order is very important. The execution order must be in the way that the first QCRSV has a lower number than the next one.

CR01QCRSV EXCH_IN RES_GRT1 RES_RQ1 RES_GRT2 RES_RQ2 RES_GRT3 RES_RQ3 RES_GRT4 RES_RQ4 RES_GRT5 RES_RQ5 RES_GRT6 RES_RQ6 RES_GRT7 RES_RQ7 RES_GRT8 RES_RQ8 RES_BAYS BLK_RES ACK_TO_B OVERRIDE RESERVED RES_DATA EXCH_OUT

CR02QCRSV EXCH_IN RES_GRT1 RES_RQ1 RES_GRT2 RES_RQ2 RES_GRT3 RES_RQ3 RES_GRT4 RES_RQ4 RES_GRT5 RES_RQ5 RES_GRT6 RES_RQ6 RES_GRT7 RES_RQ7 RES_GRT8 RES_RQ8 RES_BAYS BLK_RES ACK_TO_B OVERRIDE RESERVED RES_DATA EXCH_OUT

OR

RES_BAYS

OR

ACK_TO_B

OR

RESERVED

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Figure 263: Connection of two QCRSV function blocks

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3.8.3

Function block
CR01QCRSV EXCH_IN RES_RQ1 RES_RQ2 RES_RQ3 RES_RQ4 RES_RQ5 RES_RQ6 RES_RQ7 RES_RQ8 BLK_RES OVERRIDE RES_DAT A RES_GRT 1 RES_GRT 2 RES_GRT 3 RES_GRT 4 RES_GRT 5 RES_GRT 6 RES_GRT 7 RES_GRT 8 RES_BAYS ACK_T O_B RESERVED EXCH_OUT en05000340.vsd

Figure 264: CR function block 3.8.4 Input and output signals


Table 287: Input signals for the QCRSV (CR01-) function block
Signal EXCH_IN RES_RQ1 RES_RQ2 RES_RQ3 RES_RQ4 RES_RQ5 RES_RQ6 RES_RQ7 RES_RQ8 BLK_RES OVERRIDE RES_DATA Description Used for exchange signals between different BayRes blocks Signal for apparatus 1 that requests to do a reservation Signal for apparatus 2 that requests to do a reservation Signal for apparatus 3 that requests to do a reservation Signal for apparatus 4 that requests to do a reservation Signal for apparatus 5 that requests to do a reservation Signal for apparatus 6 that requests to do a reservation Signal for apparatus 7 that requests to do a reservation Signal for apparatus 8 that requests to do a reservation Reservation is not possible and the output signals are reset Signal to override the reservation Reservation data coming from function block ResIn

Table 288: Output signals for the QCRSV (CR01-) function block
Signal RES_GRT1 RES_GRT2 RES_GRT3 RES_GRT4 RES_GRT5 RES_GRT6 RES_GRT7 Description Reservation is made and the apparatus 1 is allowed to operate Reservation is made and the apparatus 2 is allowed to operate Reservation is made and the apparatus 3 is allowed to operate Reservation is made and the apparatus 4 is allowed to operate Reservation is made and the apparatus 5 is allowed to operate Reservation is made and the apparatus 6 is allowed to operate Reservation is made and the apparatus 7 is allowed to operate

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Signal RES_GRT8 RES_BAYS ACK_TO_B RESERVED EXCH_OUT

Description Reservation is made and the apparatus 8 is allowed to operate Request for reservation of other bays Acknowledge to other bays that this bay is reserved Indicates that the bay is reserved Used for exchange signals between different BayRes blocks

3.8.5

Setting parameters
Table 289: General settings for the QCRSV (CR01-) function
Parameter tCancelRes ParamRequest1 Range 0.000 - 60.000 Other bays res. Only own bay res. Other bays res. Only own bay res. Other bays res. Only own bay res. Other bays res. Only own bay res. Other bays res. Only own bay res. Other bays res. Only own bay res. Other bays res. Only own bay res. Other bays res. Only own bay res. Step 0.001 Default 10.000 Only own bay res. Unit s Description Supervision time for canceling the reservation Reservation of the own bay only, at selection of apparatus 1 Reservation of the own bay only, at selection of apparatus 2 Reservation of the own bay only, at selection of apparatus 3 Reservation of the own bay only, at selection of apparatus 4 Reservation of the own bay only, at selection of apparatus 5 Reservation of the own bay only, at selection of apparatus 6 Reservation of the own bay only, at selection of apparatus 7 Reservation of the own bay only, at selection of apparatus 8

ParamRequest2

Only own bay res.

ParamRequest3

Only own bay res.

ParamRequest4

Only own bay res.

ParamRequest5

Only own bay res.

ParamRequest6

Only own bay res.

ParamRequest7

Only own bay res.

ParamRequest8

Only own bay res.

3.9
3.9.1

Reservation input (RESIN)


Introduction The function block RESIN receives the reservation information from other bays. The number of instances is the same as the number of involved bays (up to 60 instances are available).

532

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3.9.2

Principle of operation The reservation input function is based purely on Boolean logic conditions. The logic diagram in figure 265 shows how the output signals are created. The inputs of the function block are connected to a receive function block representing signals transferred over the station bus from another bay.

EXCH_IN

INT BIN

AND FutureUse OR

ACK_F_B

BAY_ACK

OR

ANY_ACK

AND BAY_VAL OR

VALID_TX

OR

RE_RQ_B

BAY_RES

AND OR V _RE_RQ

BIN INT

EXCH_OUT

INT..Integer BIN..Binary

en05000089_ansi.vsd

Figure 265: Logic diagram for RESIN Figure 266 describes the principle of the data exchange between all RESIN modules in the current bay. There is one RESIN function block per "other bay" used in the reservation mechanism. The output signal EXCH_OUT in the last RESIN functions block are connected to the module QCRSV that handles the reservation function in the own bay. The value to the input EXCH_IN

533

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on the first RESIN module in the chain has the integer value 5. This is provided by the use of instance number one of the function block RESIN (RE01-), where the input EXCH_IN is set to #5, but is hidden for the user.

Bay 1

RE01RESIN BAY_ACK ACK_F_B BAY_VAL ANY_ACK BAY_RES VALID_TX RE_RQ_B V_RE_RQ EXCH_OUT

Bay 2

RE02RESIN EXCH_IN ACK_F_B BAY_ACK ANY_ACK BAY_VAL VALID_TX BAY_RES RE_RQ_B V_RE_RQ EXCH_OUT REnnRESIN EXCH_IN ACK_F_B BAY_ACK ANY_ACK BAY_VAL VALID_TX BAY_RES RE_RQ_B V_RE_RQ EXCH_OUT

Bay n

CR01QCRSV RES_DATA

en05000090.vsd

Figure 266: Diagram of the chaining principle for RESIN 3.9.3 Function block
RE01RESIN BAY_ACK BAY_VAL BAY_RES ACK_F_B ANY_ACK VALID_TX RE_RQ_B V_RE_RQ EXCH_OUT en05000341.vsd

Figure 267: RE function block

534

Apparatus control (APC)

Chapter 11 Control

3.9.4

Input and output signals


Table 290: Input signals for the RESIN (RE01-) function block
Signal BAY_ACK BAY_VAL BAY_RES Description Another bay has acknowledged the reservation request from this bay The reservervation and acknowledge signals from another bay are valid Request from other bay to reserve this bay

Table 291: Output signals for the RESIN (RE01-) function block
Signal ACK_F_B ANY_ACK VALID_TX RE_RQ_B V_RE_RQ EXCH_OUT Description All other bays have acknowledged the reservation request from this bay Any other bay has acknowledged the reservation request from this bay The reservation and acknowledge signals from other bays are valid Request from other bay to reserve this bay Check if the request of reserving this bay is valid Used for exchange signals between different ResIn blocks

3.9.5

Setting parameters
Table 292: Basic general settings for the RESIN (RE01-) function
Parameter FutureUse Range Bay in use Bay future use Step Default Bay in use Unit Description The bay for this ResIn block is for future use

535

Interlocking

Chapter 11 Control

4
4.1

Interlocking
Introduction
The interlocking function blocks the possibility to operate high-voltage switching devices, for instance when a disconnector is under load, in order to prevent material damage and/or accidental human injury. Each control IED has interlocking functions for different switchyard arrangements, each handling the interlocking of one bay. The function is distributed to each control IED and not dependent on any central function. For the station-wide interlocking, the IEDs communicate via the station bus or by using hard wired binary inputs/outputs. The interlocking conditions depend on the circuit configuration and status of the installation at any given time.

4.2

Principle of operation
The interlocking function consists of software modules located in each control IED. The function is distributed and not dependent on any central function. Communication between modules in different bays is performed via the station bus. The reservation function (see section 3 "Apparatus control (APC)") is used to ensure that HV apparatuses that might affect the interlock are blocked during the time gap, which arises between position updates. This can be done by means of the communication system, reserving all HV apparatuses that might influence the interlocking condition of the intended operation. The reservation is maintained until the operation is performed. After the selection and reservation of an apparatus, the function has complete data on the status of all apparatuses in the switchyard that are affected by the selection. Other operators cannot interfere with the reserved apparatus or the status of switching devices that may affect it. The open or closed positions of the HV apparatuses are inputs to software modules distributed in the control IEDs. Each module contains the interlocking logic for a bay. The interlocking logic in a module is different, depending on the bay function and the switchyard arrangements, that is, double-breaker or breaker-and-a-half bays have different modules. Specific interlocking conditions and connections between standard interlocking modules are performed with an engineering tool. Bay-level interlocking signals can include the following kind of information: Positions of HV apparatuses (sometimes per phase) Valid positions (if evaluated in the control module) External release (to add special conditions for release) Line voltage (to block operation of line grounding switch) Output signals to release the HV apparatus

The interlocking module is connected to the surrounding functions within a bay as shown in figure 268.

536

Interlocking

Chapter 11 Control

Interlocking modules in other bays

Apparatus control modules


SCILO SCSWI SXSWI

Apparatus control modules Interlocking module


SCILO SCSWI SXCBR

152

Apparatus control modules


SCILO SCSWI SXSWI

en04000526_ansi.vsd

Figure 268: Interlocking module on bay level. Bays communicate via the station bus and can convey information regarding the following: Ungrounding busbars Busbars connected together Other bays connected to a busbar Received data from other bays is valid

Figure 269 illustrates the data exchange principle.

537

Interlocking

Chapter 11 Control

Station bus
Bay 1 Disc 189 and 289 closed Bay n Disc 189 and 289 closed Bus coupler WA1 ungrounded WA1 ungrounded WA1 and WA2 interconn WA1 and WA2 interconn in other bay

WA1 not grounded WA2 not grounded WA1 and WA2 interconn

... ..

WA1 not grounded WA2 not grounded WA1 and WA2 interconn

WA1 WA2 189 289 189 289 189 152 152 989 152 289 189G 289G

989

en05000494_ansi.vsd

Figure 269: Data exchange between interlocking modules. When invalid data such as intermediate position, loss of a control terminal, or input board error are used as conditions for the interlocking condition in a bay, a release for execution of the function will not be given. On the station HMI an override function exists, which can be used to bypass the interlocking function in cases where not all the data required for the condition is valid. For all interlocking modules these general rules apply: The interlocking conditions for opening or closing of disconnectors and grounding switches are always identical. Grounding switches on the line feeder end, e.g. rapid grounding switches, are normally interlocked only with reference to the conditions in the bay where they are located, not with reference to switches on the other side of the line. So a line voltage indication may be included into line interlocking modules. If there is no line voltage supervision within the bay, then the appropriate inputs must be set to no voltage, and the operator must consider this when operating. Grounding switches can only be operated on isolated sections e.g. without load/voltage. Circuit breaker contacts cannot be used to isolate a section, i.e. the status of the circuit breaker is irrelevant as far as the grounding switch operation is concerned. Disconnectors cannot break power current or connect different voltage systems. Disconnectors in series with a circuit breaker can only be operated if the circuit breaker is open, or if the disconnectors operate in parallel with other closed con-

538

Interlocking

Chapter 11 Control

nections. Other disconnectors can be operated if one side is completely isolated, or if the disconnectors operate in parallel to other closed connections, or if they are grounding on both sides. Circuit breaker closing is only interlocked against running disconnectors in its bay or additionally in a transformer bay against the disconnectors and grounding switch on the other side of the transformer, if there is no disconnector between CB and transformer. Circuit breaker opening is only interlocked in a bus-coupler bay, if a bus bar transfer is in progress.

To make the implementation of the interlocking function easier, a number of standardized and tested software interlocking modules containing logic for the interlocking conditions are available: Line for double and transfer busbars, ABC_LINE Bus for double and transfer busbars, ABC_BC Transformer bay for double busbars, AB_TRAFO Bus-section breaker for double busbars, A1A2_BS Bus-section disconnector for double busbars, A1A2_DC Busbar grounding switch, BB_ES Double CB Bay, DB_BUS_A, DB_LINE, DB_BUS_B Breaker-and-a-half diameter, BH_LINE_A, BH_CONN, BH_LINE_B

The interlocking conditions can be altered, to meet the customers specific requirements, by adding configurable logic by means of the graphical configuration tool PCM 600. The inputs Qx_EXy on the interlocking modules are used to add these specific conditions. The input signals EXDU_xx shall be set to true if there is no transmission error at the transfer of information from other bays. Required signals with designations ending in TR are intended for transfer to other bays.

4.3
4.3.1

Logical node for interlocking (SCILO)


Introduction The function SCILO is used to enable a switching operation if the interlocking conditions permit. The function itself does not provide any interlocking functionality. The interlocking conditions are generated in separate function blocks containing the interlocking logic. Principle of operation The function contains logic to enable the open and close commands respectively if the interlocking conditions are fulfilled. That means also, if the switch has a defined end position e.g. open, then the appropriate enable signal (in this case EN_OPEN) is false. The enable signals EN_OPEN and EN_CLOSE can be true at the same time only in the intermediate and bad position state and if they are enabled by the interlocking function. The position inputs come from the logical nodes Circuit breaker/switch SXCBR/SXSWI and the enable signals come from the interlocking logic. The outputs are connected to the logical node Switch controller SCSWI. One instance per switching device is needed.

4.3.2

539

Interlocking

Chapter 11 Control

POSOPEN POSCLOSE

SCILO
XOR NOT AND

EN_OPEN OR

AND

OPEN_EN CLOSE_EN
AND

EN_CLOSE OR

AND
en04000525_ansi.vsd

Figure 270: SCILO function logic diagram 4.3.3 Function block


CI01SCILO POSOPEN POSCLOSE OPEN_EN CLOSE_EN EN_OPEN EN_CLOSE

en05000359.vsd

Figure 271: CI function block 4.3.4 Input and output signals


Table 293: Input signals for the SCILO (CI01-) function block
Signal POSOPEN POSCLOSE OPEN_EN CLOSE_EN Description Open position of switch device Closed position of switch device Open operation from interlocking logic is enabled Close operation from interlocking logic is enabled

Table 294: Output signals for the SCILO (CI01-) function block
Signal EN_OPEN EN_CLOSE Description Open operation at closed or intermediate or bad position is enabled Close operation at open or intermediate or bad position is enabled

540

Interlocking

Chapter 11 Control

4.4
4.4.1

Interlocking for line bay (ABC_LINE)


Introduction The interlocking module ABC_LINE is used for a line connected to a double busbar arrangement with a transfer busbar according to figure 272. The module can also be used for a double busbar arrangement without transfer busbar or a single busbar arrangement with/without transfer busbar.

WA1 (A) WA2 (B) WA7 (C) 189 289 189G 789

152 289G 989

989G

en04000478_ansi.vsd

Figure 272: Switchyard layout ABC_LINE

541

Interlocking

Chapter 11 Control

4.4.2

Function block
IF01ABC_LINE 152_OP 152_CL 989_OP 989_CL 189_OP 189_CL 289_OP 289_CL 789_OP 789_CL 189G_OP 189G_CL 289G_OP 289G_CL 989G_OP 989G_CL 1189G_OP 1189G_CL 2189G_OP 2189G_CL 7189G_OP 7189G_CL BB7_D_OP BC_12_CL BC_17_OP BC_17_CL BC_27_OP BC_27_CL VOLT_OFF VOLT_ON VP_BB7_D VP_BC_12 VP_BC_17 VP_BC_27 EXDU_89G EXDU_BPB EXDU_BC 989_EX1 989_EX2 189_EX1 189_EX2 189_EX3 289_EX1 289_EX2 289_EX3 789_EX1 789_EX2 789_EX3 789_EX4 152CLREL 152CLITL 989REL 989ITL 189REL 189ITL 289REL 289ITL 789REL 789ITL 189GREL 189GITL 289GREL 289GITL 989GREL 989GITL 189OPTR 189CLTR 289OPTR 289CLTR 789OPTR 789CLTR 1289OPTR 1289CLTR VP189TR VP289TR VP789TR VP1289TR

en05000357_ansi.vsd

Figure 273: IF function block

542

Interlocking

Chapter 11 Control

4.4.3

Logic diagram

152_OP 152_CL 989_OP 989_CL 189_OP 189_CL 289_OP 289_CL 789_OP 789_CL 189G_OP 189G_CL 289G_OP 289G_CL 989G_OP 989G_CL 1189G_OP 1189G_CL 2189G_OP 2189G_CL 7189G_OP 7189G_CL VOLT_OFF VOLT_ON VP152 VP189G VP289G VP989G 152_OP 189G_OP 289G_OP 989G_OP 989_EX1 VP289G VP989G 289G_CL 989G_CL 989_EX2

ABC_LINE
XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR AND

VP152 VP989 VP189 VP289 VP789 VP189G VP289G VP989G VP1189G VP2189G VP7189G VPVOLT
OR
NOT

AND

NOT

152CLREL 152CLITL

989REL 989ITL

AND

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543

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VP152 VP289 VP189G VP289G VP1189G 152_OP 289_OP 189G_OP 289G_OP 1189G_OP EXDU_89G 189_EX1

AND

OR
NOT

189REL 189ITL

VP289 VP_BC_12 289_CL BC_12_CL EXDU_BC 189_EX2

AND

VP189G VP1189G 189G_CL 1189G_CL EXDU_89G 189EX3

AND

en04000528_ansi.vsd

544

Interlocking

Chapter 11 Control

VP152 VP189 VP189G VP289G VP2189G 152_OP 189_OP 189G_OP 289G_OP 2189G_OP EXDU_89G

AND

OR
NOT

289REL 289ITL

289_EX1

VP189 VP_BC_12 QB1_CL BC_12_CL EXDU_BC 289_EX2

AND

VP189G VP2189G 189G_CL 2189G_CL EXDU_89G 289_EX3

AND

en04000529_ansi.vsd

545

Interlocking

Chapter 11 Control

546

Interlocking

Chapter 11 Control

VP989G VP7189G VP_BB7_D VP_BC_17 VP_BC_27 989G_OP 7189G_OP EXDU_89G BB7_D_OP EXDU_BPB BC_17_OP BC_27_OP EXDU_BC 789_EX1 VP152 VP189 VP989G VP989 VP7189G VP_BB7_D VP_BC_17 152_CL 189_CL 989G_OP 989_CL 7189G_OP EXDU_89G BB7_D_OP EXDU_BPB BC_17_CL EXDU_BC 789_EX2

AND

OR
NOT

789REL 789ITL

AND

en04000530_ansi.vsd

547

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VP152 VP289 VP989G VP989 VP7189G VP_BB7_D VP_BC_27 152_CL 289_CL 989G_OP 989_CL 7189G_OP EXDU_89G BB7_D_OP EXDU_BPB BC_27_CL EXDU_BC 789_EX3 VP989G VP7189G 989G_CL 7189G_CL EXDU_89G 789_EX4 VP189 VP289 VP989 189_OP 289_OP 989_OP VP789 VP989 VPVOLT 789_OP 989_OP VOLT_OFF

AND

OR

AND

AND

NOT

NOT

189GREL 189GITL 289GREL 289GITL

AND
NOT

989GREL 989GITL

en04000531_ansi.vsd

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189_OP 189_CL VP189 289_OP 289_CL VP289 789_OP 789_CL VP789 189_OP 289_OP VP189 VP289
OR AND

189OPTR 189CLTR VP189TR 289OPTR 289CLTR VP289TR 789OPTR 789CLTR VP789TR 1289OPTR 1289CLTR VP1289TR

NOT

en04000532_ansi.vsd

4.4.4

Input and output signals


Table 295: Input signals for the ABC_LINE (IF01-) function block
Signal 152_OP 152_CL 989_OP 989_CL 189_OP 189_CL 289_OP 289_CL 789_OP 789_CL 189G_OP 189G_CL 289G_OP 289G_CL 989G_OP 989G_CL 1189G_OP 1189G_CL 2189G_OP 2189G_CL Description 152 is in open position 152 is in closed position 989 is in open position 989 is in closed position 189 is in open position 189 is in closed position 289 is in open position 289 is in closed position 789 is in open position 789 is in closed position 189G is in open position 189G is in closed position 289G is in open position 289G is in closed position 989G is in open position 989G is in closed position Grounding switch 1189G on busbar WA1 is in open position Grounding switch 1189G on busbar WA1 is in closed position Grounding switch 2189G on busbar WA2 is in open position Grounding switch 2189G on busbar WA2 is in closed position

549

Interlocking

Chapter 11 Control

Signal 7189G_OP 7189G_CL BB7_D_OP BC_12_CL BC_17_OP BC_17_CL BC_27_OP BC_27_CL VOLT_OFF VOLT_ON VP_BB7_D VP_BC_12 VP_BC_17 VP_BC_27 EXDU_89G EXDU_BPB EXDU_BC 989_EX1 989_EX2 189_EX1 189_EX2 189_EX3 289_EX1 289_EX2 289_EX3 789_EX1 789_EX2 789_EX3 789_EX4

Description Grounding switch 7189G on busbar WA7 is in open position Grounding switch 7189G on busbar WA7 is in closed position Disconnectors on busbar WA7 except in the own bay are open A bus coupler connection exists between busbar WA1 and WA2 No bus coupler connection exists between busbar WA1 and WA7 A bus coupler connection exists between busbar WA1 and WA7 No bus coupler connection exists between busbar WA2 and WA7 A bus coupler connection exists between busbar WA2 and WA7 There is no voltage on the line and not VT (fuse) failure There is voltage on the line or there is a VT (fuse) failure Switch status of the disconnectors on busbar WA7 are valid Status of the bus coupler apparatuses between WA1 and WA2 are valid Status of the bus coupler app. between WA1 and WA7 are valid Status of the bus coupler app. between WA2 and WA7 are valid No transm error from any bay containing grounding switches No transm error from any bay with disconnectors on WA7 No transmission error from any bus coupler bay External condition for apparatus 989 External condition for apparatus 989 External condition for apparatus 189 External condition for apparatus 189 External condition for apparatus 189 External condition for apparatus 289 External condition for apparatus 289 External condition for apparatus 289 External condition for apparatus 789 External condition for apparatus 789 External condition for apparatus 789 External condition for apparatus 789

550

Interlocking

Chapter 11 Control

Table 296: Output signals for the ABC_LINE (IF01-) function block
Signal 152CLREL 152CLITL 989REL 989ITL 189REL 189ITL 289REL 289ITL 789REL 789ITL 189GREL 189GITL 289GREL 289GITL 989GREL 989GITL 189OPTR 189CLTR 289OPTR 289CLTR 789OPTR 789CLTR 1289OPTR 1289CLTR VP189TR VP289TR VP789TR VP1289TR Description Closing of 152 is allowed Closing of 152 is not allowed Switching of 989 is allowed Switching of 989 is not allowed Switching of 189 is allowed Switching of 189 is not allowed Switching of 289 is allowed Switching of 289 is not allowed Switching of 789 is allowed Switching of 789 is not allowed Switching of 189G is allowed Switching of 189G is not allowed Switching of 289G is allowed Switching of 289G is not allowed Switching of 989G is allowed Switching of 989G is not allowed 189 is in open position 189 is in closed position 289 is in open position 289 is in closed position 789 is in open position 789 is in closed position 189 or 289 or both are in open position 189 and 289 are not in open position Switch status of 189 is valid (open or closed) Switch status of 289 is valid (open or closed) Switch status of 789 is valid (open or closed) Switch status of 189 and 289 are valid (open or closed)

4.5
4.5.1

Interlocking for bus-coupler bay (ABC_BC)


Introduction The interlocking module ABC_BC is used for a bus-coupler bay connected to a double busbar arrangement according to figure 274. The module can also be used for a single busbar arrangement with transfer busbar or double busbar arrangement without transfer busbar.

551

Interlocking

Chapter 11 Control

WA1 (A) WA2 (B) WA7 (C) 189 289 2089 789

189G

152

289G

en04000514_ansi.vsd

Figure 274: Switchyard layout ABC_BC

552

Interlocking

Chapter 11 Control

4.5.2

Function block
IG01ABC_BC 152_OP 152_CL 189_OP 189_CL 289_OP 289_CL 789_OP 789_CL 2089_OP 2089_CL 189G_OP 189G_CL 289G_OP 289G_CL 1189G_OP 1189G_CL 2189G_OP 2189G_CL 7189G_OP 7189G_CL BBTR_OP BC_12_CL VP_BBTR VP_BC_12 EXDU_89G EXDU_12 EXDU_BC 152O_EX1 152O_EX2 152O_EX3 189_EX1 189_EX2 189_EX3 289_EX1 289_EX2 289_EX3 2089_EX1 2089_EX2 789_EX1 789_EX2 152OPREL 152OPITL 152CLREL 152CLITL 189REL 189ITL 289REL 289ITL 789REL 789ITL 2089REL 2089ITL 189GREL 189GITL 289GREL 289GITL 189OPTR 189CLTR 22089OTR 22089CTR 789OPTR 789CLTR 1289OPTR 1289CLTR BC12OPTR BC12CLTR BC17OPTR BC17CLTR BC27OPTR BC27CLTR VP189TR V22089TR VP789TR VP1289TR VPBC12TR VPBC17TR VPBC27TR

en05000350_ansi.vsd

Figure 275: IG function block

553

Interlocking

Chapter 11 Control

4.5.3

Logic diagram

152_OP 152_CL 189_OP 189_CL 2089_OP 2089_CL 789_OP 789_CL 289_OP 289_CL 189G_OP 189G_CL 289G_OP 289G_CL 1189G_OP 1189G_CL 2189G_OP 2189G_CL 7189G_OP 7189G_CL VP189 189_OP 152O_EX1 VP2089 2089_OP 152O_EX2 VP_BBTR BBTR_OP EXDU_12 152O_EX3 VP189 VP289 VP789 VP2089

ABC_BC
XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR AND OR

VP152 VP189 VP2089 VP789 VP289 VP189G VP289G VP1189G VP2189G VP7189G 152OPREL 152OPITL

NOT

AND

AND

AND

NOT

152CLREL 152CLITL

en04000533_ansi.vsd

554

Interlocking

Chapter 11 Control

VP152 VP289 VP189G VP289G VP1189G 152_OP 289_OP 189G_OP 289G_OP 1189G_OP EXDU_89G 189_EX1 VP289 VP_BC_12 289_CL BC_12_CL EXDU_BC 189_EX2 VP189G VP1189G 189G_CL 1189G_CL EXDU_89G 189_EX3

AND

OR
NOT

189REL 189ITL

AND

AND

en04000534_ansi.vsd

555

Interlocking

Chapter 11 Control

VP152 VP189 VP189G VP289G VP2189G 152_OP 189_OP 189G_OP 289G_OP 2189G_OP EXDU_89G 289_EX1 VP189 VP_BC_12 189_CL BC_12_CL EXDU_BC 289_EX2 VP189G VP2189G 189G_CL 2189G_CL EXDU_89G 289_EX3

AND

OR
NOT

289REL 289ITL

AND

AND

en04000535_ansi.vsd

556

Interlocking

Chapter 11 Control

VP152 VP2089 VP189G VP289G VP7189G 152_OP 2089_OP 189G_OP 289G_OP 7189G_OP EXDU_89G 789_EX1 VP289G VP7189G 289G_CL 7189G_CL EXDU_89G 789_EX2 VP152 VP789 VP189G VP289G VP2189G 152_OP 789_OP 189G_OP 289G_OP 2189G_OP EXDU_89G 2089_EX1 VP289G VP2189G 289G_CL 2189G_CL EXDU_89G 2089_EX2

AND

OR
NOT

789REL 789ITL

AND

AND

OR
NOT

2089REL 2089ITL

AND

en04000536_ansi.vsd

557

Interlocking

Chapter 11 Control

VP189 VP2089 VP789 VP289 189_OP 2089_OP 789_OP 289_OP 189_OP 189_CL VP189 2089_OP 289_OP VP2089 VP289 789_OP 789_CL VP789 189_OP 289_OP VP189 VP289 152_OP 189_OP 2089_OP VP152 VP189 VP2089 152_OP 189_OP 789_OP VP152 VP189 VP789 152_OP 289_OP 789_OP VP152 VP289 VP789

AND

NOT

NOT

189GREL 189GITL 289GREL 289GITL

AND AND

NOT

189OPTR 189CLTR VP189TR 22089OTR 22089CTR V22089TR 789OPTR 789CLTR VP789TR 1289OPTR 1289CLTR VP1289TR BC12OPTR BC12CLTR VPBC12TR

OR
NOT

AND OR

NOT

AND

OR

BC17OPTR BC17CLTR NOT VPBC17TR

AND

OR

NOT

BC27OPTR BC27CLTR VPBC27TR

AND

en04000537_ansi.vsd

558

Interlocking

Chapter 11 Control

4.5.4

Input and output signals


Table 297: Input signals for the ABC_BC (IG01-) function block
Signal 152_OP 152_CL 189_OP 189_CL 289_OP 289_CL 789_OP 789_CL 2089_OP 2089_CL 189G_OP 189G_CL 289G_OP 289G_CL 1189G_OP 1189G_CL 2189G_OP 2189G_CL 7189G_OP 7189G_CL BBTR_OP BC_12_CL VP_BBTR VP_BC_12 EXDU_89G EXDU_12 EXDU_BC 152O_EX1 152O_EX2 152O_EX3 189_EX1 189_EX2 189_EX3 289_EX1 289_EX2 Description 152 is in open position 152 is in closed position 189 is in open position 189 is in closed position 289 is in open position 289 is in closed position 789 is in open position 789 is in closed position 2089 is in open position 2089 is in closed position 189G is in open position 189G is in closed position 289G is in open position 289G is in closed position Grounding switch 1189G on busbar WA1 is in open position Grounding switch 1189G on busbar WA1 is in closed position Grounding switch 2189G on busbar WA2 is in open position Grounding switch 2189G on busbar WA2 is in closed position Grounding switch 7189G on busbar WA7 is in open position Grounding switch 7189G on busbar WA7 is in closed position No busbar transfer is in progress A bus coupler connection exists between busbar WA1 and WA2 Status are valid for apparatuses involved in the busbar transfer Status of the bus coupler apparatuses between WA1 and WA2 are valid No transm error from any bay containing grounding switches No transm error from any bay connected to WA1/WA2 busbars No transmission error from any other bus coupler bay External open condition for apparatus 152 External open condition for apparatus 152 External open condition for apparatus 152 External condition for apparatus 189 External condition for apparatus 189 External condition for apparatus 189 External condition for apparatus 289 External condition for apparatus 289

559

Interlocking

Chapter 11 Control

Signal 289_EX3 2089_EX1 2089_EX2 789_EX1 789_EX2

Description External condition for apparatus 289 External condition for apparatus 2089 External condition for apparatus 2089 External condition for apparatus 789 External condition for apparatus 789

Table 298: Output signals for the ABC_BC (IG01-) function block
Signal 152OPREL 152OPITL 152CLREL 152CLITL 189REL 189ITL 289REL 289ITL 789REL 789ITL 2089REL 2089ITL 189GREL 189GITL 289GREL 289GITL 189OPTR 189CLTR 22089OTR 22089CTR 789OPTR 789CLTR 1289OPTR 1289CLTR BC12OPTR BC12CLTR BC17OPTR BC17CLTR Description Opening of 152 is allowed Opening of 152 is not allowed Closing of 152 is allowed Closing of 152 is not allowed Switching of 189 is allowed Switching of 189 is not allowed Switching of 289 is allowed Switching of 289 is not allowed Switching of 789 is allowed Switching of 789 is not allowed Switching of 2089 is allowed Switching of 2089 is not allowed Switching of 189G is allowed Switching of 189G is not allowed Switching of 289G is allowed Switching of 289G is not allowed 189 is in open position 189 is in closed position 289 and 2089 are in open position 289 or 2089 or both are not in open position 789 is in open position 789 is in closed position 189 or 289 or both are in open position 189 and 289 are not in open position No connection via the own bus coupler between WA1 and WA2 Connection exists via the own bus coupler between WA1 and WA2 No connection via the own bus coupler between WA1 and WA7 Connection exists via the own bus coupler between WA1 and WA7

560

Interlocking

Chapter 11 Control

Signal BC27OPTR BC27CLTR VP189TR V22089TR VP789TR VP1289TR VPBC12TR VPBC17TR VPBC27TR

Description No connection via the own bus coupler between WA2 and WA7 Connection exists via the own bus coupler between WA2 and WA7 Switch status of 189 is valid (open or closed) Switch status of 289 and 2089 are valid (open or closed) Switch status of 789 is valid (open or closed) Switch status of 189 and 289 are valid (open or closed) Status of the bus coupler apparatuses between WA1 and WA2 are valid Status of the bus coupler app. between WA1 and WA7 are valid Status of the bus coupler app. between WA2 and WA7 are valid

4.6
4.6.1

Interlocking for transformer bay (AB_TRAFO)


Introduction The interlocking module AB_TRAFO is used for a transformer bay connected to a double busbar arrangement according to figure 276. The module is used when there is no disconnector between circuit breaker and transformer. Otherwise, the module ABC_LINE can be used. This module can also be used in single busbar arrangements.

561

Interlocking

Chapter 11 Control

WA1 (A) WA2 (B) 189 289

189G AB_TRAFO 289G

152

389G

252 489G 389 489

252 and 489G are not used in this interlocking

en04000515_ansi.vsd

Figure 276: Switchyard layout AB_TRAFO

562

Interlocking

Chapter 11 Control

4.6.2

Function block
IE01AB_TRAFO 152_OP 152CLREL 152_CL 152CLITL 189_OP 189REL 189_CL 189ITL 289_OP 289REL 289_CL 289ITL 189G_OP 189GREL 189G_CL 189GITL 289G_OP 289GREL 289G_CL 289GITL 389_OP 189OPTR 389_CL 189CLTR 489_OP 289OPTR 489_CL 289CLTR 389G_OP 1289OPTR 389G_CL 1289CLTR 1189G_OP VP189TR 1189G_CL VP289TR 2189G_OP VP1289TR 2189G_CL BC_12_CL VP_BC_12 EXDU_89G EXDU_BC 152_EX1 152_EX2 152_EX3 189_EX1 189_EX2 189_EX3 289_EX1 289_EX2 289_EX3 en05000358_ansi.vsd

Figure 277: IE function block

563

Interlocking

Chapter 11 Control

4.6.3

Logic diagram

152_OP 152_CL 189_OP 189_CL 289_OP 289_CL 189G_OP 189G_CL 289G_OP 289G_CL 389_OP 389_CL 489_OP 489_CL 389G_OP 389G_CL 1189G_OP 1189G_CL 2189G_OP 2189G_CL VP189 VP289 VP189G VP289G VP389 VP489 VP389G 152_EX2 389G_OP 152_EX3 189G_CL 289G_CL 389G_CL 152_EX1

AB_TRAFO
XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR AND

VP152 VP189 VP289 VP189G VP289G VP389 VP489 VP389G VP1189G VP2189G 152CLREL 152CLITL
NOT

OR AND

en04000538_ansi.vsd

564

Interlocking

Chapter 11 Control

VP152 VP289 VP189G VP289G VP389G VP1189G 152_OP 289_OP 189G_OP 289G_OP 389G_OP 1189G_OP EXDU_89G 189_EX1 VP289 VP389G VP_BC_12 289_CL 389G_OP BC_12_CL EXDU_BC 189_EX2 VP189G VP289G VP389G VP1189G 189G_CL 289G_CL 389G_CL 1189G_CL EXDU_89G 189_EX3

AND

OR
NOT

189REL 189ITL

AND

AND

en04000539_ansi.vsd

565

Interlocking

Chapter 11 Control

VP152 VP189 VP189G VP289G VP389G VP2189G 152_OP 189_OP 189G_OP 289G_OP 389G_OP 2189G_OP EXDU_89G 289_EX1 VP189 VP389G VP_BC_12 189_CL 389G_OP BC_12_CL EXDU_BC 289_EX2 VP189G VP289G VP389G VP2189G 189G_CL 289G_CL 389G_CL 2189G_CL EXDU_89G 289_EX3

AND

OR
NOT

252REL 252ITL

AND

AND

en04000540_ansi.vsd

566

Interlocking

Chapter 11 Control

VP189 VP289 VP389 VP489 189_OP 289_OP 389_OP 489_OP 189_OP 189_CL VP189 289_OP 289_CL VP289 189_OP 289_OP VP189 VP289

AND

NOT

NOT

189GREL 189GITL 289GREL 289GITL

189OPTR 189CLTR VP189TR 289OPTR 289CLTR VP289TR 1289OPTR 1289CLTR VP1289TR


en04000541_ansi.vsd

OR
NOT

AND

4.6.4

Input and output signals


Table 299: Input signals for the AB_TRAFO (IE01-) function block
Signal 152_OP 152_CL 189_OP 189_CL 289_OP 289_CL 189G_OP 189G_CL 289G_OP 289G_CL 389_OP 389_CL 489_OP 489_CL 389G_OP 389G_CL 1189G_OP 1189G_CL Description 152 is in open position 152 is in closed position 189 is in open position 189 is in closed position 289 is in open position 289 is in closed position 189G is in open position 189G is in closed position 289G is in open position 289G is in closed position 389 is in open position 389 is in closed position 489 is in open position 489 is in closed position 389G is in open position 389G is in closed position 1189G on busbar WA1 is in open position 1189G on busbar WA1 is in closed position

567

Interlocking

Chapter 11 Control

Signal 2189G_OP 2189G_CL BC_12_CL VP_BC_12 EXDU_89G EXDU_BC 152_EX1 152_EX2 152_EX3 189_EX1 189_EX2 189_EX3 289_EX1 289_EX2 289_EX3

Description 2189G on busbar WA2 is in open position 2189G on busbar WA2 is in closed position A bus coupler connection exists between busbar WA1 and WA2 Status of the bus coupler apparatuses between WA1 and WA2 are valid No transm error from any bay containing grounding switches No transmission error from any bus coupler bay External condition for breaker 152 External condition for breaker 152 External condition for breaker 152 External condition for apparatus 189 External condition for apparatus 189 External condition for apparatus 189 External condition for apparatus 289 External condition for apparatus 289 External condition for apparatus 289

Table 300: Output signals for the AB_TRAFO (IE01-) function block
Signal 152CLREL 152CLITL 189REL 189ITL 289REL 289ITL 189GREL 189GITL 289GREL 289GITL 189OPTR 189CLTR 289OPTR 289CLTR 1289OPTR 1289CLTR VP189TR VP289TR VP1289TR Description Closing of 152 is allowed Closing of 152 is not allowed Switching of 189 is allowed Switching of 189 is not allowed Switching of 289 is allowed Switching of 289 is not allowed Switching of 189G is allowed Switching of 189G is not allowed Switching of 289G is allowed Switching of 289G is not allowed 189 is in open position 189 is in closed position 289 is in open position 289 is in closed position 189 or 289 or both are in open position 189 and 289 are not in open position Switch status of 189 is valid (open or closed) Switch status of 289 is valid (open or closed) Switch status of 189 and 289 are valid (open or closed)

568

Interlocking

Chapter 11 Control

4.7
4.7.1

Interlocking for bus-section breaker (A1A2_BS)


Introduction The interlocking module A1A2_BS is used for one bus-section circuit breaker between section 1 and 2 according to figure 278. The module can be used for different busbars, which includes a bus-section circuit breaker.

WA1 (A1)

WA2 (A2)

189G

189 152

289

289G

389G

489G

A1A2_BS
en04000516_ansi.vsd

Figure 278: Switchyard layout A1A2_BS

569

Interlocking

Chapter 11 Control

4.7.2

Function block
IH01A1A2_BS 152_OP 152_CL 189_OP 189_CL 289_OP 289_CL 389G_OP 389G_CL 489G_OP 489G_CL S189G_OP S189G_CL S289G_OP S289G_CL BBTR_OP VP_BBTR EXDU_12 EXDU_89G 152O_EX1 152O_EX2 152O_EX3 189_EX1 189_EX2 289_EX1 289_EX2 152OPREL 152OPITL 152CLREL 152CLITL 189REL 189ITL 289REL 289ITL 389GREL 389GITL 489GREL 489GITL S1S2OPTR S1S2CLTR 189OPTR 189CLTR 289OPTR 289CLTR VPS1S2TR VP189TR VP289TR

en05000348_ansi.vsd

Figure 279: IH function block

570

Interlocking

Chapter 11 Control

4.7.3

Logic diagram

571

Interlocking

Chapter 11 Control

152_OP 152_CL 189_OP 189_CL 289_OP 289_CL 389G_OP 389G_CL 489G_OP 489G_CL S1189G_OP S1189G_CL S2289G_OP S2289G_CL VP189 189_OP 152O_EX1 VP289 289_OP 152O_EX2 VP_BBTR BBTR_OP EXDU_12 152O_EX3 VP189 VP289 VP152 VP389G VP489G VPS1189G 152_OP 389G_OP 489G_OP S1189G_OP EXDU_89G 189_EX1 VP389G VPS1189G 389G_CL S1189G_CL EXDU_89G 189_EX2

A1A2_BS
XOR XOR XOR XOR XOR XOR XOR AND OR
NOT

VP152 VP189 VP289 VP389G VP489G VPS1189G VPS2289G 152OPREL 152OPITL

AND

AND

AND AND OR

NOT

152CLREL 152CLITL 189REL 189ITL

NOT

AND

en04000542_ansi.vsd

572

Interlocking

Chapter 11 Control

VP152 VP389G VP489G VPS2289G 152_OP 389G_OP 489G_OP S2289G_OP EXDU_89G 289_EX1 VP489G VPS2289G 489G_CL S2289G_CL EXDU_89G 289_EX2 VP189 VP289 189_OP 289_OP 189_OP 189_CL VP189 289_OP 289_CL VP289 189_OP 289_OP 152_OP VP189 VP289 VP152

AND

OR

289REL 289ITL NOT

AND

AND

NOT

NOT

389GREL 389GITL 489GREL 489GITL 189OPTR 189CLTR VP189TR 289OPTR 289CLTR VP289TR

OR

NOT

S1S2OPTR S1S2CLTR VPS1S2TR

AND

en04000543_ansi.vsd

573

Interlocking

Chapter 11 Control

4.7.4

Input and output signals


Table 301: Input signals for the A1A2_BS (IH01-) function block
Signal 152_OP 152_CL 189_OP 189_CL 289_OP 289_CL 389G_OP 389G_CL 489G_OP 489G_CL S189G_OP S189G_CL S289G_OP S289G_CL BBTR_OP VP_BBTR EXDU_12 EXDU_89G 152O_EX1 152O_EX2 152O_EX3 189_EX1 189_EX2 289_EX1 289_EX2 Description 152 is in open position 152 is in closed position 189 is in open position 189 is in closed position 289 is in open position 289 is in closed position 389G is in open position 389G is in closed position 489G is in open position 489G is in closed position S189G on bus section 1 is in open position S189G on bus section 1 is in closed position S289G on bus section 2 is in open position S289G on bus section 2 is in closed position No busbar transfer is in progress Status are valid for apparatuses involved in the busbar transfer No transm error from any bay connected to busbar 1 and 2 No transm error from bays containing ground sw. S189G or S289G External open condition for apparatus 152 External open condition for apparatus 152 External open condition for apparatus 152 External condition for apparatus 189 External condition for apparatus 189 External condition for apparatus 289 External condition for apparatus 289

Table 302: Output signals for the A1A2_BS (IH01-) function block
Signal 152OPREL 152OPITL 152CLREL 152CLITL 189REL 189ITL 289REL Description Opening of 152 is allowed Opening of 152 is not allowed Closing of 152 is allowed Closing of 152 is not allowed Switching of 189 is allowed Switching of 189 is not allowed Switching of 289 is allowed

574

Interlocking

Chapter 11 Control

Signal 289ITL 389GREL 389GITL 489GREL 489GITL S1S2OPTR S1S2CLTR 189OPTR 189CLTR 289OPTR 289CLTR VPS1S2TR VP189TR VP289TR

Description Switching of 289 is not allowed Switching of 389G is allowed Switching of 389G is not allowed Switching of 489G is allowed Switching of 489G is not allowed No bus section connection between bus section 1 and 2 Bus coupler connection between bus section 1 and 2 exists 189 is in open position 189 is in closed position 289 is in open position 289 is in closed position Status of the apparatuses between bus section 1 and 2 are valid Switch status of 189 is valid (open or closed) Switch status of 289 is valid (open or closed)

4.8
4.8.1

Interlocking for bus-section disconnector (A1A2_DC)


Introduction The interlocking module A1A2_DC is used for one bus-section disconnector between section 1 and 2 according to figure 280. The module can be used for different busbars, which includes a bus-section disconnector.

WA1 (A1)

WA2 (A2)

52
189G 289G

A1A2_DC

en04000492_ansi.vsd

Figure 280: Switchyard layout A1A2_DC

575

Interlocking

Chapter 11 Control

4.8.2

Function block
II01A1A2_DC 089_OP 089_CL S189G_OP S189G_CL S289G_OP S289G_CL S1DC_OP S2DC_OP VPS1_DC VPS2_DC EXDU_89G EXDU_BB 089C_EX1 089C_EX2 089O_EX1 089O_EX2 089O_EX3 089OPREL 089OPITL 089CLREL 089CLITL DCOPTR DCCLTR VPDCTR

en05000349_ansi.vsd

Figure 281: II function block

576

Interlocking

Chapter 11 Control

4.8.3

Logic diagram

A1A2_DC 89_OP 89_CL S1189G_OP S1189G_CL S2289G_OP S2289G_CL VPS1189G VPS2289G VPS1_DC S1189G_OP S2289G_OP S1DC_OP EXDU_89G EXDU_BB QBOP_EX1 VPS1189 VPS2289G VPS2_DC S1189G_OP S2289G_OP S2DC_OP EXDU_89G EXDU_BB QBOP_EX2 VPS1189G VPS2289G S1189G_CL S2289G_CL EXDU_89G QBOP_EX3
XOR

VPQB

VPDCTR DCOPTR DCCLTR

XOR XOR

VPS1189G VPS2289G

AND

OR
NOT

89OPREL 89OPITL

AND

AND

en04000544_ansi.vsd

577

Interlocking

Chapter 11 Control

4.8.4

Input and output signals


Table 303: Input signals for the A1A2_DC (II01-) function block
Signal 089_OP 089_CL S189G_OP S189G_CL S289G_OP S289G_CL S1DC_OP S2DC_OP VPS1_DC VPS2_DC EXDU_89G EXDU_BB 089C_EX1 089C_EX2 089O_EX1 089O_EX2 089O_EX3 Description 089 is in open position 089 is in closed position S189G on bus section 1 is in open position S189G on bus section 1 is in closed position S289G on bus section 2 is in open position S289G on bus section 2 is in closed position All disconnectors on bus section 1 are in open position All disconnectors on bus section 2 are in open position Switch status of disconnectors on bus section 1 are valid Switch status of disconnectors on bus section 2 are valid No transm error from bays containing ground sw. S189G or S289G No transm error from bays with disc conn to section 1 and 2 External close condition for section disconnector 089 External close condition for section disconnector 089 External open condition for section disconnector 089 External open condition for section disconnector 089 External open condition for section disconnector 089

578

Interlocking

Chapter 11 Control

Table 304: Output signals for the A1A2_DC (II01-) function block
Signal 089OPREL 089OPITL 089CLREL 089CLITL DCOPTR DCCLTR VPDCTR Description Opening of 089 is allowed Opening of 089 is not allowed Closing of 089 is allowed Closing of 089 is not allowed The bus section disconnector is in open position The bus section disconnector is in closed position Switch status of 089 is valid (open or closed)

4.9
4.9.1

Interlocking for busbar grounding switch (BB_ES)


Introduction The interlocking module BB_ES is used for one busbar grounding switch on any busbar parts according to figure 282.

89G

en04000504.vsd

Figure 282: Switchyard layout BB_ES 4.9.2 Function block


IJ01BB_ES 89G_OP 89G_CL BB_DC_OP VP_BB_DC EXDU_BB 89GREL 89GITL BBGSOPTR BBGSCLTR

en05000347_ansi.vsd

Figure 283: IJ function block

579

Interlocking

Chapter 11 Control

4.9.3

Logic diagram

BB_ES VP_BB_DC BB_DC_OP EXDU_BB 89G_OP 89G_CL 89GREL 89GITL BBGSOPTR BBGSCLTR
en04000546_ansi.vsd

AND

NOT

4.9.4

Input and output signals


Table 305: Input signals for the BB_ES (IJ01-) function block
Signal 89G_OP 89G_CL BB_DC_OP VP_BB_DC EXDU_BB Description Busbar earthing switch 89G is in open position Busbar earthing switch 89G is in closed position All disconnectors on this busbar part are open Status for all disconnectors on this busbar part are valid No transm error from bays with disc on this busbar part

Table 306: Output signals for the BB_ES (IJ01-) function block
Signal 89GREL 89GITL BBGSOPTR BBGSCLTR Description Switching of 89G is allowed Switching of 89G is not allowed 89G on this busbar part is in open position 89G on this busbar part is in closed position

4.10
4.10.1

Interlocking for double CB bay (DB)


Introduction The interlocking modules DB_BUS_A, DB_LINE and DB_BUS_B are used for a line connected to a double circuit breaker arrangement according to figure 284.

580

Interlocking

Chapter 11 Control

WA1 (A) WA2 (B) 189 289

189G

489G

DB_BUS_A

152 289G

252 589G

DB_BUS_B

6189

6289 389G

989 989G

DB_LINE

en04000518_ansi.vsd

Figure 284: Switchyard layout double circuit breaker. Three types of interlocking modules per double circuit breaker bay are defined. DB_LINE is the connection from the line to the circuit breaker parts that are connected to the busbars. DB_BUS_A and DB_BUS_B are the connections from the line to the busbars. 4.10.2 Function block
IB01DB_BUS_A 152_OP 152_CL 189_OP 189_CL 6189_OP 6189_CL 189G_OP 189G_CL 289G_OP 289G_CL 389G_OP 389G_CL 1189G_OP 1189G_CL EXDU_89G 6189_EX1 6189_EX2 189_EX1 189_EX2 152CLREL 152CLITL 6189REL 6189ITL 189REL 189ITL 189GREL 189GITL 289GREL 289GITL 189OPTR 189CLTR VP189TR

en05000354_ansi.vsd

Figure 285: IB function block

581

Interlocking

Chapter 11 Control

IA01DB_LINE 152_OP 152_CL 252_OP 252_CL 6189_OP 6189_CL 189G_OP 189G_CL 289G_OP 289G_CL 6289_OP 6289_CL 489G_OP 489G_CL 589G_OP 589G_CL 989_OP 989_CL 389G_OP 389G_CL 989G_OP 989G_CL VOLT_OFF VOLT_ON 989_EX1 989_EX2 989_EX3 989_EX4 989_EX5 989REL 989ITL 389GREL 389GITL 989GREL 989GITL

en05000356_ansi.vsd

Figure 286: IA function block

IC01DB_BUS_B 252_OP 252_CL 289_OP 289_CL 6289_OP 6289_CL 489G_OP 489G_CL 589G_OP 589G_CL 389G_OP 389G_CL 2189G_OP 2189G_CL EXDU_89G 6289_EX1 6289_EX2 289_EX1 289_EX2 252CLREL 252CLITL 6289REL 6289ITL 289REL 289ITL 489GREL 489GITL 589GREL 589GITL 289OPTR 289CLTR VP289TR

en05000355_ansi.vsd

Figure 287: IC function block

582

Interlocking

Chapter 11 Control

4.10.3

Logic diagrams

583

Interlocking

Chapter 11 Control

584

Interlocking

Chapter 11 Control

152_OP 152_CL 6189_OP 6189_CL 189_OP 189_CL 189G_OP 189G_CL 289G_OP 289G_CL 389G_OP 389G_CL 1189G_OP 1189G_CL VP6189 VP189 VP152 VP189G VP289G VP389G 152_OP 189G_OP 289G_OP 389G_OP 6189_EX1 VP289G VP389G 289G_CL 389G_CL 6189_EX2 VP152 VP189G VP289G VP1189G 152_OP 189G_OP 289G_OP 1189G_OP EXDU_89G 189_EX1 VP189G VP1189G 189G_CL 1189G_CL EXDU_89G 189_EX2

DB_BUS_A
XOR XOR XOR XOR XOR XOR XOR AND AND OR
NOT NOT

VP152 VP6189 VP189 VP189G VP289G VP389G VP1189G 152CLREL 152CLITL 6189REL 6189ITL

AND

AND

OR
NOT

189REL 189ITL

AND

en04000547_ansi.vsd

585

Interlocking

Chapter 11 Control

VP6189 VP189 6189_OP 189_OP 189_OP 189_CL VP189

AND

NOT NOT

189GREL 189GITL 289GREL 289GITL 189OPTR 189CLTR VP189TR


en04000548_ansi.vsd

586

Interlocking

Chapter 11 Control

152_OP 152_CL 252_OP 252_CL 6189_OP 6189_CL 189G_OP 189G_CL 289G_OP 289G_CL 6289_OP 6289_CL 489G_OP 489G_CL 589G_OP 589G_CL 989_OP 989_CL 389G_OP 389G_CL 989G_OP 989G_CL VOLT_OFF VOLT_ON VP152 VP252 VP189G VP289G VP389G VP489G VP589G VP989G 152_OP 252_OP 189G_OP 289G_OP 389G_OP 489G_OP 589G_OP 989G_OP 989_EX1

DB_LINE
XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR AND OR
NOT

VP152 VP252 VP6189 VP189G VP289G VP6289 VP489G VP589G VP989 VP389G VP989G VPVOLT 989REL 989ITL

AND
en04000549_ansi.vsd

587

Interlocking

Chapter 11 Control

VP152 VP189G VP289G VP389G VP989G VP6289 152_OP 189G_OP 289G_OP 389G_OP 989G_OP 6289_OP 989_EX2 VP252 VP6189 VP389G VP489G VP589G VP989G 252_OP 6189_OP 389G_OP 489G_OP 589G_OP 989G_OP 989_EX3 VP389G VP989G VP6189 VP6289 389G_OP 989G_OP 6189_OP 6289_OP 989_EX4 VP389G VP989G 389G_CL 989G_CL 989_EX5

AND

OR

AND

AND

AND

en04000550_ansi.vsd

588

Interlocking

Chapter 11 Control

VP6189 VP6289 VP989 6189_OP 6289_OP 989_OP VP989 VPVOLT 989_OP VOLT_OFF

AND
NOT

389GREL 389GITL

AND
NOT

989GREL 989GITL

en04000551_ansi.vsd

589

Interlocking

Chapter 11 Control

590

Interlocking

Chapter 11 Control

252_OP 252_CL 6289_OP 6289_CL 289_OP 289_CL 489G_OP 489G_CL 589G_OP 589G_CL 389G_OP 389G_CL 2189G_OP 2189G_CL VP6289 VP289 VP252 VP489G VP589G VP389G 252_OP 489G_OP 589G_OP 389G_OP 6289_EX1 VP589G VP389G 589G_CL 389G_CL 6289_EX2 VP252 VP489G VP589G VP2189G 252_OP 489G_OP 589G_OP 2189G_OP EXDU_89G 289_EX1 VP489G VP2189G 489G_CL 2189G_CL EXDU_89G 289_EX2

DB_BUS_B
XOR XOR XOR XOR XOR XOR XOR AND AND OR
NOT NOT

VP252 VP6289 VP289 VP489G VP589G VP389G VP2189G 252CLREL 252CLITL 6289REL 6289ITL

AND

AND

OR
NOT

289REL 289ITL

AND

en04000552_ansi.vsd

591

Interlocking

Chapter 11 Control

VP6289 VP289 6289_OP 289_OP 289_OP 289_CL VP289

AND

NOT NOT

489GREL 489GITL 589GREL 589GITL 289OPTR 289CLTR VP289TR


en04000553_ansi.vsd

4.10.4

Input and output signals


Table 307: Input signals for the DB_BUS_A (IB01-) function block
Signal 152_OP 152_CL 189_OP 189_CL 6189_OP 6189_CL 189G_OP 189G_CL 289G_OP 289G_CL 389G_OP 389G_CL 1189G_OP 1189G_CL EXDU_89G 6189_EX1 6189_EX2 189_EX1 189_EX2 Description 152 is in open position 152 is in closed position 189 is in open position 189 is in closed position 6189 is in open position 6189 is in closed position 189G is in open position 189G is in closed position 289G is in open position 289G is in closed position 389G is in open position 389G is in closed position Grounding switch 1189G on busbar WA1 is in open position Grounding switch 1189G on busbar WA1 is in closed position No transm error from bay containing grounding switch 1189G External condition for apparatus 6189 External condition for apparatus 6189 External condition for apparatus 189 External condition for apparatus 189

592

Interlocking

Chapter 11 Control

Table 308: Output signals for the DB_BUS_A (IB01-) function block
Signal 152CLREL 152CLITL 6189REL 6189ITL 189REL 189ITL 189GREL 189GITL 289GREL 289GITL 189OPTR 189CLTR VP189TR Description Closing of 152 is allowed Closing of 152 is not allowed Switching of 6189 is allowed Switching of 6189 is not allowed Switching of 189 is allowed Switching of 189 is not allowed Switching of 189G is allowed Switching of 189G is not allowed Switching of 289G is allowed Switching of 289G is not allowed 189 is in open position 189 is in closed position Switch status of 189 is valid (open or closed)

Table 309: Input signals for the DB_LINE (IA01-) function block
Signal 152_OP 152_CL 252_OP 252_CL 6189_OP 6189_CL 189G_OP 189G_CL 289G_OP 289G_CL 6289_OP 6289_CL 489G_OP 489G_CL 589G_OP 589G_CL 989_OP 989_CL 389G_OP 389G_CL 989G_OP Description 152 is in open position 152 is in closed position 252 is in open position 252 is in closed position 6189 is in open position 6189 is in closed position 189G is in open position 189G is in closed position 289G is in open position 289G is in closed position 6289 is in open position 6289 is in closed position 489G is in open position 489G is in closed position 589G is in open position 589G is in closed position 989 is in open position 989 is in closed position 389G is in open position 389G is in closed position 989G is in open position

593

Interlocking

Chapter 11 Control

Signal 989G_CL VOLT_OFF VOLT_ON 989_EX1 989_EX2 989_EX3 989_EX4 989_EX5

Description 989G is in closed position There is no voltage on the line and not VT (fuse) failure There is voltage on the line or there is a VT (fuse) failure External condition for apparatus 989 External condition for apparatus 989 External condition for apparatus 989 External condition for apparatus 989 External condition for apparatus 989

Table 310: Output signals for the DB_LINE (IA01-) function block
Signal 989REL 989ITL 389GREL 389GITL 989GREL 989GITL Description Switching of 989 is allowed Switching of 989 is not allowed Switching of 389G is allowed Switching of 389G is not allowed Switching of 989G is allowed Switching of 989G is not allowed

Table 311: Input signals for the DB_BUS_B (IC01-) function block
Signal 252_OP 252_CL 289_OP 289_CL 6289_OP 6289_CL 489G_OP 489G_CL 589G_OP 589G_CL 389G_OP 389G_CL 2189G_OP 2189G_CL Description 252 is in open position 252 is in closed position 289 is in open position 289 is in closed position 6289 is in open position 6289 is in closed position 489G is in open position 489G is in closed position 589G is in open position 589G is in closed position 389G is in open position 389G is in closed position Grounding switch 2189G on busbar WA2 is in open position Grounding switch 2189G on busbar WA2 is in closed position

594

Interlocking

Chapter 11 Control

Signal EXDU_89G 6289_EX1 6289_EX2 289_EX1 289_EX2

Description No transm error from bay containing grounding switch 2189G External condition for apparatus 6289 External condition for apparatus 6289 External condition for apparatus 289 External condition for apparatus 289

Table 312: Output signals for the DB_BUS_B (IC01-) function block
Signal 252CLREL 252CLITL 6289REL 6289ITL 289REL 289ITL 489GREL 489GITL 589GREL 589GITL 289OPTR 289CLTR VP289TR Description Closing of 252 is allowed Closing of 252 is not allowed Switching of 6289 is allowed Switching of 6289 is not allowed Switching of 289 is allowed Switching of 289 is not allowed Switching of 489G is allowed Switching of 489G is not allowed Switching of 589G is allowed Switching of 589G is not allowed 289 is in open position 289 is in closed position Switch status of 289 is valid (open or closed)

4.11
4.11.1

Interlocking for breaker-and-a-half diameter (BH)


Introduction The interlocking modules BH_LINE_A, BH_CONN and BH_LINE_B are used for lines connected to a breaker-and-a-half diameter according to figure 288.

595

Interlocking

Chapter 11 Control

WA1 (A) WA2 (B) 189 189G 289 189G

152 289G

152 289G

689 BH_LINE_A 389G

689 389G BH_LINE_B

6189

152

6289

989 189G 989G 289G

989 989G

BH_CONN
en04000513_ansi.vsd

Figure 288: Switchyard layout breaker-and-a-half Three types of interlocking modules per diameter are defined. BH_LINE_A and BH_LINE_B are the connections from a line to a busbar. BH_CONN is the connection between the two lines of the diameter in the breaker and a half switchyard layout.

596

Interlocking

Chapter 11 Control

4.11.2

Function blocks
IL01BH_LINE_A 152_OP 152CLREL 152_CL 152CLITL 689_OP 689REL 689_CL 689ITL 189_OP 189REL 189_CL 189ITL 189G_OP 189GREL 189G_CL 189GITL 289G_OP 289GREL 289G_CL 289GITL 389G_OP 389GREL 389G_CL 389GITL 989_OP 989REL 989_CL 989ITL 989G_OP 989GREL 989G_CL 989GITL C152_OP 189OPTR C152_CL 189CLTR C6189_OP VP189TR C6189_CL C189G_OP C189G_CL C289G_OP C289G_CL 1189G_OP 1189G_CL VOLT_OFF VOLT_ON EXDU_89G 689_EX1 689_EX2 189_EX1 189_EX2 989_EX1 989_EX2 989_EX3 989_EX4 989_EX5 989_EX6 989_EX7 en05000352_ansi.vsd

Figure 289: IL function block

597

Interlocking

Chapter 11 Control

IM01BH_LINE_B 152_OP 152CLREL 152_CL 152CLITL 689_OP 689REL 689_CL 689ITL 289_OP 289REL 289_CL 289ITL 189G_OP 189GREL 189G_CL 189GITL 289G_OP 289GREL 289G_CL 289GITL 389G_OP 389GREL 389G_CL 389GITL 989_OP 989REL 989_CL 989ITL 989G_OP 989GREL 989G_CL 989GITL C152_OP 289OPTR C152_CL 289CLTR C6289_OP VP289TR C6289_CL C189G_OP C189G_CL C289G_OP C289G_CL 2189G_OP 2189G_CL VOLT_OFF VOLT_ON EXDU_89G 689_EX1 689_EX2 289_EX1 289_EX2 989_EX1 989_EX2 989_EX3 989_EX4 989_EX5 989_EX6 989_EX7 en05000353_ansi.vsd

Figure 290: IM function block

598

Interlocking

Chapter 11 Control

IK01BH_CONN 152_OP 152_CL 6189_OP 6189_CL 6289_OP 6289_CL 189G_OP 189G_CL 289G_OP 289G_CL 1389G_OP 1389G_CL 2389G_OP 2389G_CL 6189_EX1 6189_EX2 6289_EX1 6289_EX2 152CLREL 152CLITL 6189REL 6189ITL 6289REL 6289ITL 189GREL 189GITL 289GREL 289GITL

en05000351_ansi.vsd

Figure 291: IK function block

599

Interlocking

Chapter 11 Control

4.11.3

Logic diagrams
BH_LINE_A XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR AND
NOT

152_OP 152_CL 189_OP 189_CL 689_OP 689_CL 989G_OP 989G_CL 989_OP 989_CL 189G_OP 189G_CL 289G_OP 289G_CL 389G_OP 389G_CL C152_OP C152_CL C189G_OP C189G_CL C289G_OP C289G_CL C6189_OP C6189_CL 1189G_OP 1189G_CL VOLT_OFF VOLT_ON VP189 VP689 VP989 VP152 VP189G VP289G VP389G 152_OP 189G_OP 289G_OP 389G_OP 689_EX1 VP289G VP389G 289G_CL 389G_CL 689_EX2

VP152 VP189 VP689 VP989G VP989 VP189G VP289G VP389G VPC152 VPC189G VPC289G VPC6189 VP1189G VPVOLT 152CLREL 152CLITL

AND

OR
NOT

689REL 689ITL

AND

en04000554_ansi.vsd

600

Interlocking

Chapter 11 Control

601

Interlocking

Chapter 11 Control

VP152 VP189G VP289G VP1189G 152_OP 189G_OP 289G_OP 1189G_OP EXDU_89G 189_EX1 VP189G VP1189G 189G_CL 1189G_CL EXDU_89G 189_EX2 VP189 VP689 189_OP 689_OP VP689 VP989 VPC6189 689_OP 989_OP C6189_OP VP152 VP689 VP989G VP189G VP289G VP389G VPC152 VPC6189 VPC189G VPC289G 989_EX1 689_OP 989_EX2 152_OP 189G_OP 289G_OP 989_EX3

AND

OR
NOT

189REL 189ITL

AND

AND

NOT NOT

189GREL 189GITL 289GREL 289GITL 389GREL 389GITL

AND
NOT

AND

OR

NOT

989REL 989ITL

OR
AND

en04000555_ansi.vsd

602

Interlocking

Chapter 11 Control

C6189_OP 989_EX4 C152_OP C189G_OP C289G_OP 989_EX5 989G_OP 389G_OP 989_EX6 VP989G VP389G 989G_CL 389G_CL 989_EX7 VP989 VPVOLT 989_OP VOLT_OFF 189_OP 189_CL VP189

OR AND

AND

OR

AND

AND

NOT

989GREL 989GITL 189OPTR 189CLTR VP189TR


en04000556_ansi.vsd

603

Interlocking

Chapter 11 Control

152_OP 152_CL 289_OP 289_CL 689_OP 689_CL 989G_OP 989G_CL 989_OP 989_CL 189G_OP 189G_CL 289G_OP 289G_CL 389G_OP 389G_CL C152_OP C152_CL C189G_OP C189G_CL C289G_OP C289G_CL C6289_OP C6289_CL 2189G_OP 2189G_CL VOLT_OFF VOLT_ON VP289 VP689 VP989 VP152 VP189G VP289G VP389G 152_OP 189G_OP 289G_OP 389G_OP 689_EX1 VP289G VP389G 289G_CL 389G_CL 689_EX2

BH_LINE_B
XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR AND
NOT

VP152 VP289 VP689 VP989G VP989 VP189G VP289G VP389G VPC152 VPC189G VPC289G VPC6289 VP2189G VPVOLT 152CLREL 152CLITL 689REL 689ITL

AND

OR
NOT

AND

en04000557_ansi.vsd

604

Interlocking

Chapter 11 Control

605

Interlocking

Chapter 11 Control

VP152 VP189G VP289G VP2189G 152_OP 189G_OP 289G_OP 2189G_OP EXDU_89G 289_EX1 VP189G VP2189G 189G_CL 2189G_CL EXDU_89G 289_EX2 VP289 VP689 289_OP 689_OP VP689 VP989 VPC6289 689_OP 989_OP C6289_OP VP152 VP689 VP989G VP189G VP289G VP389G VPC152 VPC6289 VPC189G VPC289G 989_EX1 689_OP 989_EX2 152_OP 189G_OP 289G_OP 989_EX3

AND

OR
NOT

289REL 289ITL

AND

AND

NOT NOT

189GREL 189GITL 289GREL 289GITL 389GREL 389GITL

AND
NOT

989REL
AND OR
NOT

989ITL

OR AND

en04000558_ansi.vsd

606

Interlocking

Chapter 11 Control

C6289_OP 989_EX4 C152_OP C189G_OP C289G_OP 989_EX5 989G_OP 389G_OP 989_EX6 VP989G VP389G 989G_CL 389G_CL 989_EX7 VP989 VPVOLT 989_OP VOLT_OFF 289_OP 289_CL VP289

OR AND

AND

OR

AND

AND

NOT

989GREL 989GITL 289OPTR 289CLTR VP289TR


en04000559_ansi.vsd

607

Interlocking

Chapter 11 Control

608

Interlocking

Chapter 11 Control

152_OP 152_CL 6189_OP 6189_CL 6289_OP 6289_CL 189G_OP 189G_CL 289G_OP 289G_CL 1389G_OP 1389G_CL 2389G_OP 2389G_CL VP6189 VP6289 VP152 VP189G VP289G VP1389G 152_OP 189G_OP 289G_OP 1389G_OP 6189_EX1 VP189G VP1389G 189G_CL 1389G_CL 6189_EX2 VP152 VP189G VP289G