# CSCI4250 Exam 1 Solution

Question 1 (4 points). Consider enhancing a computer by adding vector hardware. When a computation is run in vector mode on the vector hardware, it is 100 times faster than in the normal mode. We call the percentage of the original time that could be spent using the vector mode the percentage of vectorization. 1a) What percentage of vectorization is necessary to achieve a speedup of 10? (Just set up the equation to show how to get the answer.) Speedup = (Old Execution Time)/(New Execution Time) 10 = ____________________1_____________________ Time in vector mode*1/100+ Time in normal mode 10 = _____1______ f/100+(1-f) f = 10/11 1b) What percentage of the enhanced computation time is spent in vector mode if a speedup of 10 is attained? (Just set up the equation to show how to get the answer.) Percentage time = _Time in vectorization____ Total time T = f/100___ = 1/110 1-f+f/100 11/110 = 1 11

However. Execution Time = Instruction Count * Cycles per instructions * Clock cycle time = (2*109 instructions *1 cycle/instruction + 1*109 instructions *2 cycles/instruction) 10 9 cycle/s = 4s MIPS rate = Instruction Count /106 = 3000 = 750 MIPS Execution Time 4 2b) Calculate the new MIPS rate and execution time when we use the optimizing compiler. Execution Time = Instruction Count * Cycles per instructions * Clock cycle time = (1*109 instructions *1 cycle/instruction + 1*109 instructions *2cycles/instruction) 10 9 cycle/s = 3s MIPS rate = Instruction Count /106 = 2000 = 666 MIPS Execution Time 3 2c) Discuss the results in (a) and (b).) Suppose we build an optimizing compiler that discards 50% of the ALU instructions (but cannot reduce other instructions). and not necessary to calculate the final numerical results. Are there any contradictions? At first.Question 2 (6 points). (It is sufficient to derive the formulas. it would seem that a decrease in MIPS rate would lead to an increase in execution time. Assume that the original total instruction count is 3*109 and that the original ALU instruction count is 2*109. . 2a) Calculate the original MIPS rate and execution time. which is clearly not the case here. This reinforces the idea that MIPS rate is not a reliable indicator of performance in applications. and let each non-ALU instruction take 2 clock cycles. let each ALU instruction take 1 clock cycle. one notes the optimizing compiler eliminated the most lightweight instruction and so the MIPS rate will decrease as the instructions that take multiple instructions become more dominant. Let the clock rate be 1-GHz.