PJ494 Switchmode Pulse Width Modulation Control Circuit

he PJ494 incorporates on a single monolithic chip all the functions required in the construction of a pulsewidth-modulation control circuit. Designed primarily for power supply control, these devices offer the systems engineer the flexibility to tailor the power supply control circuitry to his application. The PJ494 contains an error amplifier, an on-chip adjustable oscillator, a deed-time control comparator, pulse-steering control flip-flop, a 5-volt, 5% precision regulator, and outputcontrol circuits. The error amplifier exhibits a common-mode voltage from –0.3 volts to Vcc –2 volts. The dead-time control comparator has a fixed offset that provides

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approximately 5% dead time when externally altered. The onchip oscillatory be bypassed by terminating RT (pin 6) to the reference output and providing a sawtooth input to CT (PIN 5), or it may be used to drive the common circuits in synchronous multiple-rail power supplies. The uncommited output transistor provide either common-emitter or emitterfollower output capability. Each device provides for push-pull or single-ended output operation, which may be selected through the output-control function. The architecture of these devices prohibits the possibility of either output being pulsed twice during push-pull operation.

FEATURES
• • • • • • • Complete PWM Power Control Circuitry Uncommitted Outputs for 200mA Sink or Source Current Output Control Selects Single-Ended or Push –Pull Operation Internal Circuitry Prohibits Double Pulse at Either Output Variable Dead-Time Provides Control over Total Range Internal Regulator Provides a Stable 5-V Reference Supply, 5% Circuit Architecture Allows Easy Synchronization OperatingTemperature (Ambient) PJ494CD PJ494CS -20℃ to +85℃ DIP-16 SOP-16 Package

DIP-16

SOP-16

ORDERING INFORMATION
Device

Pin 1.Noninv Input 2.Inv Input 3.Feedback 5.CT 8.C1 11.C2 13.Output Control 15. Inv Input 16. Noninv Input

﹜Error Amp1
4.Dead-Time Control 6.RT 7.Gnd 9.E1 10.E2 12.Vcc 14.Ref Out

﹜Error Amp2

ABSOLUTE MAXIMUM RATINGS OVER OPERATING FREE-AIR TEMPERATURE RANGE
(unless otherwise noted) Rating Supply voltage Amplifier input voltage Collector output voltage Collector output current Operating free-air temperature range Storage temperature range Operating Junction Temperature Lead temperature 1,6mm from case for 10 seconds Power Dissipation @TA≦45℃ PD Tstg TJ Symbol Vcc Vi Vo Value 41 Vcc+0.3 41 250 -20 to 85 -25 to 125 125 260 1000 mW ℃ mA Unit V

1-11

2002/11.rev.A

VCC=40V Vcc=Vc=40V.3 Max 40 Vcc-2 40 200 0.Vo=0.3 toVcc-2 95 -800 -90 -100 -0.5V Vo=(pin 3)=2.0 Min ----Value Typ 40 3.5V RL=2KΩ.8 1 0 ELECTRICAL CHARACTERISTICS OVER RECOMMENDED OPERATING FREE-AIR TEMPERATURE Vcc=15V.V(PIN3)=0.001µF.5V.0 -1.3 2.RT=30KΩ Vcc=7V to 40V.5V Vo=(pin 3)=2.7V VID=15mV to 5V.5 3. TA=25℃ CT=0.1 -Unit Max ---12 KHz % Test Conditions* Io=1mA Vcc=7V to 40V Io=1mA to 10mA ∆TA=MIN to MAX Vref=0 Min 4.Vo=0. VE=0 VE=0.0 0.0 3.V(PIN3)=3.PJ494 Switchmode Pulse Width Modulation Control Circuit RECOMMENDED OPERATING CONDITIONS Parameter Supply voltage Amplifier input voltage Collector output voltage Collector output current(each transistor) Current into feedback terminal Timing capacitor Timing resistor Oscillator frequency Operating free-air temperature Symbol Vcc Vi Vo Min 7 -0.7 --4.5V Test Conditions VCE=40V.RL=2KΩ.47 1.3 10000 500 300 70 Unit V mA nF KΩ KHz ℃ CT RT TA 0.RT=30KΩ ∆TA=MIN to MAX Test Conditions* Vo=(pin 3)=2.1 1.1 -1.5V ∆Vo=40V.001µF. IE=-200mA VI=Vref Min -----Min ---70 -65 -0.001µF.RT=30KΩ CT=0.2 35 Unit Max 5.75 ---15 Value Typ 5 2.0 0.5 to 3.0 250 -0.RL=2KΩ VID=-15mV to -5V.5 µA V mA 2-11 2002/11.25 25 15 1 75 V mV % mA ERROR AMPLIFIER SECTION Parameter Input offset voltage Input offset current Input bias current Common-mode input voltage range Open-loop voltage amplification Unity-gain bandwidth Common-mode rejection ratio Power Supplu Rejection Ratio Output sink current (pin 3) Output source current (pin 3) OUTPUT SECTION Parameter Collector off-state current Emitter off-state current Collector-emitter saturation voltage Output control input current Value Typ** Max 2.5V Vcc=7V to 40V ∆Vo=3V.5 -- Unit Max 100 -100 1. Ic=200mA Vc=15V.A .0 -- Unit mA nA µA V dB KHz dB dB mA mA Common-emitter Emitter-follower Value Typ 2.0 10 5.3 2. REFERENCE SECTION Parameter Output voltage(Vref) Line regulation Load regulation Output voltage change with temperature Short-circuit output current*** OSCILLATOR SECTION Parameter Frequency Standard deviation of frequency**** Frequency change with voltage Frequency change with temperature*** Test Conditions* CT=0. f=10KHz (unless otherwise noted).rev.Vo=2. TA=25℃ ∆Vcc=33V.0 -0.5 to 3.

0 V All typical value except for temperature coefficient are at TA=25℃ For conditions shown as MIN or MAX.0 0.0 9. use the appropriate value specified under recommended operating conditions.7 Unit Max 4.3 -µA % V Value Typ* 4.7V Min -0. See Figure 4 Min ----- Value Typ* 100 25 100 40 Unit Max 200 100 200 100 ns UNDERVOLTAGE LOCKOUT SECTION Parameter Test Conditions Turn-on Threshold z z z z z Vcc increasing Iref =1. each output VI(pin 4)=0.rev. all other inputs and outputs open VI(PIN4)=2V.0mA Min 5.PJ494 Switchmode Pulse Width Modulation Control Circuit DEAD-TIME CONTROL SECTIONDead-time control-section (See Figure 11) Parameter Test Conditions Min Input bias current (pin 4) VI=0 to 5. All typical values except for parameter changes with temperature are at TA=25℃ Duration of the short-circuit should not exceed one second Standard deviation is a measure of the statistical distribution about the mean as derived from the formula  N ( x − x) 2   σ = ∑ n N −1  n =1    z 1 2 Temperature coefficient of timing capacitor and timing resistor not taken into account 3-11 2002/11.43 Unit Max 7.RT=12KΩ Input threshold voltage(pin 4) Zero duty cycle -Maximum duty cycle 0 PWM COMPARATOR SECTION (See Figure11) Parameter Test Conditions Input threshold voltage (pin 3) Input sink current (pin 3) TOTAL DEVICE Parameter Standby supply current Average supply current Zero duty cycle V(pin 3)=0. TA=25℃ Parameter Test Conditions Output voltage rise time Output voltage fall time Output voltage rise time Output voltage fall time Common-emitter configuration.0 7.5 Value Typ* 6.5 -V mA Test Conditions Pin 6 at Vref.0 -Unit Max -10 50 3.0 45 3. See Figure 3 Emitter-follower configuration.CT=0.5 Unit Max 10 15 -mA SWITCHING CHARACTERISTICS.3 Value Typ* -2.A .1µF. See Figure 1 Vcc=15V Vcc=40V Min ---- Value Typ* 6.25V --Maximum duty cycle.

Timing Diagram 4-11 2002/11. Representative Block Diagram Figure 2.A .rev.PJ494 Switchmode Pulse Width Modulation Control Circuit FUNCTION BLOCK DIAGRAM This device contained 46 active transistors Figure 1.

rev. The reference has an internal accuracy of ±5. With this configuration. Output drive can also be taken from Q1 and Q2. Q1 and Q2.3V .) An internal-linear sawtooth oscillator is frequescy-programmable by two external components. This happens only during that portion of time when the sawtoothvoltage is greater than the control signals. ranging between 0V to 3. the pulse-steering flip-flop directs the modulated pulses to each of the rwo output transistors alternately for push-pull operation. down to zero as the voltage at the feedback pin varies from 0. Q1 and Q2 may be connected in parallel. (Refer to the Timing Diagram shown in Figure 2.0% with a typical thermal drift of less than 50mV over an operating temperature range of 0 to 70℃. Both error amplifiers have a common mode input range from -0. a positive pulse is generated on the output of the deadtime comparator. the amplifier that demands minimum output on time. Additional deadtime may be imposed on the output by setting the deadtime-control input to a fixed voltage. With the output-control connected to the reference line. The approximate oscillator frequency is determined by: ………. When higher output-drive currents are required for single-ended operation.5V to 3. For more information refer to Figure 3. Output pulse width modulation is accomplished by comparison of the positive sawtooth waveform across capacitor CT to either of two control signals. This is desirable when the output transformer has a ringback winding with a catch diode ised for snubbing. and the output mode pin must be tied to ground to disable the flip-flop.0V reference capable of sourcing up to 10mA of laod current for external bias circuits. and 48% with it connected to the reference line. Oscillator Frequency versus Timing Resistance 5-11 2002/11..5V.PJ494 Switchmode Pulse Width Modulation Control Circuit APPLICATIONS INFORMATION Description The PJ494 is a fixed-frequency pulse width modulation control circuit. The output frequency is equal to half that of the oscillator. Figure 3. or the feedback input. which clocks the pulse-steering flip=flop and inhibits the output transistors.3C to (Vcc – 2V). The error –amplifier outputs are active high and are ORed together at the noninverting input of the pulse-width modulator comparator. dominates control of the loop. Therefore. and may be ised to sense powersupply output voltage and current. The NOR gates. incorporating the primary building blocks required for the control of a switching power supply . RT and CT. This would result in a maximum duty cycle on a given output of 96% with the output control grounded. (See Figure 1.) The control signals are external inputs that can be fed into the deadtime control. The pulse width modulator comparator provides a means for the error amplifiers to adjust the output pulse width from the maximum percent on-time. The PJ494 has an internal 5. are enabled only when the flip-flop clock-input line is in its low state. when single-ended operation with a maximum on-time of less than 50% is required. an increase in contro-signal amplitude causes a corresponding linear decrease of output pulse width. the error amplifier inputs. which drive output transistors Q1 and Q2. The deadtime control comparator has an effective 120mV input offset which limits the minimum output deadtime to approximately tge first 4% of the sawtooth-cycle time. established by the deadtime control input. When capacitor CT is discharged.A . The output frequency will now be equal to that of the oscillator.

Emitter-Follower Configuration Output Saturation versus Emitter Current Figure 8. Standby Supply Current versus Supply Voltage 6-11 2002/11.PJ494 Switchmode Pulse Width Modulation Control Circuit Figure 4. Common-Emitter Configuration Output Saturation Voltage versus Collector Current Figure 9.A . Percent Duty Cycle versus Deadtime Control Voltage Figure 7. Open Loop Voltage Gain and Phase Versus Frequency Figure 5. Percent Deadtime versus Oscillator Frequency Figure 6.rev.

Error-Amplifier Sensing Techniques 7-11 2002/11. Error-Amplifier Characteristics Figure 11. Deadtime and Feedback Control Circuit Figure 12.A . Emitter-Follower Configuration Test Circuit and Waveform Figure 14. Common –Emitter Configuration Test Circuit and Waveform Figure 13.PJ494 Switchmode Pulse Width Modulation Control Circuit Figure 10.rev.

Soft-Start Citcuit Figure 17. Operation With VIN >40V Using External Zener 8-11 2002/11. Output Connections for Single-Ended and Push-Pull Configurations Figure 18.rev.PJ494 Switchmode Pulse Width Modulation Control Circuit Figure 15.A . Slaving Two or More Control Circuit Figure 19. Deadtime Control Circuit Figure 16.

06% 65mV pp P. #36 AWG Core : Ferroxcube 1408P-L00-3CB 9-11 2002/11.T.6A 71% L1 – 3.rev.28% 3. Pulse Width Modulated Push-Pull Converter Test Line Regilation Load Regilation Output Ripple Short Circuit Current Efficiency Condition VIN = 10V to 40V VIN = 28V. #28 AWG Secondary : 120T C. RL=0.0A VIN = 29V.R.PJ494 Switchmode Pulse Width Modulation Control Circuit Figure 20.3A T1 – Primary : 20T C.1Ω VIN = 28V.0mV 0. Io =1.0A Result 14mV 0.A.A .D 1.5mH @ 0.T. Io =1. Io =1.0mA to 10A VIN = 28V.

0mV 0.02% 40mV pp P.6V. Io = 200mA Result 3. RL=0.0mV 0.A.A .PJ494 Switchmode Pulse Width Modulation Control Circuit Figure 21.1Ω VIN = 12.0V to 40V VIN = 12. Pulse Width Modulated Step-Down Converter Test Line Regulation Load Regulation Output Ripple Short Circuit Current Efficiency Condition VIN = 8.R.D 250mA 72% 10-11 2002/11.6V.6V.rev. Io = 200mA VIN = 12. Io = 0.6V.2mA to 200mA VIN = 12.01% 5.

019 0.009 0° 7° 0.701 0.012 0.27BSC 0.093 0.299 0.019 0.90 1.093 0.00 7.10 0.35 2.014 0.010 0.009 0° 7° 0.35 0.25 0° 7° 10° INCHES MIN MAX 0.25 0.393 0.40 7.386 0.49 0.05 6.32 0.45 2.35 0.05 10.029 11-11 2002/11.104 0.004 0.004 0.299 0.PJ494 Switchmode Pulse Width Modulation Control Circuit DIM A B C D G J K L M MILLIMETERS MIN MAX 17.75 INCHES MIN MAX 0.395 0.60 2.25 0.05BSC 0.27BSC 0.10 0.49 1.A .292 0.415 0.65 0.rev.292 0.25 6.80 10.25 0° 7° 10.104 0.55 0.35 2.65 0.014 0.50 0.010 0.05BSC 0.395 0.415 DIM A B C D F G K M P R MILLIMETERS MIN MAX 9.035 0.020 0.710 0.80 18.

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