# VLSI Implementation of Adders for High Speed d ALU

Prashant Gurjar, Rashmi Solanki Pooja Kansliwal UG Scholar, Dept. EC, GGITM, Bhopal, India Email: prashantgurjar84@gmail. .com
ABSTRACT

Mahendra Vucha Asst. Prof, Dept. EC, GGITM, Bhopal, India Email: Mahendra.1548@gm mail.com
other kinds of processors, adders are used not only in the ALU(s), but also in other parts of o the processor, where they are used to calculate addresses, table indices, and many more.

Consider two binary variables x and d y. the binary sum is denoted by x+y, such that 0+0 = 0 0+1 = 1 1+0 = 1 1+ +1 = 10 Here, the result in the last case is a binary b 10(i.e., 2 inbase 10). The sum of two numbers can be out of the range of the digits in binary set. This, of course e, is the origin of the concept of a carry out. In the binary sum 1+1, the result 10 is viewed as a 0 with a 1 shifted to th he left to give a “carryout is 1”.

A half adder is a logic circuit th hat performs one-digit addition. It requires two inputs, and th he output is the sum of

r Figure 1. Half adder the inputs. The logic diagram of HA is i shown in figure 1. ry numbers A and B. It A HA adds two one-bit binar has two outputs, S and C (the value C theoretically carried on to the next addition).The simpl lest half-adder design, shown in figure 1, incorporates an a XOR gate for S and an AND gate for C. The Boolean eq quation and Truth table of half adder is shown bellow. …(i) S = A XOR B …… C = A AND B …… …(ii) or half adder Table 1. Truth table fo Input A 0 0 1 1 B 0 1 0 1 C 0 0 0 1 Output S 0 1 1 0

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INTRODUCTION

Digital computer ALU is an aspect of logic c design with the objective of developing appropriate algorit thms in order to achieve an efficient utilization of the avai ilable hardware. The hardware can only perform a relativ vely simple and primitive set of Boolean operations an ndthe arithmetic operations are based on a hierarchy of ope erations that are built by using algorithms against the h hardware. Since, ultimately, speed, power and utilization o of ALU are the most often used measures of the efficiency o of an algorithm.

In digital electronics, adder is a di igital circuit that performs addition of two numbers. In many y computers and