Design and fabrication of an IC compatible on-chip thermoelectric cooler
Ik-Su Kang and Seong Ho Kong

School of Electronic & Electrical Engineering, Kyungpook National University 1370, Sangyuk-dong, buk-gu, Daegu, 702-70 1 South-Korea Phone: +82-53-950-7579 Fax :+82-53-950-5505 E-mail: shkong@ee.knu.ac.kr
The field of thermoelectrics is gaining more interest in enormously wide scope of applications comprising the areas: active cooling at the micro scale (spot cooling on microprocessor), thermoelectric feedback, temperature control on microfl uidic devices, biochemistry (Polymerase Chain Reaction) and low power consumption consumer products, such as wrist watch or hearing aids recollecting waste thermal energy. However, most of efforts have been focused on the development of highly performable thermoelectric material so that these works are limited to either material research or optimizingiimproving the conventional thermoelectric devices [ 1 ][2], Research on the on-chip integration of thin-filmbased thermoelectric element and the development of on-chip applications of thermoelectrics are lagging behind. This paper reports designing and fabrication of an on-chip integrated thin-film-based thermoelectric cooler as well as the characterization of fabricated thermoelectric material. A thin-film-based single-thermocouple for analysis and its corresponding lumped-element model are sown in Figure 1. The two thermoelements (p type and n type) are dectrically connected in series by means of the aluminum interconnect while thermally i n parallel. Differently fiom the structure of the conventional Peltier coolers, the thin-film thermoelements are sandwiched in between dielectric layers, Si3N4 and S O , that both have a low thermal conductivity. Due to the fact that the maximum temperature difference between the ambient and the cold junctions of the thennoelectric elements usually decides the performance of a thermoelectric cooler, device geometries should be optimized, and proper thermoelectric and membrane materials must be chosen. Figure 2 shows the plot of such an analysis. Taking into account the heat loss by conduction through the thermoelectric material as well as through the membrane and the parasitic effect due to the contact resistance at the metal-thermoelectric elements interface, the maximum temperature difference between the hot and cold junctions of Peltier elements is calculated and shown in Figure 2, as functions of Peltier element thickness (d,, and dp) and the contact resistance (&) at the interface, The volume just below the cold junction (at Tc), located at the tip of thin-film beam, has a certain thermal capacitance, Cl,,, and is connected to the hot junction (at To), positioned on the bulk-silicon heat sink, through the thermal resistance of the beam, K * .The beam consists of Si3N4/SiOz thin film and +type thermoelectric elements, sandwiched between them. The thennoelectric elements transport thermal energy at a rate qp from C t h through the beam. A thin-film-based Peltier device has been realized using the standard IC fabrication technology and following bulk micromachining technology. Figure 3 shows the schematic fabrication sequence. Electrochemically controlled etch stop (ECE) is performed to define thermal mass fiom 4pm-thick epi-layer, suspended underneath the SiNiSiO, membrane. This thermal mass has significant potential when Peltier devices have to be used for non-steady-state applications. For the fabrication compatibility with the standard IC processing, polycrystalline silicon (poly-Si) and polycrystalline silicon germanium (poly-SiGe) are adopted for thermoelectric material, even though Bi,Te, is one of the most effective thermoelectric materials [3][4]. As thermoelectric material properties are important for the device performance, the fabricated thin-film thermoelectric material has been characterized. A micromachined test structure for measuring Seebeck coefficient has been fabri.cared, using process steps similar to the thin-film Peltier devices discussed in this paper, and shown in Figure 4. Also thermal, electrical and thermoelectric properties are extensively measured and summarized in Figure 4. These values show a good agreement with those from literatures.

[ l ] X. Zhou, J. Nan, J. Wu and C.W. Nan, Thermoelectric properties and microstructure of SnTe-Bi,Te, alloys, 20th

Int. Conf. on Thermoelectrics, 200 1, pp. 109-1 12. [2] L. W. da Silva, M. Kaviany, A . DeHennis and J. S. Dyck, Micro thermoelectric cooler fabrication: Growth and characterization of patterned Sb2Te3 and Bi2Te3 films, 22nd Int. Conf. on Thermoelectrics, 2003, pp. 665-668. [3] C. Shafai and M.J. Brett, A micro-integrated Peltier heat pump for localized on-chip temperature control, Canadian Journal of Physics 74, S139, 1996. 141 Gao Min, D.M. Rowe and F. Volklein, Integrated thin film thermoelectric cooler, Electronics letters, ~01.34no.2, 1998, pp. 222-223. [5] D.M. Rowe, ed., CRC handbook of thermoelectrics, CRC Press, Boca Raton, FL, USA, 1995.


..........123 Ourwork Figure 4......... .. Thickness of thermoelectric element Ipml Thickness of Ihermoelectric element (pm] 02 0.... as afunction ufthe element thickness (solid).......... P' barrier implantation backside oaltsmm for KOH el* shallow n'&ntaa implantahon i electrochemically controlled etch (ECE) in KOH low stress mlnde CVD I TEOS CVD K1t / \ . a ~... and as afunction of the contact resistance (dashed). Maximum temperalure diflerence beiween the hot and cold junctiom of (a) poly-SiGe and (6) poly-Si Peltier elements........ 1 I Materia' I luVK-7 ~ l$ml I 1 1 a .. ' ' - 1 1 IWm'u-'! ..4 0........... A fhin$lfilm-based integrated thermoelectric cooler w i t h a single thermocouple and a suspended epi-lqver underneath the membrane......2 28..... .............. 295 ...... Peltlsr e l m i s Figure 3..6 0... ~...........Figure I................................ Micromachined test structure for measurement o f the Seebeck coefficient and measured thermoelectric...203 0..........8 0....7 I I 0....... 29...6 10 20 30 40 M 0 Contact resistance Rm I n 1 io 20 30 40 50 Contact ressiance Rm [n] Figure 2..9 5..... Schematicfabrication sequence andfabricated thermoelectric cooler with suspended epi-layer underneath [he membrane. mnlad window open I metallization ....1 4.... .......2 2 I 0......2 1....4 l4 Y G 1.......... thermal and electric properties.8 1 1........ .....