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[8] A. Shintani, K. Suda, M. Suzuki, and K. Takami, Si02 particulates dispersed in CVD reactor, J. Electrochenz. SOC., vol, 124, pp. 1771-1776,1977, 191 W. W. Anderson, Tunnel current limitations of narrow bandgap infrared charge coupled devices, InfraredPhys., vol. 17, pp. 147-164,1977. [ l o ] R. D.Thom, F. J. Renda, W. J. Parrish, and T. L. Koch, A monolithic InSb charge-coupled infrared imaging device, in Proc. h t . Electron Devices Meet., pp. 501-504,1978.

[ I l l M. Zerbst, Z. Angew. Phys., vol. 22, p. 30,1966. [ 121 D.K. Schroder and H. C. Nathanson, On the separation of bulk and surface components of lifetime using the pulsed MOS capacitor, Solid-state Electron., vol. 13, pp. 577-582, 1970. [13] R.D. Thom,T. L. Koch, and W. J. Parrish, Indiumantimonide infrared CCD linear imaging arrays with onship preprocessifig, in Remore Sensing o f Earth f r o m Space: Role of Smart Sensors, R. A. Breckenridge, Ed., vol. 67 of Progress in Astronautics and Aeronaurics, AIAA, 1979, pp. 411-423.

Technology Development for lnSb Infrared imagers


Abmtxt-InSb semiconductor technology required for infrareddetector-array fabrications is described. High-quality MOS, MOSFET, and linear and two-dimensional (2D) CID devices have been successfully fabricated. Interface-state densities of the MOS capacitors were determined to be less than 5 X 1OO cme2. eV-, respectively. These results suggest that self-scanned monolithic arrays could be fabricated. The performance of linear and 2D CID arrays were evaluated in terms of detectivity (D) and responsivity (R). The average D* of a 64element line- array was measured t o be 3.4 X 10 cm . Hz1/*. W- which is 70 percent of that of background-limited-performance (BLIP) operation.The R was 1 X lo- V/photonwith 10-percent uniformity. The D* and R were also obtained for a 32 X 32 2D array.

I. INTRODUCTION HE InSb infrared detector arrays for thedetection of 3-5-pm radiation have received increasing attention over the past few years. The types of detector arrays that have been investigated are CCD imagers [ 11, diode arrays [2], linear and two-dimensional (2D) CID arrays [3].

This paper investigates the primary or base technologies required to fabricate InSb detectors in either linear-array structures or 2D CID imagers. In addition, it presents results on InSb diode and MOSFET fabrication. The InSb MOSFETis required forfuture self-scanned monolithic focal-plane processors and on-chip amplifiers. The paper is divided into four main sections. The first section describes the low-temperature chemical vapor deposition (CVD) Si02 required for all phases of the work. The second section describes the fabrication and the characteristics of InSb junctions and MOSFETs. The third section describes the MIS measurements required to characterize the electrical properties of the Si02/InSb interface. Finally, the fourth section outlines the fabrication and measurement of operational linear and 2D CID arrays. 11. LOW-TEMPERATURE CVD OXIDE The relatively low melting point of the compound InSb leads to concern about possible shifts in stoichiometry at elevated temperatures. This is especially true for surface layers where a change through evaporation or oxidation of one of the constituents relative to the other can take place. Dielectric films for MISdevices are, therefore, usually applied at the lowest possible temperatures. We have shown the usual silicon technology CVD reactor to be suitable for low-temperature films from the pyrolytic reaction of oxygen and silane [4]. The growth rate data for several temperatures using a silane concentrationof 1 :1000 in a nitrogen carrier gasis shownin Fig. 1. The most striking aspect of the curves is the sharp cutoff of growth with excess oxygen at all temperatures used. At

Manuscript received June 20, 1979; revised September 4,1979. The design and fabrication of the 64-element line array was supported by the Air Force Avionics Laboratory and the Air Force Weapons Laboratory. The design and fabrication of the 16 X 64 two-dimensionalarray was supported by the Naval Research Laboratory under Contract N00173-78-(2-0158. C-Y. Wei, E. A. Taft, and D. M. Brown are with General Electric Corporate Research and Development, Schenectady, NY 12301. K. L. Wang was with General Electric Corporated Research and Development, Schenectady, NY 12301. He is now with the Department of Electrical Science and Engineering, University of California, Los Angeles, CA 90024. 3. M. Swab, M. D. Gibbons, and W. E. Davern arewithGeneral Electric Optoelectronic Systems Operation, Syracuse, NY 13201.

0018-9383/80/0100-0170$00.75 0 1980 IEEE

WE1 er al.: InSb I N F R A R E D I M A G E R S






Fig. 1. Growth rates at several temperaturesforoxide films as the oxygen concentration is changed. The silane to nitrogen ratio is held at 1 : 1000.

lower temperatures, the rangeofoxygen content of the gas mixture for any significant growth ratebecomes quite narrow. The thickness of the deposited films was measured with an ellipsometer. The index of refraction at 5461 8 was found to be about 1.45, very close to the index of S O 2 . However, infrared transmission data onthese films showed various amounts of hydrogen bonded to the basic silicon oxide structure. The lower the reaction temperature the greater was the hydrogen content indicated by the infrared data. The dielectric constant of the deposited film was determined usingan MIS structure. Thecapacitancemeasured instrong accumulation coupled with an ellipsometric thickness gave a ,dielectric constant of about 6 for a film grown at200C. When the measurement temperature was reduced from 300 to 78 K the dielectric constant decreased to 3.9, a value near that found for thermally grown oxide films on silicon. 111. JUNCTION DIODESAND MOSFETs p-n junction diodes were fabricated using n-type substrates. Ion implantation was used to dope the substrates. This method gives good control of the dopant concentration and allows the use of various dopants without depending on their alloying chemistry and diffusivity. For investigating the results of ion implantation and subsequent annealing behavior, mesa diodes were fabricated in the following sequence. First, an acceptor dopant, 9Be+, was implanted in n-type InSb at 90 keV with a fluence of 5 X 1014 cm-2. Annealing was carried out at various temperatures between 200 to 400Cin argon ambient. A 200-8 Cr film was deposited on the substrate and was followed by a 5000-8 Au film deposition. After patterning anarrayof 1.14 X cm2 metal dots, the mesa structures were completed by etching in lactic-nitric acid to remove 2 pm of InSb. Silver epoxy was used for the back contact and gold wires were bonded to the dots. The characteristics of the fabricated p-ndiodes on

Fig. 2. Current-voltage characteristics of a p-n junctioninInSbat 78 K. (a) The reverse voltage breakdown is 8 V. (b) The 1.1 X cm2 diode shows a leakage current density of 2 X lo4 A cm-2 at a reverse bias of 4 V.

material withasubstrate dopingdensityof 3 X 1014cm-* using9Be+ implants are illustratedin Fig. 2(a) and (b). A reverse leakage current density of 2X A * cm-2 at a reverse bias of 4 V was observed at 78 K. This leakage current appeared to be caused by generation of minority carriers by two deep levels of defects. The energies of the two observed deep levels were measured to be E,-0.05 eV and E,-0.1 1 eV using the transient capacitance technique. Note that the reversebreakdownvoltage of thesediodes is between 7 and 8 V. A detailed examination of the forward characteristics of the diodes showed that the m value in the diode current equation J = Jo(eqv/mkT - l), was l .5 at 78 K, where Jo is the leakage-current density of ideal Shockley diodes and V is the applied bias. This indicates relatively good conduction in the implanted region. Circular-gate planar MOSFETs were also fabricated on InSb usingsimilar implants for the source and drain junctions. A 200C oxide filmwas put down first. Thiswasfollowedby 150-A Cr film and 5000-8 Au film depositions. The structure was patterned by etchingthe Au and Cr films for the selfaligned source and drain implant. Ion implant was carried out through the 1000-&thick oxide remaining from the previous etchingprocedureand subsequentannealingwassimilar to that used in fabricating the p-n junction mesadiodes.The characteristics of the fabricated p-channel MOSFETs are illustrated in Fig. 3. The channel mobility was approximately 310cm2.V-
a s - .





Fig. 3. Characteristicsof

an insulatedgatefield-effecttransistoron InSb at 78 K.



' O h MIS capacitors were fabricated on both n- and p-type, 1 0 kH2 (1 1l)B face InSb wafers. The carrier concentration was 5 X I I I I -1 0 I o lOI4 at 77 K. The wafers were polished in nitric based Vp (VOLTS1 acid, rinsed in deionized water, and loaded into the reactor. Fig. 4. Capacitance and conductance curves for an MIS capacitoron n-type InSb at 77 K . CVD oxide of 1200 8 was deposited on the InSb wafers at G200'C. After the deposition of the oxide film, a 150-8 thin 10'2 film of chromium, followed by a 5000-8 film of gold, was 8 sputtered onto the wafers. MIS dots of 1.3 X 10-3-cm2 area 6 were then fabricated using standard photolithographic techniques. Interface state densities were measured using both the lowfrequency capacitance technique [5] and the conductance technique [6]. In the low-frequency capacitance technique, the interface state densities were determined by comparing the *am a* measured low-frequency capacitance curve with the theo*ao BURGLUND'S . retical capacitance curve which assumes no interface states. TECHNIQUE The conductance technique requires the measurement of AWROXIMATED CONDUCTANCE capacitance (C,) and conductance (G,) curves at two intermm,mm TECHNIQUE E,c YI0;GAP mediate frequencies between 500 Hz and 10 kHz. The equiva1 1 I 1 1 1 J lent parallel conductance ( G p ) ,which results from the loss due 0. I 0.15 0.2 0.25 SURFACE POTENTIAL(VOLTS) to the steady-state capture and emission of carriers by interface states, was derived from the measured C , and G, to ob- Fig. 5 . Calculated interface state densities from data as shown in Fig. 4. tain the interface state densities [6]. The sensitivity of the latter method is determined by the The interface state densities in the upper half of the bandgap measured by the conductance technique were 2 X 10" cm-? minimum detectable loss angle. Loss angles as small as 0.15' canbeeasily measured. For instance, a measurement on a ev-'. Some of the test devices showed no detectable conductance simulated sample using a 1000-MS2 resistor in parallel with a loss peak in depletion indicating interface state densities of 38-pF capacitor produces a loss angle of 0.15'.Thissmall <lo1' cm-* * eV-'. A similar result hasbeen re!ported by lossangle indicates an instrumental sensitivity sufficient to Langan et aZ. [7] using n-type substrates. Our results on p-type detect interface state densities of 10" cm-2 * eV-' for an MIS MIS capacitors showed that the interface state density in the capacitor of 1.3 X cm2 area and 1200-8 gate oxide lower half of the bandgap was 5 X 10"cm-2 eV-'. For thickness. Fig. 4 shows the capacitance and conductance curves of an deviceshaving low interface state densities the C-V curves n-type InSb MIS capacitor measured at various frequencies. showed a flat-band voltage shift of G0.2 V under a +lo-V The factthat almost identical capacitance curveswere ob- stress. tained at 1, 2 , and 5 Hz indicates that nearly all the interface V. InSb CID LINEARAND TWO-DIMENSIONAL states were in equilibrium during the measurements and a true FOCALPLANEARRAY quasi-equilibrium C-V curve was obtained [5]. The interface state density as shown in Fig. 5 has a minimum of 5 X lolo A. Linear Arrays Various linear MIS capacitor InSb CID array structures have cm-2 eV-' in the upper half of the bandgap. This increases to 5 X 10l 1 cm-? eV-' in the lowerhalf of the bandgap. been designed and fabricated. These arrays were processed

1 I



Array Responsivity No.* System Integration Filter Time (,urnResponsivity ) (psec) A 80 3.76-4.79 4.85

D*(cmHz'watt-')** (V/photon) Standard Deviation

0.1 1

FOV*** (eff)

I ~ I O - ~
~xIO-~ ~xIO-~

3.4~10'' 2.5~10'~ 4.7~10'~

3 0 '


0.04 0.06



*Arrays A and C were evaluated at 78K and array B was tested at 67K **This represents an average detectivity of 64 elements except for Array A in which only 32 elements were tested. ***This represents the effective field of view which is corrected for the cold stop efficiency.

detectivity D" is defined as the minimum power that a detector can see for a filter bandwidth (Ax) normalized to detectors with 1-cm' area and amplifiers of 1-Hz bandwidth and is given by [91

where A is the effective detection area of each element, f the bandwidth of the amplifier, Ps the power at the detector, V, the signal voltage, and VN the noisevoltage.The measured D* of 3.4 X 10" cm * Hz'/' W-' at 78 K for array A was also compared to the background-limited detectivity D" (BLIP) which is given by [9]

The quantity h is the Planck constant, c the light velocity, QB the photon flux from the background, and r] the performance efficiency which is the product of the quantumefficiency of a discrete device andthereadout efficiency ofthestructure. The quantum efficiency was determined by the transmission Fig. 6. Photomicrograph of a 64 -element InSb CID line array. of gate metal and peripheral edge collection area. The readout efficiency depends onthe substrate dopant level and gate using n-type InSb single crystal, doped in the low to mid oxide thickness. Thevalue of D & L I ~was ) calculated to be 10'4-cm-3 range. These materials had an etch pit density of 4.9 X IO" cm H Z ~ / ' W-' for arrayA using A = 4.3 pm, r] = less than 100 cm-'. The wafers were chemically polished and 48 percent, and QB = 4.7 X 1014 photons * s-l cm-' for coated with a CVD oxide at 20OoC. The normal field oxide 300 K. It is noted that the average D* of 3.4 X 10" cm thicknesses were 6000 to 10 000 A and the MIS capacitor Hz'/' * W-' measured on array A is approximately 70 percent oxides were 1200 to 1400 A thick. of the value of DTBLIp).No attempt was made to compare the Chromium is used for the semitransparent gate metallization BLIP operation for arrays B and C. and gold used for all lead busses. The transmission of the The responsivity R is a measure of the signal output of a 100-A-thick chromium layer is 50 to 60percent after the low- detector in response to the radiation power impinging on the temperature CVD oxide has been deposited. This transmission detector. It is determined from the relation [8] measurement was made using an IR spectrometer. After the line array waferwas processed, the arrays were R E -VS (3) probed, diced, and a few chips per lot were selected for C-V N P characterization. Fig. 6 shows the latest InSb CID line array chips which has been fabricated for test. This is a 64-element where Np is the total number of signal photons arriving at the linear array with the 65th element being used for a test struc- detector during the integration time and V, is the amplified voltage output. The average responsivities obtained ture. Three arrays were measured with a JFET preamplifier in signal were 1 X 9X and 3 X V/photon for arrays the dewar at 78 K. They were evaluated for detectivity, responsivity, and noise equivalent photons using a computer- A , B , and C, respectively. A responsivity plot for array B is illustrated in Fig. 7. It is noted that the standard deviation of automated test setup [3], [8]. Table I shows the results from the three arrays tested. The the responsivity (u) for array B is only 4 percent.

I3EE T R A N S A C T I O N S O N E L E C T R O N D E V I C E S , V O L . E D - 2 1 , N O .

1, J A N U A R Y 1980



y Responsivi System v5JvN (V photon- )






3.9~10" 1.3~10-~

*These were measured with the following expe:imental setup: Cold Shield = ~ 3 0 " FOV Blackbody Temperature = 780K Watts on Detector (Pd) 2.86xlOYiWatts sec-l Q Incident on Detector = 3.5~10 photon cm-2 &em Gain = 138 ElementArea = 2.55x10-5cm2 Integration Time = 2.3 ms, Sampling rate = 445KH2, A f = 217 Hz **The quantities V S(peak) and VN(RMs) are the peak signal voltage and the root mean square of the noise voltage, respectively.

Fig. 7. Responsivity plot of a 64-element InSb CID line array.


Two-DimensionalArrays The 2D array processing is very similar to that used for the line array. It requires eight levels of photoresist masking but use!$ the same dielectric and metallization depositions. A 32 X 32 2DCID InSb array has been fabricated. This array has a pixel size of 1.7 mils by 2.2 mils on 2.6-mils and 2.8 -mils centers, respectively. Lloyd [9] describes thetestsetupfor the 32 X 32 element array. Fior the characterization of this array, the frame integration tjxne was set at 2.3 ms. This requires a sampling rate of 445 kHz: in the first sample-and-hold circuit. The JFET singleended preamplifier voltage gain and the sampled signalgain totalled 138. For the D" measurement, a 780 K blackbody source and a coolled 4.12-pm narrow-bandpass filter with a 55-percent tran.smission and a 0.12-,am bandwidth were used. The fiiter and 2D array were both attached to the cold finger inside a d'ewar and the measurements were made at77 K. The cold aperturehada diameter of0.5 cm and was 1 cm from the dietector. Thisfield of view results in a background flux of 3.5 X 1013 photons * s-l cm-2 incident on the detector. The input signal radiation through the filter from the blackbody source was calculated to be 2.8 X lo-'' W. Table I1 summarizes the measured results on a 32 X 32 2D array. The measured D* on this 2D array was2.9 X 10" cm Hz''' * W-' and the 17 was 14 percent. This array was measured in the charge-sharing mode [lo] (CSM) which provided a high charge-transfer efficiency but increased the column sense line capacitance and subsequently reduced the array responsivity. Using 17 = 14 percent, QB = 3.5 X l O I 3 photons

Fig. 8. Photomicrograph of a 16 X 64 structure on InSb. The 0.317 X 0.177 in.


chip is

and h = 4.12 pm, the D*(BLP) was calculated to be 9.3 X 10'l cm Hz"' W - l . The value ofthe measured noise equivalent charge(NEC)was 1576 carriers. The dominant noise in this measurement was due to the preamplifier and the second sample-hold circuitry. (A more detailed description of the noise analysis has been reported in [3] . ) Various 2D structures have been fabricated and evaluated for specific applications. An example is shown in Fig. 8 ;a photomicrograph ofa section of a recently processed 16 X 64 structure. VI. SUMMARY Methods of processing and tests of components have been described for devices on InSb. MIS capacitors of low interface state densities and high threshold stability were obtained using low-temperature C V D oxide. CID linear arrays have been shown to operate successfully. Results on 2D arrays havealso been described. In addition, the successful fabrication of p-n junctions and MOSFET's as discussed here has

. cm-2



demonstrated the feasibility of future monolithic integration of shift registers and preamplifier systems.

ACKNOWLEDGMENT The authors wish to thank G. J. Charney, R. Guida, A. D. Hammon, L. Keifer, V. F. Meikleham, and J. B. MacHaffie for their help in processing and assembly work, and M. L. Winn for his design and evaluation of the testelectronics.
[ 11 For example, R. D. Thom, F. J . Renda, W. J. Parrish, and T. L.

[5] [6] [7]

[8] 191 [lo]

Koch, A monolithic InSb charge-coupled infrared imaging device,presented atthe24th IEDM (Washington, DC), Dig. Tech. Papers, pp. 501-504, 1978. [2] R. M. Hoendervoogt, K. A . Kormos, J . P. Rosbeck, J. R. Toman, and C. B. Burgett, Hybrid InSb focal plane array fabricatic a, presented at the 24th IEDM (Washington, DC), Dig. Tech. Papers, pp. 510-512,1978. [ 31 J. C. Kim, InSb charge injection device imaging arrays, ZEEE J.

Solid-state Circuits, vol. SC-13, no. 1, pp. 158-167, 1978; G . J. Michon and H. K. Burke, Charge injection imaging, Dig. Tech. Papers,lnt. Solid-State Circuits Conf.,p. 138,1973. E. A. Taft, Films from the low-temperature oxidation of silane, 1979. accepted for publication in J. Electrochem. SOC., C. N. Berglund, Surface statesat steam-grown siliconsilicon dioxide interfaces, IEEE Trans. Electron Devices, vol. ED-13, pp. 701-705,1966. E. H. Nicollian, A . Goetzberger, and A. D. Lopez, Solid-state Electron., vol. 12,pp. 927-944,1969. J. D. Langan, C. R. Viswanathan, R. D. Thom, C. A. Merilainen, and R. E. Kvaas, Characterization of improved InSb interfaces, presented in the 24th IEDM (Washington, DC), Dig. Tech. Papers, pp. 594-597,1978. W. E. Davern, Continueddevelopment ofindiumantimonide CID arrays, Final Rep., Naval Res. Lab., Contract N00173-77C-0241, July 1978. J. M. Lloyd, Thermal Imaging System. New York: Plenum, 1975, p. 11. M. D. Gibbons, M. Swab, W. E. Davern, and R. W. Aldrich, Status of InSb charge injection device imaging arrays-The charge sharing mode, presented at IRIS Specialty Detectors Meet. (Minneapolis, MN), 1979.


CCD Readout of Infrared Hybrid Focal-Plane Arrays


Abstmct-In this paper, we discuss different modes of coupling photovoltaic detectors to a readout silicon CCD in infrared hybrid arrays, and we analyze, for different types of application, the critical parameters and the relatedstructures. We also give experimental results for the readout of F%o.mSno~Te detectors (sensitive in the 8-12-pm range) operated at 77 K, direct-injection coupled to alinearmultiplexing silicon CCD. The measured injection efficiency (65 percent), the dispersion in detector biasing (15 to 25 mV), amplitude modulation (k15 percent), and the measured equivalent detectivity (>2.101 cm/W are in good agreement with values that were calculated from the characteristics of the detectors and the multiplexing CCD. At present, the equivalent detectivity is limited by the coupling noise current in the MOSFETchannel of each CCD input. An equivalent detectivity of better than 5.1010 isanticipated for 8-12-pm photovoltaic detectors that are operated at 60 K. We also give results for an area hybrid array of 8-12-pm photovoltaic detectors on a silicon CCD. Aspecific detectivityof 2.1010w-1 . cm . Hz112 has been obtained with direct detector readout. A silicon CCD multiplexer has proved to be effective for reading out 8-12-pm infrared photovoltaic detectors (HgCdTe, PbSnTe). It should also be well suited to thereadout of 3-5;um infrared photovoltaic detectors (HgCdTe, InSb, InAsSb). Manuscript received May 21,1979; revised August 16,1979. This work was partially supportedbythe D.R.E.T. (French Ministry of Defense research organization). The authors arewithThomson-CSF, Division Tubes Electroniques, Laboratoire de Recherches Images, 381 20Saint-Egreve, France.


Photovoltaic. Dynamic resistance. Capacitance. Current. Voltage. Photocurrent. Dark current. Signal current. Detector noise current. Specific detectivity. Sensitive area of the detectors.

Input diffusions. Input gate. Storage gate. Transfer gate. Input current(= detector current), Source transconductance of the input MOSFETs. Ratio of channel width to channel length of the input MOSFETs.

0018-9383/80/0100-0175$00.75 0 1980 IEEE