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ON Semiconductort

1.5 A Adjustable Output, Positive Voltage Regulator
The LM317 is an adjustable 3–terminal positive voltage regulator capable of supplying in excess of 1.5 A over an output voltage range of 1.2 V to 37 V. This voltage regulator is exceptionally easy to use and requires only two external resistors to set the output voltage. Further, it employs internal current limiting, thermal shutdown and safe area compensation, making it essentially blow–out proof. The LM317 serves a wide variety of applications including local, on card regulation. This device can also be used to make a programmable output regulator, or by connecting a fixed resistor between the adjustment and output, the LM317 can be used as a precision current regulator. • Output Current in Excess of 1.5 A • Output Adjustable between 1.2 V and 37 V • Internal Thermal Overload Protection • Internal Short Circuit Current Limiting Constant with Temperature • Output Transistor Safe–Area Compensation • Floating Operation for High Voltage Applications • Available in Surface Mount D2PAK, and Standard 3–Lead Transistor Package • Eliminates Stocking many Fixed Voltages

LM317
THREE–TERMINAL ADJUSTABLE POSITIVE VOLTAGE REGULATOR
SEMICONDUCTOR TECHNICAL DATA

T SUFFIX PLASTIC PACKAGE CASE 221A Heatsink surface connected to Pin 2.

1 2 3

Pin 1. Adjust 2. Vout 3. Vin

Standard Application
Vin LM317 Vout R1 240 Adjust + C ** O 1.0 µF

D2T SUFFIX PLASTIC PACKAGE CASE 936 (D2PAK)

1

2 3

IAdj Cin* 0.1 µF

Heatsink surface (shown as terminal 4 in case outline drawing) is connected to Pin 2.

R2

ORDERING INFORMATION
Device LM317BD2T **ĂCin is required if regulator is located an appreciable distance from power supply filter. **ĂCO is not needed for stability, however, it does improve transient response. V outĂ +Ă 1.25ĂVĂ 1 ) LM317BT LM317D2T LM317T Operating Temperature Range TJ = –40° to +125°C TJ = 0° to +125°C Package Surface Mount Insertion Mount Surface Mount Insertion Mount

ǒ

R2 R1

Ǔ

Ă )Ă I

ĂR Adj 2

Since IAdj is controlled to less than 100 µA, the error associated with this term is negligible in most applications.

© Semiconductor Components Industries, LLC, 2002

1

January, 2002 – Rev. 3

Publication Order Number: LM317/D

CAdj.2 0.1 0. VO = 10 V. Changes in V O due to heating effects must be taken into account separately.0 V ≤ VI–VO ≤ 40 V. Junction–to–Case Case 936 (D2PAK) TA = +25°C Thermal Resistance.5 A.2 1. http://onsemi. when used. PD ≤ Pmax Reference Voltage. T Package VI–VO = 40 V. Since Long–Term Stability cannot be measured on each device before shipment. is connected between the adjustment pin and ground.0 V Temperature Stability (Tlow ≤ TJ ≤ Thigh) Minimum Load Current to Maintain Regulation (VI–VO = 40 V) Maximum Output Current VI–VO ≤ 15 V. Junction–to–Ambient Thermal Resistance. °C/W – 2.07 mV % VO % VO/W µA µA V %V Min – Typ 0.3 5.04 Unit %/V NOTES: 1. BD2T. 3. 5.0 0.LM317 MAXIMUM RATINGS Rating Input–Output Voltage Differential Power Dissipation Case 221A TA = +25°C Thermal Resistance. TA = +25°C. Power dissipation within an IC voltage regulator produces a temperature gradient on the die. 3. % of VO.0 Internally Limited 70 5. Imax = 1.0 V ≤ VI–VO ≤ 40 V Load Regulation (Note 3). 2 3 1 2 Figure 1 2 Symbol Regline Regload – – Regtherm IAdj ∆IAdj Vref Regline Regload – – 3 3 3 TS ILmin Imax 1. Tlow to Thigh = –40° to +125°C.0 – – 1.0 V Thermal Regulation. TA = +25°C for Endpoint Measurements Thermal Resistance Junction to Case.5 – 10 mV % VO % VO mA A – – – 1.003 – – – % VO dB – – 20 0.02 25 0. TA = +25°C (Note 6).0 V.0 – %/1.com 2 . 10 mA ≤ IO ≤ Imax VO ≤ 5. Imax and Pmax [Note 2]. TA = +25°C.3 0. PD ≤ Pmax. for LM317T.4 0.0 V VO ≥ 5. Pulse testing with low duty cycle is used.0 V VO ≥ 5.7 3. 10 Hz ≤ f ≤ 10 kHz Ripple Rejection. T Package 4 3 1.15 N RR – 66 3 S RθJC – – 65 80 0. 2. this specification is an engineering estimate of average stability from lot to lot.0 k Hrs.5 A for D2T and T packages. affecting individual IC components on the die. for LM317BT. Junction–to–Case Operating Junction Temperature Range Storage Temperature Range Symbol VI–VO Value 40 Unit Vdc PD θJA θJC PD θJA θJC TJ Tstg Internally Limited 65 5. TJ = Thigh (Note 5). 6. T Package RMS Noise. IO = 0.01 Max 0.5 0. Tlow to Thigh = 0° to +125°C.3 0. These effects can be minimized by proper integrated circuit design and layout techniques.) Characteristics Line Regulation (Note 3). 10 mA ≤ IO ≤ Imax VO ≤ 5. Load and line regulation are specified at constant junction temperature. unless otherwise noted. TA = +25°C.0 1. Thermal Regulation is the effect of these temperature gradients on the output voltage and is expressed in percentage of output change per watt of power change in a specified time.5 0.2 – 5. 2.5 70 1.03 50 0. f = 120 Hz (Note 4) Without CAdj CAdj = 10 µF Long–Term Stability. Pmax = 20 W 3.25 0. 4. 20 ms Pulse Adjustment Pin Current Adjustment Pin Current Change. 3.5 V ≤ VI–VO ≤ 40 V. Junction–to–Ambient Thermal Resistance. TJ = Tlow to Thigh [Note 1].0 –40 to +125 –65 to +150 W °C/W °C/W W °C/W °C/W °C °C ELECTRICAL CHARACTERISTICS (VI–VO = 5.0 V ≤ VI–VO ≤ 40 V Load Regulation (Note 3). 10 mA ≤ IO ≤ Imax.07 100 5. PD ≤ Pmax. TA = +25°C. PD ≤ Pmax Line Regulation (Note 3). 10 mA ≤ IL ≤ Imax. D2T.

3V 170 6.8k 110 5.6k 30 pF 6.6k 5. *Ă1% Duty Cycle *Ăis suggested.4k 12. LM317 Adjust Cin 0.0 0.1 Vout Adjust This device contains 29 active transistors.7k 125k 135 12.0pF 6.1k 30 pF 2.8k 510 160 200 13k 6.1 µF IAdj R2 1% LineĂRegulationĂ(%ńV)Ă +Ă Vout |V ćV | OH OL xĂ100 |V | OL VOH VOL R1 240 1% CO + 1.0 µF RL Figure 1.4k 12k 5.3V 31 0 310 230 120 5.com 3 .LM317 Representative Schematic Diagram Vin 6.5k 105 4.3V 190 3. VCC * VIH VIL Vin *ĂPulse testing required. Line Regulation and ∆IAdj/Line Test Circuit http://onsemi.

1 µF R1 240 1% D1* 1N4002 CO + 1.0 µF RL VO ISET R2 1% * Pulse testing required.VO (max Load) Load Regulation (% VO) = VO (min Load) .65 k 1% CAdj + 10 µF *ĂD1 Discharges CAdj if output is shorted to Ground.1 µF IAdj R1 240 1% CO R2 1% *ĂPulse testing required. * 1% Duty Cycle is suggested.0 µF RL VO Vout = 10 V R2 1. Load Regulation (mV) = VO (min Load) . Ripple Rejection Test Circuit http://onsemi.1 µF IAdj R1 240 1% Vref CO + 1. *Ă1% Duty Cycle is suggested.250 V To Calculate R2: Assume ISET = 5. Load Regulation and ∆IAdj/Load Test Circuit Vin LM317 Vout IL Adjust VI Cin 0.VO (max Load) VO (min Load) x 100 Figure 2.25 mA Figure 3.0 µF VO (min Load) VO (max Load) RL (min Load) Adjust Cin 0.LM317 VI Vin LM317 Vout IL RL (max Load) + * 1.com 4 . Figure 4. To Calculate R2: Vout = ISET R2 + 1. Standard Test Circuit 24 V 14 V f = 120 Hz Vin LM317 Vout Adjust Cin 0.

0 ∆ Vout. Load Regulation Figure 6. Minimum Operating Current http://onsemi. OUTPUT CURRENT (A) 0.0 3.2 0 -0.25 1.5 4. ADJUSTMENT PIN CURRENT ( µA) 70 65 60 55 50 45 40 35 -50 -25 0 25 50 75 100 125 150 V in-Vout.0 2. Adjustment Pin Current Figure 8. QUIESCENT CURRENT (mA) 5.2 -0.23 1.5 200 mA 20 mA -50 -25 0 25 50 75 100 125 150 TJ.0 4.0 A 500 mA 1.24 1. INPUT-OUTPUT VOLTAGE DIFFERENTIAL (Vdc) TJ = -55°C +25°C +150°C 1. Dropout Voltage 1.0 1. Current Limit 3.5 3.0 I Adj.0 TJ. REFERENCE VOLTAGE (V) IB.5 A IL = 0.0 0 0 10 20 30 Vin-Vout.com 5 .5 A 2.5 1.5 A 3. JUNCTION TEMPERATURE (°C) Figure 7.0 -50 -25 0 25 50 75 100 TJ. Temperature Stability Figure 10.5 2. JUNCTION TEMPERATURE (°C) 125 150 Vin = 15 V Vout = 10 V IL = 1.8 -1.22 Figure 9. INPUT-OUTPUT VOLTAGE DIFFERENTIAL (Vdc) 40 Figure 5. JUNCTION TEMPERATURE (°C) 1.4 -0.4 I out . OUTPUT VOLTAGE CHANGE (%) 0.0 150°C 55°C 1.5 IL = 1.26 Vref. INPUT-OUTPUT VOLTAGE DIFFERENTIAL (Vdc) ∆Vout = 100 mV 2. JUNCTION TEMPERATURE (°C) 150 0 0 10 20 30 40 Vin-Vout.6 -0.LM317 4.5 -50 -25 0 25 50 75 100 125 TJ.0 1.0 TJ = 25°C 2.0 0.

0 M 100 10-1 CAdj = 10 µF Without CAdj 10 100 1. TIME (µs) 30 40 CL = 1.5 0 CL = 0.0 M 10 M f. OUTPUT CURRENT (A) CAdj = 10 µF Without CAdj 0 0. CAdj = 10 µF Vin = 15 V Vout = 10 V INL = 50 mA TJ = 25°C IL 0 10 20 t. Ripple Rejection versus Output Current 100 RR.01 Vout.0 2.5 1.0 10 IO. Without CAdj -0.0 0.0 k 10 k 100 k 1.5 ∆V in .0 k 10 k 100 k 1.5 1.5 0 Vout = 10 V IL = 50 mA TJ = 25°C Vin 0 10 20 t. RIPPLE REJECTION (dB) 80 60 40 20 0 IL = 500 mA Vin = 15 V Vout = 10 V TJ = 25°C Z O.5 1. RIPPLE REJECTION (dB) 80 60 40 20 0 Vin . RIPPLE REJECTION (dB) RR. Line Transient Response IL .0 -1. LOAD CURRENT (A) CL = 0.Vout = 5 V IL = 500 mA f = 120 Hz TJ = 25°C 0 5.0 µF. Ripple Rejection versus Output Voltage Figure 12. INPUT VOTLAGE CHANGE (V) -1.0 1. OUTPUT VOLTAGE DEVIATION (V) 3.com 6 .1 1. FREQUENCY (Hz) f.5 0 Figure 15.0 10 15 20 25 30 35 Without CAdj 120 100 80 60 40 20 Vin = 15 V Vout = 10 V f = 120 Hz TJ = 25°C 0.0 0. OUTPUT IMPEDANCE (ą) Ω 101 Vin = 15 V Vout = 10 V IL = 500 mA TJ = 25°C Without CAdj 10-2 CAdj = 10 µF 10-3 10 100 1. OUTPUT VOLTAGE (V) Figure 11. CAdj = 10 µF -1. Load Transient Response http://onsemi.LM317 100 CAdj = 10 µF RR.0 -3.0 1.0 -2. Without CAdj Figure 16.0 0 CL = 1. Ripple Rejection versus Frequency Figure 14.0 µF. FREQUENCY (Hz) Figure 13. OUTPUT VOLTAGE DEVIATION (V) ∆Vout . Output Impedance ∆Vout . TIME (µs) 30 40 1.0 0.

Since the LM317 is a floating regulator. For best performance. CAdj > 10 µF). the output voltage will rise. In operation. but a few precautions are needed to obtain maximum performance.com 7 . certain values of external capacitance can cause excessive ringing. and this constant current flows through R2 to ground. Diode D1 prevents CO from discharging thru the IC during an input short circuit. and operation at high voltages with respect to ground is possible.1 µF disc or 1. the LM317 develops and maintains a nominal 1. Although the LM317 is stable with no output capacitance. The regulated output voltage is given by: R V outĂ +Ă V Ă 1 ) 2 Ă )Ă I ĂR 2 ref Adj R1 ǒ Ǔ Since the current from the adjustment terminal (IAdj) represents an error term in the equation. If the load current is less than this minimum.LM317 APPLICATIONS INFORMATION Basic Circuit Operation External Capacitors The LM317 is a 3–terminal floating regulator.25 V Typical R2 Vout Vin 1N4002 LM317 Cin Adjust R2 CAdj Vout R1 + D2 CO Figure 17. D1 IAdj Vref = 1. The combination of diodes D1 and D2 prevents CAdj from discharging through the IC during an input short circuit. thereby degrading regulation. all quiescent operating current is returned to the output terminal. the programming resistor (R1) should be connected as close to the regulator as possible to minimize line drops which effectively appear in series with the reference. Vin LM317 Vout + Vref R1 IPROG Vout A 0. The ground end of R2 can be returned near the load ground to provide remote ground sensing and improve load regulation. The adjustment terminal may be bypassed to ground to improve ripple rejection. Figure 18 shows the LM317 with the recommended protection diodes for output voltages in excess of 25 V or high capacitance values (CO > 25 µF. the LM317 was designed to control IAdj to less than 100 µA and keep it constant. A 10 µF capacitor should improve ripple rejection about 15 dB at 120 Hz in a 10 V application. An output capacitance (CO) in the form of a 1. Basic Circuit Configuration Load Regulation The LM317 is capable of providing extremely good load regulation. like any feedback circuit.25 V reference (Vref) between its output and adjustment terminals. This imposes the requirement for a minimum load current.0 µF tantalum input bypass capacitor (Cin) is recommended to reduce the sensitivity to input line impedance. To do this. This reference voltage is converted to a programming current (IPROG) by R1 (see Figure 17). Protection Diodes Adjust When external capacitors are used with any IC regulator it is sometimes necessary to add protection diodes to prevent the capacitors from discharging through low current points into the regulator. Voltage Regulator with Protection Diodes http://onsemi. Diode D2 protects against capacitor CAdj discharging through the IC during an output short circuit.0 µF tantalum or 25 µF aluminum electrolytic capacitor on the output swamps this effect and insures stability. 1N4002 Figure 18. This capacitor (CAdj) prevents ripple from being amplified as the output voltage is increased. it is only the voltage differential across the circuit which is important to performance.

0 oz.0 µF Tantalum Q1 2N3822 Figure 20.0 k Adjust 2 Voltage Adjust 1N4001 D3 D4 -10 V Q2 2N5640 -10 V IN4001 Output Range:ă0 ≤ VO ≤ 25 V Output Range:ă0 ≤ IO ≤ 1.0 30 Figure 19. 1. D2PAK Thermal Resistance and Maximum Power Dissipation versus P.1 µF Adjust 1 Current Limit Adjust * Diodes D1 and D2 and transistor Q2 are added to * allow adjustment of output voltage to 0 V.B.C. MAXIMUM POWER DISSIPATION (W) 80 R θ JA.5 A D5 IN4001 + 10 µF Iout Vout + 1.0K LM317 (1) Vout1 RSC Vin2 LM317 (2) Vout 2 240 D1 1N4001 D2 1N4001 5.0 L ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ 2. LENGTH OF COPPER (mm) 3. Copper L 25 2.LM317 PD(max) for TA = +50°C Free Air Mounted Vertically Minimum Size Pad PD.com 8 .5 1. ‘‘Laboratory’’ Power Supply with Adjustable Current Limit and Output Voltage http://onsemi.0 1.5 3.5 2.0 10 15 20 L. Copper Length D6* 1N4002 Vin 32 V to 40 V Vin1 0. THERMAL RESISTANCE JUNCTIONĆTOĆAIR (° C/W) 70 60 50 40 RθJA 30 0 5. * D6 protects both LM317's during an input short circuit.

ILmin .IDSS < IO < 1. R1 = Vref IOmax + IDSS R2 ≤ Vref IDDS VSS* Iout Vin D1 1N4001 D2 1N4001 2N5640 D1* 1N4002 LM317 120 Adjust 720 Vout + 1.0 k TTL Control Minimum Vout = 1. Current Regulator http://onsemi. the source of the FET must be tied to a * negative voltage below .25 V + VSS. VO < BVDSS + 1.com 9 .1. As shown 0 < IO < 1.0 V Electronic Shutdown Regulator Vin LM317 Vout 240 1N4001 50 k MPS2907 + 10 µF Vin LM317 Vout R1 Iout Adjust R2 Adjust IAdj ref Ă )Ă I Ă Adj R1 +Ă 1.25 V * D1 protects the device during an input short circuit. 5.5 A.0 µF MPS2222 1.5 A I outĂ +Ă ǒ Ǔ V Figure 23.LM317 +25 V Vin LM317 Adjust Vout R1 1. Adjustable Current Limiter Figure 22.25 V. Slow Turn–On Regulator Figure 24.25ĂVĂ R1 10 mA ≤ Iout ≤ 1.0 A. Figure 21.25 R2 100 * To provide current limiting of IO to the system * ground.

00 1.27 1. 1982.088 0.000 0.116 REF 0.539 0.120 0.210 0.190 0.010 (0.27 1.52 4.318 4. DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.000 0. 2.160 0. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A AND K.295 REF 2.54 3.254) M T G N R L P C DIM A B C D E F G H J K L M N P R S U V http://onsemi.04 –T– B 4 SEATING PLANE F T S C Q 1 2 3 A U K H Z L V G D N R J D2T SUFFIX PLASTIC PACKAGE CASE 936–03 (D2PAK) ISSUE B OPTIONAL CHAMFER A E –T – TERMINAL 4 U K B S V H F 1 2 3 NOTES: 1.691 14.060 0.055 0.579 0.380 0.095 0.080 MIN 6.15 1.143 1.07 4.050 0.368 0.058 0.64 12.73 2.045 ----0.235 0.142 0.235 2.28 4.635) MAXIMUM.5M.39 5.170 0.102 0.100 0. 3.010 0.80 3.46 0.15 ----2. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH OR GATE PROTRUSIONS.47 0. CONTROLLING DIMENSION: INCH.66 10. 2.055 0.804 10.572 0.42 2.236 9.620 0.042 9.397 1.045 0.190 0.051 REF 0. 4.82 0.660 0.356 0.018 0.080 MILLIMETERS MIN MAX 14.100 BSC 0.405 0. INCHES MIN MAX 0.79 1.570 0.045 0.66 2.540 BSC 13.981 5 _ REF 2.88 3.403 0.591 0. DIMENSIONS U AND V ESTABLISH A MINIMUM MOUNTING SURFACE FOR TERMINAL 4.660 1.93 0.025 0. 5. DIMENSIONING AND TOLERANCING PER ANSI Y14.70 14.97 6.5M.036 0.386 0.180 0. 1982.018 0.254 2.914 1.026 0.110 0. DIMENSIONING AND TOLERANCING PER ANSI Y14.707 3.04 2.155 0.175 MAX 1.347 4.83 5.33 2.562 0.045 0.035 0.025 0.255 0.75 9. CONTROLLING DIMENSION: INCH.105 0.64 0.457 0.473 1.025 (0. MOLD FLASH AND GATE PROTRUSIONS NOT TO EXCEED 0.LM317 PACKAGE DIMENSIONS T SUFFIX PLASTIC PACKAGE CASE 221A–09 ISSUE AA NOTES: 1.350 MIN M J D 0.946 REF 5.147 0.000 0.04 2.200 MIN 0. 3.48 15.026 0.270 REF 0.250 MIN MILLIMETERS MIN MAX 9.080 0.500 0.110 0.com 10 .125 MAX 0.078 5 _ REF 0.050 REF 0.61 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED.15 1.

com 11 .LM317 Notes http://onsemi.

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