74VHC74  74VHCT74 Dual D-Type Flip Flop with Preset and Clear

October 1995

74VHC74  74VHCT74 Dual D-Type Flip Flop with Preset and Clear
General Description
The VHC VHCT74 is an advanced high speed CMOS Dual D-Flip Flop fabricated with silicon gate CMOS technology It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation The signal level applied to the D INPUT is transferred to the Q OUTPUT during the positive going transition of the CK pulse CLR and PR are independent of the CK and are accomplished by setting the appropriate input low An input protection circuit ensures that 0V to 7V can be applied to the input pins without regard to the supply voItage This device can be used to interface 5V to 3V systems and two supply systems such as battery backup This circuit prevents device destruction due to mismatched supply and input voltages

Features
High noise immunity VHC VNIH e VNIL e 28% VCC (min) VHCT VIH e 2 0V VIL e 0 8V Y Power down protection VHC inputs only VHCT inputs and outputs Y Low power dissipation ICC e 2 mA (max) at TA e 25 C Y Balanced propagation delays t PLH j tPHL NOTE ADD EXTERNAL PULL UP RESISTOR TO ’VHCT OUTPUTS TO DRIVE CMOS INPUTS
Y

Commercial 74VHC74M 74VHC74SJ 74VHC74MSC 74VHC74MTC 74VHC74N 74VHCT74M 74VHCT74SJ 74VHCT74MTC 74VHCT74N

Package Number M14A M14D MSC14 MTC14 N14A M14A M14D MTC14 N14A

Package Description 14-Lead Molded JEDEC SOIC 14-Lead Molded EIAJ SOIC 14-Lead Molded EIAJ Type 1 SSOP 14-Lead Molded JEDEC Type 1 TSSOP 14-Lead Molded DIP 14-Lead Molded JEDEC SOIC 14-Lead Molded EIAJ SOIC 14-Lead Molded JEDEC Type 1 TSSOP 14-Lead Molded DIP

Note Surface mount packages are also available on Tape and Reel Specify by appending the suffix letter ‘‘X’’ to the ordering code EIAJ Type 1 SSOP available on Tape and Reel only Order MSCX

Logic Symbol
IEEE IEC

Connection Diagram
Pin Assignment for DIP SSOP TSSOP and SOIC Pin Names D1 D2 CK1 CK2 CLR1 CLR2 PR1 PR2 Q1 Q1 Q2 Q2
TL F 11505–1 TL F 11505 – 2

Description Data Inputs Clock Pulse Inputs Direct Clear Inputs Direct Preset Inputs Outputs

Inputs CLR L H L H H H
C1995 National Semiconductor Corporation

Outputs D X X X L H X CK X X X Q L H H L H Qn Q H L H H L Qn

Function Clear Preset

PR H L L H H H

No Change

TL F 11505

RRD-B30M125 Printed in U S A

Absolute Maximum Ratings (Note 1) Supply Voltage (VCC) DC Input Voltage (VIN) DC Output VoItage (VOUT) VHC VHCT Input Diode Current (IIK) Output Diode Current (IOK) VHC VHCT DC Output Current (IOUT) DC VCC GND Current (ICC) Storage Temperature (TSTG) Lead Temperature (TL) Soldering (10 seconds) VOUT l VCC only if output is in H state b 0 5V to a 7 0V b 0 5V to a 7 0V b 0 5V to VCC a 0 5V b 0 5V to 7 0V b 20 mA g 20 mA Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired The databook specifications should be met without exception to ensure that the system design is reliable over its power supply temperature and output input loading varaibles National does not recommend operation outside databook specifications b 20 mA g 25 mA g 50 mA Recommended Operating Conditions Supply Voltage (VCC) VHC VHCT Input Voltage (VIN) Output Voltage (VOUT) Operating Temperature (TOPR) 74VHC VHCT Input Rise and Fall Time (tr tf) VCC e 3 3V g 0 3V (VHC only) VCC e 5 0V g 0 5V 2 0V to 5 5V 4 5V to 5 5V 0V to a 5 5V 0V to VCC b 40 C to a 85 C b 65 C to a 150 C 260 C 0 E 100 ns V 0 E 20 ns V DC Characteristics for ’VHC Family Devices 74VHC Symbol Parameter VCC (V) Min VIH VIL VOH High Level Input Voltage Low Level Input Voltage High Level Output Voltage 20 3 0–5 5 20 3 0–5 5 20 30 45 30 45 VOL Low Level Output Voltage 20 30 45 30 45 IIN ICC Input Leakage Current Quiescent Supply Current 0–5 5 55 19 29 44 2 58 3 94 00 00 00 01 01 01 0 36 0 36 g0 1 74VHC TA e b40 C to a 85 C Max Min 1 50 0 7 VCC 0 50 0 3 VCC 0 50 0 3 VCC 19 29 44 2 48 3 80 01 01 01 0 44 0 44 g1 0 TA e 25 C Typ Units Conditions Max V V VIN e VIH or VIL IOH e b50 mA 1 50 0 7 VCC 20 30 45 V V VIN e VIH or VIL IOH e b4 mA IOH e b8 mA IOL e 50 mA V V mA mA IOL e 4 mA IOL e 8 mA VIN e 5 5V or GND VIN e VCC or GND 20 20 0 2 .

DC Characteristics for ’VHCT Family Devices 74VHCT Symbol Parameter VCC (V) Min VIH High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current Quiescent Supply Current Maximum ICC Input Output Leakage Current (Power Down State) 45 55 45 55 45 45 45 45 0–5 5 55 55 3 15 25 00 01 0 36 g0 1 74VHCT TA e b40 C to a 85 C Min 20 20 08 08 08 08 3 15 24 01 0 44 g1 0 TA e 25 C Typ Max Units Conditions Max V 20 20 VIL V VIN e VIH or VIL VIN e VIH or VIL IOH e b50 mA IOH e b8 mA IOL e 50 mA IOL e 8 mA VOH 3 65 V VOL V mA mA mA IIN ICC ICCT IOPD VIN e 5 5V or GND VIN e VCC or GND VIN e 3 4V Other Inputs e VCC or GND VOUT e 5 5V 20 1 35 20 0 1 50 00 a0 5 a5 0 mA 3 .

AC Electrical Characteristics for ’VHC 74VHC Symbol Parameter VCC (V) Min fMAX Maximum Clock Frequency 33g03 80 50 50g05 130 90 tPLH tPHL Propagation Delay Time (CK-Q Q) 33g03 TA e 25 C Typ 125 75 170 115 67 92 50g05 46 61 tPLH tPHL Propagation Delay Time (CLR PR-Q Q) 50g05 33g03 76 10 1 48 63 CIN CPD Input Capacitance Power Dissipation Capacitance 4 25 11 9 15 4 73 93 12 3 15 8 77 97 10 Max 74VHC TA e b40 C to a 85 C Min 70 45 110 75 10 10 10 10 10 10 10 10 14 0 17 5 85 10 5 14 5 18 0 90 11 0 10 pF pF ns ns ns ns MHz Max MHz CL e 15 pF CL e 50 pF CL e 15 pF CL e 50 pF CL e 15 pF CL e 50 pF CL e 15 pF CL e 50 pF CL e 15 pF CL e 50 pF CL e 15 pF CL e 50 pF VCC e Open (Note 1) Units Conditions Note 1 CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load Average operating current can be obtained from the equation ICC (opr ) e CPD VCC fIN a ICC 2 (per F F) AC Operating Requirements for ’VHC 74VHC Symbol Parameter VCC (V) TA e 25 C Typ tW(L) tW(H) tW(L) tS tH trem Minimum Pulse Width (CK) Minimum Pulse Width (CLR PR) Minimum Setup Time Minimum Hold Time Minimum Removal Time (CLR PR) 33 50 33 50 33 50 33 50 33 50 74VHC TA e b40 C to a 85 C Units Conditions Guaranteed Minimum 60 50 60 50 60 50 05 05 50 30 70 50 70 50 70 50 05 05 50 30 ns ns ns ns ns VCC is 3 3 g 0 3V or 5 0 g 0 5V 4 .

AC Electrical Characteristics for ’VHCT 74VHCT Symbol Parameter VCC (V) Min fMAX Maximum Clock Frequency Propagation Delay Time (CK-Q Q) Propagation Delay Time (CLR PR-Q Q) Input Capacitance Power Dissipation Capacitance 50 50 50 50 50 50 100 80 TA e 25 C Typ 160 140 58 63 76 81 4 24 78 88 10 4 11 4 10 Max Min 80 65 10 10 10 10 90 10 0 12 0 13 0 10 pF pF ns ns 74VHCT TA e b40 C to a 85 C Max MHz CL e 15 pF CL e 50 pF CL e 15 pF CL e 50 pF CL e 15 pF CL e 50 pF VCC e Open (Note 1) Units Conditions tPLH tPHL tPLH tPHL CIN CPD VCC is 5 0 g 0 5V Note 1 CPD is defined as the value of internal equivalent capacitance which is calculcated from the operating current consumption without load Average operating current can be obtained by the equation ICC (opr) e CPD c VCC c fIN a ICC 2 (per flip-flop) AC Operating Requirements for ’VHCT 74VHCT Symbol Parameter VCC (V) TA e 25 C Typ tW(L) tW(H) tW(L) tS tH trem Minimum Pulse Width (CK) Minimum Pulse Width (CLR PR) Minimum Setup Time Minimum Hold Time Minimum Removal Time (CLR PR) 50g05 50g05 50g05 50g05 50g05 74VHCT TA e b40 C to a 85 C Guaranteed Minimum 50 50 50 0 35 50 50 0 35 ns ns ns ns ns Units Conditions 5 .

Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows TL F 11505 – 5 6 .

7 .

Physical Dimensions inches (millimeters) 14-Lead Small Outline Integrated Circuit JEDEC (M) Order Number 74VHC74M 74VHC74MX 74VHCT74M or 74VHCT74MX NS Package Number M14A 14-Lead Small Outline Package .EIAJ (SJ) Order Number 74VHC74SJ 74VHC74SJX 74VHCT74SJ or 74VHCT74SJX NS Package Number M14D 8 .

Physical Dimensions millimeters (Continued) 14-Lead Plastic EIAJ SSOP Type 1 (MSC) Order Number 74VHC74MSCX NS Package Number MSC14 14-Lead Plastic JEDEC TSSOP Type 1 (MTC) Order Number 74VHC74MTC 74VHC74MTCX 74VHCT74MTC or 74VHCT74MTCX NS Package Number MTC14 9 .

74VHC74  74VHCT74 Dual D-Type Flip Flop with Preset and Clear Physical Dimensions inches (millimeters) (Continued) 14-Lead Molded Dual In-Line Package Order Number 74VHC74N or 74VHCT74N NS Package Number N14A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Europe Fax (a49) 0-180-530 85 86 Email cnjwge tevm2 nsc com Deutsch Tel (a49) 0-180-530 85 85 English Tel (a49) 0-180-532 78 32 Fran ais Tel (a49) 0-180-532 93 58 Italiano Tel (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications .

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