Unit 1: Analog CMOS Design

 What are the advantages of cascade amplifier? Draw the diagram of standard cascade & high swing cascade and explain its voltage transfer curve?  Explain classical two stage CMOS op-amp with the help of diagram.  Draw & explain all types of CMOS inverters. Also draw the small signal models for them.  Differentiate three types of CMOS inverters w. r. t. gain, B.W. and Rout.  Draw schematic & explain various types of CMOS differential amplifiers.  Draw the equivalent circuit of MOSFET as non ideal switch. Explain all components.  Explain MOS device as resistor and diode with the help of equivalent diagram.  With schematic diagram & I – V characteristics explain Current Sink and Current Source. What are voltage compliances? How to improve them?  write short note on ---1) Source follower 2) common source amplifier 3) common gate amplifier 4) common drain amplifier  Explain different wire & device parasitic. How do these put limitations on the design with CMOS?

Unit 2: Digital CMOS Design
 Draw voltage transfer characteristics of CMOS inverter and explain different regions of operation of NMOS and PMOS transistor.  Write short note on 1) Body Effect 2) Power delay product 3) Hot electron

effect 4) velocity saturation 5) Noise Margin  What is Static, Dynamic and Short circuit Power dissipation in CMOS? Derive the expression for Total Power dissipation. What are the components which makes the power dissipation in the circuits?  What is technology scaling? Explain three ways of scaling the devices.  Explain different Design Rule Check in terms of λ- parameters.  What is DRC? Explain in detail Design Rules in CMOS VLSI design.  Explain, why the ratio of βn / βp should be equal to be one for CMOS inverter?  Draw 8:1 Multiplexer using transmission gates. Compare this schematic with conventional design.

 Write the specifications of the devices 1) FPGA 2) CPLD  What is necessity of PLDs? Write the applications of CPLD.  Explain the following terms 1) CLB 2) UCF 3) GRM 4) EDIF  Explain the logic implemented in FPGA & logic implemented in CPLD. Explain logical and physical faults in detail. PAL. PLA. FPGA and ASIC.  Explain different types of memories. CPLD. FPGA and ASIC.  Write short note on JTAG .  What is Test Access Port? Draw and explain the state diagram of TAP controller.  Why there is need of Design for Testability? Explain Controllability.  Define fault coverage.  What is Built in Self Test? Explain self test circuit for RAM.Unit 4: Programmable Logic Devices (PLDs)  Compare EPROM. What factors are considered to make a choice in between them?  Draw the block diagram & Explain architecture of 1) CPLD 2) FPGA in detail.  Explain partial and full scan check. Unit 5: Fault tolerance and testability  What are the stuck open and stuck short faults? Also explain stuck at 1 and stuck at 0 faults with an examples.  What is need of Boundary scan check? Explain boundary scan architecture.  Explain the features & limitations of CPLD and FPGA devices. Observability and Predictability with the help of example.  Explain with diagram SRAM & Antifusable Generic FPGA architecture.

 What is the wire parasitic? How it affect the performance in the VLSI design?  Explain different Signal Integrity issues. output pad design and 3-state pad design in chip.  Explain input pad design. 1) wait statements 2) Generate statement 3) Procedure 4) Functions 5) Configuration 6) operator overloading  What is test bench? With VHDL code Explain synthesizable and Nonsynthesizable test bench.  Explain interconnect Routing Techniques.  . Write short note on Unit 6: Signal Integrity and System on Chip 1) Clock jitter 4) Clock Skew 2) EMI immune chip design 5) Supply and Ground bounce. 3) Off Chip connections  What are the different Clock distribution techniques available for the VLSI design?  Explain Power distribution and Power optimization techniques. Unit 3: VHDL and Finite State Machines  Write short note on Metastability.  Explain the following used in VHDL with the help of suitable examples.

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