# Code No: RR210202

Set No. 1

II B.Tech I Semester Supplementary Examinations, February 2007 PULSE AND DIGITAL CIRCUITS ( Common to Electrical & Electronic Engineering, Electronics & Communication Engineering, Electronics & Telematics and Electronics & Computer Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ⋆⋆⋆⋆⋆ 1. (a) Verify V1 =
V 1+ e− T /2RC

V1 =

V 1+eT / 2RC

(ﬁgure1a)

Figure 1a For a symmetrical square wave applied to a high pass RC circuit.

[10]

(b) Draw the RC high pass circuit and explain its working with step voltage input. [6] 2. (a) Give the circuits of series clipper circuits and explain their operation with the help of transfer characteristics. [8] (b) For the circuit shown in the ﬁgure 2b : sketch the input and output waveforms if R = 1 KΩ [8]

Figure 2b VR = 10 V, Vi = 20 Sin ωt Rf = 100 Ω Rr =∝ Vγ = 0 3. (a) Describe the switching times of BJT by considering the charge distribution across the base region. Explain this for cut oﬀ, active and saturation regions. [8] (b) Deﬁne the following terms: 1 of 2

Code No: RR210202 i. ii. iii. iv. storage time delay time rise time fall time.

Set No. 1

[8]

4. Explain how to draw the various waveforms and calculate their volatage levels in an emitter-coupled monostable multi. [16] 5. Design a sweep circuit using UJT with η = 0.5. The sweep amplitude is to be 10V, the sweep duration is 1 msec. and the sweep-speed error is 10%. Select suitable values of VBB , Vyy , R and C. Estimate the recovery time. [16] 6. (a) Explain the principle of “synchronization” and ‘synchronization with frequency division’. [8] (b) Explain the method of pulse synchronization of relaxation devices, with examples. [8] 7. (a) Illustrate with neat circuit diagram, the operation of unidirectional sampling gate for multiple inputs. [8] (b) Explain with circuit diagram the operation of a two input sampling gate which does not have any loading eﬀect on control signal. [8] 8. (a) Compare the diode controlled and RC controlled astable operated blocking oscillator. [6] (b) What are the advantages of RC controlled oscillator? (c) List the applications of blocking oscillators. ⋆⋆⋆⋆⋆ [4] [6]

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Code No: RR210202

Set No. 2

II B.Tech I Semester Supplementary Examinations, February 2007 PULSE AND DIGITAL CIRCUITS ( Common to Electrical & Electronic Engineering, Electronics & Communication Engineering, Electronics & Telematics and Electronics & Computer Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ⋆⋆⋆⋆⋆ 1. (a) A pulse is applied to a low-pass RC circuit. Prove by direct integration that the area under the pulse is same as the area under the output waveform across the capacitor. Explain the result. [10] (b) Write a short notes on Highpass RC circuit as a diﬀerentiator. [6]

2. (a) Give the circuits of series clipper circuits and explain their operation with the help of transfer characteristics. [8] (b) For the circuit shown in the ﬁgure 2b : sketch the input and output waveforms if R = 1 KΩ [8]

Figure 2b VR = 10 V, Vi = 20 Sin ωt Rf = 100 Ω Rr =∝ Vγ = 0 3. (a) Describe the switching times of BJT by considering the charge distribution across the base region. Explain this for cut oﬀ, active and saturation regions. [8] (b) Deﬁne the following terms: i. ii. iii. iv. storage time delay time rise time fall time.

[8]

4. (a) What is meant by blocked condition of an stable multi ? Explain when it occurs? Draw the circuit of the free running multi that cannot block. [8] (b) Show that the period of oscillation of the above non-blocking freerunning multi is T=2RC ln2, if all the forward bias junction voltages are neglected. [8] 1 of 2

Code No: RR210202

Set No. 2

5. (a) Write important applications of time-base circuits. With reference to time base circuits deﬁne the following terms: [8] i. Flyback time ii. Transmission error. (b) What is meant by triggered sweep? What are the merits and demerits of triggered sweep circuits. [8] 6. (a) Explain the principle of “synchronization” and ‘synchronization with frequency division’. [8] (b) Explain the method of pulse synchronization of relaxation devices, with examples. [8] 7. (a) Distinguish between logic gate and sampling gate. (b) Why is a sampling referred as a linear gate? [4] [4]

(c) Illustrate the principle of operation of a linear gate using series switch and shunts witch. What are the disadvantages? [8] 8. Explain with neat circuit diagram of triggered blocking oscillator with emitter timing. Draw the equivalent circuit and show the current and voltage waveforms. Derive an expression for current pulse width. [16] ⋆⋆⋆⋆⋆

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Code No: RR210202

Set No. 3

II B.Tech I Semester Supplementary Examinations, February 2007 PULSE AND DIGITAL CIRCUITS ( Common to Electrical & Electronic Engineering, Electronics & Communication Engineering, Electronics & Telematics and Electronics & Computer Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ⋆⋆⋆⋆⋆ 1. (a) A symmetrical square wave whose peak-to-peak amplitude is 2V and whose average value is zero is applied to an RC integrating circuit. The time constant is half the period of the square wave. Find the peak-to-peak value of the output amplitude. [10] (b) Write a short note on RC low pass circuit. Draw the output if a step input is applied. [6] 2. (a) Draw the circuit diagram of slicer circuit using Zener diodes and explain its operation with the help of its transfer characteristic. [6] (b) For the circuit shown in ﬁgure 2b:

Figure 2b If R = 1KΩ, VR2 = 10V, VR1 = 7 V Rf = 0 and Rr =∝ i. Sketch the transfer characteristic ii. If Vi = 20 sin ωt sketch the input and output waveforms. [10]

3. (a) Describe the switching times of BJT by considering the charge distribution across the base region. Explain this for cut oﬀ, active and saturation regions. [8] (b) Deﬁne the following terms: i. ii. iii. iv. storage time delay time rise time fall time.

[8]

4. (a) Draw the circuit diagram of an astable multi and explain its operation. [10] 1 of 2

Code No: RR210202

Set No. 3

(b) A collector-coupled astable multi uses n-p-n transistors with hF E (min)=30.The parameter values are: R1 = R2 = 50 KΩ and C1 = C2 = 0.1 µF . Find the pulse width, period and frequency of the output. [6] 5. (a) Deﬁne the terms: i. Slope or sweep speed error and ii. Displacement error [6]

(b) An exponential sweep results when a capacitor is charged from a supply voltage V through a resistor R. If the peak sweep voltage is Vs , derive an expression for stope error (es). [10] 6. (a) Explain the principle of “synchronization” and ‘synchronization with frequency division’. [8] (b) Explain the method of pulse synchronization of relaxation devices, with examples. [8] 7. (a) Distinguish between logic gate and sampling gate. (b) Why is a sampling referred as a linear gate? [4] [4]

(c) Illustrate the principle of operation of a linear gate using series switch and shunts witch. What are the disadvantages? [8] 8. Explain the operation of free running blocking oscillator (diode controlled) with neat sketch of current and voltage waveforms. Derive the expression for period and duty cycle of oscillations. [16] ⋆⋆⋆⋆⋆

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Code No: RR210202

Set No. 4

II B.Tech I Semester Supplementary Examinations, February 2007 PULSE AND DIGITAL CIRCUITS ( Common to Electrical & Electronic Engineering, Electronics & Communication Engineering, Electronics & Telematics and Electronics & Computer Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ⋆⋆⋆⋆⋆ 1. Draw the diﬀerent output waveforms of a RC High Pass circuit when it is applied with diﬀerent inputs like (a) Step-voltage input, (b) pulse input (c) square wave input. Explain the same. 2. (a) Draw the basic circuit diagram of negative peak clamper circuit and explain its operation. [6] (b) For the circuit shown in ﬁgure 2b, an input voltage Vi linearly varies from 0 to 150 V is applied. Sketch the output voltage V0 to the same time scale. [10] Assume ideal diodes. [5] [5] [6]

Figure 2b 3. (a) Describe the switching times of BJT by considering the charge distribution across the base region. Explain this for cut oﬀ, active and saturation regions. [8] (b) Deﬁne the following terms: i. ii. iii. iv. storage time delay time rise time fall time.

[8]

4. Design a collector-coupled monostable multi to obtain an output pulse of amplitude 6v and a gating time of 20usec,Ic (sat)=6mA,the base drive required for the ON transistor is 2 times IB (min). Assume that VCE (sat)=0,VBE (sat)=0& hf e (min)=20. [16] 1 of 2

Code No: RR210202

Set No. 4

5. (a) Explain the principle of working of Miller sweep circuit. Derive the expression for sweep speed by taking Miller integrator circuit. [8] (b) Draw a simple single stage transistor Miller integration circuit and explain how it behaves as a time-base circuit. [8] 6. (a) Explain the principle of “synchronization” and ‘synchronization with frequency division’. [8] (b) Explain the method of pulse synchronization of relaxation devices, with examples. [8] 7. Explain the operation of bi-directional sampling gate using diodes. Give the equivalent circuit and derive the expression for gain. Derive the expressions for minimum control voltages required. [16] 8. Explain the operation of free running blocking oscillator (diode controlled) with neat sketch of current and voltage waveforms. Derive the expression for period and duty cycle of oscillations. [16] ⋆⋆⋆⋆⋆

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