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Using Large-Signal Measurements for Transistor Characterization and Model Verification in a Device Modeling Program

Maciej My li!s"i#$ %iovanni Cru&i'$ Marc Vanden (ossche)$ Domini*ue Schreurs#$ and (art +au,elaers#
# -atholie"e Universiteit Leuven$ (elgium$ ' University of Messina$ .taly$ ) +MD% +/V/$ (elgium/
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0utline

.ntroduction Large-signal measurement data in a device modeling &rogram

12am&le3 .C-C4P 12am&le3 M0S51T 12am&le3 4ngelov model

Transistor characterization

Model verification

6esults Conclusions
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.ntroduction

Large-signal net,or" analyzer 7LS+48

4m&litude and &hase of all harmonics and intermods u& to 9: %;z 6ealistic signals3 #-tone$ '-tone$ +-tone u& to <=: d(m

DC$ small-signal$ large-signal >ehavior


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+on-9: ? environment Sam&ler@Mi2er->ased


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LS+4 data in .C-C4P

Large-signal on-,afer measurements

Device3

5re*uency s,ee& 65 &o,er s,ee& DC >ias s,ee&

De-em>edding structures3

5re*uency s,ee&

Device

0&en

Short

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LS+4 data in .C-C4P

Large-signal on-,afer measurements Data &rocessing


De-em>edding Transformation to the &rogram s&ecific format

Aij B A-&arameters of o&en Cij B C-&arameters of short$ after deem>edding of o&en effects/
i1dut = i1 v1(Y11 + Y12 ) (v2 v1)Y12 = i1 v1Y11 v2Y12 i2 dut = i2 v2 (Y22 + Y12) (v1 v2 )Y12 = i2 v2Y22 v1Y12 v 1dut = v 1 i 1dut Z11 i2 dut Z12 v2 dut = v2 i2 dut Z 22 i1dut Z12

MDM files

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LS+4 data in .C-C4P

Large-signal on-,afer measurements Data &rocessing .m&lementation in the device modeling &rogram

5undamental 5re*uencies S,ee& Plan Measured Data

Measured data

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LS+4 data in .C-C4P

Large-signal on-,afer measurements Data &rocessing .m&lementation in the device modeling &rogram

Measured data Data &rocessing routines

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LS+4 data in .C-C4P

Large-signal on-,afer measurements Data &rocessing .m&lementation in the device modeling &rogram

Measured data Data &rocessing routines Lin" to simulator

C.T. files

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LS+4 data in .C-C4P

Large-signal on-,afer Selecting dis&lay domain measurements Selecting measurement conditions Data &rocessing .m&lementation in the device modeling &rogram

Measured data Data &rocessing routines Lin" to simulator %ra&hic user interface
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C.T. files


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Transistor Characterization

0n-,afer DUT3

M0S51T 0&en D Short deem>edding structures f:3 '$ =$ 9 %;z Pin3 -#: B <= d(m V%S3 :/)$ :/E$ :/F V VDS3 :/#$ :/E$ :/F V
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LS+4 measurements3

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Model verification

4ngelov M0S51T model3

Ig#

intrinsic circ'it
(g#c ) "# drain I#s (gsc ) %#s %&#

+eglected self-heating and intrinsic non *uasi static effects$ Ca&acitance mode$ 12tracted from DC and S-&arameter measurements Tuned around3 V%SG:/E V$ VDSG:/F V$ f:G= %;z

gate $g "g

+ %g# Igs + %gs

%&g

"s

source
model 4ngelovM# 4ngelov .dsmodG# .gmodG# Ca&modG# .&":G:/::EE V&"sG:/H= Dv&"sG:/:'I P#G'/9 P'G:/# P)GE/' 4l&harG'/9 4l&hasG:/9 V"nG:/9 Lam>daG:/# Lam>da#G:/:I LvgG: (#G: ('G)/F' Ls>:G: VtrG= Vs>'G: CdsG'H/))#f5 Cgs&iG'/Ef5 Cgs:G9f5 Cgd&iG=/9==Ef5 Cgd:G9/:E:99f5 Cgd&eG:f5 P#:G# P##G#/I#9#F P':G:/' P'#G:/9=H9' P):G:/'9 P)#G:/9=H9' P=:G#/' P=#G#/I#9#F P###G:/::# .jG:/::'9 PgG:/:::' VjgG:/F 6gG''/= 6dG#:/I 6sG##/' 6iG: 6gdG: LgG:&; LdG: LsG: TauG:&s 6cminG:"0hm 6cG:"0hm CrfG)9/)'H=f5 6cinG:"0hm CrfinG:f5 6thG9: CthG: Tci&":G: Tc&#G: Tccgs:G: Tccgd:G: Tcls>:G: TcrcG: TccrfG: TnomG'9

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6esults
f: G = %;z$ V%S G :/E V$ VDS G :/F V$ 65 &o,er3 -#:/=I B <)/F# d(m
igs7t8 vs/ vgs7t8

ids7t8 vs/ vgs7t8

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6esults
f: G = %;z$ V%S G :/E V$ VDS G :/F V$ 65 &o,er3 -#:/=I B <)/F# d(m
igs7t8 vs/ vgs7t8

ids7t8 vs/ vgs7t8

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6esults
f: G = %;z$ V%S G :/E V$ VDS G :/F V$ 65 &o,er3 -#:/=I B <)/F# d(m
igs7t8 vs/ vgs7t8

ids7t8 vs/ vgs7t8

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6esults
f: G = %;z$ V%S G :/E V$ VDS G :/F V$ 65 &o,er3 -#:/=I B <)/F# d(m
igs7t8 vs/ vgs7t8

ids7t8 vs/ vgs7t8

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6esults
f: G = %;z$ V%S G :/E V$ VDS G :/F V$ 65 &o,er3 -#:/=I B <)/F# d(m
igs7t8 vs/ vgs7t8

ids7t8 vs/ vgs7t8

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6esults
f: G = %;z$ V%S G :/E V$ VDS G :/F V$ 65 &o,er3 -#:/=I B <)/F# d(m
igs7t8 vs/ vgs7t8

ids7t8 vs/ vgs7t8

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6esults
f: G = %;z$ V%S G :/E V$ VDS G :/F V$ 65 &o,er3 -#:/=I B <)/F# d(m
igs7t8 vs/ vgs7t8

ids7t8 vs/ vgs7t8

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6esults
f: G = %;z$ V%S G :/E V$ VDS G :/F V$ 65 &o,er3 -#:/=I B <)/F# d(m
igs7t8 vs/ vgs7t8

ids7t8 vs/ vgs7t8

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6esults
Self >iasing effect
ids7t8JDC igs7t8 vs/ v vs/ 7t8 Pin gs

ids7t8 vs/ vgs7t8

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6esults
Self >iasing effect
ids7t8JDC igs7t8 vs/ v vs/ 7t8 Pin gs
Po,er domain

;armonic distortion

4M-4M 4M-PM

ids7t8 vs/ vgs7t8

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6esults

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6esults

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6esults

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6esults

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6esults

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6esults
Dynamic Trajectories

igs7t8 vs/ vgs7t8

ids7t8 vs/ vgs7t8

ids7t8 vs/ vds7t8

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6esults
Dynamic Trajectories

igs7t8 vs/ vgs7t8

ids7t8 vs/ vgs7t8

ids7t8 vs/ vds7t8

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6esults
Dynamic Trajectories

igs7t8 vs/ vgs7t8

ids7t8 vs/ vgs7t8

ids7t8 vs/ vds7t8

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6esults
Time Domain

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6esults

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6esults

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6esults
Model tuning conditions

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Conclusions

Large-signal measurements < device modeling &rogram G

Com&lete large-signal device characterization and model accuracy assessment under realistic signals$ Sim&le access and im&roved usa>ility of the measured data$ Model com&arison and o&timization/

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