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4- 1

Chapter 4 Designing Feedback Controllers in Switch-Mode DC Power


Supplies
4-1 Objectives of Feedback Control
4-2 Review of the Linear Control Theory
4-3 Linearization of Various Transfer Function Blocks
4-4 Feedback Controller Design in Voltage-Mode Control
4-5 Peak-Current Mode Control
4-6 Feedback Controller Design in DCM
References
Problems
Appendix 4A Bode Plots of Transfer Functions
Appendix 4B Transfer Functions in CCM
Appendix 4C Derivation of Controller Transfer Functions

© Ned Mohan, 2005


4- 2

OBJECTIVES OF FEEDBACK CONTROL

Vin DC-DC Vo
Converter

Controller Vo*

Figure 4-1 Regulated dc power supply.

• zero steady state error


• fast response
• low overshoot
• low noise susceptibility.

© Ned Mohan, 2005


4- 3

The steps in designing the feedback controller:


• Linearize the system for small changes around the dc steady state operating point

• Design the feedback controller using linear control theory

• Confirm and evaluate the system response by simulations for large disturbances

© Ned Mohan, 2005


4- 4

REVIEW OF LINEAR CONTROL THEORY

Vo* + vc Pulse Width Power Stage vo


d
∑ Controller Modulation and Load

PWM-IC

k FB

Figure 4-2 Feedback control.


vo (t ) = Vo + vo (t )
Small signal representation: d (t ) = D + d (t )
vc (t ) = Vc + vc (t )

vo* ( s ) = 0 + A vc ( s) Pulse- d ( s ) Power Stage vo ( s )


∑ Controller Width +
Output Filter
− Modulator

GC ( s ) GPWM ( s ) GPS ( s )
B

k FB

Figure 4-3 Small signal control system representation.


© Ned Mohan, 2005
4- 5

Loop Transfer Function:


GL ( s ) = GC ( s ) GPWM ( s )GPS ( s ) k FB

Loop Gain Magnitude (dB)


50
f
fcc
0
Gain Margin
-50

-100 0 1 2 3 4
10 10 10 10 10

0
Loop Gain Phase ()
o

-90
Phase Margin
-180

-270
0 1 2 3 4
10 10 10 10 10
Frequency (Hz)

Figure 4-4 Definitions of crossover frequency, gain margin and phase margin.

Phase Margin:
φPM = φL fc
− ( −1800 ) = φL fc
+ 1800

© Ned Mohan, 2005


4- 6

LINEARIZATION OF VARIOUS
TRANSFER FUNCTION BLOCKS

Linearizing the PWM Controller IC


vc Vˆr
q (t ) vc (t )
vr
vr 0
t
(a)
q (t ) 1
vc ( s ) 1
d ( s ) 0
Vˆr t
dTs
PWM IC
(c) Ts (b)

Figure 4-5 PWM waveforms.

vc ( t )
d (t ) = vc (t ) = Vc + vc (t )
Vˆr
Vc (t ) vc (t ) d ( s ) 1
d (t ) = + GPWM ( s ) = =
ˆ
Vr Vˆr vc ( s ) Vˆr
N N
© Ned Mohan, 2005 D d ( t )
4- 7

Example 4-1 In PWM-ICs, there is usually a dc voltage offset in the ramp voltage,
and instead of as shown in Fig. 4-5b, a typical Valley-to-Peak value of the ramp signal is
defined. In the PWM-IC UC3824, this valley-to-peak value is 1.8 V. Calculate the
linearized transfer function associated with this PWM-IC.

Solution The dc offset in the ramp signal does not change its small signal transfer
function. Hence, the peak-to-valley voltage can be treated as Vˆr . Using Eq. 4-7

1 1
GPWM ( s ) = = =0.556 (4-8)
Vˆr 1.8

© Ned Mohan, 2005


4- 8
Linearizing the Power Stage of DC-DC
Converters in CCM

ivp (t ) icp (t ) ivp (t ) 


dV icp (t )
vp

vvp (t ) 1 d (t ) vcp (t ) vvp (t ) 1 D vcp (t )



dI cp

(a ) (b)

Figure 4-6 Linearizing the switching power-pole.

d (t ) = D + d (t )
vvp (t ) = Vvp + vvp (t )
vcp (t ) = Vcp + vcp (t )
ivp (t ) = I vp + ivp (t )
icp (t ) = I cp + icp (t )

© Ned Mohan, 2005


4- 9
Linearizing single-switch converters
ivp
+ iL 
dV iL
in

+ + + +
Vin
vvp vcp vo 
vin = 0 dI vo
r L

− − − − −
1: d (t ) Buck 1: D
iL + iL 
dVo

+ + + +
vo
vcp vvp vin = 0 
dI vo
Vin r
L

− − − − −
(1 − d (t )) :1 Boost (1 − D ) :1
ivp
+
iL Vin  vin = 0
d (Vin + Vo ) iL

+ + + +
vvp vo 
dI vo
vcp L
r
− − − −
1: d (t ) Buck-Boost 1: D
(a) (b)
1-1.1.1.1.1.1.1.1 Figure 4-7 Linearizing single-switch converters in CCM.

© Ned Mohan, 2005


4- 10
Small signal equivalent circuit for Buck, Boost
and Buck-Boost converters
Le

1 + Le = L (Buck)
+
veq sC
vo L
r
R
Le = (Boost and Buck-Boost)

− (1 − D ) 2

Figure 4-8 Small signal equivalent circuit for Buck, Boost and Buck-Boost converters.

vo Vin 1 + srC (Buck)


=

d LC  1 r 1
s2 + s  + +
 RC L  LC

vo Vin  Le  1 + srC


= 2 
1− s  (Boost)

d (1 − D )  R   1 r  1 
LeC  s 2 + s  + + 
  RC Le  Le C 
vo Vin  DLe  1 + srC (Buck-Boost)
 = 2 
1− s 
d (1 − D )  R   2  1 r  1 
LeC  s + s  + + 
© Ned Mohan, 2005   RC Le  Le C 
4- 11

Using Computer Simulation to Obtain


the transfer function Bode Plots
Example 4-2 A Buck converter has the following parameters and is operating in
CCM: L = 100 µ H , C = 697 µ F , r = 0.1Ω , f s = 100 kHz , Vin = 30V , and Po = 36W .
The duty-ratio D is adjusted to regulate the output voltage Vo = 12V . Obtain both the
gain and the phase of the power stage GPS ( s ) for the frequencies ranging from 1 Hz to
100 kHz.

Ideal Transformer

duty-ratio D

d

Figure 4-9 PSpice Circuit model for a Buck converter.


© Ned Mohan, 2005
4- 12
PSpice Modeling: C:\FirstCourse_PE_Book03\buck_conv_avg.sch

© Ned Mohan, 2005


4- 13

Simulation Results

40

SEL>>
-40
DB(V(V_out))
-0d

-50d

-100d

-150d
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz 30KHz 100KHz
P(V(V_out))
Frequency

© Ned Mohan, 2005


4- 14

40

24.66dB
20

GPS ( s ) dB
0

SEL>>
-20
DB(V(V_out))
.
0d

-50d

∠GPS ( s )
-100d

−1380
-150d
30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz 30KHz
P(V(V_out))
Frequency

Figure 4-10 The gain and the phase of the power stage

© Ned Mohan, 2005


4- 15
FEEDBACK CONTROLLER DESIGN IN
VOLTAGE-MODE CONTROL

Example 4-3 Design the feedback controller for the Buck converter described in
Example 4-2. The PWM-IC is as described in Example 4-1. The output voltage-sensing
network in the feedback path has a gain k FB = 0.2 . The steady state error is required to
be zero and the phase margin of the loop transfer function should be 600 at as high a
crossover frequency as possible.

1. The crossover frequency f c of the open-loop gain is as high as possible to result


in a fast response of the closed-loop system.
2. The phase angle of the open-loop transfer function has the specified phase
margin, typically 600 at the crossover frequency so that the response in the
closed-loop system settles quickly without oscillations.
3. The phase angle of the open-loop transfer function should not drop below −1800
at frequencies below the crossover frequency.

© Ned Mohan, 2005


4- 16

(1 + s / ωz )
2
kc
Gc ( s ) =
(

1+ s /ω )
2
s
p

phase −boost

GC ( s ) dB GC ( s ) fc

50

∠GC ( s ) φboost
-50

−90-100
0

10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz 30KHz 100KHz


P(V(v_out)) -90 fz c f
Frequency
fp

Figure 4-11 Bode plot of GC ( s ) in Eq. 4-18.

© Ned Mohan, 2005


4- 17

Step 1: Choose the Crossover Frequency. Choose f c to be slightly beyond the L-C
resonance frequency 1/(2π LC ) , which in this example is approximately 600 Hz.
Therefore, we will choose f c = 1 kHz . This ensures that the phase angle of the loop
remains greater than −1800 at all frequencies.

© Ned Mohan, 2005


4- 18

Step 2: Calculate the needed Phase Boost. The desired phase margin is specified as φ PM = 600 .
The required phase boost φboost at the crossover frequency is calculated as follows, noting that
GPWM and k FB produce zero phase shift:

∠GL ( s ) fc
= ∠GPS ( s ) fc
+ ∠GC ( s ) fc
(from Eq. 4-2) (4-19)

∠GL ( s ) fc
= −180o + φ PM (from Eq. 4-3) (4-20)

∠GC ( s ) fc
= −90o + φboost (from Fig. 4-11) (4-21)

Substituting Eqs. 4-20 and 4-21 into Eq. 4-19,

φboost = −90o + φ PM − ∠GPS ( s ) f (4-22)


c

In Fig. 4-10, ∠GPS ( s ) fc


 −1380 , substituting which in Eq. 4-22 yields the required phase boost

φboost = 108o .

© Ned Mohan, 2005


4- 19

Step 3: Calculate the Controller Gain at the Crossover Frequency. From Eq. 4-2 at the
crossover frequency f c

GL ( s ) fc
= GC ( s ) fc
× GPWM ( s ) f × GPS ( s ) fc
× k FB = 1 (4-23)
c

In Fig. 4-10, at f c = 1kHz , GPS ( s ) f c =1 kHz


= 24.66 dB = 17.1 . Therefore in Eq. 4-23, using
the gain of the PWM block calculated in Example 4-1,

GC ( s ) f × 0.556
N × 17.1
N × 0.2
N =1 (4-24)
c
GPWM ( s ) fc
GPS ( s ) fc
k FB

or
GC ( s ) fc
= 0.5263 (4-25)

© Ned Mohan, 2005


4- 20
vo* ( s ) = 0 + A vc ( s) Pulse- d ( s ) Power Stage vo ( s )
∑ Controller Width +
Output Filter
− Modulator

GC ( s ) GPWM ( s ) GPS ( s )
B

k FB

Figure 4-3 Small signal control system representation.

(1 + s / ωz )
2
k
Gc ( s ) = c
(

1 + s / ωp )
2
s
phase −boost
ωp  φ 
K boost = K boost = tan  45o + boost 
ωz  4 

fc
fz = f p = K boost f c
K boost

ωz
k c = GC ( s ) fc
K boost

© Ned Mohan, 2005


4- 21
Implementation of the controller by an op-amp
C2

R3 C3 R2 C1

(1 + s / ωz )
2
k vo
Gc ( s ) = c
(

1 + s / ωp )
2
s R1
vc
phase −boost *
v
o

Figure 4-12 Implementation of the controller by an op-amp.

C2 = ωz /( kcω p R1 )
C1 = C2 (ω p / ωz − 1)
R2 = 1/(ωz C1 )
R3 = R1 /(ω p / ωz − 1)
C3 = 1/(ω p R3 )

© Ned Mohan, 2005


4- 22

In this numerical example with f c = 1 kHz , φboost = 108o , and GC ( s ) fc


= 0.5263 , we can
calculate K boost = 3.078 in Eq. 4-27. Using Eqs. 4-27 through 4-30, f z = 324.9 Hz ,
f p = 3078 Hz , and kc = 349.1 . For the op-amp implementation, we will select
R1 = 100 k Ω . From Eq. 4-30, C2 = 3.0 nF , C1 = 25.6 nF , R2 = 19.1 k Ω , R3 = 11.8 k Ω ,
and C3 = 4.4 nF .

© Ned Mohan, 2005


4- 23
PSpice model of the Buck converter with voltage-mode control

Figure 4-13 PSpice average model of the Buck converter with voltage-mode control.

12.2V

12.0V

11.8V

11.6V
0s 5ms 10ms
V(V_out)
Time

Figure 4-14 Response to a step-change in load.

© Ned Mohan, 2005


4- 24
PSpice Modeling: C:\FirstCourse_PE_Book03\buck_conv_avg_fb_ctrl_op.sch

© Ned Mohan, 2005


4- 25

Simulation Results

12.1V

12.0V

11.9V

11.8V

11.7V
0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms 4.5ms 5.0ms 5.5ms 6.0ms
V(V_out)
Time

© Ned Mohan, 2005


4- 26

PEAK-CURRENT MODE CONTROL


• Peak-Current-Mode Control, and
• Average-Current-Mode Control.

ivp
+
Vin
iL
vvp
+ +
vcp vo
− − −

Q S Clock Slope
Compensation

R iL* ic vo*
+ Controller
Flip-flop Comparator

Figure 4-15 Peak current mode control.

© Ned Mohan, 2005


4- 27

ic slope compensation
iL*

iL

0 t
Clock
t
1
Ts =
fs
(a )

vo* ( s) = 0 + iL* ( s ) Peak Current iL ( s )


vo ( s )
∑ Controller Mode Power Stage
− Controller
GC ( s ) ≈1

(b)
Figure 4-16 Peak-current-mode control with slope compensation.

© Ned Mohan, 2005


4- 28
Example 4-4 In this example, we will design a peak-current-mode controller for a
Buck-Boost converter that has the following parameters and operating conditions:
L = 100 µ H , C = 697 µ F , r = 0.01Ω , f s = 100 kHz , Vin = 30 V . The output power
Po = 18 W in CCM and the duty-ratio D is adjusted to regulate the output voltage
Vo = 12 V . The phase margin required for the voltage loop is 600 . Assume that in the
voltage feedback network, k FB = 1 .

Figure 4-17 PSpice circuit for the Buck-Boost converter.


© Ned Mohan, 2005
4- 29
20

GPS ( s ) dB
-20 −29.33dB

-40
DB(V(V_out)/I(L1))
0d

∠GPS ( s ) |deg
-50d

−900
SEL>>
-100d
1.0Hz 3.0Hz 10Hz 30Hz 100Hz .
300Hz 1.0KHz 3.0KHz 10KHz 30KHz 100KHz
P(V(V_out)/ I(L1))
Frequency
f c = 5 kHz
Figure 4-18 Bode plot of vo / iL .

As shown in Fig. 4-18, the phase angle of the power-stage transfer function levels off at
approximately −900 at ~1kHz . The crossover frequency is chosen to be f c = 5 kHz , at
which in Fig. 4-18, ∠GPS ( s ) fc
 −900 . As explained in the Appendix on the

accompanying CD, the power-stage transfer function vo ( s ) / iL ( s ) of Buck-Boost


converters contains a right-half-plane zero in CCM. The crossover frequency is chosen
well below the frequency of the right-half-plane zero for reasons discussed in the
Appendix.

© Ned Mohan, 2005


4- 30
PSpice Modeling: C:\FirstCourse_PE_Book03\Buck-Boost_Freq_Analysis.sch

© Ned Mohan, 2005


4- 31

Simulation Results

20

-20

SEL>>
-40
DB(V(V_out)/I(L1))
0d

-50d

-100d
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz 30KHz 100KHz
P(V(V_out)/I(L1))
Frequency

© Ned Mohan, 2005


4- 32

kc (1 + s / ωz )  φ 
K boost = tan  45o + boost 
Gc ( s ) =
s (
1+ s /ω )

p  2 
f
phase −boost fz = c f p = K boost f c
K boost

k c = ω z GC ( s ) fc

At the crossover frequency, as shown in Fig. 4-18, the power stage transfer function has a
gain GPS ( s ) fc
= −29.33 dB . Therefore, at the crossover frequency, by definition, in Fig.
4-16b

GC ( s ) fc
× GPS ( s ) fc
=1 (4-37)
Hence,
GC ( s ) fc
= 29.33 dB = 29.27 (4-38)

Using the equations above for f c = 5 kHz , φboost  600 , and GC ( s ) fc


= 29.27 ,

K boost = 3.732 in Eq. 4-32. Therefore, the parameters in the controller transfer function
of Eq. 4-31 are calculated as f z = 1340 Hz , f p = 18660 Hz , and kc = 246.4 × 103 .

© Ned Mohan, 2005


4- 33

C2

R2 C1
vo
R1

vc
*
vo

Figure 4-19 Implementation of controller in Eq. 4-32 by an op-amp circuit.

R1 = 10 k Ω

ωz
C2 = = 30 pF
ω p R1kc
C1 = C2 (ω p / ωz − 1) = 380 pF
R2 = 1/(ωz C1 ) = 315 k Ω

© Ned Mohan, 2005


4- 34

Figure 4-20 PSpice simulation diagram of the peak-current-mode control.

© Ned Mohan, 2005


4- 35

12.04

vo (t )
12.00
vo (t )

11.96

11.92
2.50ms 2.75ms 3.00ms 3.25ms 3.50ms
AVGX(V(Vo),10u) V(Vo)
Time

Figure 4-21 Peak current mode control: Output voltage waveform.

© Ned Mohan, 2005


4- 36

PSpice Modeling: C:\FirstCourse_PE_Book03\bboost_conv_curr_mode_ctrl_opamp.sch

© Ned Mohan, 2005


4- 37

Simulation Results

12.02V

12.00V

11.98V

11.96V

11.94V

11.92V
1.40ms 1.45ms 1.50ms 1.55ms 1.60ms 1.65ms 1.70ms 1.75ms 1.80ms 1.85ms 1.90ms
V(Vo)
Time

© Ned Mohan, 2005


4- 38

FEEDBACK CONTROLLER DESIGN IN DCM

© Ned Mohan, 2005


4- 39

PSpice Modeling: C:\FirstCourse_PE_Book03\Buck-Boost_CCM_DCM_Freq_Analysis.sch

© Ned Mohan, 2005


4- 40

Simulation Results

80

40

CCM
DCM
0

SEL>>
-40
DB(V(V_out))
0d

CCM
DCM
-100d

-200d
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz 30KHz 100KHz
P(V(V_out))
Frequency

© Ned Mohan, 2005


4- 41

APPENDIX 4A BODE PLOTS OF TRANSFER FUNCTIONS


WITH POLES AND ZEROS

1
4A-1 A Pole in a Transfer Function
T (s) =
1 + s / ωp

20 log10 T ( s ) ωp
ωp 10ω p
10
0 log10 ω
−10
−20

∠T ( s ) −45

−90

Fig. 4A-1 Gain and phase plots of a pole.

© Ned Mohan, 2005


4- 42

4A-2 A Zero in a Transfer Function

T ( s ) = 1 + s / ωz

20
20 log10 T ( s ) 10
0
ωz
ωz 10ω z
log10 ω
10

90

∠T ( s ) 45

Fig. 4A-2 Gain and phase plots of a zero.

© Ned Mohan, 2005


4- 43

4A-3 A Right-Hand-Plane (RHP) Zero in a Transfer Function

s
T ( s) = 1 −
ωz
20 log10 T ( s )
20
10
0 ωz
log10 ω
ωz 10ω z
10

∠T ( s ) −45

−90

Fig. 4A-3 Gain and phase plots of a right-hand side zero.

© Ned Mohan, 2005


4- 44

4A-4 A Double Pole in a Transfer Function


1
T ( s) = 2
 s 
1+αs +  
 ωo 
2 0
ζ = 0 .0 5
0 ζ = 0 .2 5
ζ = 0 .5
ζ = 0 .8 0
-2 0
ζ = 1 .0 0

-4 0

-6 0

-8 0
1 2 3 4 5
1 0 1 0 1 0 1 0 1 0

0
ζ = 0 .0 5
ζ = 0 .2 5
ζ = 0 .5
ζ = 0 .8 0
-9 0
ζ = 1 .0 0

-1 8 0

1 2 3 4 5
1 0 1 0 1 0 1 0 1 0

Fig.4A-4 Gain and phase plots of a double-pole.


© Ned Mohan, 2005