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ARM Accredited Engineer Mock Test 3

www.arm.com/aae

Instructions
This mock test is designed to give prospective test-takers an opportunity to sample questions of a similar scope and level of difficulty to those included in the live AAE certification test. The test consists of 10 multiple choice questions and an accompanying document provides answers to these questions along with a rationale for each question and answer. We suggest that you allow yourself 10 minutes to complete this test, without the use of any reference materials or learning materials.

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ARM Accredited Engineer

Mock Test 3

Question 1
Which one of the following ARM processors contains a Snoop Control Unit (SCU), for hardware cache coherency? A) B) C) D) Cortex-A8 Cortex-M3 Cortex-R4 Cortex-A5 MPCore

Question 2
Which one of the following statements is TRUE for hardware breakpoints? A) B) C) D) Hardware breakpoints utilize the BPKT instruction on ARM processors Hardware breakpoints are not suitable for debugging exception handlers Hardware breakpoints can be used to debug code running from read-only memory Cache maintenance operations may be required when placing a hardware breakpoint

Question 3
Address 0x24 0x25 0x26 0x27 Contents 0x06 0xFC 0x03 0xFF

If r0 has the value 0x24, what is the content of r12 after executing the following instruction? LDRB r12, [r0], #2 A) B) C) D) 0xFC 0x03 0x06 0xFF

Question 4
What is the significance of ! in a load/store instruction? A) B) C) D) Dont update base register in post-indexed load/store Dont update base register in pre-indexed load/store Update base register in post-indexed load/store Update base register in pre-indexed load/store

Copyright 2013 ARM Limited 110 Fulbourn Road, Cambridge, England CB1 9NJ. All rights reserved.

Version 1.0

ARM Accredited Engineer

Mock Test 3

Question 5
For ARMv7-A memory management, which attribute control field is used in a page table entry to control use of a page table with a given Address Space IDentifier (ASID)? A) B) C) D) AP (Access Permission) nG (Not Global) SH (Shared) XN (Execute Never)

Question 6
Which TWO of these statements are true for a function that has been built to use hardfp? (Please select TWO options) A. B. C. D. E. The function must not read from or write to the stack The result of the function can be returned in a VFP register Floating point function arguments can be passed in core registers Floating point calculations are performed using the NEON unit only Up to 16 function arguments can be passed in floating point registers

Question 7
When a linker creates a static image: A) B) C) D) it records the entry point in the ELF header. it places the entry point at the lowest address. the entry point must be given on the command-line. the entry point cannot be given on the command-line.

Question 8
Which of the following provides fastest access for the processor? A) Tightly Coupled Memory (TCM) B) Hard disk C) Onboard flash memory D) Register File

Copyright 2013 ARM Limited 110 Fulbourn Road, Cambridge, England CB1 9NJ. All rights reserved.

Version 1.0

ARM Accredited Engineer

Mock Test 3

Question 9
What are software-generated interrupts in a Generic Interrupt Controller (GIC) generally used for? A) B) C) D) Causing a delay Entering a low power state Communicating between processors Calling an operating system function

Question 10
Which of the following methods could be used to calculate the Cycles Per Instruction (CPI) value for a portion of code? A) B) C) D) Single-step the code using a JTAG debugger Count the cache hits Use the PMU event counters Time it with a stopwatch

Copyright 2013 ARM Limited 110 Fulbourn Road, Cambridge, England CB1 9NJ. All rights reserved.

Version 1.0