You are on page 1of 26

HA13561F

Combo (Spindle & VCM) Driver

ADE-207-182 (Z) 1st Edition July 1996 Description
This COMBO Driver for HDD application consists of Sensorless Spindle Driver and BTL type VCM Driver. Bipolar Process is applied and a “Soft Switching Circuit” for less commutation noise and a “Booster Circuit’ for smaller Saturation Voltage of Output Transistor are also implemented.

Features
• Soft Switching Driver Small Surface Mount Package: FP-80E (QFP80 Pin) Low thermal resistance: 35°C/W with 6 layer multi glass-epoxy board • Low output saturation voltage  Spindle 0.8 V Typ (@1.0 A)  VCM 0.8 V Typ (@0.8 A)

Functions
• • • • • • • • • • 1.8 A Max/3-phase motor driver 1.2 A Max BTL VCM Driver Auto retract Soft Switching Matrix Start up circuit Booster Speed Discriminator Internal Protector (OTSD, LVI) POR Power monitor

HA13561F
Pin Arrangement

RETON RETPOW Vpsv LVI2

80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61

VBST VCMP VCMN BC2 BC1

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

RS

TAB

OPIN(-) VCTL OPIN(+) RESINH VREF1
60 COMPOUT 59 NC* 58 NC* 57 GAIN 56 VCMENAB 55 54 53 52 51 50 49 48 47 46 45 POR 44 SPNENAB 43 READY 42 CLOCK 41 CNTSEL

TAB

TAB

W RNF PCOMP CT V

16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

U C-PUMP CLREF R1 Vpss

TAB

*NC : No internal connection Please note that there is no isolation check between pin 58 and pin 59 at the testing of this IC. (Top View)

2

Vss LVI1 DELAY COMM POLSEL

HA13561F Pin Description Pin Number Pin Name 1 2 3 4 5 6 to 15 16 17 18 19 20 21 22 23 24 25 26 to 35 36 37 38 39 40 41 42 43 44 45 46 to 55 56 57 VBST VCMP VCMN BC2 BC1 GND W RNF PCOMP CT V U C-PUMP CLREF R1 Vpss GND VSS LVI1 DELAY COMM POLSEL CNTSEL CLOCK READY SPNENAB POR GND VCMENAB GAIN Function Boosted voltage output to realize the low output saturation voltage Output terminal on VCM driver Output terminal on VCM driver To be attached the external capacitor for booster circuitry ditto Ground pins W phase output terminal on spindle motor driver Sensing input for output current on spindle motor driver To be attached the external capacitor for phase compensation of spindle motor driver To be attached the center tap of the spindle motor for B-EMF sensing V phase output terminal on spindle motor driver U phase output terminal on spindle motor driver To be attached the external integral constants for speed control of spindle motor Reference voltage input for current limiter of spindle motor driver To be attached the external resistor for setting up the oscillation frequency of start-up circuitry and the gain of speed control loop of spindle motor driver Power supply for spindle motor driver Ground pins Power supply for small signal block Sensing input for power monitor circuitry To be attached the external capacitor to generate the delay time for power on reset signal To be attached the external capacitor for setting up the oscillation frequency To be selected the input status corresponding to the pole number of spindle motor To select the count Number of Speed Discriminator Master clock input for this IC Output of speed lock detector for spindle motor To select the status of spindle motor driver Output of power on reset signal for HDD system Ground pins To select the status of VCM driver To select the Transfer conductance gm of VCM driver 3 .

output. Amp. this signal is used as control signal for VCM driver output Inverted input of OP.Amp.HA13561F Pin Description (cont) Pin Number Pin Name 58 59 60 61 62 63 64 65 66 to 75 76 77 78 79 80 NC NC COMPOUT VREF1 RESINH OPIN (+) VCTL OPIN (–) GND LVI2 Vpsv RETPOW RETON RS Function No function ditto Comparator output to detect the direction of output current on VCM driver Regulated voltage output to be used as reference of peripheral ICs Used for inhibiting the restart function of the spindle motor driver after power down Non inverted input of OP. to be used for filtering the signal on PWMOUT OP. to be used for filtering the signal on PWMOUT Ground pins Sensing input for power monitor circuitry Power supply for VCM driver Power supply for retract circuitry To be attached the base terminal of external transistor for retracting Sensing input for output current on VCM driver 4 .Amp.

(CNT) SPEED READY RETPOW RETON C109 78 D2 79 D1 R108 RS 3 Qret VBST RETRACT DRIVER P – + OPAMP.66 to 75 R105 Vss(+5V) 45 POR (L:RESET) LVI1 Vss R101 (+5V) R102 37 76 LVI2 R103 R104 Vps (+12V) DELAY C106 5 . Vref1 (=4.26 to 35 46 to 55.HA13561F Block Diagram VSS (+5V) VSS C102 36 VBST B-EMF AMP.6V) + VCM DRIVER N – OTSD – + VCMP 2 VCMN 80 60 RS CX RX COMP OUT RL VBST BOOSTER Vss Vps POWER MONITOR COMPARATOR POR Delay GND 38 6 to 15. RESINH 62 C103 COMM 39 C-PUMP Vps(+12V) C101 25 19 SOFT SWITCHING MATRIX CT Vpss U SPINDLE DRIVER V W 21 20 16 17 U V W RNF C110 C111 START-UP CIRCUIT COMMUTATION LOGIC 22 C2 CLREF R1b C1 23 CHARGE PUMP CURRENT CONTROL R1 24 R1a 44 SPNENAB POLSEL 40 PCOMP Vpsv 18 77 (D1) CLOCK 42 (5MHz Typ) CNTSEL 41 READY 43 VCTL 64 OPIN(–) 65 OPIN(+) 63 Vref1 61 NC 59 NC 58 GAIN 57 VCM ENAB 56 BC1 5 C104 4 BC2 1 C105 VBST 1/32 SPEED DISCRI.

600 rpm 4.400 rpm 6 .HA13561F Truth Table Table 1 SPNENAB H Open L Truth Table (1) Spindle Driver ON Cut off Braking Table 2 VCMENAB H L Truth Table (2) VCM Driver ON Cut off Table 3 OTSD not Active Active Truth Table (3) Spindle Driver See table 1 Cut off VCM Driver See table 2 Cut off Retract Driver Cut off ON Table 4 POLSEL H Open L Truth Table (4) (D1) — 1/12 1/18 Comment Test Mode for 8 poles motor for 12 poles motor Table 5 CNTSEL H Open L Truth Table (5) CNT 2605 2084 1736 Rotation Speed (at CLOCK = 5 MHz) 3.500 rpm 5.

HA13561F Table 6 RESINH H L Truth Table (6) Spindle Driver Inhibiting the restart after power down Not inhibiting the restart after power down Table 7 GAIN H L Truth Table (7) VCM Driver High Gain Mode Low Gain Mode 7 .

..0V MAX 0 t Note: 1. . Power on reset (2) VPS or VSS tpor POR Spindle Driver ON OFF ON OFF VCM Driver Retract Driver Note: 2.. .. 2. Power on reset (1) Vhys Vsd Vps and VSS t POR tDLY 1. tpor <1µs <1µs Retract 8 .HA13561F Timing Chart 1. ..... Retract driver need B-EMF voltage or another power supply. How to determine the threshold Voltage Vsd and the delay time tDLY both are shown in the external components table..

∆No =1. . 9 .HA13561F 3. This function increase the reliability for the motor starting up. .8% when CNTSEL=L *2.5% when CNTSEL=Open =1.. The turning point of driving mode from switching synchronize to the turning point of READY output from Low to High. the motor will be automatically restarted within 200 ms after the motor stopped. . Motor start-up seaquence (a) Timing chart of start-up seaquence SPNENAB Rotation Speed Internal READY . Open No Synchronous Driving Driving by B-EMF sensing 0 Switching tdelay*2 Soft Switching*3 t *3. Motor on Synchronous driving Driving by B-EMF sensing (not stop) Motor stop detector No+∆No*1 No–∆No*1 READY (Pin 43) Note *1. 500 • 107 tdelay= [ms] fclk [Hz] (b) Retry circuitry for misstart-up (Motor stop) (Motor off) The HA13561F has the motor stop detector as shown hatching block. This function is monitoring the situation of the motor while the motor is running by B-EMF sensing. READY output goes to High. If the motor will be caused a misstarting up. . Speed lock detection range ∆No is as follows. if the rotation speed error keeps to be less than ∆No longer time than tdelay....2% when CNTSEL=H =1..

Start-up of the Spindle motor Open SPNENAB COMM GND .HA13561F 4. Braking & Shut down the Spindle Driver SPNENAB Note: The SPNENAB should be selected the open state after braking to reduce the supply current from Vps and V SS .. 2TCOMM tCOMM (see External Components Table) IU SOURCE 0 SINK IV SOURCE 0 SINK SOURCE IW 0 SINK 10TCOMM 12TCOMM 14TCOMM 16TCOMM 16TCOMM 4TCOMM 4TCOMM 4TCOMM 4TCOMM 4TCOMM 6TCOMM 8TCOMM Driving by B-EMF sensing Synchronous Driving for motor start up not detecting the B-EMF detecting the B-EMF 10 . Open CUT OFF Vth1 Vth2 5. .. Open ON > 20µs CUT OFF BRAKING .

HA13561F 6. Acceleration and Running the spindle motor + UBEMF 0 – + VBEMF 0 – + WBEMF 0 – (1) Acceleration(switching mode) SOURCE Iu 0 SINK SOURCE Iv 0 SINK SOURCE Iw 0 SINK (2) Running (soft switching mode) SOURCE Iu 0 SINK SOURCE 0 SINK SOURCE Iw 0 SINK Iv 11 .

HA13561F Application VPS (+12V) Vpss 25 C101 CT 19 U 21 5 BC1 C104 4 BC2 C105 1 VBST C103 39 COMM 23 CLREF R1b C2 R1a 24 R1 R2 22 C-PUMP C1 40 POLSEL 41 CNTSEL 43 READY 42 CLOCK 44 SPNENAB 56 VCMENAB 57 GAIN 62 RESINH HA13561F V 20 W 16 RNF RNF 17 C110 PCOMP 18 Vpsv 77 C109 RETPOW 78 D2 RETON 79 Qret D1 R108 VCMP 2 R104 R103 C111 RWMIN R8 R7 R3 R5 C5 61 VREF1 65 OPIN(–) R6 C3 R4 VSS (+5V) 64 VCTL 63 OPIN(+) C4 60 COMPOUT VCMN 3 CX RX RS 80 LVl2 76 45 POR LVl1 37 GND RS RL R105 R101 R102 C102 36 VSS 38 DELAY C106 12 .

Output maximum current on spindle motor driver Ispnmax is determined by following equation.5) [Hz] 5 where.3) 2.33 µF — — TBD Integral constant PWM filter Setting of LVI1 voltage Setting of LVI2 voltage Pull up Limitation for Retract current Current sensing for VCM Driver Current sensing for Spindle Driver Reduction for gain peaking Integral constant PWM filter Reduction for gain peaking Power supply by passing Power supply by passing Oscillation for start-up for booster for booster Delay for POR Power supply by passing Phase compensation Retract Driver Protection for Qret Protection for parasitic phenomena 12 12 8 6 12 10 1 11 3 9 11 3 9 7 7 Purpose V/I converter Note 1. NO: Standard rotation speed [rpm] P: Number of pole D1: Dividing ratio on divider 1 (2) 13 .2 µF — ≥ 0.6 k Ω — 1.22 µF 2.1 µF ≥ 0. V R1: Reference Voltage on Pin 24 [V] (= 1. R104 R105 R108 RS Rnf RX C1.1 µF — 0. R102 R103. C2 C3 to C6 CX C101 C102 C103 C104 C105 C106 C109 C110. Input clock frequency fclk on pin 42 is determined by following equation. 6 Notes: 1.1 µF 0. C111 Qret D1 D2 Recommended Value (R1a + R1b) ≥ 10 k Ω (R1a + R1b) ≥ 10 k Ω — — — — 5. 4 fclk = • NO • P • D1 • (CNT – 0.HA13561F External Components Parts No. 4.0 Ω — — — — — ≥ 0. R1a R1b R2 R3 to R8 R101. R1b V Ispnmax = • R1 [A] R1a + R1b RNF (1) where.

Vsd2 and its hysteresis voltage Vhys1. VR1 tCOMM 1 C103 = • • [F] R1a + R1b VthH – VthL 4 (9) where. Vhys2 can be determined by following equations. LVI operatig voltage Vsd1. Integral constants R2. is should be chosen as following equation. J: Moment of inertia [kg•cm•s2] KT: Torque constant [kg•cm/A] Gctl: Current control amp gain from pin 22 to pin 17 (= 0. The capacitor C103 on pin 39 can be determined by tCOMM and following equation.55 VR1 • KT • Gctl 1 10 • ωO • R2 [F] [F] (5) (6) [Ω] (4) (3) C1 = C2 = 10 • C1 where.5) 4. (R1a + R1b) Nerror = Icer2 • • 100 [%] VR1 (7) where.0) Vth L: Threshold voltage on start up circuit [V] (= 0. C1 and C2 can be designed as follows. Oscillation period tCOMM on pin 39 which period determine the start up characteristics. for VSS Vsd1 = 1 + R101 • Vth4 R102 R101 R102 [V] (10) [V] (11) Vhys1 = 1 + • Vhyspm 14 .HA13561F D1 = 1/12 (when Pin 40 = Open) for 8 pole motor = 1/18 (when Pin 40 = Low) for 12 pole motor CNT:Count number on speed discriminator CNT = 2605 (when Pin 41 = High) = 2084 (when Pin 41 = Open) = 1736 (when Pin 41 = Low) 3. Vth H : Threshold voltage on start up circuit [V] (= 2.5) 7. It is notice that rotation speed error Nerror is caused by leak current Icer2 on pin 22 and this error depend on R1a and R1b as following equation. 1 1 J J tCOMM = • to • [s] P • KT • Ispnmax P • KT • Ispnmax 8 4 (8) 6. Icer2: Ieak current on pin 22 [A] 5. NO 1 ωO = •2•π• [rad/s] 60 10 R2 = 1 Rnf • J • ωO • NO • (R1a + R1b) • 9.

Vsd2 ≥ 10 [V] 8. Vth4: Threshold voltage on pin 37 and pin 76 [V] (= 1. D – 50 R6 Vctl – VREF1 = 2 • VREF1 • PWM • • HFLT(s) 100 R5 (15) where.HA13561F for Vps Vsd2 = 1 + R103 • Vth3 R104 R103 R104 [V] (12) [V] (13) Vhys2 = 1 + • Vhyspm where. Vth3. Vsd1 ≥ 4.4) I CH3: Charge current on pin 38 [µA] (= 10) 9. 1 1 HFLT(s) = • 2 1+ s 1 +2 • ζ • s + s ωO ωn ωn (19) 15 . R7 • R8 R7 • R8 (18) If you choose the R// << R3.25 [V]. The differential voltage (Vctl – V REF1) using for control of VCM driver depend on PWMDAC inputs LSB. The delay time tDLY of POR for power on reset is determined as follows. Vsd2 can be designed by the following range. R8 R6 1 =2• • R7 R5 1 – R6 R5 (16) HFLT(s) = 1 1 + s • C5 • R// – C3 • (R// + R3) • R6 + C4 • (R// + R3 + R4) R5 + s2 • C5 • C4 • R// • (R3 + R4) – C5 • C3 • R// • R3 • R6 + C3 • C4 • R4 • (R// + R3) R5 + s3 • C3 • C4 • C5 • R// • R3 • R4 (17) R// = where. MSB as follows. DPWM: Duty cycle on PWMIN [%] HFLT(S): Transfer function from pin 62 (PWMOUT) to pin 64 (Vctl) as shown in equation (17) To be satisfied with above equation (15). Vth4: Threshold voltage on pin 38 [V] (= 1. C106 • Vth5 tDLY = [s] ICH3 (14) where.39) Vhyspm: Hysteresis voltage on pin 37 and pin 76 [mV] (= 40) Shut down voltage Vsd1. then equation (17) can be simplified as following equation. it is notice that the ratio of R6 to R7 must be choosen as shown below.

ωVCM = ωP • Rs Lm (25) RL Rs 1 ωP Rs Lm ζVCM = 1 2 • 1+ • • (26) where. Vctl: VREF1: Kvcm: Input control voltage for VCM driver on pin 64 [V] Reference voltage on pin 61 [V] (= 4.HA13561F where. fVCMC = ωVCM 2•π • 1 – 2 • ζVCM2 + 2 • ζVCM2 – 1 2 +1 (27) 16 . Ivcm(s) = Vctl – VREF1 • Kvcm • 1 • Hvcm(s) Rs (23) where.6) DC gain of VCM driver (= 1. ωO = 1 C5 • R// 1 C3 • C4 • R3 • R4 (20) ωn = (21) ζ= R6 C4 • (R3 + R4) – C3 • R3 • R5 2 • C3 • C4 • R3 • R4 (22) 10. ωp: Bandwidth of internal power amplifiers for VCM driver [rad/s] (= 3•π•106) Lm: Inductance of the VCM coil [H] RL: Resistance of the VCM coil [Ω] and from above equations the -3 dB bandwidth f VCMC of VCM driver is as following equation. The relationship between the output current Ivcm and the input voltage (Vctl – V REF1) on VCM driver is as follows.45 for Low gain mode) Hvcm(s): Transfer function of VCM driver as shown following equation 1 Hvcm(s) = s s 2 1 + 2 • ζVCM • ω + ω VCM VCM (24) where.82 for High gain mode) (= 0.

If you want to tune up for this characteristics. BTL Driver + – R3 RS – + R3 P RS N RX CX Coil 1/2 VPS Figure 1 VCM Driver Block Diagram 20 10 Normal IO (dB) 0 –10 –20 CX = 0. you can reduce the peaking by additional snubber circuit R X and CX as follows. L = 1. Vretpow – Vsat(Qret) – VF(D1) – VsatVL Iret = R108 + Rs + RL where.22µF RX = 560Ω 100 1k 10k 100k Frequency (Hz) (for example) RL = 14. The retract current Iret is determined by following equation.7 Ω.HA13561F 11. The frequency response of VCM driver maybe have a gain peaking because of the resonation of the motor coil impedance.7 mH. Vretpow: Applied voltage on pin 78 [V] Vsat (Qret): Saturation voltage of Qret [V] VF (D1): Foward voltage of D1 [V] (28) 17 . RS = 1 Ω. Gain = L 12.

57 and pin 62 Operating junction temperature range is Tjop = 0°C to +125°C ASO of upper and lower power transistor are shown below.8 V. the reliability of this IC often goes down.8 1. 3. 2. 10 IC (A) 1. PT Tj Tstg Rating +15 +7 VSS 1.8 1 t=10ms t=50ms t=100ms 0. Operating voltage range is 4. 7. Operating locus must be within the ASO. The OTSD (Over Temperature Shut Down) function is built in this IC to avoid same damages by over heat of this chip. However.8 5 +150 –55 to +125 Unit V V V A A A A W °C °C Notes 1 2 3 Operating voltage range is 10.HA13561F Absolute Maximum Ratings (Ta = 25°C) Item Power supply voltage Signal supply voltage Input voltage Output current-Spindle Symbol Vps VSS VIN Iospn (Peak) Iospn (DC) Output current-VCM Iovcm (Peak) Iovcm (DC) Power dissipation Junction temperature Storage temperature Notes: 1. 41.2 V to 13. please note that if the junction temperature of this IC becomes higher than the operating maximum junction temperature (Tjopmax = 125°C).2 1. 56. 44.1 1 15 10 VCE (V) 100 Figure 2 ASO of Output Stages (Spindle) 18 .25 V to 5.2 0. 42. 6. Thermal resistance: θ j-a ≤ 35°C/W with 6 layer multi glass-epoxy board.75 V Applied to Pin 40. 4. 5.

1 1 15 10 VCE (V) 100 Figure 3 ASO of Output Stages (VCM) 19 .HA13561F 10 IC (A) 1.2 1 t=10ms t=50ms t=100ms 0.

Vps = 12 V.7 19 — Max 7.0 27 2. 77 VCMENAB = L SPNENAB = H VCMENAB = H 25. 77 57. 62 2.9 –75 75 — — — — — –180 230 — — — — — — — –105 105 — ±10 ±10 0.0 3.0 V 44 Input = GND Input = 5.0 V 42 Input low current I IL1 Input high current I IH1 Logic input 2 Input low voltage VIL2 (CLOCK) Input high voltage VIH2 Input low current I IL2 Input high current I IH2 Logic input 3 Input low voltage VIL3 (VCMENAB) Input high voltage VIH3 Input low current I IL3 Input high current I IH3 Logic input 4 Input low voltage VIL4 (SPNENB) Input middle voltage Input high voltage VIM4 VIH4 Input low current I IL4 Input high current I IH4 20 .0 — — — 2.HA13561F Electrical Characteristics (Ta = 25°C.0 — — — 3.1 — –150 150 V µA µA V V µA µA V V µA µA V V V µA µA Input = GND Input = 5.8 21 1.2 24 0.8 Unit mA mA mA mA V Test Conditions Applicable Pins Note SPNENAB = Open 36 VCMENAB = L SPNENAB = H VCMENAB = H 36 SPNENAB = Open 25. VSS = 5 V) Item Supply current for VSS Symbol Min I SS0 I SS1 for Vps Ips0 Ips1 Logic input 1 Input low voltage VIL1 (GAIN) (RESINH) Input high voltage VIH1 — — — — — Typ 5.5 — — — 2.0 V 56.8 — ±10 330 1.0 3.0 V Input = GND Input = 5.8 — –260 330 0. 59 Input = GND Input = 5.

24 C-PUMP = 1.1 0.8 0.0 530 V V µA µA V V V mA mV Input = GND Input = 5. 22 16.06 40 –40 — — 1. VSS = 5 V) (cont) Item Logic input 4 Input dead (SPNENB) current Symbol Min I DEAD — — Typ — — Max ±10 1. 20.0 3. Input sensitivity Charge pump Reference voltage Charge current Discharge current Leak current Speed discri Operating frequency Start up circuit Threshold voltage R1a + R1b = 24 Ω 22.8 — — — 480 3.0 A Ispn = 0.0 Unit µA V Test Conditions Applicable Pins Note 44 40.6 0.6 A SPNENAB = Open VCLREF = 500 mV RNF = 1.35 A Ibreak = 0. 21 Input low current I IL5 Input high current Spindle driver I IH5 Total saturation Vsatspn — voltage — Saturation at braking Leak current Current limiter reference voltage Control amp gain Vbreak Icer1 VOCL — — 430 Gctl Vmin VR1 I CH1 I DIS1 Icer2 fclk Vth H Vth L — — 1. 39 Charge current Discharge current I CH2 I DIS2 R1a + R1b = 24 kΩ COMM = 1 V 21 .5 23 –22 ±2 — 1.9 –38 38 — — –53 53 0.0 0.7 26 –25 dB mVp-p V µA µA nA MHz V V µA µA 17.0 2.5 0. Vps = 12 V.28 50 –50 ±50 8.0 Ω 17 16.HA13561F Electrical Characteristics (Ta = 25°C.3 21 –19 –2 100 1. 21 1 B-EMF amp.0 V 42 24. 41 Logic input 5 Input low voltage VIL5 (POLSEL) (CONTSEL) Input middle voltage Input high voltage VIM5 VIH5 2. 20.7 ±2.0 V Ispn = 1.1 — –75 75 1.17 45 –45 — — 1.0 Ω RNF = 1.

Vps = 12 V.3 — 22 .1 0.0 Ω RS = 1.4 1. 3 1 Transfer gain gm (H) — gm (L) — 0.1 — 8 — 0.1 A 79 3 78 2.4 Unit V V V V mA mV mV V RL = 10 Ω RS = 1. RL = 14 Ω Ireton = 0.55 ±2 ±20 ±10 6. 80 2.4 A Vce = 15 V VCTL = OP (–) VREF = OP (+) 2.4 — — — 6.0 Ω.HA13561F Electrical Characteristics (Ta = 25°C.0 mA 64 Vohop Vps – 1. 64. 80 2.8 A Ivcm = 0.1 mA Vretpow = 4. RL = 14 Ω Logain-mode RS = 1. Vretpow = 15 V Iret = 0.74 — — ±5% kHz kHz A/V 2.0 Max VSS 0. 65 1 Vps V – 0.23 — — ±10 0.0 V Vreton = 15 V. RL = 28 Ω RS = 1. 3 Applicable Pins Note 43 Total saturation Vsatvcm — voltage — Output leak current Total output offset voltage Icer3 Voff(H) Voff(L) Output quiescent voltage Total Gain Bandwidth Vqvcm — — — 5.8 Retout sink current Output leak current Low side saturation voltage OP Amp Input current Input offset voltage Common mode input voltage range Output high voltage Ireton Icer4 VsatVL 5 — 0.0 Ω. VSS = 5 V) (cont) Item READY Output high voltage Output low voltage VCM driver Symbol Min Vohr Volr VSS – 0.44 ±5% A/V Retract driver Retpow voltage Vretpow 0. RL = 14 Ω Higain-mode RS = 1.8 0.6 B — — 26 50 1. 3 Test Conditions I O = –1 mA I O = 1 mA Ivcm = 0.35 V mA µA V Iinop Vosop Vcmop — — 0 — — — ±500 (±7) nA mV 63.2 — V Iout = 1.0 Ω.4 — Typ — — 0.0 Ω.

39 40 1.HA13561F Electrical Characteristics (Ta = 25°C. Variations of threshold voltage Vth3 and Vth4 depending on the power supply V SS are shown in Figure. Design guide only.4 ±10 ±5% Unit V mV V V V Ω V mV V mV V V µA V I O = 1 mA I O = 1 mA I O = 20 mA I O = 20 mA VSS = 5 V VSS = 5 V VSS = 4 V VSS = 4 V I O = 1 mA I O = 1 mA VSS = Vps = 1.6 — 1.4 0.8 — — — Typ — 0 — — 4.38 40 — — — 1.1 — 0.0 +3% –2% 55 +3% –2% 55 0.0 mA Applicable Pins Note 64 2. 3. 60 60 Vhyspm 25 1 Vth4 — Vhyspm 25 2 VOL2 VOL3 — — — — — 10 125 — Output leak current Threshold voltage Charge current Discharge current OTSD Operating temperature Hysteresis Icer5 Vth5 I CH3 I DIS3 Tsd Thys ±25% µA — — — mA °C °C 1 1 Notes: 1.4 12 — 150 25 Max 1. VSS = 5 V) (cont) Item OP Amp Comparator Output low voltage Input sensitivity Output low voltage Output high voltage Vref1 Output voltage Output resistance Power monitor Threshold voltage Hysteresis Threshold voltage Hysteresis POR Output low voltage Symbol Min Volop Vmin2 Volcp Vohcp Vref1 Ro1 Vth3 — ±9 — VSS – 1.4 VSS ±3% 5. 23 . Vps = 12 V.0 V Vpor = 7 V 38 45 37 2 76 2 61 Test Conditions Iout = 1. 2.4.

Vth4 (V) 1.4 5.6 4.34 1.39 1.0 5.8 6.36 1.33 3.2 5.42 1.0 4.37 1.8 4.2 4.35 1.8 5.HA13561F Threshold voltage Vth3.4 4.6 5.38 Test condition of Vth4 1.0 Power supply VSS (V) Test condition of Vth3 Figure 4 24 .41 1.40 1.

70 1.10 0.05 0.20 –0.05 Max 2.3 41 40 0.17 ± 0.65 80 1 0.3 14 60 61 17.10 0.60 0–5° 0.2 ± 0.HA13561F Package Dimensions Unit: mm 17.30 ± 0.13 M 3.8 ± 0.2 ± 0.16 0.10 21 20 +0.3 Hitachi code EIAJ code JEDEC code FP-80E — — 25 .

CA 95134 Tel: <1> (408) 433-1990 Fax: <1>(408) 433-0223 Hitachi Europe GmbH Electronic components Group Dornacher Stra§e 3 D-85622 Feldkirchen. or other intellectual property rights for information contained in this document. Hong Kong Tel: <852> (2) 735 9218 Fax: <852> (2) 730 0281 Telex: 40815 HITEC HX Copyright ' Hitachi. World Finance Centre. Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA.. trademark.htm Asia (Taiwan) : http://www. copyright. 16 Collyer Quay #20-00 Hitachi Tower Singapore 049318 Tel: 535-2100 Fax: 535-1533 Hitachi Asia Ltd. Ltd. heat radiation characteristics. This product is not designed to be radiation resistant. Munich Germany Tel: <49> (89) 9 9180-0 Fax: <49> (89) 9 29 30 00 Hitachi Europe Ltd. purchase or use.jp/Sicd/indx. nuclear power. fire or other consequential damage due to operation of the Hitachi product. installation conditions and other characteristics. 2-6-2. Kowloon. such as aerospace. Ltd.co. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating.hitachi. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. All rights reserved. so that the equipment incorporating Hitachi product does not cause bodily injury.htm Japan : http://www. 5. North Tower. transportation. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent. Hitachi bears no responsibility for problems that may arise with third party’s rights. Tsim Sha Tsui. However.com. Chiyoda-ku.tw/E/Product/SICD_Frame. aeronautics.com/ Europe : http://www. Ohte-machi.htm For further information write to: Hitachi Semiconductor (America) Inc. Products and product specifications may be subject to change without notice.htm Asia (HongKong) : http://www.hitachi-eu.com. in any form.hitachi.com. Semiconductor & Integrated Circuits. 6. 4. 2. Printed in Japan.has.. operating supply voltage range. Canton Road. 3. Taipei (105) Tel: <886> (2) 2718-3666 Fax: <886> (2) 2718-8180 Hitachi Asia (Hong Kong) Ltd.com/hel/ecg Asia (Singapore) : http://www. Taipei Branch Office 3F. Hitachi. Even within the guaranteed ranges. traffic. . Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. 1999. Nippon Bldg. No.hk/eng/bo/grp3/index. safety equipment or medical equipment for life support. Hitachi makes every attempt to ensure that its products are of high quality and reliability. Tun-Hwa North Road. Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109 URL NorthAmerica : http:semiconductor. Confirm that you have received the latest product standards or specifications before final design. Harbour City. 7.sg/grp3/sicd/index. Group III (Electronic Components) 7/F. No one is permitted to reproduce or duplicate. in connection with use of the information contained in this document. Tokyo 100-0004. United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 778322 Hitachi Asia Pte. combustion control. Electronic Components Group.hitachi. Hung Kuo Building. Ltd.Cautions 1. contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury. the whole or part of this document without written approval from Hitachi.hitachi.. including intellectual property rights.167. San Jose.hitachi. consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes. 179 East Tasman Drive.