Active Power Filter for Harmonic Compensation

N. A. Rahim, S. Mekhilef and I. Zahrul Dept. of Electrical Engineering, University of Malaya 50603 Kuala Lumpur, Malaysia Email: saadgum.edu.my
Abstract-This paper presents a single-phase active power filter for harmonic compensation which is consists of a series active power filter and a shunt passive filter. The active filter connected in series to a source acts as a harmonic isolator between the source and load whereas the shunt passive filter is connected in parallel with a load and suppresses the harmonic current produced by the load. The PSpice®, Matlab/Simulink® and MAX PLUS IIt softwares are used for simulation and

hardware implementation. From the simulation and experimental results it is confirmed that the filter topology is capable of compensating the load current and voltage harmonic distortion within the stipulated limits laid down by the international standard.

Keywords. single phase activefilter, harmonic compensation, and PWM.


Power-electronics circuits are widely used in industrial equipment, such as frequency changers, motor-drive systems, etc. Such equipment presents nonlinear impedance to the utility, generating large harmonic currents with well known adverse V. PROPOSED TOPOLOGY effects, such as low power factor, low efficiency and destruction of other equipment (e.g. the power capacitor can be damaged by The proposed topology consists of a series active power the resonant overvoltage etc.). Also, some precision instruments filter and a shunt passive filter. The active filter connected in and communication equipment will be interfered with the EMI. series to a source acts as a harmonic isolator between the Therefore, utility power quality has become an important issue source and load whereas the shunt passive filter is connected recently. Many research papers and methods have been proposed in parallel with a load and suppresses the harmonic current to solve these problems. Conventionally, a passive LC filter was produced by the load as shown in Figure 1. used to suppress the harmonics, capacitors being used to compensate the lagging power factor. [1-3] Passive filters consisting of a bank of tuned LC filters and/or a high-pass filter have been broadly used to suppress harmonics because of a low initial cost and high efficiency. However, passive filters have the following disadvantages: 1) Source impedance strongly affects filtering characteristics. 2) Parallel resonance between a source and a passive filter causes amplification of harmonic currents on the source side at specific frequencies. 3) A passive filter may fall into series resonance with a source so that voltage distortion produces excessive harmonic currents flowing into the passive filter. [3-5] The effects of current harmonic distortion are poor Active Filter utilization of distribution wiring and plant, increased power loss, high current flow in the neutral line and dangerous cable Fig. 1. System configuration of hybrid active power filter overheating. Voltage harmonic interrupts the proper operation of digital electronics mainly communications and process

control, which needs sinusoidal supply voltage. Harmonic problem may result in mal-operation of protection equipment, which does not; itself draw harmonic currents from the supply. [6-9]. To overcome the limitation of the passive filter Active Power Filter is introduced. The effectiveness of Active Power Filter depends on the requirements, inverter type and topology. On the basis of topology Active Power Filter can be classified as series connected Active Power Filter and Shunt connected Active Power Filter. Series connected Active Power Filter can be connect before the load in series with the mains using a matching transformer to eliminate the voltage harmonics and to balance and regulate the terminal voltage of the load. Also it can be used to regulate the negative sequence voltage at the load. So the series Active Power Filter works as a controllable voltage source. The drawbacks of this series connected Active Power Filter is, it only compensates the voltage harmonics and another problem is for the short circuit in the load end. This short circuit current passes through the series transformer winding, which may overload the series transformer.

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M = 49 Total modulating data for half cycle (1480°). and generates a signal for down counting similarly.984ms ---(1) Thf =2*9. I- 19. The sine data are stored in internal ROM unit as a look up table format. TClk = lclk Sec III.019968s =50.1)*2 required c~arrier Time for data). Each counting value determines the address of ROM for each data. The frequency is considered as main clock frequency. The modulating signal is the multiplication of a sine data and an Time for one carrier wave. The decision is based on -52ps various factors such as inverter topology.Ih tstep MT= (49 . A Up-Down counter is used to read the data from ROM. and the counter changes its counting direction.2khz. and goes to maximum. n is the bit value of the counter The single phase PWM generated using a carrier wave =510 which is compared with the modulating signal data. the monitoring logics interrupt the counting.215kHz L~~~~. This configuration is known as Active Power Filter. more switching stresses and power losses occur in the device. The external multiplicand and the = 510* stored data will determine the modulation index of the PWM.1k) When the counter starts counting in up direction. However at high frequency. Thalf * (2* Fig. can be expressed by the following formula: = 96* (2* 524s) = fC (2n _I 1) 2 fclk Time required for full cycle. A passive filter is connected in parallel before the load at the load end.O1Hz A sine voltage equation is used to generate data to store in ROM for sinusoidal waveform. TUE MODULATOR Total step for a carrier frequency.o ry-m irnar&tn courier siep n u _T . Total 49 data is generated for 900 (quarter cycle) of a sine waveform. where the clock frequency needs to be calculated =510 1 1 precisely as shown in figure 2. The carrier frequency (fQ) has 9.83MHz been decided to operate 19. fclk Determination of carrier frequency is the first step of design process. fI1k is the main clock frequency and n is the bit size of the up-down counter. f= peripheral components. Operating at high frequency is better than the low frequency where the harmonic components can be shifted to higher order.83MHz Period of the main clock frequency. T = 2 9. Tc = N * Tclk external data. N = (21 _-1)* 2. and the process repeats continuously. 52 Ps = (28 _21)2 Two carrier wave are compared with one modulating data Total modulating value in rom. is the carrier frequency. Up-down counter and some peripheral logic gates are used to develop a triangular wave. The counter is clocked externally by a clock generated from the phase locked loop circuit. acoustic radiations. Frequency of the PWM output. The rate at which the up-down counter incremented or decremented is determined by the main clock frequency (f. pattern of a carrier wave Tj) half cycle (96 =96 modulb ating The carrier frequency has a relationship with the main clock frequency. For up counting 1076 .A single-phase voltage source inverter is connected in series between the ac source and a single-phase full bridge diode rectifier with a non-linear harmonics producing load. fclk =9.019968s = Where f. and the up-down counter. type of power switching devices used and the limitation of Carrier frequency.984ms O 0. f T 0. when the counter reaches to minimum counting value. some logic gates monitor it.2.

04 0. same data is counted continuously.07 0. Figure 4 shows the large scale of the PWM\ pattern. after compensation by passive filter and compensation by active power filter and passive filter are shown in different load separately. data from the Matlab R workspace is exported to MathcadR' software.06 0.o ct 0.05 Time 0.06 0.1 Time individually and compensated by active power filter and passive filter.04 0. 1077 .03 0. consideration between inductance and resistance and the consideration between capacitance and resistance. Figure 5 shows the voltage and current source for the inductive load without compensation by active and passive filter after analyzing the waveforms harmonic spectrum of current source has a THD of 23.070o. Large scale presentation of SPWM Figure 6 shows the voltage and current source for the inductive load with compensation by active and passive filter. Voltage and current source without compensation Time Fig. capacitor and resistance are used as a non-linear load. A closed loop control system is experimentally developed compensation by active and passive and tested to verify the performance of the proposed Fig.09 0.1 Fig. RESULTS has a THD of 2. To compare the results between the simulations and experiments some tables are A.02 0. After analyzing the waveforms harmonic spectrum of curr ent source VI.60 . Total harmonic component is also calculated by MathcadRsoftware. PWM\ technique and the DC bus voltage control. The voltage and current wave are recorded for each types of load. the 'cfft' of data is analysed. Thus.3. The prototype consists of a 02 000004-TIm single-phase diode bridge rectifier with inductor.4. Two sets of loads are tested 0.06 0. 400 I I I I I I I M2 I) Ci7h1 10 X¼z1>t ~5r I TV.Experimental Results with Inductive Load technique is implemented and tested to improve the power Figure 7 shows the voltage and curr ent source without factor also the reduce the harmonic content in the current compensation by active and passive filter.80 . it counts from 0-48 decimal value.5.05 0. it counts from 47-01 decimal values.2khz. (D 4- t.09 0. The carrier frequency of this SPWM\ is 19.Simulation Results with Inductive Load As an inductive load an inductor with a variable is connected in DC side of the AC to DC rectifier.05 0. After analyzing the source waveforms harmonic spectrum of curr ent source has a THD of ----- 23.09 El 7.07 0. The source curr ent and its spectrum before compensation. For the frequency spectrum Mathcad' software is used.03 0. using DC bus voltage detecting approach.04 0. presented.__ Ti lT Fig. The system is simulated by two sets of load. If the previous cycle is considered as positive half cycle.06 0. Figure 3 shows the experimental result of SPWM.03 0. 6. The PWM\ shifting B. vx YV -LI Dwm IT -±ivu.07 0.02 0. To display the bar graph of different harmonic component including the fundamental component.06 0. The model shown in Figure 1 is simulated for the proposed hybrid active power filter by using PSpice R' and 400 00 00 00 00---00 ----01 Matlab/Simulink R simaulation tool. for negative half cycle. and separated by digital and technique with a 1 and 0 pulses of lOins length.mode.02 0.Voltage and current source after filter algorithm. one complete half cycle is represented by 96 data.06 Time 0. and for down counting mode. Experimental SPWM Time -4001 0.

07% active power filter and passive filter Compensated by 2.o ct 1I Comparison of the Total Harmonic Distortion (THD) compensation Simulated TABLE II Before Compensated by only passive filter 12.2700 9th harmonic 3rd harmonic 5th harmonic 2. After analyzing the and 10 show the PWM\ shifting pattern with respect to system waveforms harmonic spectrum of current source has a THD of voltage... 10.I Vol Table II represents the THD for simulation and experimental results before and after compensation. by only passive filter and the combination of active power filter and passive filter respectively.) . (D I I 4- t.9800 6.6800 4.9600 2. for current 1i5A/div.6% Inductive load Experimental Simulated 6. 900 lagging PWM with reference to the system voltage Inductive 7th harmonic 3. Voltage and curreihiMrce without compensation (Scale: For voltage 150V/div. 6.33% 6.78% ii Capacitive load Experimental Time Fig. The simulation and the hardware results prove the validity of the proposed hybrid active power filter.260o whereas active and Capacitive 7th harmonic 9th harmonic 4. CONCLUSION The system was tested using inductive load.z. V. for current 1i5A/div.9100 1.6200 1078 . the harmonic contents of the source currents before and after compensation are given in Table I Table I List of harmonics magnitude before and after compensation Before compensation After compensation 3rd harmonic 5th harmonic 15. passive filter reduces the harmonic from 23.6300 2.7. Experimental results show that for the inductive load.8% -I) Cli I The PWM\ used for controlling the active power filter can be shifted by counting.070o to 11.8500 500 2.80o .) Time For comparison.2700 3. Simulation and experimental results are compared in different tables.99% 16% 27.4700 2.~ 1 5 Vlolt 10 I 32.7% 7. 900 leading PWM with reference to the system voltage Fig.6400 Time Fig. Figures 9 The compensated result by active power filter and passive filter is represented in Figure 8..4600 3rd harmonic 5th harmonic 7th harmonic 9th harmonic 3rd harmonic 5th harmonic 7th harmonic 9th harmonic 3.26% 23.1300 The graphs and tables are presented above to explain the performance of a single-phase active power filter.6% 11.8.8500 37.8% 23.rQ ivy opl4 Q T iT Fig.6% 38. 7. compare and reset method.8900 10. Voltage and current source after compensation (Scale: For voltage 130V/ div.9.

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