8051 Instruction Set

http://www.win.tue.nl/~aeb/comp/8051/set8051.html

8051 Instruction Set
Instructions by opcode 0x00 0x01 0x02 0x03 0x00 NOP AJMP LJMP RR 0x10 JBC ACALL LCALL RRC AJMP RET RL 0x20 JB 0x30 JNB ACALL RETI RLC AJMP ORL ORL 0x40 JC 0x50 JNC ACALL ANL ANL AJMP XRL XRL 0x60 JZ 0x70 JNZ ACALL ORL JMP 0x80 SJMP AJMP ANL MOVC 0x90 MOV ACALL MOV MOVC 0xa0 ORL AJMP MOV INC 0xb0 ANL ACALL CPL CPL 0xc0 PUSH AJMP CLR CLR 0xd0 POP ACALL SETB SETB 0xe0 MOVX AJMP MOVX MOVX 0xf0 MOVX ACALL MOVX MOVX Alphabetical List of Instructions ACALL - Absolute Call ADD, ADDC - Add Accumulator (With Carry) AJMP - Absolute Jump ANL - Bitwise AND CJNE - Compare and Jump if Not Equal CLR - Clear Register CPL - Complement Register DA - Decimal Adjust DEC - Decrement Register DIV - Divide Accumulator by B DJNZ - Decrement Register and Jump if Not Zero INC - Increment Register JB - Jump if Bit Set JBC - Jump if Bit Set and Clear Bit JC - Jump if Carry Set JMP - Jump to Address JNB - Jump if Bit Not Set JNC - Jump if Carry Not Set JNZ - Jump if Accumulator Not Zero JZ - Jump if Accumulator Zero LCALL - Long Call LJMP - Long Jump MOV - Move Memory MOVC - Move Code Memory MOVX - Move Extended Memory MUL - Multiply Accumulator by B NOP - No Operation ORL - Bitwise OR 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f
INC DEC ADD INC DEC ADD INC DEC ADD INC DEC ADD INC DEC ADD INC DEC ADD INC DEC ADD INC DEC ADD INC DEC ADD INC DEC ADD INC DEC ADD INC DEC ADD

ADDC ADDC ADDC ADDC ADDC ADDC ADDC ADDC ADDC ADDC ADDC ADDC ORL ANL XRL ORL ANL XRL ORL ANL XRL ORL ANL XRL ORL ANL XRL ORL ANL XRL ORL ANL XRL ORL ANL XRL ORL ANL XRL ORL ANL XRL ORL ANL XRL ORL ANL XRL

MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV DIV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV

SUBB SUBB SUBB SUBB SUBB SUBB SUBB SUBB SUBB SUBB SUBB SUBB MUL ? MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV

CJNE CJNE CJNE CJNE CJNE CJNE CJNE CJNE CJNE CJNE CJNE CJNE SWAP XCH DA CLR CPL XCH XCH XCH XCH XCH XCH XCH XCH XCH XCH

DJNZ XCHD XCHD DJNZ DJNZ DJNZ DJNZ DJNZ DJNZ DJNZ DJNZ MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV

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8051 Instruction Set

http://www.win.tue.nl/~aeb/comp/8051/set8051.html

POP - Pop Value From Stack PUSH - Push Value Onto Stack RET - Return From Subroutine RETI - Return From Interrupt RL - Rotate Accumulator Left RLC - Rotate Accumulator Left Through Carry RR - Rotate Accumulator Right RRC - Rotate Accumulator Right Through Carry SETB - Set Bit SJMP - Short Jump SUBB - Subtract From Accumulator With Borrow SWAP - Swap Accumulator Nibbles XCH - Exchange Bytes XCHD - Exchange Digits XRL - Bitwise Exclusive OR Undefined - Undefined Instruction

8051 Instruction Set: ACALL
Operation: ACALL Function: Absolute Call Within 2K Block ACALL code address Syntax: Instructions ACALL page0 ACALL page1 ACALL page2 ACALL page3 ACALL page4 ACALL page5 ACALL page6 ACALL page7 OpCode Bytes Flags 0x11 0x31 0x51 0x71 0x91 0xB1 0xD1 0xF1 2 2 2 2 2 2 2 2 None None None None None None None None

Description: ACALL unconditionally calls a subroutine at the indicated code address. ACALL pushes the address of the instruction that follows ACALL onto the stack, least-significant-byte first, most-significant-byte second. The Program Counter is then updated so that program execution continues at the indicated address. The new value for the Program Counter is calculated by replacing the least-significant-byte of the Program Counter with the second byte of the ACALL instruction, and replacing bits 0-2 of the most-significant-byte of the Program Counter with 3 bits that indicate the page. Bits 3-7 of the most-significant-byte of the Program Counter remain unchaged. Since only 11 bits of the Program Counter are affected by ACALL, calls may only be made to routines located within the same 2k block as the first byte that follows ACALL. See Also: LCALL, RET

8051 Instruction Set: ADD

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OV C. AC. OV C. OV C. if the unsigned summed value of the Accumulator. the Carry bit is cleared. Otherwise. OV C. DEC 8051 Instruction Set: AJMP Operation: AJMP Function: Absolute Jump Within 2K Block AJMP code address Syntax: Instructions OpCode Bytes Flags 3 of 22 9/2/2013 10:14 PM . AC. operand and (in the case of ADDC) the Carry flag treated as signed values results in a value that is out of the range of a signed byte (-128 through +127) the Overflow flag is set.@R1 ADD A. The Carry bit (C) is set if there is a carry-out of bit 7. AC. OV C. AC. AC. OV C. if the unsigned summed value of the low nibble of the Accumulator. AC. The Auxillary Carry (AC) bit is set if there is a carry-out of bit 3. INC. In other words. AC. The value operand is not affected.@R0 ADDC A.win. Add Accumulator With Carry ADD A. OV C.@R1 ADDC A. ADD and ADDC function identically except that ADDC adds the value of operand as well as the value of the Carry flag whereas ADD does not add the Carry flag to the result.R4 ADD A. OV Instructions ADDC A.html Operation: ADD. AC.tue. OV C.R6 ADD A. AC. OV C.R6 ADDC A. but not both.R5 ADD A. leaving the resulting value in the Accumulator.R2 ADDC A.R1 ADD A.operand Syntax: ADDC A. Otherwise. OV Description: Description: ADD and ADDC both add the value operand to the value of the Accumulator. AC. ADDC Function: Add Accumulator. AC.operand Instructions ADD A.R3 ADD A. OV C. OV C. AC. Otherwise. OV C.R7 OpCode Bytes 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F 2 2 1 1 1 1 1 1 1 1 1 1 Flags C. OV C.R5 ADDC A. OV C.R1 ADDC A. See Also: SUBB. OV C. OV C. AC. AC. DA. the Overflow flag is cleared. OV C. AC. In other words. In other words. AC.R2 ADD A. AC. AC.@R0 ADD A.#data ADDC A. operand and (in the case of ADDC) the Carry flag exceeds 255 Carry is set. OV C. the Auxillary Carry flag is cleared.#data ADD A. AC. OV C.R3 ADDC A.nl/~aeb/comp/8051/set8051. The Overflow (OV) bit is set if there is a carry-out of bit 6 or out of bit 7. OV C.R0 ADDC A. AC. AC.8051 Instruction Set http://www. AC. AC. OV C.R7 OpCode Bytes 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B 0x2C 0x2D 0x2E 0x2F 2 2 1 1 1 1 1 1 1 1 1 1 Flags C. operand and (in the case of ADDC) the Carry flag exceeds 15 the Auxillary Carry flag is set.R0 ADD A.iram addr ADDC A. if the addition of the Accumulator. OV C.iram addr ADD A.R4 ADDC A. AC.

Since only 11 bits of the Program Counter are affected by AJMP.R1 ANL A. See Also: LJMP.nl/~aeb/comp/8051/set8051. SJMP 8051 Instruction Set: ANL Operation: ANL Function: Bitwise AND ANL operand1.@R0 ANL A. Bits 3-7 of the most-significant-byte of the Program Counter remain unchaged.8051 Instruction Set http://www. The new value for the Program Counter is calculated by replacing the least-significant-byte of the Program Counter with the second byte of the AJMP instruction.#data ANL A.R6 ANL A.R5 ANL A. and replacing bits 0-2 of the most-significant-byte of the Program Counter with 3 bits that indicate the page of the byte following the AJMP instruction. operand2 Syntax: Instructions ANL iram addr.R4 ANL A.R0 ANL A. jumps may only be made to code located within the same 2k block as the first byte that follows AJMP.html AJMP page0 AJMP page1 AJMP page2 AJMP page3 AJMP page4 AJMP page5 AJMP page6 AJMP page7 0x01 0x21 0x41 0x61 0x81 0xA1 0xC1 0xE1 2 2 2 2 2 2 2 2 None None None None None None None None Description: AJMP unconditionally jumps to the indicated code address.win.#data ANL A.R7 OpCode Bytes Flags 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5A 0x5B 0x5C 0x5D 0x5E 0x5F 2 3 2 2 1 1 1 1 1 1 1 1 1 1 None None None None None None None None None None None None None None 4 of 22 9/2/2013 10:14 PM .tue.iram addr ANL A.R2 ANL A.R3 ANL A.A ANL iram addr.@R1 ANL A.

html ANL C.reladdr CJNE @R1. otherwise it is cleared. If the two operands are equal program flow continues with the instruction following the CJNE instruction.reladdr CJNE R1.operand2.#data. XRL 8051 Instruction Set: CJNE Operation: CJNE Function: Compare and Jump If Not Equal CJNE operand1.reladdr CJNE R4.win.8051 Instruction Set http://www.reladdr CJNE A.reladdr CJNE R5.reladdr CJNE R0.reladdr CJNE R2.reladdr Syntax: Instructions CJNE A.#data.#data. A logical "AND" compares the bits of each operand and sets the corresponding bit in the resulting byte only if the bit was set in both of the original operands.#data./bit addr 0x82 0xB0 2 2 C C Description: ANL does a bitwise "AND" operation between operand1 and operand2. The value of operand2 is not affected. otherwise the resulting bit is cleared. See Also: DJNZ 8051 Instruction Set: CLR Operation: CLR Function: Clear Register CLR register Syntax: 5 of 22 9/2/2013 10:14 PM .#data.#data.nl/~aeb/comp/8051/set8051.reladdr CJNE R3.#data.tue. leaving the resulting value in operand1.iram addr.reladdr CJNE R7.bit addr ANL C.#data.reladdr CJNE @R0. The Carry bit (C) is set if operand1 is less than operand2.#data. See Also: ORL.#data.#data.reladdr CJNE R6.reladdr OpCode Bytes Flags 0xB4 0xB5 0xB6 0xB7 0xB8 0xB9 0xBA 0xBB 0xBC 0xBD 0xBE 0xBF 3 3 3 3 3 3 3 3 3 3 3 3 C C C C C C C C C C C C Description: CJNE compares the value of operand1 and operand2 and branches to the indicated relative address if operand1 and operand2 are not equal.

nl/~aeb/comp/8051/set8051. SETB 8051 Instruction Set: DA Operation: DA Function: Decimal Adjust Accumulator DA A Syntax: Instructions OpCode Bytes Flags DA 0xD4 1 C Description: DA adjusts the contents of the Accumulator to correspond to a BCD (Binary Coded Decimal) number after two BCD numbers have been added by the ADD or ADDC instruction. This can be thought of as "Accumulator Logical Exclusive OR 255" or as "255-Accumulator. or if 0x06 was added to the accumulator in the first step.win. See Also: ADD. See Also: CLR. If the register is a bit (including the carry bit).8051 Instruction Set http://www. not the last value read from it. only the specified bit is affected. ADDC 6 of 22 9/2/2013 10:14 PM . the value that will be complemented is based on the last value written to that bit. The Carry bit (C) is set if the resulting value is greater than 0x99. If the carry bit is set or if the value of bits 0-3 exceed 9. 0x06 is added to the accumulator. otherwise it is cleared." If the operand refers to a bit of an output Port. 0x60 is added to the accumulator.tue. leaving the result in operand. If the carry bit was set when the instruction began. Clearing the Accumulator sets the Accumulator's value to 0. See Also: SETB 8051 Instruction Set: CPL Operation: CPL Function: Complement Register CPL operand Syntax: Instructions OpCode Bytes Flags CPL A CPL C CPL bit addr 0xF4 0xB3 0xB2 1 1 2 None C None Description: CPL complements operand. If operand is the Accumulator then all the bits in the Accumulator will be reversed. If operand is a single bit then the state of the bit will be reversed.html Instructions OpCode Bytes Flags CLR bit addr CLR C CLR A 0xC2 0xC3 0xE4 2 1 1 None C None Description: CLR clears (sets to 0) all the bit(s) of the indicated register.

tue. See Also: MUL AB 7 of 22 9/2/2013 10:14 PM . See Also: INC.nl/~aeb/comp/8051/set8051. OV Description: Divides the unsigned value of the Accumulator by the unsigned value of the "B" register.8051 Instruction Set http://www.win. Note: The Carry Flag is NOT set when the value "rolls over" from 0 to 255. otherwise it is cleared. decrementing the value will cause it to reset to 255 (0xFF Hex).html 8051 Instruction Set: DEC Operation: DEC Function: Decrement Register DEC register Syntax: Instructions DEC A DEC iram addr DEC @R0 DEC @R1 DEC R0 DEC R1 DEC R2 DEC R3 DEC R4 DEC R5 DEC R6 DEC R7 OpCode Bytes Flags 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F 1 2 1 1 1 1 1 1 1 1 1 1 None None None None None None None None None None None None Description: DEC decrements the value of register by 1. The Carry flag (C) is always cleared. The resulting quotient is placed in the Accumulator and the remainder is placed in the "B" register. SUBB 8051 Instruction Set: DIV Operation: DIV Function: Divide Accumulator by B DIV AB Syntax: Instructions OpCode Bytes Flags DIV AB 0x84 1 C. If the initial value of register is 0. The Overflow flag (OV) is set if division by 0 was attempted.

reladdr DJNZ R1. If the new value of register is 0 program flow continues with the instruction following the DJNZ instruction.8051 Instruction Set http://www.reladdr DJNZ R0. decrementing the value will cause it to reset to 255 (0xFF Hex). See Also: DEC.reladdr DJNZ R3.html 8051 Instruction Set: DJNZ Operation: DJNZ Function: Decrement and Jump if Not Zero DJNZ register.reladdr DJNZ R2. If the new value of register is not 0 the program will branch to the address indicated by relative addr. JZ.win.tue.nl/~aeb/comp/8051/set8051.reladdr DJNZ R6.reladdr DJNZ R5.reladdr Syntax: Instructions DJNZ iram addr.reladdr DJNZ R4. JNZ 8051 Instruction Set: INC Operation: INC Function: Increment Register INC register Syntax: Instructions INC A INC iram addr INC @R0 INC @R1 INC R0 INC R1 INC R2 INC R3 INC R4 INC R5 OpCode Bytes Flags 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 1 2 1 1 1 1 1 1 1 1 None None None None None None None None None None 8 of 22 9/2/2013 10:14 PM .reladdr OpCode Bytes Flags 0xD5 0xD8 0xD9 0xDA 0xDB 0xDC 0xDD 0xDE 0xDF 3 2 2 2 2 2 2 2 2 None None None None None None None None None Description: DJNZ decrements the value of register by 1. If the initial value of register is 0.reladdr DJNZ R7.

incrementing the value will cause it to reset to 0. Again. If the bit is not set program execution continues with the instruction following the JB instruction. If the initial value of DPTR is 65535 (0xFFFF Hex).html INC R6 INC R7 INC DPTR 0x0E 0x0F 0xA3 1 1 1 None None None Description: INC increments the value of register by 1. JNB 8051 Instruction Set: JBC Operation: JBC Function: Jump if Bit Set and Clear Bit JB bit addr . incrementing the value will cause it to reset to 0.tue. reladdr Syntax: Instructions JB bit addr . See Also: JBC. DEC 8051 Instruction Set: JB Operation: JB Function: Jump if Bit Set JB bit addr . See Also: JB. Note: The Carry Flag is NOT set when the value "rolls over" from 255 to 0. In the case of "INC DPTR". reladdr Syntax: Instructions JBC bit addr . the Carry Flag is NOT set when the value of DPTR "rolls over" from 65535 to 0. If the bit is not set program execution continues with the instruction following the JBC instruction. ADDC.8051 Instruction Set http://www. If the initial value of register is 255 (0xFF Hex). See Also: ADD.reladdr OpCode Bytes Flags 0x10 3 None Description: JBC will branch to the address indicated by reladdr if the bit indicated by bit addr is set. the value two-byte unsigned integer value of DPTR is incremented.nl/~aeb/comp/8051/set8051.reladdr OpCode Bytes Flags 0x20 3 None Description: JB branches to the address indicated by reladdr if the bit indicated by bit addr is set.win. Before branching to reladdr the instruction will clear the indicated bit. JNB 8051 Instruction Set: JC Operation: JC Function: Jump if Carry Set 9 of 22 9/2/2013 10:14 PM .

reladdr OpCode Bytes Flags 0x30 3 None Description: JNB will branch to the address indicated by reladdress if the indicated bit is not set.8051 Instruction Set http://www.reladdr Syntax: Instructions JNB bit addr . SJMP 8051 Instruction Set: JNB Operation: JNB Function: Jump if Bit Not Set JNB bit addr . See Also: JB.html Syntax: JC reladdr Instructions OpCode Bytes Flags JC reladdr 0x40 2 None Description: JC will branch to the address indicated by reladdr if the Carry Bit is set.win. If the bit is set program execution continues with the instruction following the JNB instruction.tue. See Also: JNC 8051 Instruction Set: JMP Operation: JMP Function: Jump to Data Pointer + Accumulator JMP @A+DPTR Syntax: Instructions JMP @A+DPTR OpCode Bytes Flags 0x73 1 None Description: JMP jumps unconditionally to the address represented by the sum of the value of DPTR and the value of the Accumulator. See Also: LJMP. JBC 8051 Instruction Set: JNC Operation: JNC Function: Jump if Carry Not Set JNC reladdr Syntax: Instructions OpCode Bytes Flags JNC reladdr 0x50 2 None 10 of 22 9/2/2013 10:14 PM .nl/~aeb/comp/8051/set8051. If the Carry Bit is not set program execution continues with the instruction following the JC instruction. AJMP.

If the value of the Accumulator is zero program execution continues with the instruction following the JNZ instruction.html Description: JNC branches to the address indicated by reladdr if the carry bit is not set. causing program execution to continue at that address. If the carry bit is set program execution continues with the instruction following the JNB instruction.tue.win.8051 Instruction Set http://www. See Also: JNZ 8051 Instruction Set: LCALL Operation: LCALL Function: Long Call LCALL code addr Syntax: Instructions LCALL code addr OpCode Bytes Flags 0x12 3 None Description: LCALL calls a program subroutine. See Also: JZ 8051 Instruction Set: JZ Operation: JZ Function: Jump if Accumulator Zero JNZ reladdr Syntax: Instructions OpCode Bytes Flags JZ reladdr 0x60 2 None Description: JZ branches to the address indicated by reladdr if the Accumulator contains the value 0. high byte second). LCALL increments the program counter by 3 (to point to the instruction following LCALL) and pushes that value onto the stack (low byte first. If the value of the Accumulator is non-zero program execution continues with the instruction following the JNZ instruction. The Program Counter is then set to the 16-bit value which follows the LCALL opcode. See Also: JC 8051 Instruction Set: JNZ Operation: JNZ Function: Jump if Accumulator Not Zero JNZ reladdr Syntax: Instructions OpCode Bytes Flags JNZ reladdr 0x70 2 None Description: JNZ will branch to the address indicated by reladdr if the Accumulator contains any value except 0.nl/~aeb/comp/8051/set8051. 11 of 22 9/2/2013 10:14 PM .

R5 MOV A. JMP 8051 Instruction Set: MOV Operation: MOV Function: Move Memory MOV operand1.8051 Instruction Set http://www.#data MOV @R1.iram addr OpCode Bytes Flags 0x76 0x77 0xF6 0xF7 0xA6 0xA7 0x74 0xE6 0xE7 0xE8 0xE9 0xEA 0xEB 0xEC 0xED 0xEE 0xEF 0xE5 2 2 1 1 2 2 2 1 1 1 1 1 1 1 1 1 1 2 None None None None None None None None None None None None None None None None None None 12 of 22 9/2/2013 10:14 PM .A MOV @R1. RET 8051 Instruction Set: LJMP Operation: LJMP Function: Long Jump LJMP code addr Syntax: Instructions LJMP code addr OpCode Bytes Flags 0x02 3 None Description: LJMP jumps unconditionally to the specified code addr.html See Also: ACALL.#data MOV @R0.@R1 MOV A.win. SJMP.R0 MOV A.R7 MOV A.tue.R4 MOV A.R6 MOV A.iram addr MOV @R1.R3 MOV A. See Also: AJMP.nl/~aeb/comp/8051/set8051.A MOV @R0.R1 MOV A.#data MOV A.operand2 Syntax: Instructions MOV @R0.@R0 MOV A.R2 MOV A.iram addr MOV A.

#data MOV R3.#data MOV R2.A MOV R7.R3 MOV iram addr.iram addr MOV R5.iram addr MOV bit addr .@R0 MOV iram addr.#data MOV R5.R1 MOV iram addr.#data MOV R4.#data MOV R7.html MOV C.iram addr MOV R1.@R1 MOV iram addr.R0 MOV iram addr.R2 MOV iram addr.#data MOV iram addr.#data16 MOV R0.bit addr MOV DPTR.A MOV R0.A MOV R3.A MOV R5.iram addr MOV R2.#data MOV R0.iram addr MOV R4.8051 Instruction Set http://www.#data MOV R6.#data MOV R1.A MOV R2.iram addr MOV R6.tue.A MOV R4.iram addr MOV R7.A MOV R6.A MOV R1.R5 0xA2 0x90 0x78 0x79 0x7A 0x7B 0x7C 0x7D 0x7E 0x7F 0xF8 0xF9 0xFA 0xFB 0xFC 0xFD 0xFE 0xFF 0xA8 0xA9 0xAA 0xAB 0xAC 0xAD 0xAE 0xAF 0x92 0x75 0x86 0x87 0x88 0x89 0x8A 0x8B 0x8C 0x8D 2 3 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 3 2 2 2 2 2 2 2 2 C None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None 13 of 22 9/2/2013 10:14 PM .C MOV iram addr.R4 MOV iram addr.iram addr MOV R3.win.nl/~aeb/comp/8051/set8051.

0x20. No flags are affected unless the instruction is moving the value of a bit into the carry bit in which case the carry bit is affected or unless the instruction is moving a value into the PSW register (which contains all the program flags).@R0 OpCode Bytes Flags 0xF0 0xF2 0xF3 0xE0 0xE2 1 1 1 1 1 None None None None None 14 of 22 9/2/2013 10:14 PM .@A+PC OpCode Bytes Flags 0x93 0x83 1 1 None None Description: MOVC moves a byte from Code Memory into the Accumulator.operand2 Syntax: Instructions MOVX @DPTR. the operand bytes of the instruction are stored in reverse order.win.A MOVX A. The Code Memory address from which the byte will be moved is calculated by summing the value of the Accumulator with either DPTR or the Program Counter (PC). XCHD. MOVX 8051 Instruction Set: MOVX Operation: MOVX Function: Move Data To/From External Memory (XRAM) MOVX operand1.nl/~aeb/comp/8051/set8051. 0x50 means "Move the contents of Internal RAM location 0x20 to Internal RAM location 0x50" whereas the opposite would be generally presumed. PC is first incremented by 1 before being summed with the Accumulator.A MOVX @R1.A MOVX @R0.A MOV iram addr .@DPTR MOVX A.R7 MOV iram addr. POP 8051 Instruction Set: MOVC Operation: MOVC Function: Move Code Byte to Accumulator MOVC A.8051 Instruction Set http://www.iram addr". That is. Both operand1 and operand2 must be in Internal RAM. The value of operand2 is not affected.@A+register Syntax: Instructions MOVC A. See Also: MOVC.html MOV iram addr. In the case of the Program Counter.iram addr 0x8E 0x8F 0xF5 0x85 2 2 2 3 None None None None Description: MOV copies the value of operand2 into operand1. ** Note: In the case of "MOV iram addr. MOVX. PUSH. XCH.@A+DPTR MOVC A. the instruction consisting of the bytes 0x85. See Also: MOV.R6 MOV iram addr.tue.

This instruction uses only P0 (port 0) to output the 8-bit address and data. If operand1 is @DPTR. as it's name suggests.nl/~aeb/comp/8051/set8051. waste time No Operation Syntax: Instructions OpCode Bytes Flags NOP 0x00 1 None Description: NOP. the Accumulator is moved to the 8-bit External Memory address indicated by the specified Register. The least significant byte of the result is placed in the Accumulator and the most-significant-byte is placed in the "B" register. P2 (port 2) is not affected. Absolutely no flags or registers are affected.html MOVX A. causes No Operation to take place for one machine cycle. If operand2 is @R0 or @R1 then the byte is moved from External Memory into the Accumulator.@R1 0xE3 1 None Description: MOVX moves a byte to or from External Memory into or from the Accumulator. If operand2 is DPTR then the byte is moved from External Memory into the Accumulator. otherwise it is cleared. 8051 Instruction Set: ORL Operation: ORL 15 of 22 9/2/2013 10:14 PM . The Carry Flag (C) is always cleared. The Overflow Flag (OV) is set if the result is greater than 255 (if the most-significant byte is not zero).tue. See Also: DIV 8051 Instruction Set: NOP Operation: NOP Function: None. MOVC 8051 Instruction Set: MUL Operation: MUL Function: Multiply Accumulator by B MUL AB Syntax: Instructions OpCode Bytes Flags MUL AB 0xA4 1 C. If operand1 is @R0 or @R1. OV Description: Multiples the unsigned value of the Accumulator by the unsigned value of the "B" register.8051 Instruction Set http://www. This instruction uses both P0 (port 0) and P2 (port 2) to output the 16-bit address and data. See Also: MOV. NOP is generally used only for timing purposes.win. the Accumulator is moved to the 16-bit External Memory address indicated by DPTR.

R1 ORL A.win.R7 ORL C.R3 ORL A. otherwise the resulting bit is cleared. leaving the resulting value in operand1. The value of operand2 is not affected. XRL 8051 Instruction Set: POP Operation: POP Function: Pop Value From Stack POP Syntax: Instructions POP iram addr OpCode Bytes Flags 0xD0 2 None Description: POP "pops" the last value placed on the stack into the iram addr specified.operand2 Syntax: Instructions ORL iram addr .R0 ORL A.@R0 ORL A. See Also: ANL./bit addr OpCode Bytes Flags 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4A 0x4B 0x4C 0x4D 0x4E 0x4F 0x72 0xA0 2 3 2 2 1 1 1 1 1 1 1 1 1 1 2 2 None None None None None None None None None None None None None None C C Description: ORL does a bitwise "OR" operation between operand1 and operand2.iram addr ORL A.tue.@R1 ORL A. A logical "OR" compares the bits of each operand and sets the corresponding bit in the resulting byte if the bit was set in either of the original operands.R6 ORL A. See Also: PUSH 16 of 22 9/2/2013 10:14 PM .#data ORL A.R4 ORL A.8051 Instruction Set http://www.R5 ORL A.R2 ORL A.#data ORL A.html Function: Bitwise OR ORL operand1. POP will load iram addr with the value of the Internal RAM address pointed to by the current Stack Pointer.A ORL iram addr. In other words.nl/~aeb/comp/8051/set8051.bit addr ORL C. The stack pointer is then decremented by 1.

Program execution continues at the address that is calculated by popping the topmost 2 bytes off the stack. then takes the value stored in iram addr and stores it in Internal RAM at the location pointed to by the incremented Stack Pointer. RETI 8051 Instruction Set: RETI Operation: RETI Function: Return From Interrupt RETI Syntax: Instructions OpCode Bytes Flags RETI 0x32 1 None Description: RETI is used to return from an interrupt service routine. RETI first enables interrupts of equal and lower priorities to the interrupt that is terminating.html 8051 Instruction Set: PUSH Operation: PUSH Function: Push Value Onto Stack PUSH Syntax: Instructions PUSH iram addr OpCode Bytes Flags 0xC0 2 None Description: PUSH "pushes" the value of the specified iram addr onto the stack. The most-significant-byte is popped off the stack first.win.8051 Instruction Set http://www. RETI functions identically to RET if it is executed outside of an interrupt service routine. The most-significant-byte is popped off the stack first.nl/~aeb/comp/8051/set8051. followed by the least-significant-byte. ACALL. See Also: RET 17 of 22 9/2/2013 10:14 PM . See Also: POP 8051 Instruction Set: RET Operation: RET Function: Return From Subroutine RET Syntax: Instructions OpCode Bytes Flags RET 0x22 1 None Description: RET is used to return from a subroutine previously called by LCALL or ACALL. Program execution continues at the address that is calculated by popping the topmost 2 bytes off the stack. See Also: LCALL.tue. followed by the least-significant-byte. PUSH first increments the value of the Stack Pointer by 1.

RRC 8051 Instruction Set: RLC Operation: RLC Function: Rotate Accumulator Left Through Carry RLC A Syntax: Instructions OpCode Bytes Flags RLC A 0x33 1 C Description: Shifts the bits of the Accumulator to the left. See Also: RL.tue.win. The left-most bit (bit 7) of the Accumulator is loaded into the Carry Flag. RR.8051 Instruction Set http://www. This function can be used to quickly multiply a byte by 2. See Also: RLC. The right-most bit (bit 0) of the Accumulator is loaded into bit 7. RRC 8051 Instruction Set: RR Operation: RR Function: Rotate Accumulator Right RR A Syntax: Instructions OpCode Bytes Flags RR A 0x03 1 None Description: Shifts the bits of the Accumulator to the right.nl/~aeb/comp/8051/set8051. RLC. See Also: RL. and the original Carry Flag is loaded into bit 0 of the Accumulator. RR.html 8051 Instruction Set: RL Operation: RL Function: Rotate Accumulator Left RL A Syntax: Instructions OpCode Bytes Flags RL A 0x23 1 C Description: Shifts the bits of the Accumulator to the left. The left-most bit (bit 7) of the Accumulator is loaded into bit 0. RRC 8051 Instruction Set: RRC Operation: RRC Function: Rotate Accumulator Right Through Carry 18 of 22 9/2/2013 10:14 PM .

See Also: CLR 8051 Instruction Set: SJMP Operation: SJMP Function: Short Jump SJMP reladdr Syntax: Instructions OpCode Bytes Flags SJMP reladdr 0x80 2 None Description: SJMP jumps unconditionally to the address specified reladdr . and the original Carry Flag is loaded into bit 7. AJMP 8051 Instruction Set: SUBB Operation: SUBB Function: Subtract from Accumulator With Borrow SUBB A. The right-most bit (bit 0) of the Accumulator is loaded into the Carry Flag. Reladdr must be within -128 or +127 bytes of the instruction that follows the SJMP instruction.8051 Instruction Set http://www.win.tue. RLC.html Syntax: RRC A Instructions OpCode Bytes Flags RRC A 0x13 1 C Description: Shifts the bits of the Accumulator to the right. See Also: RL. RR 8051 Instruction Set: SETB Operation: SETB Function: Set Bit SETB bit addr Syntax: Instructions SETB C SETB bit addr OpCode Bytes Flags 0xD3 0xD2 1 2 C None Description: Sets the specified bit.operand Syntax: Instructions OpCode Bytes Flags 19 of 22 9/2/2013 10:14 PM . See Also: LJMP.nl/~aeb/comp/8051/set8051. This function can be used to quickly divide a byte by 2.

AC.win. the subtraction of two signed bytes resulted in a value outside the range of a signed byte (-128 to 127). RRC 8051 Instruction Set: Undefined Instruction Operation: Undefined Instruction Function: Undefined 20 of 22 9/2/2013 10:14 PM . OV C. AC. The value operand is not affected. OV C. AC.html SUBB A. OV C. but not both.nl/~aeb/comp/8051/set8051. leaving the resulting value in the Accumulator. AC. See Also: ADD. otherwise it is cleared.#data SUBB A. OV C. OV C. The Auxillary Carry (AC) bit is set if a borrow was required for bit 3. AC.R7 0x94 0x95 0x96 0x97 0x98 0x99 0x9A 0x9B 0x9C 0x9D 0x9E 0x9F 2 2 1 1 1 1 1 1 1 1 1 1 C.R6 SUBB A. AC. In other words. RR. OV C. AC.iram addr SUBB A. OV Description: SUBB subtract the value of operand from the value of the Accumulator. AC.@R0 SUBB A.R3 SUBB A. This instruction is identical to executing "RR A" or "RL A" four times. AC. See Also: RL. AC.tue. AC. ADDC. In other words.R5 SUBB A. Otherwise it is cleared.8051 Instruction Set http://www. The Overflow (OV) bit is set if a borrow was required for bit 6 or for bit 7. OV C. OV C.R4 SUBB A. RLC. DEC 8051 Instruction Set: SWAP Operation: SWAP Function: Swap Accumulator Nibbles SWAP A Syntax: Instructions OpCode Bytes Flags SWAP A 0xC4 1 None Description: SWAP swaps bits 0-3 of the Accumulator with bits 4-7 of the Accumulator. OV C.R0 SUBB A.R1 SUBB A.@R1 SUBB A. In other words. OV C. AC.R2 SUBB A. The Carry Bit (C) is set if a borrow was required for bit 7. if the unsigned value being subtracted is greater than the Accumulator the Carry Flag is set. the bit is set if the low nibble of the value being subtracted was greater than the low nibble of the Accumulator. otherwise it is cleared. OV C.

tue.nl/~aeb/comp/8051/set8051.win.R5 XCH A. See Also: MOV 8051 Instruction Set: XCHD Operation: XCHD 21 of 22 9/2/2013 10:14 PM . it would be a three-byte instruction. not a documented instruction. so we present it to the world as "additional information.R7 XCH A.R2 XCH A.com user that the undefined instruction really has a format of Undefined bit1.8051 Instruction Set http://www. based on my research.bit2 and effectively copies the value of bit2 to bit1. Note: We received input from an 8052." Note: It has been reported that Philips 8051 model P89C669 uses instruction prefix 0xA5 to let the user access a different (extended) SFR area. executing this undefined instruction takes 1 machine cycle and appears to have no effect on the system except that the Carry Bit always seems to be set.R4 XCH A. The 8051 supports 255 instructions and OpCode 0xA5 is the single OpCode that is not used by any documented function.iram addr OpCode Bytes Flags 0xC6 0xC7 0xC8 0xC9 0xCA 0xCB 0xCC 0xCD 0xCE 0xCF 0xC5 1 1 1 1 1 1 1 1 1 1 2 None None None None None None None None None None None Description: Exchanges the value of the Accumulator with the value contained in register. In this case. as the name suggests.R0 XCH A.R6 XCH A.register Syntax: Instructions XCH A. 8051 Instruction Set: XCH Operation: XCH Function: Exchange Bytes XCH A.@R1 XCH A. However.R1 XCH A.@R0 XCH A. We haven't had an opportunity to verify or disprove this report.R3 XCH A. Since it is not documented nor defined it is not recommended that it be executed.html Syntax: ??? Instructions OpCode Bytes Flags ??? 0xA5 1 C Description: The "Undefined" instruction is.

R3 XRL A.operand2 Syntax: Instructions XRL iram addr .#data XRL A. Bits 4-7 of each register are unaffected.R2 XRL A.@R0 XCHD A.@R1 OpCode Bytes Flags 0xD6 0xD7 1 1 None None Description: Exchanges bits 0-3 of the Accumulator with bits 0-3 of the Internal RAM address pointed to indirectly by R0 or R1.R5 XRL A. The value of operand2 is not affected.A XRL iram addr. A logical "EXCLUSIVE OR" compares the bits of each operand and sets the corresponding bit in the resulting byte if the bit was set in either (but not both) of the original operands.#data XRL A.R7 OpCode Bytes Flags 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6A 0x6B 0x6C 0x6D 0x6E 0x6F 2 3 2 2 1 1 1 1 1 1 1 1 1 1 None None None None None None None None None None None None None None Description: XRL does a bitwise "EXCLUSIVE OR" operation between operand1 and operand2. ORL 22 of 22 9/2/2013 10:14 PM .tue.8051 Instruction Set http://www.R0 XRL A. See Also: ANL. leaving the resulting value in operand1.win. otherwise the bit is cleared.iram addr XRL A.@R0 XRL A.R6 XRL A.@R1 XRL A.nl/~aeb/comp/8051/set8051.R4 XRL A.[@R0/@R1] Syntax: Instructions XCHD A.R1 XRL A.html Function: Exchange Digit XCHD A. See Also: DA 8051 Instruction Set: XRL Operation: XRL Function: Bitwise Exclusive OR XRL operand1.