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# Kogge Stone Adder Logic Verification

D. W. Parent

## Very y similar to 4 bit CLA but note there is a P and G t term.

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The sums are broken up into 4 bits each. This will help with LVS later.

## WN/WP for a 16 bit CLA Adder in dynamic

Higher order adders are too complex to draw at the circuit level

i:k
4 input

i:k 3 input

k-1:j

i:k

i:j Buffer

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## i:k k-1:l l-1:m m-1:j

i:j
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The Manchester Carry Chain can be greatly simplifies in multiple output domino logic

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3:0

2:0

1:0

0:0

## MCC PG Group P and d G for f Each E h line li inside i id

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G=C

15:0 14:0 13:0 12:0 11:0 10:0 9:0 8:0 7:0 6:0 5:0 4:0 3:0 2:0 1:0 0:0

## Final Sum XOR inside

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Example: Find the Delay of the 16bit MCC adder. Assume the MCC domino vs Static

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15:0 14:0 13:0 12:0 11:0 10:0 9:0 8:0 7:0 6:0 5:0 4:0 3:0 2:0 1:0 0:0

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This example shows how the logic was verified ifi d of f a Kogge K St Stone Adder Add
The Major Steps were:
Convert grey and black cells to schematics Convert tree tree diagrams into a schematic Create a trusted adder Compare trusted adder to new adder

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Black Cell
When doing a completely new logic just use the th di digital it l parts t i in th the NCSU kit!

Schematic

Symbol

Make sure to edit the labels so that they can be seen in a large Schematic Schematic.
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Grey Cell
Once could use AOI or NAND NAND to implement these cells.

Schematic

Symbol

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## Does this adder work properly?

Boolean logic analysis would be great to try and show the equivalence of a ripple, or carry look ahead adder to a KS Not my strong suit.

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## Create a 9 bit bit-wise bit wise XOR

This will be used to compare the carry out and sum signals of both adders.

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Create a test bench that will feed the same test vectors into both adders and compare their outputs.
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Search for 1. If signals g are different then XOR will g give one.

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## Export Data Into Text

NC verilog tracks the changes only. WE can see that no signal was a 1 and since we did all test vectors the adders are logically equivalent.
This is all the data.

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Summary
This technique was used to finally verify a KS adder structure. There is a reason the adder was labeled adder3 This was not an efficient method of verification
Program g adder! Use Boolean logic! It still worked.
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