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EE380 – Electronics I

Lab 4

Fall 2013

Printed Circuit Boards (PCBs)
Objective The goal of this lab is to introduce students to printed board circuit design. The design portion of this lab is to layout a power supply using software downloadable from: Each group will do their own PCB layout and provide printouts of their layouts. Download the Express PCB Layout and Schematic ee380power.pcb and ee380power.sch from the class website. You will link this schematic to the layout that you create. This is a one-week lab. Background Information 1. The total amount of real-estate that each group will be given for the power supply circuit is 1.9" by 2.2" (that is, 1.9 in. x 2.2 in.). Everything on your power supply must fit. 2. The most important consideration in layout of a power –supply circuit is the layout of the power and ground traces. Make sure that the traces are wide enough to carry the current. A good ROT for a ! oz copper board is 0.100"/amp. If your board has extra room, make all power and ground traces even wider. Since our power supplies will supply as much as 600mA, we will be using at least 0.060" traces for all power signals. 3. The minimum space between traces is 0.010". If you go less than that, the traces might short out during manufacturing. 4. The minimum space between pads is 0.030". A pad is a circle (or oval or square) with a hole in the middle of it for soldering components, like resistors or ICs. I think you need the extra space (0.030") for soldering. Otherwise, you might end up accidentally shorting out two pads when you solder their components in place. 5. We have two tools for measuring distances: an engineering ruler (in 1/10th’s of inches) and a much more precise digital caliper (in inches or mm – use inches for this lab). 6. You will draw on three layers: a. Top layer (red) is for all traces except for VSS (the negative rail). b. Bottom layer (green) is for VSS only. The bottom layer will also have huge rectangles of metal, effectively creating a ground plane. c. Silk screen layer (yellow) will not be fabricated, but is helpful when doing the layout. It is used for naming each part.
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140"? 4.080" wide? 3. once you are in lab. What is the suggested width for a trace that carries 2 A of current? 2. Pre-lab Questions Week1 (10 points) 1. Pre-lab quizzes are done individually. not as a group. What tools are used to measure distances? Page 2 .EE380 – Electronics I Lab 4 Fall 2013 Name: ____________________________________________________ Note: You are encouraged to work on pre-lab questions prior to lab. will give you a fresh piece of paper for you to work the pre-lab quiz. What is the minimum distance between two pads that have a diameter of 0. the lab TA. What is the minimum space between two traces that are 0. Kashif. What traces go on the top (red) layer? 5. However.

2.) Finally. and 3. Measure the distance between pins on the terminal strip using a decimal ruler or caliper. 5. Create a pattern of holes with a silkscreen box for a 3-contact terminal strip. Draw 4 silkscreen traces to make a box that size.100" pads with 0. What is the correct spacing of the pads? What are the outside dimensions (length and width) of the terminal strip? 4.9" by 2. Use 0. Number the pads 1.200" round pad with 0.EE380 – Electronics I Lab 4 Fall 2013 Exercise I: Layout of circuit The objective of this exercise is to layout a power supply circuit that will be designed and tested in the next lab and will be part of your final project. 3. place the terminal strip along one side of the board. The 4 nylon standoffs go in the four corners. 2.150" holes for the standoffs. Use the “Group to make PCB component” command (under Component menu) to combine the pads and the box together. Place the power adapter connector (J1) on the upper of left edge of the PCB board. Verify that the frame on the silkscreen layer (yellow) to be a 1. Use 0.2" rectangle. (See the figure below. After step 5.046" holes. It is important that you place connectors on the edge of the board. 1. your board might look like one of the boards below: Page 3 . The schematic is on the last page of the lab.

“Group to make PCB component” k. R1. hole: 0.35"). d. ii. pad: 0. “Ungroup” iii.056". pad 0.3"). LEDs: LED – T 1 (lead spacing 0. Place the LM317 on the edge of the PCB. hole: 0. Custom Potentiometer: i.4"). Cap – Lead Spacing (What is the spacing between leads?) ii. hole: 0. Potentiometer – Bourns series 3386F (DigiKey 3386F-101-ND) ii.100").040".040" The square pad is the negative terminal. h. Place this large capacitor near one of the corners of your layout. LED2…). f. Number the pads 1 and 2. e. 1N914 Diode: DO-35 (lead spacing 0. 741 Opamp: Use the Dip – 8 pin socket (DIP = Dual In-line Package) g. LM317: Semiconductor TO-220 with no mounting hole.100".100"apart. Space them 0. hole 0.046" iv. Change pads to pad 0. “Group to make PCB component” Page 4 . “Ungroup” iii.EE380 – Electronics I Lab 4 Fall 2013 6. “Group to make PCB component” i. pad 0. Tantalum Cap: What is the spacing between leads? The square pad is the positive terminal. c.029" b.056". Custom Resettable Fuse: i. hole 0. Resistors: 1/4 Watt (lead spacing 0.. iii. Move holes where needed iv. Draw two round pads of dimensions pad 0. hole: 0.029" j. Radial Electrolytic Cap: Find the largest electrolytic capacitor that comes in your kit.g. The square pad is the positive terminal. Place all your parts down with identifying number (e.029" The square pad is the negative terminal.075".056". 2-Pin Test Connector (J2): i.075". What is the spacing between leads? Use calipers to measure them. pad 0. 1N4003 Diode: 1N4007 (lead spacing 0. Extra room is required for the heat sink. Here are some parts you will need: a. U2.

Save your PCB layout with a filename that identifies you. Print out your layout to review it We will need three printouts for your lab report: a. Enlarge to Fit Page. Labels on the silkscreen layer will not appear on your board. Portrait c. Put the labels below in metal (top side or bottom side). The only input /output label on the bottom side is VSS (green & backwards) c. As space on your board permits. Use 0. Label the custom parts.060". and VDD (on top side. (on top side) can be smaller traces: use 0. Link Your Schematic (downloaded from class website) to your PCB layout. Leave some room near components (~ 0. Label input /output signals (on top side) using text height: 0. Enlarge to Fit Page.pcb 13. d. pads. use text height: 0. VC. Use 0. Enlarge to Fit Page.070".EE380 – Electronics I Lab 4 Fall 2013 7. and Text on Top Side. Have the TA review your design.100"). or else you would short out every pad. To label your names and project name.030". b. You want the labels to match the schematic.050". for example. b. Portrait 12. making sure they don’t touch traces or pads. Bottom-Side. C2…. Now wire your circuit using the following guidelines: a. Draw large rectangular regions that are green to create a ground plane. Kashif_Altaf.) d. Top-Side. 8. These traces are drawn wide on the schematic. including SGND and VADJ. 9. Portrait b. a.050". label polarities on capacitors and diodes (with ‘+’ signs) and pin 1 on ICs using text height: 0. Make the bottom side 35% . All signal wires. VSS is on the bottom side. Don’t make the entire bottom side green. red) require wide traces because they will carry 600mA. 11. VS2. Page 5 . Now label your circuit. (Your name and project name can also be on the bottom side. VS1. Now label your components by double-clicking on them and typing things like R4.100".60% green. The VSS trace should be huge whenever possible and is drawn very wide. 10. c. Silk-screen. in case you have to add holes to your board after fabrication.

75 to 1 pages. listing the major exercises you did. At the top of the page. e. Indicate which teammate is serving as the recorder for this lab. Page 6 . kashifaltaf1@gmail. Of particular interest are things that you struggled with. (60 points) The PCB file that is submitted to the TA on-time. Be sure to include printouts for each group of one-to-two students. etc. What to Include in the Lab Report: 1. roughly 2 points per correction. Your layout must be complete and sent to TA Kashif Altaf by Saturday. (19 points) The summary and Summary and Discussion.g. (20 points) Three printouts from expressPCB of your layouts.PCB for example: Kashif_XYZ. one for each group. 4. Write 0. (1 point) A printout of the Express Schematic that you used to create your PCB. For every error (correction) the TA has to make for you. October 10th 2012 @ 5:00PM as follows: TO: kaltaf2@nmsu. Indicate who is serving as the team Recorder. again. 3.. 12-point type (like this document). Then write: 1. points will be subtracted from your score. 2. using one-and-a-half line spacing. An introductory paragraph that describes the main objectives of the laboratory.EE380 – Electronics I Lab 4 Fall 2013 14. or rwp@nmsu. 2. as described in the lab. The objective of this exercise is to summarize and discuss this 1-week SUBJECT: PCB LAYOUT ATTACHED FILE: Name1_Name2. place names of the group and the title of the lab.pcb Exercise a bad component or wire that needed to be changed. such as a new measurement technique or a new troubleshooting technique. Two paragraphs discussing several things that you learned.