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NMOS 128 Kbit (16Kb x 8) UV EPROM
NOT FOR NEW DESIGN
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FAST ACCESS TIME: 200ns EXTENDED TEMPERATURE RANGE SINGLE 5 V SUPPLY VOLTAGE LOW STANDBY CURRENT: 40mA max TTL COMPATIBLE DURING READ and PROGRAM FAST PROGRAMMING ALGORITHM ELECTRONIC SIGNATURE PROGRAMMING VOLTAGE: 12V
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DESCRIPTION The M27128A is a 131,072 bit UV erasable and electrically programmable memory EPROM. It is organized as 16,384 words by 8 bits. The M27128A is housed in a 28 Pin Window Ceramic Frit-Seal Dual-in-Line package. The transparent lid allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the device by following the programming procedure.
Figure 1. Logic Diagram
P E G
This is information on a product still in production but not recommended for new designs.
When in the standby mode. Two Line Output Control Because EPROMs are usually used in larger memory arrays.5 –0. DIP Pin Connections VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 Q0 Q1 Q2 VSS 1 28 2 27 3 26 4 25 5 24 6 23 7 22 M27128A 21 8 20 9 19 10 18 11 17 12 16 13 15 14 AI00770 VCC P A13 A8 A9 A11 G A10 E Q7 Q6 Q5 Q4 Q3 Read Mode The M27128A has two control functions.6 to 14 Unit °C °C °C V V V V Note: Except for the rating "Operating Temperature Range". this product features a 2 line control function which accommodates the use of multiple memory connection.6 to 6. A single 5V power supply is required in the read mode. The M27128A is placed in the standby mode by applying a TTL high signal to the E input. assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV. Figure 2. Absolute Maximum Ratings Symbol TA TBIAS TSTG VIO VCC VA9 VPP Parameter Ambient Operating Temperature Temperature Under Bias Storage Temperature Input or Output Voltages Supply Voltage A9 Voltage Program Supply grade 1 grade 6 grade 1 grade 6 Value 0 to 70 –40 to 85 –10 to 80 –50 to 95 –65 to 125 –0. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. 2/10 . the outputs are in a high impedance state. Output Enable (G) is the output control and should be used to gate data to the output pins. complete assurance that output bus contention will not occur. DEVICE OPERATION The seven modes of operation of the M27128A are listed in the Operating Modes table.25 –0. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. The two line control function allows: a. the lowest possible memory power dissipation. Data is available at the outputs after the falling edge of G.6 to 6. All inputs are TTL levels except for VPP and 12V on A9 for Electronic Signature. stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. Exposure to Absolute Maximum Rating conditions for ex tended periods may affect device reliability. independent of the G input. independent of device selection.M27128A Table 2. b. Standby Mode The M27128A has a standby mode which reduces the maximum active power current from 85mA to 40mA. Assuming that the addresses are stable. Chip Enable (E) is the power control and should be used for device selection.25 –0.6 to 13. address access time (tAVQV) is equal to the delay from E to output (tELQV). both of which must be logically satisfied in order to obtain data at the outputs.
M27128A DEVICE OPERATION (cont’d) For the most efficient use of these two control lines. ICC. Data is introduced by selectively programming ”0s" into the desired bit locations. The magnitude of this transient current peaks is dependent on the capacitive and inductive loading of the device at the output. the active current level. The bulk capacitor should be located near the power supply connection point. to the data output pins. and transient current peaks that are produced by the falling and rising edges of E. The supply current. The associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. The data to be programmed is applied 8 bits in parallel. System Considerations The power switching characteristics of fast EPROMs require careful decoupling of the devices. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device. The purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces.5%.7µF bulk electrolytic capacitor should be used between VCC and GND for every eight devices. The only way to change a “0" to a ”1" is by ultraviolet light erasure.5V and E and P are at TTL low. In addition. all bits of the M27128A are in the “1" state. has three segments that are of interest to the system designer: the standby current level. both “1s” and “0s” can be present in the data word. while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. a 4. The M27128A is in the programming mode when VPP input is at 12. Fast Programming Algorithm Fast Programming Algorithm rapidly programs M27128A EPROMs using an efficient and reliable method suited to the production programming environment. Programming reliability is also ensured as the incremental program margin of each byte is Table 3.Q7 Data Out Hi-Z Data In Data Out Hi-Z Hi-Z Codes Out Table 4. Programming When delivered (and after each erasure for UV EPPROM). VID = 12V ± 0. E should be decoded and used as the primary device selecting function. It is recommended that a 1µF ceramic capacitor be used on every device between VCC and VSS. Although only “0s” will be programmed. This should be a high frequency capacitor of low inherent inductance and should be placed as close to the device as possible. E VIL VIL VIL VIL VIH VIH VIL G VIL VIH VIH VIL X X VIL P VIH VIH VIL Pulse VIH X X VIH A9 X X X X X X VID VPP VCC VCC VPP VPP VPP VCC VCC Q0 . Operating Modes Mode Read Output Disable Program Verify Program Inhibit Standby Electronic Signature Note: X = VIH or VIL. The levels required for the address and data inputs are TTL. Electronic Signature Identifier Manufacturer’s Code Device Code A0 VIL VIH Q7 0 1 Q6 0 0 Q5 1 0 Q4 0 0 Q3 0 1 Q2 0 0 Q1 0 0 Q0 0 1 Hex Data 20h 89h 3/10 .
3kΩ OUT CL = 100pF 2. Figure 5.4V 0. Figure 3.45V CL includes JIG capacitance AI00828 Table 5.0V 0.4V 0. Sampled only.0V Figure 4. Voltages ≤ 20ns 0.M27128A AC MEASUREMENT CONDITIONS Input Rise and Fall Times Input Pulse Voltages Input and Output Timing Ref.8V AI00827 3.45V to 2. not 100% tested. AC Testing Input Output Waveforms DEVICE UNDER TEST 2. f = 1 MHz ) Symbol CIN COUT Parameter Input Capacitance Output Capacitance Test Condition VIN = 0V VOUT = 0V Min = = Max 6 12 Unit pF pF Note: 1. Read Mode AC Waveforms A0-A13 tAVQV E tGLQV G tELQV Q0-Q7 VALID tAXQX tEHQZ tGHQZ Hi-Z DATA OUT AI00771 4/10 .8V to 2. AC Testing Load Circuit 1. Capacitance (1) (TA = 25 °C.3V 1N914 Note that Output Hi-Z is defined as the point where data is no longer driven.
-25 Min Max 250 250 100 60 60 0 0 0 -3. G = VIL 0 0 0 Max 200 200 75 55 55 0 0 0 blank.45 Unit µA µA mA mA mA V V V V Note: 1. G = VIL E = VIH VPP = VCC –0. Table 7.4 Min Max ±10 ±10 75 35 5 0. Read Mode DC Characteristics (1) (TA = 0 to 70 °C or –40 to 85 °C. Sampled only. -30 Min Max 300 300 120 105 105 0 0 0 Min -4 Max 450 450 150 130 130 ns ns ns ns ns ns Unit Notes: 1. 5/10 . VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.M27128A Table 6.8 VCC + 1 0. VPP = VCC) Symbol ILI ILO ICC ICC1 IPP VIL VIH VOL VOH Parameter Input Leakage Current Output Leakage Current Supply Current Supply Current (Standby) Program Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage IOL = 2.1mA IOH = –400µA Test Condition 0 ≤ VIN ≤ VCC VOUT = VCC E = VIL. Read Mode AC Characteristics (1) (TA = 0 to 70 °C or –40 to 85 °C. not 100% tested. -20 Min tAVQV tELQV tGLQV tEHQZ (2) tGHQZ (2) tAXQX tACC tCE tOE tDF tDF tOH Address Valid to Output Valid Chip Enable Low to Output Valid Output Enable Low to Output Valid Chip Enable High to Output Hi-Z Output Enable High to Output Hi-Z Address Transition to Output Transition E = VIL. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. VCC = 5V ± 5% or 5V ± 10%. 2.1 2 = 2. VPP = VCC) Symbol Alt Parameter Test Condition M27128A -2. VCC = 5V ± 5% or 5V ± 10%. G = VIL G = VIL E = VIL G = VIL E = VIL E = VIL.
3V) Symbol ILI ICC IPP VIL VIH VOL VOH VID Parameter Input Leakage Current Supply Current Program Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage A9 Voltage IOL = 2.25V.1mA IOH = –400µA 2.95 ms. 4. 6/10 . Programming Mode DC Characteristics (1) (TA = 25 °C. The length of the Over-program Pulse varies from 2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.25V.75 ms ms µs µs 150 0 0 130 ns ns ns VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Sampled only.85 2 2 1. 3. The Initial Program Pulse width tolerance is 1 ms ± 5%.5V ± 0. VPP = 12.3V) Symbol tAVPL tQVPL tVPHPL tVCHPL tELPL tPLPH tPLPH tPHQX tQXGL tGLQV tGHQZ (4) tGHAX Notes: 1.5V ± 0.M27128A Table 8.45 Unit µA mA mA V V V V V Note: 1.8 VCC + 1 0.05 78.5 12. VCC = 6V ± 0.5 E = VIL –0. not 100% tested. depending on the multiplication value of the iteration counter. VCC = 6V ± 0.1 2 Test Condition VIL ≤ VIN ≤ VIH Min Max ±10 100 50 0.4 11. Alt tAS tDS tVPS tVCS tCES tPW tOPW tDH tOES tOE tDFP tAH Parameter Address Valid to Program Low Input Valid to Program Low VPP High to Program Low VCC High to Program Low Chip Enable Low to Program Low Program Pulse Width (Initial) Program Pulse Width (Overprogram) Program High to Input Transition Input Transition to Output Enable Low Output Enable Low to Output Valid Output Enable High to Output Hi-Z Output Enable High to Address Transition Test Condition Min 2 2 2 2 2 Max Unit µs µs µs µs µs Note 2 Note 3 0.85 ms to 78.95 2. Programming Mode AC Characteristics (1) (TA = 25 °C. Table 9. VPP = 12.
M27128A Figure 6. before a correct verify occurs. Except for E. which will then be followed by a longer overprogram pulse of length 3ms by n (n is equal to the number of the initial one millisecond pulses applied to a particular M27128A location). VPP 5V AI00775B . VPP = 12. When the Fast Programming cycle has been completed. A flowchart of the M27128A Fast Programming Algorithm is shown on the last page.5V. A high level E input inhibits the other M27128As from being programmed. Program Inhibit Programming of multiple M27128A’s in parallel with different data is also easily accomplished. Programming Flowchart DEVICE OPERATION (cont’d) continually monitored to determine when it has been successfully programmed. Up to 25 one-millisecond pulses per byte are provided for before the over program pulse is applied.5V n=1 P = 1ms Pulse NO ++n > 25 YES NO VERIFY YES P = 3ms Pulse by n FAIL Last Addr NO ++ Addr YES CHECK ALL BYTES VCC = 5V.5V. will program that M27128A. all like inputs (including G) of the parallel M27128A may be common. all bytes should be compared to the original data with VCC = 5 and VPP = 5V. 7/10 VCC = 6V. with VPP = 12. The Fast Programming Algorithm utilizes two different pulse types: initial and overprogram. A TTL low pulse applied to a M27128A’s E input. Programming and Verify Modes AC Waveforms A0-A13 tAVPL Q0-Q7 tQVPL VPP tVPHPL VCC tVCHPL E tELPL P tPLPH G tQXGL tGHAX tGLQV tGHQZ DATA IN tPHQX DATA OUT VALID PROGRAM VERIFY AI00772 Figure 7. The entire sequence of program pulses and byte verifications is performed at VCC = 6V and VPP = 12. The duration of the initial P pulse(s) is 1ms.
Research shows that constant exposure to room level fluorescent lighting could erase a typical M27128A in about 3 years. UV intensity x exposure time) for erasure should be a minimum of 15 W-sec/cm2.5cm (1 inch) of the lamp tubes during the erasure.. it is suggested that opaque labels be put over the M27128A window to prevent unintentional erasure. 5V ± 10% 250 ns.5V on address line A9 of the M27128A. 5V ± 5% 450 ns. 5V ± 5% 200 ns. E = VIL.5V to 12. ERASURE OPERATION (applies to UV EPROM) The erasure characteristic of the M27128A is such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000 Å. The M27128A should be placed within 2. VCC Tolerance.e. It should be noted that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 Å range. 5V ±5% 250 ns. If the M27128A is to be exposed to these types of lighting conditions for extended periods of time.M27128A Program Verify A verify should be performed on the programmed bits to determine that they were correctly programmed. 5V ± 5% 300 ns. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH.) refer to the current Memory Shortform catalogue. Some lamps have a filter on their tubes which should be removed before erasure. 5V ± 10% 300 ns. while it would take approximately 1 week to cause erasure when exposed to direct sunlight. these two identifier bytes are given below. The verify is accomplished with G = VIL. 8/10 . The integrated dose (i. Byte 0 (A0 = VIL) represents the manufacturer code and byte 1 (A0 = VIH) the device identifier code. For further information on any aspect of this device. please contact STMicroelectronics Sales Office nearest to you. P = VIH and VPP at 12.5V. For the STMicroelectronics M27128A. The erasure time with this dosage is approximately 15 to 20 minutes using an ultraviolet lamp with 12000 µW/cm2 power rating.. All other address lines must be held at VIL during Electronic Signature mode. 5V ± 10% F Package FDIP28W Temperature Range 1 6 0 to 70 °C –40 to 85 °C For a list of available options (Speed. This mode is intended for use by programming equipment to automatically match the device to be programmed with its corresponding programming algorithm. This mode is functional in the25°C ± 5°C ambient temperature range that is required when programming the M27128A. The recommended erasure procedure for the M27128A is exposure to short wave ultraviolet light which has wavelength 2537 Å. etc. To activate this mode. the programming equipment must force 11. Electronic Signature The Electronic Signature mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type. ORDERING INFORMATION SCHEME Example: M27128A -2 F 1 Speed and VCC Tolerance -2 blank -3 -4 -20 -25 -30 200 ns. Package.
10 15.80 13.02 15.36 – – 18.070 0.200 0.125 0.280 0.009 Typ inches Min Max 0.54 33.50 3.098 – 15° A2 A1 B1 B e3 D S N ∅ 1 A L α eA C e1 E1 E FDIPW-a Drawing is not to scale 9/10 .622 0.016 0.M27128A FDIP28W .154 0.18 1.55 1.606 0.05 – – 16.28 pin Ceramic Frit-seal DIP.40 13.056 0.060 – 4° 28 0.161 0.046 0.17 0.100 1.637 0.225 0.012 1.514 – – 0.40 1.52 – 4° 8 0.721 0.022 0.49 – 15° 0.526 – – 0.17 3.78 5.32 4.31 38.11 2.10 2.300 0. with window Symb Typ A A1 A2 B B1 C D E E1 e1 e3 eA L S ∅ α N 2 7.90 0.42 0.500 0.22 mm Min Max 5.020 0.71 1.08 0.
st.China .Brazil . STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use.India .com 10/10 .United Kingdom .Italy .Switzerland .M27128A Information furnished is believed to be accurate and reliable.All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia .Malaysia . However. www.Finland .Germany .A. Specifications mentioned in this publication are subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.Sweden .S.U.Japan . The ST logo is registered trademark of STMicroelectronics All other names are the property of their respective owners © 2000 STMicroelectronics . This publication supersedes and replaces all information previously supplied.France .Hong Kong .Malta .Spain .Morocco Singapore .
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