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NMOS 128 Kbit (16Kb x 8) UV EPROM
NOT FOR NEW DESIGN
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FAST ACCESS TIME: 200ns EXTENDED TEMPERATURE RANGE SINGLE 5 V SUPPLY VOLTAGE LOW STANDBY CURRENT: 40mA max TTL COMPATIBLE DURING READ and PROGRAM FAST PROGRAMMING ALGORITHM ELECTRONIC SIGNATURE PROGRAMMING VOLTAGE: 12V
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DESCRIPTION The M27128A is a 131,072 bit UV erasable and electrically programmable memory EPROM. It is organized as 16,384 words by 8 bits. The M27128A is housed in a 28 Pin Window Ceramic Frit-Seal Dual-in-Line package. The transparent lid allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the device by following the programming procedure.
Figure 1. Logic Diagram
P E G
This is information on a product still in production but not recommended for new designs.
The M27128A is placed in the standby mode by applying a TTL high signal to the E input.25 –0.6 to 6. this product features a 2 line control function which accommodates the use of multiple memory connection. b. independent of the G input.6 to 13. Figure 2. stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device.6 to 6. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Absolute Maximum Ratings Symbol TA TBIAS TSTG VIO VCC VA9 VPP Parameter Ambient Operating Temperature Temperature Under Bias Storage Temperature Input or Output Voltages Supply Voltage A9 Voltage Program Supply grade 1 grade 6 grade 1 grade 6 Value 0 to 70 –40 to 85 –10 to 80 –50 to 95 –65 to 125 –0. address access time (tAVQV) is equal to the delay from E to output (tELQV). Standby Mode The M27128A has a standby mode which reduces the maximum active power current from 85mA to 40mA. The two line control function allows: a.M27128A Table 2. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Data is available at the outputs after the falling edge of G. Two Line Output Control Because EPROMs are usually used in larger memory arrays. When in the standby mode. Assuming that the addresses are stable. complete assurance that output bus contention will not occur. 2/10 . the outputs are in a high impedance state. the lowest possible memory power dissipation.5 –0. assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV. DEVICE OPERATION The seven modes of operation of the M27128A are listed in the Operating Modes table.6 to 14 Unit °C °C °C V V V V Note: Except for the rating "Operating Temperature Range". independent of device selection. All inputs are TTL levels except for VPP and 12V on A9 for Electronic Signature. DIP Pin Connections VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 Q0 Q1 Q2 VSS 1 28 2 27 3 26 4 25 5 24 6 23 7 22 M27128A 21 8 20 9 19 10 18 11 17 12 16 13 15 14 AI00770 VCC P A13 A8 A9 A11 G A10 E Q7 Q6 Q5 Q4 Q3 Read Mode The M27128A has two control functions.25 –0. Exposure to Absolute Maximum Rating conditions for ex tended periods may affect device reliability. both of which must be logically satisfied in order to obtain data at the outputs. Output Enable (G) is the output control and should be used to gate data to the output pins. Chip Enable (E) is the power control and should be used for device selection. A single 5V power supply is required in the read mode.
a 4. both “1s” and “0s” can be present in the data word. The only way to change a “0" to a ”1" is by ultraviolet light erasure. the active current level. The supply current. E VIL VIL VIL VIL VIH VIH VIL G VIL VIH VIH VIL X X VIL P VIH VIH VIL Pulse VIH X X VIH A9 X X X X X X VID VPP VCC VCC VPP VPP VPP VCC VCC Q0 . The magnitude of this transient current peaks is dependent on the capacitive and inductive loading of the device at the output.5%. all bits of the M27128A are in the “1" state. System Considerations The power switching characteristics of fast EPROMs require careful decoupling of the devices. The M27128A is in the programming mode when VPP input is at 12. In addition. The purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces.Q7 Data Out Hi-Z Data In Data Out Hi-Z Hi-Z Codes Out Table 4. The bulk capacitor should be located near the power supply connection point. Programming When delivered (and after each erasure for UV EPPROM). This should be a high frequency capacitor of low inherent inductance and should be placed as close to the device as possible.5V and E and P are at TTL low. and transient current peaks that are produced by the falling and rising edges of E. Programming reliability is also ensured as the incremental program margin of each byte is Table 3. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device. VID = 12V ± 0. while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus.7µF bulk electrolytic capacitor should be used between VCC and GND for every eight devices. The data to be programmed is applied 8 bits in parallel. It is recommended that a 1µF ceramic capacitor be used on every device between VCC and VSS. to the data output pins. Data is introduced by selectively programming ”0s" into the desired bit locations. Although only “0s” will be programmed. The associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. Operating Modes Mode Read Output Disable Program Verify Program Inhibit Standby Electronic Signature Note: X = VIH or VIL. E should be decoded and used as the primary device selecting function. Fast Programming Algorithm Fast Programming Algorithm rapidly programs M27128A EPROMs using an efficient and reliable method suited to the production programming environment. has three segments that are of interest to the system designer: the standby current level. Electronic Signature Identifier Manufacturer’s Code Device Code A0 VIL VIH Q7 0 1 Q6 0 0 Q5 1 0 Q4 0 0 Q3 0 1 Q2 0 0 Q1 0 0 Q0 0 1 Hex Data 20h 89h 3/10 . ICC. The levels required for the address and data inputs are TTL.M27128A DEVICE OPERATION (cont’d) For the most efficient use of these two control lines.
Voltages ≤ 20ns 0.0V Figure 4. Read Mode AC Waveforms A0-A13 tAVQV E tGLQV G tELQV Q0-Q7 VALID tAXQX tEHQZ tGHQZ Hi-Z DATA OUT AI00771 4/10 . AC Testing Load Circuit 1.45V CL includes JIG capacitance AI00828 Table 5.M27128A AC MEASUREMENT CONDITIONS Input Rise and Fall Times Input Pulse Voltages Input and Output Timing Ref.3kΩ OUT CL = 100pF 2.4V 0.3V 1N914 Note that Output Hi-Z is defined as the point where data is no longer driven. AC Testing Input Output Waveforms DEVICE UNDER TEST 2. Capacitance (1) (TA = 25 °C.8V to 2.0V 0. not 100% tested.8V AI00827 3.45V to 2. Figure 3. Sampled only. Figure 5.4V 0. f = 1 MHz ) Symbol CIN COUT Parameter Input Capacitance Output Capacitance Test Condition VIN = 0V VOUT = 0V Min = = Max 6 12 Unit pF pF Note: 1.
-20 Min tAVQV tELQV tGLQV tEHQZ (2) tGHQZ (2) tAXQX tACC tCE tOE tDF tDF tOH Address Valid to Output Valid Chip Enable Low to Output Valid Output Enable Low to Output Valid Chip Enable High to Output Hi-Z Output Enable High to Output Hi-Z Address Transition to Output Transition E = VIL. Table 7. -30 Min Max 300 300 120 105 105 0 0 0 Min -4 Max 450 450 150 130 130 ns ns ns ns ns ns Unit Notes: 1. G = VIL E = VIH VPP = VCC –0. 2.1 2 = 2. G = VIL G = VIL E = VIL G = VIL E = VIL E = VIL. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.45 Unit µA µA mA mA mA V V V V Note: 1.1mA IOH = –400µA Test Condition 0 ≤ VIN ≤ VCC VOUT = VCC E = VIL. -25 Min Max 250 250 100 60 60 0 0 0 -3.M27128A Table 6. G = VIL 0 0 0 Max 200 200 75 55 55 0 0 0 blank.8 VCC + 1 0. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. VPP = VCC) Symbol Alt Parameter Test Condition M27128A -2. 5/10 . Read Mode DC Characteristics (1) (TA = 0 to 70 °C or –40 to 85 °C. Read Mode AC Characteristics (1) (TA = 0 to 70 °C or –40 to 85 °C. VPP = VCC) Symbol ILI ILO ICC ICC1 IPP VIL VIH VOL VOH Parameter Input Leakage Current Output Leakage Current Supply Current Supply Current (Standby) Program Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage IOL = 2.4 Min Max ±10 ±10 75 35 5 0. VCC = 5V ± 5% or 5V ± 10%. VCC = 5V ± 5% or 5V ± 10%. not 100% tested. Sampled only.
5V ± 0. 4. Programming Mode AC Characteristics (1) (TA = 25 °C. VCC = 6V ± 0.M27128A Table 8. Programming Mode DC Characteristics (1) (TA = 25 °C. 6/10 .4 11.8 VCC + 1 0. Sampled only.45 Unit µA mA mA V V V V V Note: 1.1mA IOH = –400µA 2.05 78. Alt tAS tDS tVPS tVCS tCES tPW tOPW tDH tOES tOE tDFP tAH Parameter Address Valid to Program Low Input Valid to Program Low VPP High to Program Low VCC High to Program Low Chip Enable Low to Program Low Program Pulse Width (Initial) Program Pulse Width (Overprogram) Program High to Input Transition Input Transition to Output Enable Low Output Enable Low to Output Valid Output Enable High to Output Hi-Z Output Enable High to Address Transition Test Condition Min 2 2 2 2 2 Max Unit µs µs µs µs µs Note 2 Note 3 0.25V. VPP = 12.5V ± 0.25V.75 ms ms µs µs 150 0 0 130 ns ns ns VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. not 100% tested.95 2. VCC = 6V ± 0. Table 9.1 2 Test Condition VIL ≤ VIN ≤ VIH Min Max ±10 100 50 0. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.85 ms to 78. 2. The Initial Program Pulse width tolerance is 1 ms ± 5%.85 2 2 1. VPP = 12. depending on the multiplication value of the iteration counter.3V) Symbol ILI ICC IPP VIL VIH VOL VOH VID Parameter Input Leakage Current Supply Current Program Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage A9 Voltage IOL = 2.95 ms.5 E = VIL –0. The length of the Over-program Pulse varies from 2.5 12. 3.3V) Symbol tAVPL tQVPL tVPHPL tVCHPL tELPL tPLPH tPLPH tPHQX tQXGL tGLQV tGHQZ (4) tGHAX Notes: 1.
A high level E input inhibits the other M27128As from being programmed. Except for E. 7/10 VCC = 6V. The entire sequence of program pulses and byte verifications is performed at VCC = 6V and VPP = 12. Up to 25 one-millisecond pulses per byte are provided for before the over program pulse is applied.M27128A Figure 6. will program that M27128A. Programming and Verify Modes AC Waveforms A0-A13 tAVPL Q0-Q7 tQVPL VPP tVPHPL VCC tVCHPL E tELPL P tPLPH G tQXGL tGHAX tGLQV tGHQZ DATA IN tPHQX DATA OUT VALID PROGRAM VERIFY AI00772 Figure 7. Programming Flowchart DEVICE OPERATION (cont’d) continually monitored to determine when it has been successfully programmed.5V. The Fast Programming Algorithm utilizes two different pulse types: initial and overprogram. all like inputs (including G) of the parallel M27128A may be common. with VPP = 12. A flowchart of the M27128A Fast Programming Algorithm is shown on the last page. before a correct verify occurs.5V n=1 P = 1ms Pulse NO ++n > 25 YES NO VERIFY YES P = 3ms Pulse by n FAIL Last Addr NO ++ Addr YES CHECK ALL BYTES VCC = 5V. VPP = 12. all bytes should be compared to the original data with VCC = 5 and VPP = 5V. The duration of the initial P pulse(s) is 1ms. which will then be followed by a longer overprogram pulse of length 3ms by n (n is equal to the number of the initial one millisecond pulses applied to a particular M27128A location). Program Inhibit Programming of multiple M27128A’s in parallel with different data is also easily accomplished.5V. A TTL low pulse applied to a M27128A’s E input. When the Fast Programming cycle has been completed. VPP 5V AI00775B .
the programming equipment must force 11. 8/10 . 5V ± 10% 250 ns. 5V ± 5% 450 ns. All other address lines must be held at VIL during Electronic Signature mode. it is suggested that opaque labels be put over the M27128A window to prevent unintentional erasure. To activate this mode. these two identifier bytes are given below.5V. It should be noted that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 Å range. Some lamps have a filter on their tubes which should be removed before erasure. UV intensity x exposure time) for erasure should be a minimum of 15 W-sec/cm2. Electronic Signature The Electronic Signature mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type.M27128A Program Verify A verify should be performed on the programmed bits to determine that they were correctly programmed. while it would take approximately 1 week to cause erasure when exposed to direct sunlight.) refer to the current Memory Shortform catalogue. Byte 0 (A0 = VIL) represents the manufacturer code and byte 1 (A0 = VIH) the device identifier code. ORDERING INFORMATION SCHEME Example: M27128A -2 F 1 Speed and VCC Tolerance -2 blank -3 -4 -20 -25 -30 200 ns. 5V ± 5% 300 ns. The verify is accomplished with G = VIL. The M27128A should be placed within 2. This mode is functional in the25°C ± 5°C ambient temperature range that is required when programming the M27128A..5V to 12. 5V ± 10% F Package FDIP28W Temperature Range 1 6 0 to 70 °C –40 to 85 °C For a list of available options (Speed. For further information on any aspect of this device. VCC Tolerance. The recommended erasure procedure for the M27128A is exposure to short wave ultraviolet light which has wavelength 2537 Å.5cm (1 inch) of the lamp tubes during the erasure. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. The erasure time with this dosage is approximately 15 to 20 minutes using an ultraviolet lamp with 12000 µW/cm2 power rating.e. 5V ±5% 250 ns. 5V ± 10% 300 ns. please contact STMicroelectronics Sales Office nearest to you. If the M27128A is to be exposed to these types of lighting conditions for extended periods of time. P = VIH and VPP at 12. E = VIL. The integrated dose (i. 5V ± 5% 200 ns. Package. For the STMicroelectronics M27128A. ERASURE OPERATION (applies to UV EPROM) The erasure characteristic of the M27128A is such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000 Å. This mode is intended for use by programming equipment to automatically match the device to be programmed with its corresponding programming algorithm. Research shows that constant exposure to room level fluorescent lighting could erase a typical M27128A in about 3 years. etc.5V on address line A9 of the M27128A..
02 15.280 0.100 1.060 – 4° 28 0.50 3.125 0.08 0.009 Typ inches Min Max 0.022 0.161 0.300 0.016 0.070 0.10 2.49 – 15° 0.020 0.046 0. with window Symb Typ A A1 A2 B B1 C D E E1 e1 e3 eA L S ∅ α N 2 7.225 0.54 33.154 0.90 0.80 13.78 5.05 – – 16.10 15.36 – – 18.42 0.28 pin Ceramic Frit-seal DIP.22 mm Min Max 5.40 1.526 – – 0.17 3.606 0.098 – 15° A2 A1 B1 B e3 D S N ∅ 1 A L α eA C e1 E1 E FDIPW-a Drawing is not to scale 9/10 .32 4.18 1.637 0.52 – 4° 8 0.M27128A FDIP28W .11 2.71 1.17 0.40 13.721 0.622 0.012 1.500 0.200 0.056 0.31 38.55 1.514 – – 0.
Brazil .M27128A Information furnished is believed to be accurate and reliable.Sweden .All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia .Morocco Singapore .China .France .Japan .Malaysia .Switzerland .S.Germany .A.st.Spain . Specifications mentioned in this publication are subject to change without notice. STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use.United Kingdom . However. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics All other names are the property of their respective owners © 2000 STMicroelectronics .Italy .com 10/10 .Hong Kong . STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. www.India .Malta .Finland .U. This publication supersedes and replaces all information previously supplied.
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