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Abstract of Silicon on Plastic The plastic substrates are thinner, lighter, shatterproof, flexible, rollable and foldable, making

Silicon-on-Plastic an enabling technology for new applications/products. This paper studies the development of Silicon on Plastic technology. dvances in polysilicon technology have expanded T!T "T#$% !$&' T( %S$ST)(S* technology to high-speed electronics applications such as Smart +ards, (!$, tags, portable imaging devices, photo-voltaic devices and solid-state lighting and other integrated circuit functions. The challenge of Silicon-on-Plastic technology is to overcome the fact that plastic melts at the temperature re-uired to build transistors in conventional T!T processes. Technological innovations have been made to accommodate silicon processing at low temperatures. T his paper describes an innovative ultra-low temperature poly-silicon T!T process on plastic substrates , .ey technologies includes near room-temperature silicon and oxide deposition steps, laser crystalli/ation and dopant activation. 'anufacturing issues related to plastic material compatibility in a T!T process are reviewed. &amination and de-lamination of plastic wafers to glass carrier wafers for manufacturability is discussed. n active matrix T!T backplane will be fabricated with an )&0, ")rganic &ight 0mitting ,iode* display to demonstrate this technology. Introduction of Silicon on Plastic +urrently, amorphous silicon thin film transistors "T!T1s* on glass are predominantly used in the flat panel display industry for notebook computers, mobile phones, P, 1s "Personal ,igital ssistant*, and other handheld devices. Today, flat panels made by amorphous T!T technology are replacing desktop computer +(T "+athode (ay Tube* monitors at an ever-increasing rate. morphous T!T technology applications are limited due to its inherently low electron mobility. pplications that re-uire integration of display drivers such as hand-held camcorder and cell phone displays are using poly-silicon based T!T1s for cost and space savings. This eliminates the need for costly assembly of conventional silicon chips onto the amorphous T!T display panels. dvances in poly-silicon technology have expanded T!T technology to highspeed electronics applications such as Smart +ards, (!$, tags and other integrated circuit functions. (ecently developed ultra low-temperature polysilicon T!T technology can be applaid on both glass and plastic substrates. The plastic substrates are thinner, lighter, shatterproof, flexible, rollable and foldable, making silicon-on-plastic an enabling technology for new applications/products. Some of the possibilities are roll-up/down displays, lightweight, thin wall-mounted T2s, electronic newspapers, and wearable

display/computing devices. 'oreover, plastic substrates offer the potential of roll-toroll "(3(* manufacturing which can reduce manufacturing cost substantially compared to conventional plate-to-plate "P3P* methods. )ther possibilities include smart cards, (!$, tags, and portable imaging devices, photo-voltaic devices and solid-state lighting. The challenge of silicon-on-plastic technology is to overcome the fact that plastic melts at the temperature re-uired to build transistors in conventional T!T processes. The ultra low-temperature process is compatible with plastic substrates and offers good T!T performance. Technological innovations have been made to accommodate silicon processing at low temperatures. Low temperature (< 100 C) gate o ide deposition ! proprietary deposition machine and a compatible process were developed to deposit high -uality T!T gate oxides at sub-4556 + temperatures. $t is a special P0+2, "Plasma-0nhanced +hemical 2apor ,eposition* system with an added plasma source configuration akin to 0+( "0lectron +yclotron (esonance* to generate high-density plasma at low temperature. The process is optimi/ed to provide high-density plasma for silicon dioxide deposition using Si#7 and )3. The gate oxide film at 455 nm thickness has a breakdown voltage of more than 852, while the gate leakage current density is less than 95 n /cm3 at 35-2 bias. s-deposited gate oxideshows good +-2 characterstics . 4. small amount of hysteresis is observed before annealing takes place. preoxidation plasma treatment step using a mixture of #3 and )3 to grow a very thin oxide at the interface between the deposited silicon and the gate oxide with acceptable interface states was added to the process flow. Sufficiently high-density plasma must be generated in order to grow oxide with any significant thickness. The chuck is cooled to 356 + to keep the plastic temperature below 4556 + during the entire preoxidation and deposition process. The cleanliness of the Si surface is critical prior to the oxidation process. The result exhibits the difference between gate oxides with and without pre-oxidation. :ith pre-oxidation, we obtain an oxide +-2 curve very close to the one calculated theoretically.

;e-+l excimer laser is used to crystalli/e sputtered silicon on plastic, thereby forming large polysilicon grains for T!T1s with much higher mobility than its amorphous counterpart. The extremely short laser pulses provide sufficient energy to melt the deposited Si, while the subse-uent cooling forms a polycrystalline structure. This crystalli/ation techni-ue is similar to polysilicon formation on glass. The challenge with plastic substrates is to melt the deposited silicon while preserving the structural -uality of the underlying base material