EC-GATE-2014

GATE 2014 – A Brief Analysis (Based on student test experiences in the stream of EC on 15th February, 2014 - First Session)
1. Questions with numerical answers accounted for 40-50 % of the paper. Hence you cannot guess your way through the paper. General Ability section also has such questions. 2. In the papers of the past, there used to be some questions which could be solved by eliminating the wrong options. But with an increase in the “numerical answer” type questions, this method of problem solving takes a backseat. 3. With the high occurrence of “numerical answer” type questions, one has to be thorough and careful with unit conversions so as to type in the correct answer. Earlier, the four options more or less served as guidelines. 4. Among general ability questions, there was one question each from Data Interpretation, Probability, Time and Speed (Relative Velocity), Series, logical reasoning and critical reasoning. 5. Engineering Mathematics questions were of average difficulty level. There were questions from Linear Algebra (2 questions), Differential Equation (1 question), Complex Integration (1 question) and Vector Calculus. 6. There were some direct questions from a few topics while some of questions needed concept of two topics to solve them. Such questions were tough to solve. Scoring sections were Networks, Control Systems, Signal and Systems and Analog Circuits. 7. The sequence of questions was different for each candidate i.e. no two candidates will have same sequence of questions. 8. There were no “Common Data” and “Linked” questions in this paper as well.

Disclaimer – This paper analysis and questions have been collated based on the memory of some students who appeared in the paper and should be considered only as guidelines. GATEFORUM does not take any responsibility for the correctness of the same.

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one question on simple combinational circuit. and some simple bits one question based on find the value of k for repeated poles. one question based on maximum power transfer. one question based on Fourier series. GATEFORUM does not take any responsibility for the correctness of the same. one based on Z-transform. one question based on MOSFET node vlg for given circuit and threshold.EC-GATE-2014 Section wise analysis of the paper 1 Mark Engineering Mathematics Networks Electronic Devices Analog Circuits Digital Circuits Signals and Systems Control Systems Communications Electromagnetics Verbal Ability Numerical Ability 3 3 2 3 3 3 3 3 3 3 2 31 2 Marks 3 3 3 3 3 4 4 3 3 2 3 34 Total No of Questions 6 6 5 6 6 7 7 6 6 5 5 65 Type of questions asked from each section one question based on probability. one question based on op-amp offset vlg and some questions based on simple analysis one question based on essential prime implicants. one question based on State space analysis one question based on sampling frequency. one question transmission line etc Engineering Mathematics Networks Electronic Devices Analog Circuits Digital Circuits Signals and Systems Control Systems Communications Electromagnetics Disclaimer – This paper analysis and questions have been collated based on the memory of some students who appeared in the paper and should be considered only as guidelines. one question on BSC. one question based on asynchronous counter frequency analysis one question based on fundamental period. one Random variable etc one question based on plane waves. two question based on matrix. one question on complex algebra. one solution of differential equation one question based on KCL. 2 . and one question based on AC circuit and some basic question one simple question based on concentration under forward biased and one question to find transconductance and some formulae based question one question based on gain. one question based on GM.

EC-GATE-2014 Questions from the paper 1. The value of K for which both the poles will lie at same location______ for the given open loop transfer function. G(s) = k (s + 1)(s + 2) 5.7 V for diode D1 (PN diode) and 0. then 1kΩ 20 Ω 10 V D1 D2 (A) Both diode ON (B) Both diode OFF (C) Diode D1 ON and D2 OFF (D) Diode D1 OFF and D1 ON Disclaimer – This paper analysis and questions have been collated based on the memory of some students who appeared in the paper and should be considered only as guidelines. When practical voltage drop is 0. (A) periodic with (C) periodic with π 2 (B) periodic with π (D) Not periodic 2 π 3.8 A / W. 2 x[n] = sin  π n   2. the photo current generated (in µA) is________.3V for D2 (Schottky diode). 3 . Find the fundamental period of the signal shown below. When the optical power incident on a photodiode is 10 µw and the responsivity is 0. GATEFORUM does not take any responsibility for the correctness of the same. Ideal current buffer is having (A) low input impedance and high output impedance (B) High input impedance and high output impedance (C) High input impedance and low output impedance (D) low input impedance and low output impedance 4.

For the given combinational circuit. The input frequency for the given counter is 1 MHz.EC-GATE-2014 6. 1 Q5 J5 1 Q4 J 4 Q3 J3 1 1 1 Q1 Q1 J1 Q2 Q2 J2 k2 Q5 k 5 1 Q4 k 4 Q3 k 3 1 1 k1 1 1 Clock 7. 4 . the output frequency observed at Q4 is_______. the output voltage Vo is R2 I1 I2 (B) F = xyz + xyz (D) F = xyz + xyz R1 − + Vo Disclaimer – This paper analysis and questions have been collated based on the memory of some students who appeared in the paper and should be considered only as guidelines. For the given circuit. GATEFORUM does not take any responsibility for the correctness of the same. the expression for F is X Y F Z (A) F = xyz + xyz (C) F = x y z + xyz 8.

5V. GATEFORUM does not take any responsibility for the correctness of the same. 5V 5V P 5V Q 5V R (A) 5V. (B) I 2 R 1 (D) − I 2 ( R 1 + R 2 ) Find the voltage observed at P. 4V. 5V (D) 8V. 5 .EC-GATE-2014 (A) − I1 ( R 1 + R 2 ) (C) I 2 R 1 9. 4V (B) 5V. 3V (C) 4V. 5V Disclaimer – This paper analysis and questions have been collated based on the memory of some students who appeared in the paper and should be considered only as guidelines. 4V. Q and R for NMOS transistor and threshold voltage is 1V. 4V.