UTC 4053

ANALOG MULTIPLEXERS/ DEMULTIPLEXERS
DESCRIPTION
The UTC 4053 are Triple SPDT analog multiplexers for application as digitally–controlled analog switches.

CMOS IC

SOP-16

FEATURES
* Analog Voltage Range (VDD – VEE) = 3.0 ~ 18 V Note: VEE must be≦VSS * Linearized Transfer Characteristics * Pin–to–Pin Replacement for CD4053
DIP-16

TSSOP-16

*Pb-free plating product number: 4053L

PIN CONFIGURATIONS

Y1 Y0 Z1 Z Z0 INH V EE V SS

1 2 3 4 5 6 7 8

16 15 14 13 12 11 10 9

V DD Y X X1 X0 A B C

UTC 4053

UTC

UNISONIC TECHNOLOGIES

CO., LTD.

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QW-R502-036,A

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UTC 4053
UTC 4053 Triple 2–Channel Analog Multiplexer/Demultiplexer
6 11 10 9 12 13 2 1 5 3 INHIBIT X A B C X0 Y X1 Y0 Y1 Z Z0 Z1 VDD = PIN 16 VSS = PIN 8 VEE = PIN 7

CMOS IC

CONTROLS

14

15

COMMONS OUT/IN

SWITCHES IN/OUT

4

Note: Control Inputs referenced to VSS, Analog Inputs and Outputs reference to VEE. VEE must be≦VSS.

ABSOLUTE MAXIMUM RATINGS*
PARAMETER DC Supply Voltage (Referenced to VEE, VSS≧VEE) SYMBOL VDD RATINGS -0.5 ~ +18.0 -0.5 ~ VDD +0.5 ±10 ±25 500 -65 ~ +150 260 UNIT V V mA mA mW ℃ ℃

Input or Output Voltage (DC or Transient) (Referenced to VSS Vin, Vout for Control Inputs and VEE for Switch I/O) Input Current (DC or Transient), per Control Pin Iin Switch Through Current ISW Power Dissipation. Per Package** PD Storage Temperature Tstg Lead Temperature (8 - Second Soldering) TLead * Maximum Ratings are those values beyond which damage to the device may occur. ** Temperature Derating: “DIP and SOP” Packages: – 7.0 mW/℃ From 65℃ ~ 125℃

ELECTRICAL CHARACTERISTICS
(Ta=25℃, unless otherwise indicated.) PARAMETER SYMBOL TEST CONDITIONS MIN TYP# MAX UNIT SUPPLY REQUIREMENTS (Voltages Referenced to VEE) VDD – 3.0≧VSS≧VEE 3.0 18 V Power Supply Voltage Range VDD Control Inputs: Vin = VSS or VDD Switch I/O: VEE ≦VI/O ≦VDD, and ∆Vswitch≦500mV* Quiescent Current per Package IDD µA VDD=5.0V 0.005 5.0 VDD=10V 0.010 10 VDD=15V 0.015 20 Ta=25℃ only (The channel component, (Vin - Vout)/Ron, is not included.) Total Supply Current (Dynamic Plus ID(AV) µA VDD=5.0V Quiescent, Per Package) (0.07 µA/kHz) f + IDD Typical VDD=10V (0.20 µA/kHz) f + IDD VDD=15V (0.36 µA/kHz) f + IDD

UTC

UNISONIC TECHNOLOGIES

CO., LTD.

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QW-R502-036,A

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UTC 4053

CMOS IC

PARAMETER SYMBOL TEST CONDITIONS MIN TYP# MAX UNIT CONTROL INPUTS – INHIBIT A, B, C (Voltages Referenced to VSS) Ron= per spec, Ioff = per spec VDD=5.0V 2.25 1.5 Low – Level Input Voltage VIL V VDD=10V 4.50 3.0 VDD=15V 6.75 4.0 Ron= per spec, Ioff = per spec VDD=5.0V 3.5 2.75 High – Level Input Voltage VIH V VDD=10V 7.0 5.50 VDD=15V 11 8.25 Input Leakage Current Iin Vin= 0 or VDD, VDD=15V ±0.00001 ±0.1 µA Input Capacitance Cin 5.0 7.5 pF SWITCHES IN/OUT AND COMMONS OUT/IN -- X, Y, Z (Voltages Referenced to VEE) Recommended Peak–to–Peak Voltage Channel On or Off VI/O 0 VDD VPP Into or Out of the Switch Recommended Static or Dynamic Channel On ∆Vswitch 0 600 mV Voltage Across the Switch** (Figure 3) Output Offset Voltage VOO Vin = 0V, No Load 10 µV ∆Vswitch≦500mV* Vin = VIL or VIH (Control), and Vin = 0 to VDD (Switch) ON Resistance Ron Ω VDD=5.0V 250 1050 VDD=10V 120 500 VDD=15V 80 280 VDD=5.0V 25 70 ΔON Resistance Between Any Two ∆Ron VDD=10V 10 50 Ω Channels in the Same Package VDD=15V 10 45 Vin = VIL or VIH (Control) Off–Channel Leakage Current Channel to Channel or Any Ioff ±0.05 ±100 nA (Figure 8) One Channel, VDD=15V Capacitance, Switch I/O CI/O Inhibit = VDD 10 pF Capacitance, Common O/I CO/I Inhibit = VDD 17 pF Capacitance, Feedthrough Pins Not Adjacent 0.15 CI/O pF (Channel Off) Pins Adjacent 0.47 #Data labeled “Typ” is not to be used for design purposes, but is intended as an indication of the IC’s potential performance. * For voltage drops across the switch (∆Vswitch) > 600 mV ( > 300 mV at high temperature), excessive VDD current may be drawn, i.e. the current out of the switch may contain both VDD and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded. (See second page of this data sheet.)

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UNISONIC TECHNOLOGIES

CO., LTD.

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QW-R502-036,A

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UTC 4053
ELECTRICAL CHARACTERISTICS*
(CL = 50pF, Ta=25℃, VEE≦VSS, unless otherwise indicated.) PARAMETER SYMBOL VDD – VEE Vdc Propagation Delay Times 5.0 (Figure 4) Switch Input to 10 tPLH, tPHL Switch Output (RL = 10 kΩ) 15 5.0 tPHZ, tPLZ Inhibit to Output 10 tPZH, tPZL 15 Control Input to Output 5.0 tPLH, tPHL 10 15 Second Harmonic Distortion 10

CMOS IC

TEST CONDITIONS MIN TYP# MAX UNIT tPLH, tPHL = (0.17 ns/pF) CL + 16.5 ns 25 65 tPLH, tPHL = (0.08 ns/pF) CL + 4.0 ns 8.0 20 ns tPLH, tPHL = (0.06 ns/pF) CL + 3.0 ns 6.0 15 275 550 (RL=10kΩ, VEE=VSS)Output “1” or “0” to High Impedance, or High 140 280 ns Impedance to “1” or “0” Level 110 220 300 600 RL = 10 kΩ, VEE = VSS 120 240 ns 80 160 RL = 10KΩ, f = 1 kHz, Vin = 5 VPP 0.07 % RL = 1kΩ, Vin = 1/2 (VDD–VEE) p–p, Bandwidth (Figure 5) BW 10 17 MHz CL = 50pF, 20 Log (Vout/Vin) = -3dB) Off Channel Feedthrough RL = 1KΩ, Vin = 1/2 (VDD – VEE) p–p 10 -50 dB Attenuation (Figure 5) fin = 55 MHz Channel Separation RL = 1 kΩ, Vin = 1/2 (VDD–VEE) p–p 10 -50 dB (Figure 6) fin = 3.0 MHz Crosstalk, Control Input to R1 = 1 kΩ, RL = 10 kΩ Control 10 75 mV Common O/I (Figure 7) tTLH = tTHL = 20 ns, Inhibit = VSS) * The formulas given are for the typical characteristics only at 25℃. # Data labelled “Typ” is not lo be used for design purposes but In intended as an indication of the IC’s potential performance.

VDD IN/OUT

VDD

VDD OUT/IN

VEE

VDD LEVEL CONVERTED CONTROL

IN/OUT

OUT/IN

VEE

CONTROL

Figure 1. Switch Circuit Schematic

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UNISONIC TECHNOLOGIES

CO., LTD.

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QW-R502-036,A

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UTC 4053
TRUTH TABLE
Control Inputs Select Inhibit C B A 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 x x x x = Don’t Care ON Switches UTC 4053 Z0 Y0 X0 Z0 Y0 X1 Z0 Y1 X0 Z0 Y1 X1 Z1 Y0 X0 Z1 Y0 X1 Z1 Y1 X0 Z1 Y1 X1 None
INH 6 A 11 B 10 C 9 8 X0 12 X1 13 Y0 Y1 Z0 Z1 2 1 5 3 16 VDD LEVEL CONVERTER

CMOS IC
BINARY TO 1 - OF - 2 DECODER WITH INHIBIT

VSS

7

VEE

14 X 15 Y 4 Z

Figure 2. UTC 4053 Functional Diagram

"ON" RESISTANCE, RON (OHMS)

350

T a =25℃

"ON" RESISTANCE, R ON (OHMS)

VDD = 7.5 V 300 VEE = - 7.5 V 250 200 150 100 50 0 -10 -8.0 -6.0 -4.0 -2.0 0 2.0 4.0 6.0 8.0 10

350

VDD = 5.0 V 300 VEE = -5.0 V
Ta =25℃

250 200 150 100 50 0 -10 -8.0 -6.0 -4.0 -2.0 0 2.0 4.0 6.0 8.0 10

INPUT VOLTAGE, Vin (VOLTS)

INPUT VOLTAGE, Vin (VOLTS)

"ON" RESISTANCE, RON (OHMS)

350

VDD = 2.5 V 300 VEE = - 2.5 V
Ta =25℃

250 200 150 100 50 0 -10 -8.0 -6.0 -4.0 -2.0 0 2.0 4.0 6.0 8.0 10

INPUT VOLTAGE, Vin (VOLTS)

UTC

UNISONIC TECHNOLOGIES

CO., LTD.

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QW-R502-036,A

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UTC 4053

CMOS IC

UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.

UTC

UNISONIC TECHNOLOGIES

CO., LTD.

6
QW-R502-036,A

www.unisonic.com.tw