BIRLA INSTITUTE OF TECHNOLOGY, RANCHI, INDIA DEPARTMENT OF ELECTRONICS & COMM ENGINEERING

EC 8111 - VHDL & ASIC TOOLS

Module 1 Introduction: System design with uses, History of VHDL, Simulation fundamentals, Modelling hardware, Language basics, Building blocks in VHDL, Design units and library. (5) Text Book: VHDL by Douglas Perry, TMH, 1999. Chapter 1 & 2 Module 2: Sequential Processing: Process statement, Signal Vs variable assignment, Sequential statements, For loop, While loop, Condition statements, Examples of half adder and full adder, Test bench. (6) Text Books: VHDL by Douglas Perry, TMH, 1999. Chapter 3 Module 3 Object and Data Types: Data types, Scalar, Composite, Access type, File type; Arrays; Objects, Signal variables, Constants and files, Association lists, Interface lists, Structural description, Examples. (6) Text Book: VHDL by Douglas Perry, TMH, 1999. Chapter 4 Module 4: Subprograms and Packages: Subprogram, Functions, Conversion function, Resolution functions, Procedures, Packages, Package declaration, Deferred constants, Subprogram declaration. (6) Text Book: VHDL, by Douglas Perry, TMH, 1999. Chapter 5 Module 5: VHDL Synthesis: Simple gate - concurrent assignment, IF control flow statement, Case control flow statement, Simple sequential statements, Asynchronous reset, Asynchronous preset and clear, Complex sequential statements. (6) Text Book: VHDL, by Douglas Perry, TMH, 1999. Chapter 10

BIRLA INSTITUTE OF TECHNOLOGY, RANCHI, INDIA DEPARTMENT OF ELECTRONICS & COMM ENGINEERING Module 6: ASIC High Level Design Flow: RTL simulation, VHDL synthesis, Functional gate level verification, Place and route, Post layout timing simulation, Static timing. (5) Text Book: VHDL, by Douglas Perry, TMH, 1999. Chapter 10 Module 7: ASIC Tools: Introduction to Cadence, Analogue design environment, DC analysis, Transient analysis, Frequency domain analysis, Noise analysis, Layout tools, Design rule check, Layout vs schematic. (6) Text Book: 1. Cadence Design Systems, Cadence Tutorial: 2003