This action might not be possible to undo. Are you sure you want to continue?
S*P sSS*S YSS'
.S_sSSs .SS~YS%%b S%S `S%b S%S S%S S%S d*S S&S .S*S S&S_sdSSS S&S~YSSY S*S S*S S*S S*S SP Y
.S_SSSs .SS~SSSSS S%S SSSS S%S S%S S%S SSSS%S S&S SSS%S S&S S&S S&S S&S S*S S&S S*S S*S S*S S*S SSS S*S SP Y
sSSs d%%SP d%S' S%S S&S S&S S&S S&S S*b S*S. SSSbs YSSP
sSSs d%%SP d%S' S%S S&S S&S_Ss S&S~SP S&S S*b S*S. SSSbs YSSP
.S .SS S%S S%S S&S S&S S&S S&S S*S S*S S*S S*S SP Y
.S_sSSs .SS~YS%%b S%S `S%b S%S S%S S%S S&S S&S S&S S&S S&S S&S S&S S*S S*S S*S S*S S*S S*S S*S SSS SP Y
.S S. .SS SS. S%S S%S S%S S%S S&S S%S S&S S&S S&S S&S S&S S&S S*b S*S S*S. S*S SSSbs_S*S YSSP~SSS
.S_SSSs .SS~SSSSS S%S SSSS S%S S%S S%S SSSS%S S&S SSS%S S&S S&S S&S S&S S*S S&S S*S S*S S*S S*S SSS S*S SP Y
.S_sSSs .SS~YS%%b S%S `S%b S%S S%S S%S S&S S&S S&S S&S S&S S&S S&S S*S d*S S*S .S*S S*S_sdSSS SSS~YSSY
sSSs d%%SP d%S' S%S S&S S&S_Ss S&S~SP S&S S*b S*S. SSSbs YSSP
.S_sSSs .SS~YS%%b S%S `S%b S%S S%S S%S d*S S&S .S*S S&S_sdSSS S&S~YSY%b S*S `S%b S*S S%S S*S S&S S*S SSS SP Y
sSSs d%%SP d%S' S%| S&S Y&Ss `S&&S `S*S l*S .S*P sSS*S YSS'
sdSS_SSSSSSbs YSSS~S%SSSSSP S%S S%S S&S S&S S&S S&S S*S S*S S*S S*S SP Y
.S S. .SS SS. S%S S%S S%S S%S S&S S&S S&S S&S S&S S&S S&S S&S S*b d*S S*S. .S*S SSSbs_sdSSS YSSP~YSSY
sdSS_SSSSSSbs YSSS~S%SSSSSP S%S S%S S&S S&S S&S S&S S*S S*S S*S S*S SP Y
Introduction to the process of emulation !hen "ou #ant to emulate a computer or an arcade s"stem "ou ha$e to emulate all the hard#are %and sometimes also the soft#are& that the s"stem has. 'herefore( for this emulation "ou need to )no# the architecture of the s"stem. !hat is the architecture of an arcade s"stem* !ell( it is almost the same of an" computer s"stem )no#n. 'here is a main +P,( or sometimes a master +P, and one or more sla$e +P,s( or a cluster of processors all #or)in- to-ether %multiprocessors&. In an" case SI is an old small arcade machine so it's a sin-le processor s"stem. 'here are other components attached to the +P,. memor" %both /01 and /21&( -raphic hard#are( sound hard#are( input hard#are and perhaps other special hard#are. 2 bus connects all these components. 2 bus is a -roup of electric lines. 'here are three main t"pes of buses. address bus( data bus and control bus. 2 control bus carries si-nals from3to the memor" and hard#are de$ices to3from the +P,4 those si-nals are used for controllin- the de$ices and to inform the +P, of the state of the de$ices. 'he data bus carries data bet#een the +P, and the de$ices. 'he data bus si5e indicates the +P, bit si5e. In this case the 6767 is an 68bit +P, because it has an 68bit data bus. 'he address bus carries the memor" address or the data port #here the data #ill be read or #ritten. 'he 6767 has a 9:8bit address bus4 for the data port onl" 6 of these bits are enabled. 2 small schema can be. |88888888| |888888888| | | | | | 1emor" | | ;e$ices | | | | | |8888|888| |8888|8888| | | 8888888888|888888888888888|8888888888888888|8888888888888 <,S | |888|888| | | | +P, | | | |_______| I'm reall" bad as an 2S+II painter. 'he processor e=ecutes instruction from memor" %in SI this is from /01&. ;ata is read from memor" and #ritten throu-h the bus. 'he +P, sends commands to the different de$ices throu-h the bus and it also -ets response from them. !h" do "ou ha$e to )no# about such thin-s* <ecause for emulatin- somethin"ou must )no# ho# it #or)s. You must )no# e=actl" ho# it #or)s so "ou can reproduce the beha$iour of the s"stem. !ell( no# tal)in- about emulation. 'here are man" manners that a machine can be emulated. 'he main techni>ues actuall" bein- in use are interpretin- and d"namic recompilation. <oth tal) about ho# the +P, core is emulated. 2s #e #ill see( the +P, emulation is the real core or heart of the emulator. ;"namic recompilation means to translate or compile source +P, instructions into tar-et +P, instructions. 2n interpreter means to interpret or e=ecute source +P, instructions( no translation is performed and each instruction is handled as a command or function and e=ecuted %if "ou )no# ho# <asic( 'cl or
Perl #or)s( it is the same techni>ue&. I #ill tal) about the other emulation techni>ues someda"( but this document is be-innin- to be too lar-e so I #ill onl" tal) about interpreter emulators. 'he emulator is built as the architecture #e are emulatin-( around the +P,. 'he +P, emulation is the core of the emulator. !h"* ?et's see ho# a computer or arcade machine #or)s. 'he +P, fetches and e=ecutes instructions from the memor" %in our case /01 memor"&. It performs calculations( mo$es data from /01 to #or) /21 and $ideo /21( sends commands to the de$ices and -ets response from them. So our emulator #or)s in a similar manner. 'his is the main al-orithm of an emulator. reset_+P,%&4 c"cles c"cles_until_ne=t_e$ent4 #hile%@end& A res core_e=ec_instr%c"cles&4
33 call the +P, core
if %res c"cles_to_e$ent& 33 call interrupts( dra# screen( ... B c"cles c"cles_until_ne=t_e$ent4
%Cor a best al-orithm read 1arat Do# 'o( toda" I'm a bit tired& 'he +P, interpreter fetches or reads opcodes from memor" as a processor does. 'he interpreter decodes the instruction( meanin- that it realises #hat instruction it is and e=ecutes the code that performs the function of that instruction %modifies re-ister $alues( #rites to memor"( updates c"cle counter( ...&. You need to )no# the timin- of the emulation( and this can be done countin- the number of c"cles the +P, has e=ecuted. 'he time of a computer s"stem is held b" the +P,( %in the first s"stems that #as more important( more modern s"stems ha$e other #a"s to )no# the time&. You ha$e to )no# the time of the computer because there are some tas)s that ha$e to be performed in a specific %sometimes $er" accurate& moment( for e=ample( such tas)s as dra#in- the screen or sendin- an interrupt si-nal. 'he +P, core #ill be e=ecutin- instructions until an error is found or the number of c"cles to e=ecute passed are e=hausted. 'he core is called to e=ecute a number of c"cles each time4 this number is related to somethin- that mi-ht happen in a moment of the emulation %#e can call it an e$ent&. !hen the c"cles are e=hausted some chec)s or actions are performed. dra#in- the screen( sendin- an interrupt si-nal( or other tas) 2nother interestin- >uestion is ho# the emulated +P, can communicate #ith de$ices. In a computer there are t#o #a"s for the +P, can control or communicate #ith the de$ices. memor" mapped I0 %input3output& or #ith a special I0 operations. 2ll the +P,s ha$e memor" mapped I0( but onl" a fe# ha$e a special set of I0 operations4 6767( E67 and =6: famil" are such +P,s. 1emor" mapped I0 means that a re-ion of the memor" isn't real s"stem memor" but is mapped re-isters or memor" from a de$ice. !hen the +P, reads or #rites to it( the +P, is readin- from or #ritin- to a de$ice. Special hard#are attached to the address and data bus detects a read3#rite in that re-ion and redirects the read3#rite operation to the correct de$ice. 'he $ideo /21 is an e=ample of memor" mapped I0. 'he other #a" is to ha$e a separate set of instructions and address space for I0. Fach de$ice %or re-ister in a de$ice& has a number %address& and some load3store )ind of instructions %usuall" called IG30,' instructions& to let #rites happen to them. Do# is that emulated* !ith memor" and I0 maps. 2 memor" map is a list of memor" re-ions that has a memor" handler %a pointer to a function that implements the memor" access& associated. Fach time a read or
or b" an e=ternal de$ice& and a fla. 'he interrupts are perhaps one of the more difficult thin-s to emulate. -rabs the old Pro-ram +ounter bac) from the stac). core& is called the core e=ecutes the code of the interrupt routine and later continues the normal flo# of e=ecution. core calls e=ecute_instructions%& as follo#s. specific& and sets the Pro-ram +ounter to this ne# $alue. o 'he current Pro-ram +ounter is sa$ed on the stac). stops the e=ecution and calls a special routine. o 'he interrupt fla. Cor e=ample a pi=el could be dra#n or a sample pla"ed. It is purel" for illustration purposes. o 2n interrupt occurs %bein. continues %usuall"& the e=ecution from the point it #as interrupted. Yet another #a" a de$ice can communicate #ith the +P.and incomplete. ?et me )no# ho# to impro$e it@ Iictor 1o"a del <arrio $mo"aJac. 'he same happens #ith I0 maps #hen the +P.in the +P. If it's a normal memor" operation the interpreter accesses the emulated memor" directl".. is interrupts. !hat follo#s is the steps that are ta)en #hen an interrupt happens.caused internall" b" the +P. . I hope it #ill #or) as an o$er$ie# of the process of emulation.upc. !hen an interrupt happens the +P. If "ou disa-ree #ith somethin. !ell( it's #hat I could do #ith the time I ha$e. If it's a mapped I0 re-ion the interpreter calls a function that implements the beha$iour of the mapped de$ice. Such functions access the data structures from the emulated de$ice that are chan-ed follo#in. o 'he +P. SF+'I0G %Interrupts in more detail& 'his section e=pands on this interrupt idea further and -oes into a little more detail that ma" become useful later. If "ou #ant a more detailed loo) at the interrupt s"stem( please loo) at the ad$anced section at the end of this document. I thin) the document is still confusin. 4& 2nd a lot of the subHects co$ered #ill be better e=plained #hen #e be-in to implement them. Fffort has been made to ma)e this as -eneral as possible and does not mean to impl" an" +P. interpreter e=ecutes a load3store operation that matches the accessed address of the memor" map. conte=t.the de$ice beha$iour.#rite is performed #here the address indicates a de$ice's memor" re-ion( the proper function is called %if there isn't a handler it's understood that it is a direct access to the emulated memor"&. !hen the routine ends the +P. !hen the emulation decides that an interrupt has to happen( it sets a fla. architecture.I2G+F. 'he interrupt is ser$iced the ne=t time the +P. o 'his routine( or e=ception handler is e=ecuted %usuall" from /01 or /21&. o 'he routine finishes and the +P.here then please sa"( so it can be modified.the e=ception. 'hat is all for no#.es 2. Ge=t time e=ecute_instructions%& %the +P. o !hen the routine ends the +P..is set in the +P. -ets the address of the routine to handle the e=ception %the K#here fromK is +P. continues from this Pro-ram +ounter #hich is the e=ecution from the point it #as interrupted.is unset 8 #e are no# handlin. core conte=t.
e$er made( and it is still ali$e . ops I didn't find #hen it #as released( an"one )no#s about it* ?ast M7s for sure. It's one of the first classical arcade machines li)e Nala-a( Pacman( or Pon. %the second micro+P. 6Pb /01 and 6Pb /21. ?ater some other compatible but e=tended +P. Cor sure( I'm not $er" -ood at it and I li)e Nala-a or Nala=ian more( but #hat does it matter* 4&.. It also has a SP %stac) pointer re-ister& and a P+ %Pro-ram +ounter /e-ister&( both of #hich are 9: bit re-isters. .people I ha$e pla"ed other SI $ersions on a lot of different machines %m" first $ersion #as in a P+&. ..o. 'he $ideo hard#are is a monochrome displa" so each bit of the memor" stores the $alue of one pi=el %on3off&.an interrupt* !e #ill -o into this in more detail later as it is prett" much +P. 'he $ideo memor" is M Pb and the #or) memor" is 9 Pb. It's built around an i67672 +P. 'he displa" and I/21 are OOQ=OR:. In this case I thin) it is a O1h5 +P.s #ere released as the 676R and the #ell )no#n E67 %Eilo-& #hich is( in m" thou-hts( the most impressi$e and beautiful 68bit +P.also the fla..&. 'he 6767 has three t"pes of memor" addressin-( immediate( direct and indirect %usin. /e-ister D? is used for indirect memor" addressin-. Go# I thin) about it I see SI is the same a-e as m" brother( so #hen it #as released I #as prett" "oun-( perhaps I could ha$e pla"ed #ith it in a museum. 'he" can be also accessed in pairs as 9:8bit re-isters %2C( <+( . ..D?&. 2s input de$ices( it has a O#a" stic) and one button %for each pla"er&.. /e-ister <( +( . It also has a pla"er 9 start button( pla"er O start button( coin s#itch and 'I?' s#itch %*&. #ith ei-ht 68bit re-isters %I'm countin. released . I'm sure I ne$er pla"ed #ith the arcade machine( but I ne$er #as an arcade machine pla"er so . Space In$aders is a $er" simple machine %li)e all other machines from that a-e&. 'o be e=act it is( 6)b i6)S/21 in 6 pieces and 6)b i9:)FP/01 in Q pieces. /e-ister 2 is the main accumulator re-ister4 man" operations are performed #ith that re-ister as source3tar-et re-ister. 2 <rief . It's an old Intel +P.& 0h( but li)e an" other "oun. specific.&. %Intel& or another compatible +P.is #ron-. It is( perhaps( the first useful and cheap +P.( F( D( ? and C. 0ps( no# I ta)e a loo) to the schematics I see 9: /21 I+s( umm( perhaps the document I'm usin.( 'I( GF+( GS( SINGF'I+S&.& released for commercial use %perhaps . I thin) e$er"one )no#s this -ame.are.It is not >uite as simple as this because #hat do "ou do #hen a second interrupt occurs( #hen the +P. 'he memor" space is 9: bits .. 'hat ma)es the screen more #onderful( doesn't it* 4& It didn't re>uire e=tra e=pensi$e hard#are .escription of Space In$aders Space In$aders is a 1id#a" arcade machine from 9LM6 %if m" sources of information are correct 4&. It #as a $er" popular +P. If #e also count branch instructions #e ha$e relati$e to P+ addressin-.F are multipurpose re-isters( mainl" used as accumulators also.( F( <+( .. It's an 68bit +P. for man" "ears and the first to be $astl" used. It's an enhancement of the 6776 Intel +P.oes an"one #ants to disco$er the m"ster"* <ut it's still true. So this is #hat #e #ill ha$e to emulate. 0)a"( enou-h tal) #ithout sense( let's do some #or).. is in the middle of processin.. Go# I #ill tal) a bit about the 6767 +P. from another manufacturer %in the schematics from Spies( for e=ample( it's a 'I( 'e=as Instruments( +P. I don't )no# . I thin)( first #as Q77Q&.&. 'here #ere a lot of $ersions from different manufacturers %21. It has 6Pb /01 %distributed in $arious I+s( this machine is reall" old& and 6Pb /21 %mainl" $ideo memor"( but also a bit of it is #or) /21&. 'he machine also uses t#o transparent coloured %red and -reen& pieces of paper in the top and the bottom of the screen.F and D?&. Sound effects are produced #ith analo-ue circuits so it #ill be hard to emulate them( so #e #ill use samples instead.re-ister C&. 2( <( +( . %as a micro+P.S arm" had others for its missiles. 'he $ideo and sound hard#are are $er" simple..
'he state of a +P.F #or) as data counters and also sometimes for indirect addressin-.( F( D and ?. 'he i67672 has M 68bit re-isters %also called accumulator re-isters in the doc&. space #ith OR: ports. It's the #a" the rest of the emulation code accesses the functions of the core. Peep in mind that #e ha$e to access those re-isters both as 68bit re-isters and 9:8bit re-isters #hile #ritin. 'he conte=t is the structure that holds the +P.. 2C is onl" used %I thin)& for pushin.. 'he decision that #e ha$e to ma)e is ho# that #ill be.the conte=t. Fnou-h toda".lon-( OS9: :RRTR b"tes or :QPb"tes. . %the core& state.. 2 %the main accumulator re-ister( #here most of the operations #ill be performed&( <( +( . conte=t sets the +P. If #e implemented the 2PI and did not )eep in mind that it mi-ht chan-e( #e mi-ht come to a situation #here it #ill be reall" hard to chan-e. is its re-isters( the memor" it accesses and some fla-s that )eep the state of the +P. D? is the main re-ister for memor" addressin-. It has also a separated Input30utput I thin) I tal) too much( don't "ou* 4& +omments( mista)es "ou ha$e found( #hate$er. core the core e=ecutes n c"cles returns the +P.the +P.F and D?. core 'here are some >uestions that must be resol$ed before #e start to emulate the instructions of the i67672. !e need to thin) about. 2C %2 re-ister and the state #ord PS!&( <+( . 'o ma)e this possible( #e could implement them as a t#o8element char arra"( a union( or #e can ha$e separated fields for the 68bit and 9:8bit $ersions %but this is usuall" a reall" bad idea&.itV)-#9W onto the stac)( <+ and . Iictor 1o"a Startin. a& 2n 2PI b& 2 conte=t c& 2 method for opcode decodin'he 2PI %2pplication Pro-rammers Interface& is the functions or procedures that #ill be called from the main emulator #hich access the +P. conte=t sends an interrupt si-nal Perhaps it #ill be better to start #ith a simple 2PI and then later as #e implement ne# functions of the emulator( ma)e it more comple=. core. 'he" can also be accessed in pairs as four 9:8bit re-isters.to ma)e our core 1E67 compliant or perhaps 121F compliant* !hat functions #e #ill need* !hat ar-uments #ill the" ha$e* 2s an e=ample the main functions #e #ill need. 'his has benefits and could also cause a lot of problems. !e are -oin. reset%& e=ecute%ncl"ces& -etconte=t%& setconte=t%ct=& interrupt%& 8U 8U 8U 8U 8U resets the +P.
the +P. 0ther small thin.for the emulation of Space In$aders( but #e do not need to implement them in the first $ersion of the emulator( it #ould be better thou-h. !e ha$e also to ha$e information about interrupts. 'his information can be used as statistics for findin. 'he first choice means #e #ill ha$e to do shift and lo-ical operations each time #e #ant to chan-e a fla-.chan-e if a interrupt is currentl" bein.or ha$in.#here and #hen to branch. !e #ill need memor" and I0 mappin. halt state.on the other hand( #e #ill put pointers to structures that store the memor" maps for read and #rite %and also pointers for I0 mappin-&.. 2nd there is still the info about the memor" and the I0 space.'here are also t#o more re-isters( and the" are $er" important.chan-e if the interrupts are enabled or the" are disabled( a fla. memor" and I0 mappin.information about the operations performed. 'he second is to store them in separate fields( each fla. In that situation onl" a reset or a po#er up %in fact the" are the same& can put the +P. Si-n %S&( Eero %E&( 2u=iliar" +arr" %2c&( Parit" %P& and +arr"%+&.beina <oolean $ariable. 'he second means that #e #ill ha$e to pac) all fla-s in an 68bit #ord each time PS! %C& is accessed. 'he first is store them in a sin-le 68bit re-ister( this means storin.ser$iced and perhaps a >ueue of interrupt si-nals. I #ill tal) about them #hen #e decide to implement them.for an e=ternal si-nal from a de$ice %an interrupt&. to #or) a-ain. 'he fla-s are bits that are modified b" some of the i67672's instructions( -atherin.the conte=t #ill need to ha$e a pointer to the memor" re-ion that stores the machine memor"( and a pointer to the memor" re-ion that stores the I0 space. .about the +P. 'he more important of these is the accurate timin-( #hich basicall" means the number of c"cles e=ecuted since last reset si-nal. 'he +P. 'he i6767 has R fla-s. Dere there are t#o choices. I #ill tal) about the stac) later. <ut I #ill tal) about interrupts later. 'he more fre>uent are actuall" the operations that chan-e fla-s.#e ha$e to store is a fla. 'his information is later used to ma)e decisions 8 mainl" for decidin. If #e do use memor" mappin. If #e do not use memor" mappin. 'here is "et another set of re-isters that #e ha$e to ta)e care of. fla-s( these are also called the Processor State !ord %PS!& #hen #e tal) about all of them to-ether.a simple arra" for the memor" and for the I0.the PS! as it is %also called re-ister C&. Ier" curious( the i67672 can be completel" han-ed if "ou disable interrupts and later "ou halt it. 'he P+ re-ister %Pro-ram +ounter&( is a 9:8bit re-ister #hich points to the memor" address of the instruction to be e=ecuted. 'he" are stored in the PS!( an 68bit re-ister( as follo#s.out about the e=ecution and to implement accurate timin-. !e #ill ha$e to store some other information that usuall" is not stored in a real +P. !hat solution is better* . a fla. M S : E R X Q 2+ T X O P 9 X 7 + bit number content X means that the bit is unassi-ned %I thin) it is usuall" set to 5ero& I #ill tal) about fla-s later #hen #e start the emulation of the instructions( but ho# #ould the" stored in the conte=t* I thin) there are t#o alternati$es( and both ha$e -ood and bad points.epends upon ho# man" times each )ind of operations is performed and the cost of each. 'he SP re-ister( or Stac) Pointer re-ister( points to the memor" address of the top of the stac). is in the Khalt stateK #hen it is stopped( usuall" #aitin. So perhaps the second is the better choice.
2 + compiler #ill detect that the s#itch3case statement has a lot of different $alues that are close to one another and #ill implement it as a Hump table. Do# #e #ill do it* !e #ill use Hump tables. 'his has a brutal cost. F=ample of an s#itch3case decode. 'he i67672 has fi=ed len-th opcodes that are a sin-le b"te in si5e %some instructions are more than one b"te( but the later b"tes are not used for decodin-&. if %opcode 7=77& AB else if %opcode 7=79& . 'he last opcode %7=ff& #ill cost ORR tests and ORR Humps. Do# do #e do this* Cirst approach( an arra" of if's.YN++& is implemented #ell enou-h that it does this all for us( %it is b" the #a"&. Do# can #e implement it #ith +* !e can ma)e it b" hand or #e can use the s#itch3case statement and hope the + compiler %. 'his is not a -ood choice( and if an"one implemented such an emulator( it #ill need a reall" po#erful machine to run it. brea)4 . brea)4 7=79. 'hin) about all that then #or) a bit on "our o#n conte=t. . !e ha$e to decode the instructions $er" >uic)l" because the decode function is the most e=ecuted function of the emulator.I thin) that is all about conte=t. . 2 Hump table is an arra" of tar-et Hump addresses that are inde=ed b" a number( and that number tells #hat Hump must be performed. ?ater I #ill release the official one. 7=67. In an" case #e ha$e t#o alternati$es( it is our decision to choose one or the other. 'his ma)es life a lot easier@ !e #ill ha$e to decide about OR: %a b"te( OS6& potentiall" different operations. else if %opcode 7=fe& else 3* opcode 7=ff *3 AB AB AB AB 'hat is reall" a $er" bad idea %althou-h #e ha$e a reall" intelli-ent compiler( I do not thin) that it is that intelli-ent&. 'he s#itch3case alternati$e is a bit more readable and understandable( but I cannot see an" other ad$anta-es or disad$anta-es. So #e #ill need to ha$e an arra" of OR: Hump addresses. In our case the number #ill be the opcode and also the Hump address of the code %or routine& that implements the opcode. else if %opcode 7=67& . . Go# #e #ill tal) about instruction decodin-. s#itch%opcode& A 7=77. brea)4 . !h"* <ecause to decide #hich instruction opcode X is( #e #ill ha$e to do X89 tests and Humps to -et to it. . Fach time #e read an opcode #e need to find out #hich instruction it represents.
s( is an order or command to the +P. 33 'he implementation of the instruction brea)4 2n e=ample of a hand8made Hump table in + %I am not sure about the + s"nta= here( sorr"&.& /ead the document( thin) about it( #or) on some stuff and as) >uestions. understands( indicate #hat the +P. B 'he decode code.. has to do. In our case the i6767 has 6 bit %9 b"te& opcodes but it isn't fi=ed len-th( see belo#. 4& <ut "ou can see it isn't so difficult... 'hese bits are called usuall" the instruction opcode %operation code&. Fach KcommandK is a se>uence of bits that( in a special lan-ua-e that the +P. 2s the smallest access unit for the memor" data is a b"te the si5e of an instruction #ill be al#a"s in b"tes. %$oid %*opcode_handler& %&& decode'ableVopcodeW %&4 Fnou-h for toda" I must -o to sleep. !e #ill then ha$e implemented the s)eleton of the core. 4& . Implementin. 2n opcode could ha$e different formats and si5es. %$oid %*opcode_handler&%&& decode'able VOR:W A opch_7=77( opch_7=79( . So the opcode is the identifier of an instruction..s the opcodes ha$e fi=ed len-th %such as 1IPS or 2lpha& #hile others ha$e $ariable len-th %for e=ample =6:&... 'he" could be from 6 bit to 9O6 bit lon-. 'here are still some other subHects that I #ill ha$e to discuss( thou-h. brea)4 7=ff.about +P. . brea)4 B 'his )ind of structure also helps to put to-ether -roups of opcodes that represent the same instruction.the implementation of the different instructions( but I ha$en't tal)ed about them.. 'his is the best #a" to learn. 7=:M.. 4& 2n instruction( #hen tal)in. In some +P. 7=fe. So( #hat is an instruction* I thin) "ou alread" )no#. 7=:R. 'hese KcommandsK are stored in memor" and are called the code of a pro-ram. In this document I #ill tr" to introduce ho# an instruction %in the most cases& should be implemented.the instructions !ell it seems that #e no# ha$e some people #ritin. 7=::.
. 'he full collection of instructions of a +P. !e ha$e to cop" the beha$iour of the instructions in the ori-inal +P. conte=t and the state of the +P.this into account( and that the si5e of addresses and data that it can handle %6 and 9: bit&( #e can see that #e #ill ha$e three different si5es for our instructions.s %+P. 'hese additional b"tes don't determine the operation that the +P. is called the IS2 %Instruction Set 2rchitecture&. reads and identifies an escape opcode it )no#s that it has to read "et another b"te3opcode to )no# the operation it has to perform. You could sa" that are a lot( but "ou should ta)e account that each different small instruction is a different opcode.. 'his happens bet#een i6767 and E67 #ith opcodes +<h( .an e=istin. In some +P. 'he result of the operation #ill be stored some#here in the +P. !ith 6 bit there are OR: potential different instructions.in the core. Cor e=ample #ith 6 re-isters and an operation #hich mo$es data from one re-ister to another "ou ha$e 6=6 :Q different operations@ 'his #a" the OR: operations are easil" co$ered.h and C. #ill be updated so the ne=t instruction could be e=ecuted. 'a)in. 'he instructions chan-e the +P. %man" times the" #ere reser$ed for this purpose&( but in the ne# +P.h( F. Cor e=ample the address for a memor" access or an immediate $alue %a number or operand& for an add operation. 'here are man" )inds of instruction %as #e #ill see later& but let's no# sho# the -eneral structure of an instruction. 'he" are usuall" used #hen e=tendin.h.s #hile maintainin. In the case of +P.&. <ut as the i6767 is an old +P. must perform but pro$ide the information needed b" the operation. 'hese escape opcodes are usuall" in$alids opcodes in the old +P. conte=t %includin. So this is a schema of the beha$iour of an instruction.. 'his happens #ith our i6767.an"thin-. a nice instruction A -et some data perform an operation store the result update the P+ update the timin- . 9 b"te %onl" the opcode&( O b"tes %the opcode Z 9 data b"te& and T b"tes %the opcode Z O data b"tes&. Sometimes an opcode has additional information such as memor" addresses or immediate data. conte=t %re-ister( memor"( I0& and then perform an operation #ith it. 4& So our emulated instructions #ill ha$e to chan-e our emulated conte=t in the same #a" the ori-inal instructions.suall" not all the possible opcodes ha$e a meanin-4 there are a lot of them that are in$alid opcodes %instructions #hich don't reall" e=ist&.about instructions and opcodes4 let's see ho# the" #ill be implemented in our emulator.binar" compatibilit" %the" can e=ecute code from the old +P. !e must count the time #e are spendin. Sometimes there are special instruction opcodes4 these are the KescapeK opcodes.IS2 in ne# +P. 'he +P.of course memor" and I0 space& %other#ise the" #ould not be doin. #ith onl" 6 bit opcodes it has onl" a fe# of these in$alid opcodes. !ell( enou-h tal)in. the" indicate the e=ecution of an e=tended %ne#& instruction. !hen the ne# +P. 2n instruction also ta)es some time to e=ecute.s #ith $ariable len-th opcodes this information is usuall" outside of the opcode b"te %or b"tes&. usuall" doesn't care about it %it onl" happens 4& but #e ha$e to.s #ith fi=ed len-th opcodes& this information isn't out of the opcode but in special KpositionsK inside the opcode. 2n instruction has to obtain some info from the +P.
2ccess modes are basicall". 2 c"cle or cloc) c"cle is the unit of time that the +P. the address modes. in another +P. !ith memor" it happens the same. 'he" don't need it because the time is actuall" happenin-4 the" onl" ha$e to KfeelK it. !hat are the address modes* !hen "ou -et the data from a re-ister "ou )no# #here the data is.the code.a re-ister& and relati$e to the P+ and the SP modes. 4& 'he i6767 has re-ister( immediate( absolute( indirect %usin. <ut man" +P. 'his is used for easil" accessin. re-ister( memor" and I0 space %if it e=ists&.means that a re-ister or e$en a memor" location %pointed b" the additional opcode data& contains the real address #e ha$e to access. uses for s"nchronisin%internall" the calculations performed b" lo-ical -ates could ha$e different . .suall" +IS+ +P. is arran-ed so the ne=t instruction could be e=ecuted. but I #ill spend pa-es and I #ould finish( perhaps in another doc 4& ha$e a lot of different address modes and /IS+ +P.s don't count ho# man" c"cles the" ha$e e=ecuted %or not usuall"&.the data from a re-ister( immediate means that the information is obtained from the additional data that -oes #ith the opcode %#e ha$e tal)ed about it&.s admit more than one #a" to calculate the address for a memor" access.s %li)e the :6) #hich has a reall" ni-htmare of different addressin.e=plained in step one applies here( but no# it is a #rite. #e must #orr" about the memor" address #here the data is and about the si5e of the data.from I0 space #e #ill ha$e to #orr" about the address in the I0 space and the si5e of the data #e #ill read. !ith re-isters( #e should #orr" about the si5e of the data( for e=ample in the i6767 #e could access re-ister <+ as a 9:8bit re-ister or as t#o 68bit re-isters %< and +&( and #hat re-ister should be read. !hen readin. 'he same In the fourth step the state of +P. 'he fifth step e=ists onl" in emulation4 the normal +P. so #e #ill ha$e a $er" different timin-. in re-ister X.s %I should ha$e to e=plain #hat is a +IS+ and a /IS+ +P.s ha$e onl" the basic access modes. 'he P+ is usuall" updated addinthe si5e of the instruction #e ha$e alread" e=ecuted.B 0f course not all operations perform all the steps but this is the most -eneral structure.different and comple=. 2nd it can be "et more complicated #ith some +P.irect or absolute addressinis the same as the case of readin. 'here are three sites #here #e can -et this info. 'he same happens #ith I0 the data is at address X. Indirect addressin. 'he most commons are indirect #ith post8increment %the address is incremented #ith each access&( #ith pre8decrement %the address is decremented&( indirect #ith displacement %indirect addressin. 'his means basicall" update the P+ %the pro-ram counter& that points to the ne=t instruction to be e=ecuted.I04 the opcode's additional data is an effecti$e address in the memor". desi-ners had thou-ht up.Z absolute3offset addressin-&( inde=ed( implicit relati$e addressin.structure( $ector( table and matri= data. re-ister( immediate( absolute %or direct& and indirect. . <ut #e need to emulate the time because #e are emulatin. In step one #e -et some data that #ith #e #ill perform some #or). In the second step #ith the data obtained is performed on b" some #a" of calculations( or perhaps not. /e-ister access mode means -ettin.the +P. So for maintainin.and #hate$er the ill mind of the +P. thin. <ut in memor" #e could ha$e found somethin. 4& In the third step the result is stored in a re-ister( memor" or I0.modes&.a correct timin-( #e must calculate the c"cles that ha$e been spent e=ecutin.
PS!|S_C?2N .. i6767. to e=ecute.( as "ou )no#( could be found in different speeds %1D5 or number of c"cles per second( so a c"cle ta)es %93= 1D5& seconds&. 'hen this information is used #ith the real time spent in the emulation to s"nchronise #ith the time in the real machine.PS!4 3*****3 brea)4 %T& %Q& %R& %:& In this e=ample %9& is timin-.*3 c"clesZ R4 3* 0peration *3 i6767. In %Q& the P+ is updated to point to the pre$ious b"te before the ne=t instruction and the update to the ne=t instruction #ill a-ain be done in the main instruction8e=ecutin. 'here are different -roups of instructions.PS! i6767.that reall"&.< 7 * i6767. 33 IG+ < | IG/ < %9& %O& 3* +loc)in. <'!( ha$e I said I hate +* 0h( m" belo$ed assembler@@ I started #ith Pascal and =6: 2ssembler man" "ears a-o and the + u-l" an unreadable s"nta= still hurts me. .PS! i6767. load3store or memor" instructions( arithmetic8lo-ic operations( e=ecution control instructions and control instructions.s 4&. 'he P+ update #ill probabl" be done in the loop that e=ecutes the instructions so #e do not ha$e to put it in e$er" sin-le instruction %it is Hust #astin.space doin. 4& %9& %O& %T& %Q& case 7=99. re-isters and the memor" %it . 'his is because of the same +P. F$en pro-rams are sometimes measured in c"cles.PS! & ~P_C?2N4 3* 2u=illar" Parit" +hec) *3 i6767.PS! i6767.(nnnn c"cles Z 974 i6767. i6767.mod O& *3 i6767.the e=ecution time of an instruction. i6767. In this step the field in the conte=t #e added about e=ecuted c"cles is incremented b" the number of c"cles it ta)es the instruction in the ori-inal +P.<%O 7 * i6767.PS!|E_C?2N .<&7=67 U 7 * i6767. 33 ?. .pcZ9W4 i6767.ifferent instructions ha$e different timin-s. i6767. %T& to %:& are calculations. Some instructions e$en ha$e different timin-s bet#een different e=ecutions( for e=ample multiplication or multi8data operations.PS!|P_C?2N . %O& is data access( calculation and result store.s #ith instructions that #ere e=ecuted in no time4 #e #ould ha$e infinite speed +P.F i6767. Fach instruction ta)es a time to e=ecute %it #ould be reall" a dream to ha$e +P. I #ill tal) further about it #hen #e start the hard#are emulation.memVi6767. case 7=7Q. ?et's see some real e=amples %than)s to Pieron & <rian respecti$el"&.memVi6767.PS! & ~E_C?2N4 3* Das the result the si-n bit set* *3 i6767.PS! i6767.PS! & ~S_C?2N4 3* Is the result of odd or e$en parit"* %usin. !e could perhaps classif" them into three -roups.pcZOW4 i6767. 'he memor" instructions load and store data bet#een the +P.pcZ O4 brea)4 In this e=ample %9& is timin-( %O& and %T& are data load and store( there isn't KrealK calculation in this instruction.<ZZ4 3* +ondition +odes *3 3* Is the result 5ero* *3 i6767.speeds( but this is out of the scope of this tutorial& and it's the unit used %not real time units& for measurin.F(nnnn | ?XI .loop.
<ut it #ill be in another doc. 'he arithmetic8lo-ic operations are the real heart of the +P. additions( substations( multiplications and di$isions4 and lo-ical operations. 2nd I mean use and not abuse.introduction to instruction implementation.re-isters.#ith the arithmetic and lo-ic instructions is the calculation that the" perform. because the" perform the calculations #ith the data. 2nd finall" an ad$ice for Du-h( <rian and Pieron( I Hust find fine "ou ha$e be-un the instruction implementation. !e can focus on the particularities of each )ind instruction for emulatinthem. 'he" perform arithmetic calculations. 2rithmetic8lo-ic Instructions 'hese instructions reali5e the real hard #or) of the computer. 4& 2fter loo)in. Perhaps a bit about testin.and I don't )no# man" +IS+ architectures&. . 'he result is almost al#a"s stored in a re-ister. 'he" access data( call operands( perform an operation( store the result and so on. 'his calculation has usuall" t#o . +IS+ +P.% &( the d"narec stuff( #atch the 'I %better not( it usuall" suc)s( luc)il" there are those anime series'& . 'he control instructions are instructions such as nop( halt( reset( and interrupt enable3disable that modifies the status of the +P. bit tests and sets( bit shifts and rotations. It has been a reall" looooon.P I ha$e spent half an afternoon on this( and I ha$e others thin-s to do. Some hea$" +IS+ could -et more than one operand from memor" and e$en store the result in memor" %I'm not sure( =6: doesn't do such a thin. 'he" control and modif" the flo# of e=ecution( #hich instructions #ill be e=ecuted ne=t. 'he" are used for obtainin. I #ill also tal) about the use of the macros #ith instructions that are almost the same. 'he" do the hard #or).ntil ne=t doc. 1" proHect super$isor said it to me #hen I presented him( after a #ee) or so( O7 pa-es #ith the *S'2/'* of the memor"@@ I #ill tr" to #rite in the ne=t doc %or docs if I #rite too much .to use macros for instructions that are in fact the same.a bit #hat I ha$e #ritten I ha$e to sa" I didn't thin) at the start it #ould be so lon-. It is reall" incredible #hat can be done #ith onl" a fe# operations@ 'heir structure is almost the same that the -eneral structure I #rote in the last doc...later too. 4& 2ll the useful stuff needs to be #rote.the data needed %operands& and for storin. 2s #e sa" here in Spain I ha$e K$erbo facilK( direct translation is Keas" $erbK( #hich means I li)e #rite3tal) and I easil" fill pa-es and pa-es. <ut perhaps "ou should stop a bit until I can catch "ou #ith m" docs %sorr" I'm slo# 4&. 'he e=ecution control instructions are the Humps( branches( procedure calls and procedure returns( soft#are interrupts( etc.s( thou-h( admit usuall" memor" as one operand. VSome $ersions of the :6777 famil" can do this 8 PieronW 'he most important thin. /IS+ +P. not( and( or( =or4 and bit operations.P& about the implementation of each )ind of instruction.s and older ones( li)e the i6767( perform all their arithmetic and lo-ical operations usin. Yust a thou-ht. . 'he arithmetic instructions usuall" use re-isters as source data( sometimes the" also use memor" but ne$er I0 %from #hat I )no#&. 'here are some thin-s( as the use of macros( #hich should be discussed.the results. sleep( pla" CC 'actics( do some e=ercise %m" relation hei-ht3#ei-ht reall" suc)s .. I thin) it #ould be useful for testin-( clarit" and fast codin.could be also memor" to memor" instructions&.
.s.calculation could be reall" a ni-htmare in + and it is the main reason I hate + cores( it is reall" a lot of easier to emulate fla..I #ill tal) about in another doc.the calculation #e ha$e to ta)e care of a fe# thin-s.the result of a different . status #ord %or PS!&( this happens in our i6767 or e$en in the =6: architecture( but it is not needed. aritlo-_instruction A tmp9 -et operand 9 tmpO -et operand O tmpT calculation % tmp9( tmpO & fla-s calculate_fla-s % tmp9( tmpO( tmpT& store_result % tmpT & . If our + compiler has math e=tensions that perform calculations #ith double the machine #ord si5e( the emulation #ill be a lot slo#er but #e ma" not reall" care. 2nother thin. all the other usual stuff . .calculation in asm. first the calculation itself and second the flacalculation.#e ha$e to be a#are of is that not all instructions #ith a name X perform the same operation in all the +P. 'he" could be in a different re-ister or e$en to ha$e different re-isters for each condition code.important aspects. Cor e=ample in a i6767 the #ord si5e should be the b"te %I'm not sure thou-h because I don't ha$e a i6767 + compiler& and it has some double #ord operations %9: bits operations&. does not perform operations in such a si5e&. Cla-s( #hich are also )no#n as condition codes( are stored usuall" in the +P. Sometimes each one used for storin. In =6: %if it is ZT6:& the #ord si5e is TO bits and in a ne# -eneration /IS+ it is :Q bits or e$en 9O6 bits.#hat to do ne=t( #hich is usuall" #ith a branch conditional instruction.from a machine #ith lar-er #ord si5e than our tar-et machine #ord.endian problem. F=amples of this instruction are cmp %compare( #hich is reall" a subtraction& and test %#hich is a lo-ical and&. If the tar-et machine has the same #ord si5e there is not usuall" a problem( but there could possibl" a little3bi..problem happens #hen #e are translatin... Cla. If the tar-et machine has a bi--er #ord si5e then #e ha$e to perform the operations in the correct si5e %half#ord or #hate$er& or e$en 5eroin.in both machines and lan-ua-es. 'his is another thin. 'his information is stored in the fla-s and is then used for decidin. So #e ha$e to loo) at the IS2 definition and the + %or another lan-ua-e( or e$en the tar-et IS2 definition if #e are usin. 'here are also arithmetic and lo-ical instructions that do not store the result but onl" perform the calculation so the fla-s #ould be updated.assembler& and )no# FX2+'?Y #hat this instruction is doin. So #e #ill ha$e to emulate the calculation itself and then perform the fla..? instruction could be for e=ample si-ned and unsi-ned or a rotation instruction could ha$e different side effects. Cirst bitness( the emulated machine and the tar-et machine could ha$e different #ord si5es %#hat in + is usuall" called an int&.calculation. 2 1. 'he real bi.suall" the pro-rammer is not onl" interested in performinan operation to -et a result( but also to -et some information about the result. B !hen emulatin.the upper bits of the result %if the tar-et +P. If not #e #ill ha$e to implement our double si5e operations.
indicates that the result is si-n chan-ed from the real result that it should be. 'his means that the result e=ceeds the si5e of the +P. 'he borro# is the same as the carr" but #ith a subtraction and so somethin. 'his can be e=plained better #ith an e=ample. 'here are also other fla-s and combinations3modifications of those. It is used #ith sum and subs. 'o implement it "ou can chec) the operation and the si-n of both operands and the result and act properl".the hi-hest bit of the result.an 2G.could be also used for other thin-s. 'he +C is also used for storin. 'he carr" fla-s indicates that the operation has produced a carr". 2s the +C fla.%SC&.stores the si-n of the result( #hich is the hi-hest bit of result. It is usuall" used b" multiplication and di$ision instructions and I thin) it could mean also that result e=ceeds %usuall" b" far& the result #ord si5e. 'he 5ero fla. It could easil" implemented Hust chec)in. 'he 5ero fla-s indicates if the result is 5ero( usuall" EC 9 means result is 7 and EC 7 result is different from 7. 2s) me if "ou #ant me to e=plain this further. 2 conditional instruction is an instruction that chan-es the order of pro-ram flo# dependin.similar can be done. Cor e=ample doin.%EC&( carr" fla. 'he si-n fla.the fla-s. 'he o$erflo# fla.%+C&( o$erflo# fla.instructions %this happens in I<1 Po#er architecture&. I could Hust about remember e=actl" ho# it #or)s. Probabl" one of the bi--est differences bet#een the different architectures can be the fla-s. 'he" are also used for helpin. 'he most common fla-s or condition codes are4 5ero fla. In t#o8complement inte-er arithmetic this means that SC 7 %the hi-hest bit of the result is a 7& means a positi$e number and SC 9 a ne-ati$e number. 'hen "ou test if the result e=ceeds the lar-er unsi-ned binar" number possible #ith the emulated operation #ord si5e. #ord.#ith e=tended arithmetic that is arithmetic #ith numbers lar-er than the #ord si5e. 'hin) of a usual sum( 9OQ Z 6M: 88888888888 9777 If #e are #or)in. 'here are e$en architectures that do not ha$e them@ 2s I said before fla-s are mainl" used for storin.some information about the result and then a person or compiler can use this information to ma)e a decision usin.%0C& and si-n fla.a conditional instruction. You need to )no# a bit about ho# binar" sums and subs are performed( for e=ample a sub is an addition #ith the minued complemented3ne-ated.#ith onl" three di-its #e ha$e a carr" of one unit. If this is applied to binar" operations( the carr" can be onl" one or 5ero and this is #hat is stored in the +C.on some element 8 usuall" bein.the result #ith 7. It happens #hen the ne-ati$e result of the sum e=ceeds the si5e of the result #ord si5e. I should ha$e to e=plain about it but it's ma)in. If "our machine has a #ord si5e lar-er than the emulated machine "ou can perform the operation in double the #ord si5e of the emulated operation.m" head hurt no#. operation #ith 7=67 .the borro# of a sub and is used in some rotation instructions. Cor e=ample carr" and o$erflo# fla-s can be used in such a #a".is eas" to calculate comparin.
for b"te #ord si5e( to 5ero out all the lo#er M bits and then chec)inthis result #ith 5ero. Got all +P. 'his happens #ith multiplication( di$ision and some rotation3shift operations and more usuall" #ith older +P.#ill be different.point instructions.+ondition Cla-s %$ersion 9. VPlease use a te=t editor #ith fi=ed spacin. <oolean +onditionals 88888888888888888888 !e )no# #hat these statements are "es* [boolean e=pressionU * [return t"peU . 'his means that dependin. int number %$alueU7& * $alue . .that #e also ha$e to ta)e account #ith some arithmetic 8 lo-ic instructions is that the" could ha$e $ariable timin-.number $alue unless $alue is ne-ati$e #here then the number then is set to 5ero 8 but don't #orr" about that& I tend to thin) that these are neater than if statements( not to mention the" %probabl"*& compile to more optimised code. 'he i6767 clearl" does not ha$e it and CP emulation is far a#a" from the scope of this proHect and document. Somethin.. hopefull" not notepadW Dandin.s.speed %no procedure call o$erhead&.s ha$e floatin. 74 !hich basicall" sets number to $alue if $alueU7( other#ise it sets it to 5ero.of such operations. You ha$e to ta)e into account that the definition of the fla-s ma" chan-e a lot bet#een different +P.efine Cunctions 8888888888888888 Yust to ma)e sure all "ou )no#( a \define is basicall" a function that holds code that #ill be KinlinedK at compile time 8 impro$in. [return t"peU Cor e=ample. %'his has the effect of ma)in.point instructions.e.upon the $alues of the operands the timin. 0nl" the more KmodernK %if a T6: can be called modern& usuall" ha$e a CP unit.and tabs set to Q to $ie# this file( i. Yust to mention it( there are also floatin. Sometimes could be reall" difficult to calculate accuratel" the real timin.O& Cirstl" 8 some reminders. . 'here is usuall" a separate re-ister set %usuall" #ith lar-er re-isters& for those instructions and the" also a separate status #ord and condition fla-s.s.. 'hese instructions perform float calculations rather than inte-er calculation as the usual arithmetic instructions do.
. 'he result is 9 onl" #hen there is a 9 and 7 i.<its 88888888888888888888888888 /i-ht( as "ou probabl" )no# in most lan-ua-es %and e$en in most assembl" lan-ua-es& "ou cannot #or) #ith bits directl".e. and 0/ so I shall Hust remind "ou #hat happens to $alues #hen this is done to a number. 2G. 9797 & 9977 0/.a bit first.e. <oolean 0perators 88888888888888888 I #ill assume "ou )no# the lo-ic tables of 2G.%resettin-& a bit.:.Q. /i-ht lets loo) at settin. 0nl" #hen both bits is 9 is the result 9 i. ab"te ab"te 7=74 ab"te|7=974 'his can of course be abbre$iated to. F$er" bit is KflippedK 9797 | 9977 9777 9997 i.& 0)a"( no# I )no# "ou are familiar #ith the boolean operators( #e can no# use them to set and unset indi$idual bits in a b"te. Go# ob$iousl" #e can not do this as binar" in +( so I #ill use he=.R.. ?ets start eas"( suppose #e #ant to set bit Q of an 68bit b"te to 9( ho# do #e do it* %in binar"& ab"te ab"te 777777774 ab"te | 777977774 /emember bit numbers are labelled M. 'here are t#o )e" principals 9& settin.and ..7 b" con$ention. X0/.nsettin.a bit( and O& unsettin. 9797 S 9977 G0'. ab"te | 7=974 . ~7997 9779 7997 i. 'he result is 9 #hen either bits is 9 Settin.optional..9.e.. %0hh( emulation #ould be a much simpler thin.e.O.if "ou could. \define [function nameU %[parametersU& ] [statementU4 ] [statementU4 ] [statementU4 'he parameters bein.T.Dere is ho# it is KdefinedK.
efine \define setps#%$al& ] 'his is the definition for the define as described in K. I thin) #e are no# read" to ha$e a loo) at the SF'PS! function. for the #hole PS! %Processor Status !ord& #e #ould 5ero all the other fla-s in the process. 'his is nearl" the same as abo$e but instead of usin.a bit.h&( 3* 'hese are the positions of the fla-s in the i6767 %and E67& *3 \define S_C?2N 7=67 3* Si-n <it M *3 \define E_C?2N 7=Q7 3* Eero <it : *3 \define 2+_C?2N 7=97 3* 2u=iliar" +arr" <it Q *3 \define P_C?2N 7=7Q 3* Parit" <it O *3 \define +Y_C?2N 7=79 3* +arr" <it 7 *3 #e can use this Hust li)e #e used the constant 7=97 before. /i-ht no# lets loo) at unsettin.?' of an operation that #e #ant to test to set the fla-s. 'he SF'PS! function 8888888888888888888 0)a"( lets do this section b" section. Cor this reason #e must use the G0' '~' operator. See* It becomes >uite eas" #hen "ou brea) it do#n. %'&'& this ne-ated E_C?2N #ith the PS! to 5ero Hust the 5ero fla-. 'he . %'&'&. PS! | E_C?2N4 You see* It is reall" rather simple #hen "ou -et "our head around it.0/ %'|'&( #e use 2G. 'he parameter '$al' is the /FS.Go#( since #e )no# #hat the positions of the fla-s are %from emu6767. You ma" alread" see a problem here( if #e used 2G. Eero Cla- .efine CunctionsK. So for e=ample 8 #e #ant to set the Eero bit to indicate a result of Eero. 2n e=ample of ho# G0' acts is the follo#in-( ~77779999 99997777 ?ets sa" #e #ant to unset the 5ero fla-( ho# #ould #e do it* !ell( first #e need to ne-ate all the bits of the E_C?2N constant %~E_C?2N& so if( E_C?2N then( ~E_C?2N 97999999 79777777 !e can no# 2G.
PS!|E_C?2N . KIf the result of an instruction has the $alue 7( this fla.is set4 other#ise it is reset.PS!|P_C?2N . In the source there a function init_tables #hich pre$iousl" calculates the parit" fla.enou-h.nsettin. 2s "ou can see the rest of the statement is Hust li)e settin.PS! & ~P_C?2N4 ] 0)a"( this is fairl" simple. i6767. 0ther#ise #e return %or set i6767.efinition. If it is 5ero( #e ha$e a positi$e number( #hereas if it is 9( #e ha$e a ne-ati$e number. You can ha$e a loo) at this code to find out ho# the parit" #or)s %in the code as of side$R& it should not be too hard to understand if "ou stare at it for lon.'ed #ith the ne-ated E_C?2N %#hich unsets the E_C?2N&.PS! & ~S_C?2N4 ] 'he easiest #a" to do this is 5ero out the bottom bits so onl" bit M is intact %2G. Parit" ClaV'han)s to Iictor 1o"a del <arrio for postin.efinition. i6767.efinition. 'he reason #e do this is that it #ould be too costl" to calculate it at runtime.e.e.a boolean conditional to test if $al is 5ero.& .a better $ersion( and then pointin.<itsK and #hat these '&' and '|' operations do* If it is 5ero #e return %or set i6767. 3* Das the result the si-n bit set* *3 ] i6767.PS! | P2/I'YV$alW@ 7 * i6767.PS! $al&7=67 U 7 * i6767.PS! $al 7 * i6767.K 3* Is the result 5ero* *3 ] i6767.i6767 1anual .for all combinations of an 68bit $alue.#ith an Kunsi-ned charK here( so to the + lan-ua-e bit M is Hust the top most bit and G0' a si-n bit. KIf the modulo O sum of the bits of the result of the operation is 7( %i.PS!|S_C?2N . /emember KSettin. KIf the most si-nificant bit of the result of this operation has the $alue 9( this fla.( if the result has odd parit"&. 'he Si-n and Eero fla-s could become a part of this table also.abo$e.PS! & ~E_C?2N4 ] 0)a"( here #e are usin.out I still didn't ha$e it ri-ht 4&W i6767 1anual .o not for-et that #e are #or)in.#ith 7=67 %#hich is 97777777 in binar"&& and then #e can see if this number is -reater than 5ero.and unsettinthe Eero fla. . .PS! e>ual to& itself 0/'ed #ith the E_C?2N %#hich sets the E_C?2N&.PS! e>ual to& itself 2G.and .is set4 other#ise it is reset.K 3* Is the result of odd or e$en parit"* *3 ] i6767. Si-n Clai6767 1anual . i6767.'in.( if the result has e$en parit"&( this fla.K 0)a"( here #e need to detect if the 1S< %1ost Si-nificant <it& %bit M& is 7 or 9.is set4 other#ise it is reset %i.
If the instruction resulted in a carr" %from addition&( or a borro# %from subtraction or a comparison& out of the hi-h order bit( this fla. KIf the instruction caused a carr" out of bit T and into bit Q of the resultin.$alue( the au=iliar" carr" is set4 other#ise it is reset. 0r it ma" be unset if the b"te is in the ri-ht bounds.PS! | +Y_C?2N4 else i6767.ecimal 2dHust 2ccumulator& instruction.it here for completeness.PS!|+Y_C?2N .a .is set4 other#ise it is reset. 2u=iliar" +arr" Clai6767 1anual .a normal function instead of a \define %as su--ested b" Geil&. 'his flais effected b" sin-le precision additions( subtractions( increments( decrements( comparisons( and lo-ical operations( but it is principall" used #ith additions and increments precedin.PS! & B ~+Y_C?2N4 'his one is sli-htl" more complicated in that #e need to cast the incominb"te to this function into a Ksi-ned intK so that #e can detect if #e -o Kout of boundsK of the ori-inal b"te.W \define setac%$al( result& ] if %%i6767.PS! & ~+Y_C?2N4 B 0)a"( this is FX2+'?Y the same as the conditional operations( in fact( here is #hat it #ould loo) li)e in this form %#hich unfortunatel" did not fit on one line&.W setc" %si-ned int $al& A if %$al U 7=ff || $al [ 7=77& i6767. V'his is not in setps# as some instructions do not need it( but I am describin. i6767.PS! %$alU7=ff || $al[7=77& * i6767.+arr" ClaV'han)s to Geil Niffiths for postin.must be set. setc" %si-ned int $al& A i6767.it here for completeness.efinition. Cor this reason #e are usin.22 %.a corrected $ersionW i6767 1anual .efinition. V'his is not in setps# as some instructions do not need it( but I am describin. 'hen the carr" fla.2 S result S $al& & 7=97& | ] %%%$al S _2 S 7=67& & %$al S result& & 7=67& UU R& i6767. You can see this here( #ith the indication that if $al is -reater than 7=CC %ORR& %#hich Krolled o$er 7=CCK from an addition& or is less than 7=77 %#hich #as caused b" a subtraction& then that #ould not be able to be contained in a b"te and thus a Kcarr"K occurred.PS! | 2+_C?2N4 ] else ] ] .
'he rest is Hust #ritin..i6767. <ut #h" must the flo# of e=ecution chan-e* 'here are man" reasons that in determine each )ind of flo# control instruction. 4& If an"bod" can pro$ide a -ood e=planation( please do@ Go# K$alK is the operand( and KresultK is %ob$iousl"& the $alue after the operation. 'he instructions #hich ma)e these decisions are usuall" called conditional Hump or branch instructions..#hen #e start emulatin. 'hese instructions modif" the flo# of e=ecution tellin.PS! & ~2+_C?2N4 Go# this is a tric)" one( I don't pretend to understand >uite m"self as I stole this lo-ic from the 121F E67 core. So the code is or-ani5ed in loops and functions %and3or procedures&. reference manual@ Pieron !il)inson Clo# control instructions %a)a Humps&. 'he instructions .the +P.P( but #hat does 'flo# control' mean* +P. #hich instruction #ill be the ne=t to be e=ecuted( rather than Hust e=ecute the instruction ne=t in memor"( as it is done b" default. Cor e=ample( in an 2. <ut that is all the fun parts to come.s are basicall" desi-ned to e=ecute code se>uentiall". the instructions are ordered in memor" and each instruction is e=ecuted after the instruction #hich is before( and before the instruction #hich is located ne=t. I ha$e named this doc 'flo# control instructions' mainl" because I did not find a better name .. i6767. emulation. 'he order in #hich instructions are e=ecuted is called the flo# of e=ecution. 0f course if this is #ron. 'here are man" )inds of flo# control instructions and #e #ill see some of them here.2 [a re-isterU 8 $alue setac%$alue( i6767. 2nother of the reasons is because the same piece of code can be e=ecuted man" times. It is not usuall" a -ood idea to replicate that code as man" times as it is e=ecuted. I thin) I ha$e prett" much summed up reall" the root concepts of +P. i6767. !ell( let's tal) toda" about the Hump instruction famil".2&4 +onclusions 88888888888 'hat is it@ Dope this cleared up a fe# thin-s( comments are al#a"s #elcome.Space In$aders and it uses this fla-( #e #ill hopefull" be able to see #here it -oes #ron.<.2&4 or for S.up code from a %hopefull" -ood& +P. 0ne of the main reasons is to decide #hat code #ill be e=ecuted ne=t. opcode #e #ould call 'setac' li)e this. 0f course a se>uential flo# of e=ecution is $er" limited( so here is #here flo# control instructions come.2 [a re-isterU Z $alue setac%$alue( i6767.and chan-e this implementation until the code e=ecutes correctl". It #ould probabl" be best for this to -o on the #ebpa-e%s& for reference.
'here is Hust another minor distinction bet#een Humps in some +P. It ma)es sense to ha$e a smaller instruction %to sa$e in code si5e or e$en because the instruction si5e is limited& for those Humps( for e=ample a Hump #ith Hust a b"te for the offset. 'o -ain access to the 0S functions %s"stem calls& some +P. 2 relati$e Hump offsets the P+( so the first thin.s. 'here is another )ind of interrupt #hich is internal to the +P.to do #hen emulatin. is dri$en b" a re-ister usuall" called the P+ %pro-ram counter& #hich points to the ne=t instruction to be e=ecuted. 'his last one is $er" important for s"stems #ith $irtual memor" support.our emulator. !e need to ta)e into account this beha$iour #hen doin. 2n e=ception brea)s the e=ecution of an instruction.s ha$e t#o %or e$en more& #or)in. 'his means that #hat a flo# control instructions ha$e to do is basicall" to chan-e the P+. !hen the handlin. I #ill start #ith the Hump instructions.routine for the e=ception ends it returns to the same instruction that #as bein.s -enerate e=ceptions( but the modern +P.s pro$ide facilities so the hard#are de$ices can send si-nals to the +P. 'here are basicall" t#o possible chan-es. It doesn't e$en #ait the end of the instruction as an I/^ does( because the e=ceptions are -enerated b" errors in the e=ecution of the instruction. Got all +P. far and near Humps.an" instruction. 'here is a #a" to brea) the flo# of e=ecution #ithout e=ecutin.modes( a user mode for common pro-rams and a protected or s"stem mode for the 0S. brea)s the e=ecution flo# and starts to e=ecute the code from a fi=ed %or $ector dri$en& address. 0ften the Hump tar-et address is near to the address of the Hump instruction %small loops( ifs( etc.( the" are called e=ceptions. 2bsolute Humps are al#a"s far Humps( but relati$es can be sometimes near or far. Some +P. !hen this code ends it e=ecutes a special returnin. to add or sub a number to the P+( this is then a relati$e to P+ Hump( or it Hust loads the P+ #ith a ne# $alue( and then it is an absolute Hump. I thin) I #ill tal) further about interrupts %mainl"& and e=ceptions in another doc. 2n absolute Hump is Hust a load into the P+.s ha$e special instructions( the" are usuall" called soft#are interrupts( traps( -ates. 'he more common e=amples of e=ception are the di$ide b" 5ero e=ception and the memor" e=ception %or pa-e fault&. 'he flo# of e=ecution in a +P. !hen a hard#are interrupt is recei$ed %and interrupts are enabled& the +P.e=ecuted %and this time it should #or) correctl" 4&.instruction %interrupt return or iret& and the e=ecution is continued at the point it #as stopped. 'he $alue to load can . Cor lar-er Humps #e can use an absolute Hump or a far Hump %if a$ailable& #hich has a lar-er offset.it is to si-n e=tend the offset $alue %a b"te or a #ord& to the si5e of the P+ and add to the P+ this si-n e=tended $alue.#hich perform these tas)s are called unconditional Humps( call to function( return.&. 2 Hump( or sometimes also called branch( Hust chan-es the P+ re-ister %and it does nothinmore&. 2 near Hump has a smaller ran-e of address to Hump to than a far Hump..s usuall" pro$ide them. +P. In a proper #a" of course 4&. 'hese si-nals are called hard#are interrupts %or Hust interrupts( also I/^s&.
the condition&.upon the $alue of Q of the i6767 fla-s %E( +( P and S&.if and s#itch statements. dela"ed Humps. +onditional Humps used to be al#a"s relati$e %and man" time Hust near& Humps( because the" are used in small loops and for buildin. 'he first thin. Yumps are used for controllin. Cor e=ample a Y+ %Hump if carr" is set& instruction should be emulated this #a". !hat is the difference #ith a Hump instruction* 2 Hump instruction Hust performs the Hump and then %unless the pro-rammer implements it b" hand& there is no #a" to return to the point the Hump #as made.a call does is to store the returnin.s are pipelined %search a boo) about computer architecture& and Humps are a real ni-htmare for performance. 'his #ould be a useful feature because that is #hat a function does. 'here are 6 conditional Humps too( dependin.s( the E67 has them thou-h&. 2 conditional Hump is a Hump #hich onl" performs the Hump if a -i$en condition is satisfied. this feature is $er" important to be emulated too.ifs %an if + statement is usuall" assembled as a concatenation of conditional Humps&. It has t#o unconditinal Humps. if %C & +Cla-& 33 'est if the +arr" fla-s is set pc memor"VpcW4 33 ?oad P+ #ith the Hump address else pc Z O4 33 Got set( s)ip address( ne=t instr.s use this solution.to do is to chec) the condition( if the condition is satisfied the P+ is chan-ed as in a normal %unconditional& Hump( if the condition is not satisfied there is not a Hump. Yumps brea) the flo# of e=ecution and that brea)s the pipelinin. 'he call and ret instructions implement this feature for the pro-rammer. 'he P+ is Hust updated to e=ecute the instruction ne=t to the Hump as in a common instruction.address. 2 Hump can also be conditional. YP and P+D?. P+D? loads the content of the D? re-ister into the P+ %useful for indirect Humps as used in Hump tables&. 2 call Humps to a ne# function( a ret returns from a function.o "ou remember the stac)* !ell( the main .E is 7. In such a +P.loops or implementin.2. 2 dela"ed Hump means that the instruction %or n instructions& ne=t to the Hump instruction are e=ecuted al#a"s %as the" #ere before the Hump but #ithout modif"in. 'o sol$e this problem some +P. 0ther Hust tr" to do a -ood Hump prediction %Pentium&.be an immediate $alue %the tar-et address is stored in the same instruction& or a $alue stored in memor" or in a re-ister. 2 function is called( it e=ecutes its code and #hen it ends( it is supposed to return to the point it #as called and continue the e=ecution there. !here does it store it* .a conditional Hump the first thin. 'hat is hard to e=plain but it is because the +P. Cor e=ample if fla. case 7=. 'he" are the call and the ret instruction %sometimes the" ha$e other names&.too.the flo# of e=ecution inside a function( creatin. 'he i6767 has onl" absolute Hump instructions %it is reall" stran-e but it doesn't ha$e relati$e conditinal Humps( #hich are >uite common in 68bit +P. Cor emulatin. brea)4 Some +P. <ut there is another )ind of flo# control instructions #hich are used to control the flo# bet#een functions.s ha$e a nast" feature.
So a call stores the P+ for the ne=t instruction %the actual P+& in the stac) %in the position pointed b" the SP re-ister&( updates the SP %if the stac) -oes from hi-h to lo# address( as is usual( it is subtracted the si5e of an address $alue& and then loads the P+ #ith the address for the called function. 'hen updates the SP( addinthe si5e of an address $alue %hi-h to lo# stac)&. for e=ample int 9Th is the standard call for the P+ <I0S $ideo functions. !hen a function ends it does a ret instruction. 'here is a fi=ed ran-e of these interrupts %usuall" there are OR:& and those functions are not called b" an address but b" an interrupt number %7 to ORR for e=ample&. +onditional calls and rets #or) is in the same #a" as conditional Humps. 'he interrupt number is the inde= to this table. . If the condition is true the instructions performs a call or a return( if not continues the e=ecution in the ne=t instruction. 'his table can be modified to point to different locations %redirect the interrupt to another routine&( but those functions are al#a"s called in the same #a". 'he" chan-e the #or)inmode of the +P. P+ memor"VSPW4 SP Z O4 brea)4 3* 3* Net the return address . 'he instruction set for call instructions is >uite lar-e in the i6767. 'he" pro$ide a fi=ed #a" to call somethin-. 'he ret instruction does the opposite tas). 'he stac) is also used b" the functions to store the parameters passed to the function and the results of the function %#hen the callin. Soft#are interrupts used to be $ector dri$en. In some +P. 'he ret -ets the $alue in the last entr" of the stac) and loads it into the P+. 'here is a table of addresses in a special location in the memor" #hich contains the address for each interrupt %#hich is usuall" located at the start of the memor" space&. to s"stem mode. It has unconditional call and ret instructions but also conditional call and ret instructions for the E( +( P and S fla-s.con$entions ma)e them to -o throu-h the stac)&( and an" other temporal data related to a function %local $ariables&.s the ret function also adds a -i$en $alue to the SP %the stac) frame for the function&. 'he address for the called function is an absolute $alue #hich can be immediate %in the same instruction& or indirect %in memor" or in a re-ister&.purpose of the stac) is to store the return addresses for function calls. If "ou loo) to ho# a stac) #or)s( it is the #a" the return addresses ha$e to be stored( the more recent called functions #ill be the first functions to return. 'hat e=plains the use of the ret instruction #ith a $alue to add to the SP( it frees the space used b" the function. case 7=cL.elete the stac) entr" *3 *3 'he soft#are interrupts are a special #a" to call functions. Soft#are interrupts are also used as -ates to s"stem mode and to the 0S s"stem calls %the 2PI pro$ided b" the 0S&. 'he" ha$e man" uses( mainl" related #ith 0Ses. 2n e=ample of an implementation of a ret instruction could be. !hen a function ends it has also to free all the space in the stac) it has used. 'he stac) is the perfect place for all this data because each instance %each call& of the function needs its o#n data( and others #a"s to implement it #ould be reall" hard.
I thin) it doesn't ha$e an" e=ceptions.from an interrupt %and it #or)s for all )ind of interrupts.. conte=t but man" +P. has some pins for recei$in. 2 conte=t s#itch implies to sa$e the entire +P.I %disable&. Some soft#are interrupts ha$e special opcodes. Dard#are interrupts %also called I/^s& are not produced b" an" instruction but from e=ternal si-nals %the +P.interrupt addresses&. #ell I thin) here m" documentation is a bit uncomplete&. Cor e=ample an" memor" load or store in a s"stem #ith $irtual memor" can produce a pa-e fault. F=ceptions are produced b" an" )ind of instruction that produces a +P. Performs the same tas)s than a common ret instruction but also restores the conte=t( that is( restores the status #ord or an" other information that the interrupt call sa$ed. <ut an iret )ind of instruction is used at the end of the interrupt routine to return to point the interrupt bro)e the e=ecution.else to the 0S. 'here aren't special return instructions for interrupts %because the fla-s aren't sa$ed . softs( I/^s and e=ceptions& can be called iret.interrupts&. 'he i6767 has a non8mas)able interrupt %an interrupt #hich can't be disabled& and a normal interrupt for hard#are si-nals. I #ill tal) about e=ception and interrupt emulation in another doc. 'he returninaddress is stored in the stac) as in a call instruction( but usuall" the status #ord %the fla-s& is also stored on the stac) #ith it. 'here are t#o instructions for enablinand disablin. 'he instruction used for returnin..'he instructions #hich ma)e calls to soft#are interrupts are usuall" called int or trap( but the" ha$e other names. for e=ample in =6: intT has opcode 7=cc #hile a common interrupt has an opcode 7=cd 7=nn #here nn is the interrupt number.s Hust sa$e the fla-s and let e$er"thin. F=ceptions are hard to emulate because the" potentiall" reduce a lot the performance of the emulator. 'he fla-s are stored because it is supposed to be a )ind of entr" to the 0S( and therefore conte=ts s#itch. If the int is a -ate to s"stem mode then the emulator has to perform all the chan-es needed in a +P. It pro$ides 6 different fi=ed position entr" points for interrupts.s can sa$e e$er"thin-.routines are the same as soft int and I/^s routines and end #ith an iret instruction. 'he SP is updated as usual and the P+ is loaded #ith the $alue pointed to in the $ector table b" the interrupt number %or #ith a $alue obtained #hich is Hust another standard manner for obtainin. 2n int instruction #or)s much as a call instruction but it has some differences. In some cases there are e=ceptions #hich can be -enerated b" specific instructions( as for e=ample di$ide b" 5ero e=ceptions. error. . mode bits for e=ample( chan-e the stac) pointer to s"stem mode pointer( etc&. Dere ends this doc. If each memor" instruction ha$e to chec) for a pa-e fault e=ception the cost can be reall" -reat. mode chan-e %chan-e +P. 0ther +P. F=ceptions handlin. 'he soft#are interrupts are called #ith the instruction /S'.the hard#are interrupt %IG'& #hich are FI %enable& and .
&& !ell I thin) I ha$e read in an old boo) that the" called it primar" stora-e..of I0 de$ice re-isters %or e$en memor"&. #aitin.similar. It can be /ead 0nl" 1emor" or /01( normal /ead8!rite 1emor" or /21 and the mappin. 'hat is the ma=imum si5e of memor" that can be directl" accessed Kat the same timeK b" the processor. 2nd I don't thin) there #ill be an" s"stem made that ta)es into account accurate cache timin-s. 2thlon( DP8P2 91<&. .the memor"./21( .& man" N< to 'era< 2 bit older that table . !hat is called main memor" can be implemented b" a lar-e $ariet" of hard#are de$ices.. 'hat it is called ban) s#itchin-. !e ha$e alread" seen ho# to emulate re-isters( the" use an arra" of n =8bit re-isters and so the" are emulated. 'he main memor" is the memor" #hich is addressed and accessed directl" b" the +P....this. !e #or) #ith re-isters( main memor" and dis) %if #e are emulatin.s( #hich raises the ni-htmare of the +P..eternall" for an access to memor" . 'he race bet#een +P. 'hose three 'basic' t"pes of main memor". 4& <ut if "ou don't )no# about it #h" in hell are "ou readin. <ut that usuall" doesn't matter #hen emulatin.a computer&. 1ore e=actl"( this is the ma=imum amount of memor" actuall" mapped. 'here are some re-ions in the +P. In fact there is a )ind of hierarch" of memories.1emor" Fmulation 'he memor" is the computer de$ice #here the pro-ram code and data is temporall" stored #hile e=ecutin-..p %:Q1< to some N< 4& as slo# as a turtle #ith bro)en le-s . 2 +P.is) 88888888U 88888888U 88888888U 88888888U 88888888U the fastest( onl" a fe# $er" fast( small %QP< to TOP<& fast( a bit more lar-e %91<8Q1<& a bit slo# .sin. uses a number of bits to address memor".I0 or memor" mapped I0( a command is sent to that special hard#are tellin. You #on't need to emulate the cache unless "ou #ant to monitor the e=ecution or somethin. 2nd I ha$e read about usin. Fach ban) can ha$e different t"pe %si5e in bits( format& and number of re-isters.it #hat memor" pa-e is . FP/01( FFP/01( S/21( . I #on't tal) about dis) emulation( that is a specific de$ice subHect and in console and arcade emulation it is rare to be found. In the case of the 6767 it uses 9: bits for addressin-( so its address space is :QP< lon-. 'hose re-ions are called ban)s. Do# does this #or)* 'here is a special hard#are attached to the address bus #hich multiple=es memor" accesses. for e=ample there is usuall" an inte-er ban) and a floatin. speed and memor" speed has been al#a"s #on b" +P. can onl" ha$e :Q P< of memor". can ha$e more than a ban) of re-isters. <ut it doesn't mean an 6767 +P. Secondar" #ould be hard dis) and other 'slo#8but8lar-e' memor" s"stems. /01 %read onl"&( /21 %read and #rite& and I0 re-isters can be e=panded to a lot more subt"pes. /e-isters +ache ?9 +ache ?O /21 Dard . can access. #hich uses a modified E67 %it is $er" similar to the 6767&( has /01s lar-er than :Q P<. 'he" define the si5e of the address space that the +P. You can see that the Namebo" +P.three cache le$els in ne# s"stems. 'here are times #hen a +P. . address space #hich can map different memor" pa-es %a bloc) of the real memor"&./21( S. 'hat number of bits corresponds to the number of lines of the address bus. In fact that isn't so important for emulation( Got in the le$el #e are #or)in-. I thin) no# there are some lar-e ?9 caches %9O6P< 21.point ban). +ache memor" must be and is transparent to the processor( or usuall" it is.
. 'hen all accesses to the ban) are redirected b" the hard#are to the ne# pa-e of memor". #ith 9:8bit address space& but also to add ne# hard#are %capabilities& to the console %mappin. 'he /01 is di$ided into 9: P< pa-es so 67P< is the Rth pa-e. 'he GFS uses this s"stem intensi$el" not onl" to access more than :Q P< of memor" %the GFS +P.I0 de$ices&. <an) 9 Pa-e re-ister %7=fffe& contains. Dere is ho# it #or)s. It #ill call that de$ice and -et %or #rite& .#anted in a ban). If no# #e #rite 7=7R in 7=fffe #e can access the address space re-ion from 7=Q777 to 7=6777 %ban) 9& the /01 re-ion bet#een 67P< and L:P< %/01 address. In address space offset 7=fffe there is a re-ister #hich contains the pa-e contained in ban) 9 %the pa-e is /01addr37=Q777( al#a"s startin.the +P. Cor e=ample it could -et address 7=dead from the address bus lines( then it #ould see) on its tables and -et that this address maps to a de$ice( the Ho"stic) for e=ample. 'he" are all those a#ful GFS mappers.hard#are is Hust a small e=ample about #hat can be done multiple=in. 7=7R %pa-e R& 6767 1emor" %:Q P<& | | | | |888888888888| <an) 9 | | %7=Q77787=6777& | | %9:P<& | | 88888888888888888888U | | %accesses to& | | |888888888888| | | | | /01 ?oaded %9O6P<& | | | | |888888888888| Pa-e R | | %7=9Q7778=96777& | | %9:P<& | | | | |888888888888| | | | | 'he 1aster S"stem ban) s#itchin.about is Hust %or can be understood as( #e don't ha$e to bother about the I+ implementation& a table that matches different re-ions of the address space to different re-ions of the real /21 or /01 or to I0 de$ices.at 67P< in ban) 9 %ban) 9 -oes from address 7=Q777 to 7=6777( the second 9:P< of the address space&. If the $alue stored in 7=fffe #as 7=79 #e #ere accessin. address bus. ?ets loo) at the 1aster S"stem..the /01 memor" from 9:P< to TOP<. !e ha$e a 9O6P< /01 loaded in our 1S emulator and #e #ant to -et the 9:8P< pa-e startin.in a 9:P< boundar"&. :R7O is also a 68bit +P. 7=9Q777 _ 7=96777& or /01 pa-e R. 7=79 %pa-e 9& 6767 1emor" %:Q P<& /01 ?oaded %9O6P<& | | | | | | |888888888888| <an) 9 | | | | %7=Q77787=6777& |888888888888| Pa-e 9 | | %9:P<& | | %7=Q7778=6777& | | 8888888888888888888888U | | %9:P<& | | %accesses to& | | | | | | |888888888888| |888888888888| | | | | | | | | <an) 9 Pa-e re-ister %7=fffe& contains. 'hat is ho# it #or)s the Namebo" and the 1aster S"stem for e=ample. It has T ban)s that can address 9:P< pa-es of the real /01. 'he hard#are #e are tal)in.
It allo#s us to define ?0NI+2? address spaces #hich are mapped onto the real PDYSI+2? address space %real memor" and I0&.the memor" s"stem& #hich has to load the entr" for that address into the '?<. !ell( that is a 11. 'he entries of that table are loaded in the '?< %'ranslation ?oo)8aside <uffer& #hich contains the entries of the tables #ho are actuall" bein. e=ception %a +P.#ith some others&. 'he best thin. 'he 11.. if "ou #ant to ha$e a memor" pa-e stored on dis) "ou mar) it as read( #rite and3or e=ecution protected %in fact there must be a fla. It pro$ides facilities to protect memor" from reads( #rites or e=ecution. raises a memor" e=ception4 the e=ception handler sees that it is accessin. 4& 'hat is Hust a small introduction to the topic thou-h( it is in fact an ad$anced topic.either memor" %/01 or /21& or a de$ice %#hich is called I0&. 'he 11. is also interestin. has one and #e can access it( I #ill tal) about it belo#.if our tar-et +P. #or)s the address space of the +P.%tr" to di$ide OS:Q3QP< and "ou #ill -et a real bi. has. Perhaps it isn't so important to )no# about it if "ou #ant to emulate old 67's machines but it #ill if "ou #ant to emulate somethinmore modern li)e a PSX or a .0S %a lon.information about the mappin. It also traps all in$alid access and raises a +P. 'hen it becomes #hat is called a 11.is to ha$e the pa-es al#a"s in that process that is inside the '?< %it #or)s a bit li)e the cache&.bunch of pa-es&( and usuall" onl" a fe# entries are reall" needed. 'he =6: architecture ha$e also had ban) s#itch support( Hust thin) about the old F1S and X1S memor" s"stems #hich e=panded the . 'hat hard#are can become more and more comple= and it can e$en be inte-rated inside the +P. Fach process has its o#n lo-ical address and has as $irtual si5e #hich is all the si5e of the +P.a pa-e that is s#apped out and loads the pa-e from dis) into memor"( restores the process conte=t and returns to the point the e=ceptions #as raised. address space.bet#een lo-ical pa-es and ph"sical pa-es is created. internal interrupt& so the soft#are can sol$e the problem. address space it can be accessin.to the be-innin-. 'hen a table containin.the $alue from %to& the data bus. detects a memor" re>uest for an address #hich hasn't its entr" loaded in the '?<( a memor" e=ception is raised. Fach entr" contains some more information li)e protection( process I.0S :Q7 P< %9 1<& limit. I0 or access to de$ices %de$ice defined to be e$er"thin. has also limitations in memor" and space so it can handle onl" a limited number of entries.sa"in. 'hat is slo# as "ou thin). %1emor" 1ana-ement .used. It also hides the 0S address space from the process #hen it isn't allo#ed to see it.+P.+. It could also be that the address #as a ban) address( the hard#are #ould add the pa-e offset to the ban) address offset %the address _ ban) start address& and send a data re>uest to the /01. Fach time there is a conte=t s#itch %the processor be-ins to e=ecute another process or -ets into the 0S& the lo-ical space is chan-ed and that means that the '?< must be flushed and loaded a-ain. translates lo-ical addresses %the ones used b" a process3pro-ram& to ph"sical addresses %real memor" addresses&. 'he 11. So the 11.that it is a pa-e on dis)( but I don't actuall" )no# an" implementation&4 #hen an access is made to that address the 11.. 'hat is a $er" important feature if "ou #ant to ha$e a real multitas)in. 'hat is special hard#are that e$er" modern multitas)in. and others.nit&. It is the 0S %or the an" other )ind of soft#are #hich is mana-in. Cor e=ample( that it ho# it #or)s in $irtual memor" s"stems. /eturnin. !hen the 11. 'here is a problem( such a table for lar-e memor" spaces is too bi.#hich is e=ternal to . 2s I ha$e said #ith the +P. and is di$ided into fi=ed len-th pa-es %the usual si5e is Q P<&.
'he fastest #a" to emulate memor" is Hust to access directl" the real memor". Special instructions are used to access that additional address space and the" are usuall" called somethin. 'he" ha$e a special address space #hich is onl" used for I0 operations %access to de$ices&( it's the I0 address space.the +P. 4&. Fach b"te or #ord of the I0 address space is also called a port %to a de$ice&. <ut some +P. 'hat is #hat is called memor" mapped I0.a special line in the control bus that indicates that is a I0 access %#hich could disable memor" and enable the hard#are #hich connects to the different de$ices&. In hard#are the I0 address space is implemented usin. 'he emulated address space can be too lar-e for the real address space %or memor"& and it can o$erlap data( code and reser$ed re-ions of the tar-et machine address space. 'he I0 address space is usuall" smaller than the normal address space( for e=ample the 6767 has a 68bit %OR: b"tes& I0 space and the =6: a 9:8bit %:QP<& I0 space %the ori-inal address space of =6: #as O78bit or 9 1< althou-h its address re-isters #here in fact 9: bit( that #as possible usin.a buffer isn't enou-h to detect those.directl" the emulated address( mappinthe emulated address space o$er the real address space. 'his is the implementation of memor" that "ou #ill ha$e to tr" to al#a"s use #hile doin. !e #ill ha$e to test the address for these special addresses or re-ions before ma)in.bits to the real address( ban) s#itchin.the same buses used for memor". 'here are addresses that can tri--er actions( and "our emulator has to )no# an access has been made %access to a de$ice most li)el"&. 2nd it is important in modern /IS+ +P.the same address lines and data lines than the normal address space %usin. 2s "ou can easil" understand access to memor" happens $er" fre>uentl" because the data #ith #hich the +P.' %#rite to de$ice&.the proper number of lines of course& but enablin.%( caches and other tric)s are used to tr" to ma)e access to memor" seem faster&.s&.s( #ith lar-er sets of re-isters. 'here is also the problem of the si5e of the emulated address space.inside the +P.s #hich ha$e onl" a small set of re-isters( so the" are accessin.s ha$e another method.old +P.some )ind of hard#are to some addresses in the address space. In fact a lot of the time there are ports to other buses #hich are used b" the de$ices( for e=ample P+I or IS2 buses( but that is Hust a )ind of bus e=tender or redirector.s. It is important #hile emulatin. 'he de$ices are attached usin. accessinmemor" is reall" $er" common( so appl"in. So the most common implementation is to use and arra" of continuos b"tes %a buffer& for the emulated address space. Fnou-h tal) about it.the de$ice re-isters #hich are the interface to control them.s isn't a problem because :Q P< of memor" is $er" small .old 68bit +P. In fe# #ords.li)e IG %read from de$ice& and 0.memor" all the time %in fact access to memor" is mi=ed #ith operation in these +P. Got onl" re-isters but also memor" from the de$ice %the memor" of a $ideocard for e=ample& can be mapped that #a". 'hen the emulated address is an offset of the buffer.s to access de$ices.the pro-rammin.se-ment re-isters to add the remainin. but the memor"& is performed usin. 1emor" emulation should be fast %in fact memor" should also be fast but it isn't .it at full rate thou-h. So usin. 2lthou-h the" can store more data in re-isters and reuse it( it is still needed to access memor" fre>uentl" #ith the penalt" that the" are a lot of faster +P.an emulator. 'here are problems that can )eep "ou from usin. 2nd if it is possible usin. 1emor" mapped I0 is a method used b" most +P. has to #or) is in the memor". <ut this is usuall" impossible.an access. ?ets tal) about ho# to emulate it. Fmulatin.la# KL7% of e=ecution time in the 97% of the codeK( it ma)es sense to implement the memor" access as fast as possible. 'hose addresses are used for accessin.
0f course there are e=ceptions #hen the address space is too small %68bit +P. So from a 9: 1< address space #e ha$e end #ith Q 1< for /01 %ma=imum si5e& and a bit more for /21 and I0. So ho# #e #ill sol$e those t#o problems. 2nd all the I0 re-ions are but a fe# memor" mapped de$ice re-isters4 the" can be handled one in one or usin.compared #ith no#ada"s memories. Its memor" map is somethin. 'here are re-ions reser$ed for /01( other for /21( "et another for accessin. 'he #or) /21 is reall" the last :Q P< of the re-ion %I don't )no# #h" the official documentation reser$es all for /21&.s. 'his console uses a :6777 +P. 'he $er" same problem happens #ith :Q8bit or 9O68bit %an"*& +P.s ha$e QN< of address space #hich hardl" can be emulated #ith an arra" 4& %for that there is an ad$anced techni>ue I #ill tal) a bit later&. 'hat is( the s"stem uses an" -eneral purpose +P.sin. 2nd TO8bit +P. 'here .a list of memor" re-ions #ith a memor" handler %a routine or sometimes a pointer to a memor" buffer& associated to those re-ions. In fact often a machine %a console( an arcade or a computer& doesn't ha$e so much memor" as the si5e of its address space. core %as for e=ample 1E67&. 7=777777 |8888888888888888888| | | | | | | |8888888888888888888| | | | | | | | | | | |8888888888888888888| | | | | | | |8888888888888888888| | | | | | | |8888888888888888888| | | | | | | |8888888888888888888| | | | | | | |8888888888888888888| /01 cartrid-e %Q 1<& 7=Q77777 /eser$ed %: 1<& 7=277777 S"stem I0 %9 1<& 7=<77777 /eser$ed %9 1<& 7=+77777 I.de$ices and some al#a"s reser$ed for Kfurther useK or Hust Kne$er useK.%in a -eneral $ie#& li)e this.s #ith $er" lar-e /01s or memor" as the Geo-eo or old P+s for e=ample& but then the si5e of the address space isn't a problem either.s( or e$en 9:8bit +P. 'he first Q 1< are cartrid-e dependent( Q 1< is the ma=imum so man" times #e #ill need less memor".P I0 %O 1<& 7=F77777 !or) /21 %9 1<& 7=CCCCCC 2ll the reser$ed areas don't need to ha$e real memor" so M 1< out. <ut for e=ample( a :6777 has a 9: 1< address space( #hich no# can be handled %the standard no# mi-ht be :Q 1< or 9O6 1< for P+s&( althou-h man" times it is a bit hea$" to use so much memor" onl" for the address space.smaller re-ions than 9 1<. ?ets see the e=ample of a common 9:8bit console as for e=ample the 1e-a . !e still ha$e 6 1<. I0 access trac) and a sparse memor" map* .ri$e %Nenesis&. #hich has a OQ8bit %9: 1<& address space.
Sometimes there can e$en be a list of handlers for fetchin. 'hat is ho# it #or)s i 1E67. Fach entr" #ould contain a pointer to a routine or a buffer #here the pa-e is . ?et see the e=ample applied to the Nenesis %not a real implementation( Hust as an e=ample&. 'here are #a"s to tr" to optimise it( either -roupindifferent I0 re-isters inside the same handler %then it #ill be the routine handler #hich #ill chec) for each re-ister& or sortin. 'hen can be also a list of handlers for each possible si5e of the access.opcodes& as for e=ample in Starscream %a :6777 emulator&. <ut there are times it #ill need to use the same or some )ind of list of memor" handlers %for e=ample #ith ban) s#itchin-&.an error( returnin..special access&. It is s"stem dependant and sometimes can be important and others not.. Cetchin. 'he memor" space can be di$ided in pa-es %of an" re-ular si5e&( then an arra" #ith one entr" for each pa-e is created.is usuall" done usin. 2nother alternati$e is to redirect unlisted re-ions to a -eneric buffer for all the address space %onl" usin.a buffer of memor" directl" %if "ou )no# #here the code #ill be& because it is faster.. F$er" memor" instruction %#hether it is a load3store3mo$ instruction or another instruction #hich performs a memor" access& has to ha$e the code for chec)in.if it is a #rite.the listed re-ions so that the more fre>uentl" accessed are the first found. Someone could tr" to use other more memor" e=pensi$e methods for implementin.the address #ith the proper list of memor" handlers. handlers for b"te access( handlers for #ord access.PI0/e-ionDandlerB( 33 I.a default $alue %7=77 or 7=ff for e=ample& if it is a read( or i-norin. B 'he re-ions of the address space #hich aren't listed are i-nored( either raisin.those lists. struct /eadDandler A int start2ddr4 int end2ddr4 $oid *routineDandler0r<uffer4 B struct /eadDandlerVW A A7=777777( 7=Tfffff( A7=a77777( 7=a7ffff( A7=a97777( 7=a9779f( A7=a99777( 7=a99fff( A7=c77777( 7=c77799( A7=ff7777( 7=ffffff( B /01<ufferB( E67/e-ionDandlerB( 33 S"stem I0 I0/e-ionDandlerB( +ontrol/e-ionDandlerB( I. If the number of re-ions to chec) is too lar-e each access to memor" can become $er" e=pensi$e.the list of handlers for trac)in.%readin. 'he beha$iour of an access can chan-e a lot from a read to a #rite so it ma)es sense to differentiate them( for e=ample a re-ion #ith mapped /01 can be read but an" #rite #ill cause an error or #ill be i-nored..P I0 /21<ufferB 33 !or) /21 struct !riteDandlerVW A A7=777777( 7=Tfffff( /01ProtectDandlerB( .#ill usuall" be one of those lists for read access and another for #rites.
Fmulatin.the I0 address space is e=actl" the same.%for an e=ample( 1E67 ban)8s#itched mode .P&. Implementin. Implementin.bet#een the lo-ical %$irtual& pa-es of a process to ph"sical pa-es %real address or memor"&..s( but most of the time the" can be sol$ed. 2t last I #ill tal) about 11.s"stem&.more memor" and more code #hich can hurt the cache performance. 'hat #a" #e ha$e a simpler( and thousands of times faster solution than a soft#are 11.0S 4&. core %if the author lets "ou of course 4& for a specific machine "ou can do more machine specific implementations and optimisations. Fmulatin. <ut if #e are #or)in. 'hat #a" is for e=ample as it is usuall" implemented for ban) s#itchin. In fact the '?< can be implemented $er" >uic)l" #ith onl" a fe# access to memor". can be understood as an e=tension of the pa-e based handler s"stem %or ban)8s#ithchin.11.. is based on tables #hich contain information about the mappin. erm@ not "et 4&( in this case use m:R7O from the same author&.else that .."our o#n +P.to do is to -et #hat pa-e it is %shift to the ri-ht&.the pa-e as an inde= in the arra" of pa-e handlers "ou #ill -et the pointer. If it is a function pointer Hust call it. has to perform.ed +P. Fmulatin.#ith de$ice re-isters. 2s I ha$e said the 11. It is Hust a smaller address space desi-ned for usin.sin. !hen an access is performed the first thin. core. 'here are al#a"s differences bet#een 11.4&. %#hich isn't al#a"s so eas"& and #e must )no# #hat are doin-. I #on't tal) an" more about it than that( firstl" because I don't remember much about this topic %I should ha$e to stud" some e=amples 4& and secondl" because it is an ad$ance topic and it isn't reall" in the scope of this tutorial.#ith somethin.the 11.then means to map from emulated lo-ical pa-es to KrealK pa-es %#hich can be lo-ical pa-es for our tar-et machine if #e are #or)in. in soft#are means to implement the '?< %table of pa-es&. for emulatin. of our emulated +P. Space In$aders( as #e #ill see #hen #e start #ith the hard#are( has a $er" simple memor" map #hich lets half of the address space empt". <ut also implies some other u-l" thin-s. In the case of our 6767 core( as #e said it #ould be 1E67 2PI compliant %#ell hopefull"@ 8 Pieron& #e #ill ha$e to implement a list of handlers for reads and #rites for the address space and for the I0 address space. !e can use our tar-et 11.#ith a 11.s of different +P. So a list of routine handlers for the enabled ports %I0 address& is the most common( because the I0 address space #ill be almost al#a"s be $er" sparse.the 11. #e can -et a -reat help from our hard#are.someone else's +P. If it is a buffer -et the pa-e offset of the address and use it as an offset inside the pa-e buffer. In the time of SI( the 6767 address space #as still too bi. emulation and about emulation #ith an 11.stored. 2nd if there is a problem raise the proper e=ception. !hat I ha$e e=plained here is perhaps the best implementation for a -eneric +P. performs. . It #ill mean to implement all the chec)s and e=ceptions that a 11. 2n e=ample could be to inline the actions of one or more of the I0 handler routines to a$oid the o$erhead of a function call %but usin.. I ha$e heard of some e=amples in Iirtual P+ %I thin) but not sure& but I ha$en't . 0f course #e ha$e to ha$e access to our tar-et 11. I'm not sure if "ou need to use the full emulated lo-ical [_U( emulated ph"sical [_U( real %real lo-ical [8U real ph"sical&( but I thin) it #ill enou-h #ith emulated lo-ical [8U real.11. 0ptimisation isn't eas" . 'he real problem is all the chec)s that the 11. core %or modif"in. <ut if "ou are doin. in soft#are is slo# and can be difficult. first chec) that the pa-es e=ist( then see if it is the proper process I.( chec) for protections %read( #rite and e=ecute& and perhaps some others. 4&.
GIX #ith compatibilit" al#a"s in mind 8 usin.0S it is impossible or nearl"( and in !indo#s is hard %I ha$e to admit I don't )no# ho#&. 2s al#a"s if "ou ha$e comments( doubts or "ou find mista)es "ou onl" ha$e to sa".GIX is easier. 'he more( let's call it( 'pure' memor" instruction doesn't perform an" calculation. It could be also be said that #ith old machines #ith man" mappin-s there is no real need to use the 11. Somethin. a nice instruction A -et some data perform an operation store the result update the P+ update the timinB !ith memor" and I0 instructions( the important thin. 'hat ends the memor" emulation part. 'he address can be directl" used %absolute or re-ister addressin-& but a lot of the time it . memor" maps usin. 4& Iictor 1emor" and I0 instructions So #e are here a-ain. #asn't a -ood thin-.I ha$e ne$er seen %it doesn't mean it doesn't e=ist& is to implement non811.the 11.&. 'his means that the thin-s #e ha$e to loo) for in a memor" instruction are #hat )ind of data must be loaded( from #here it must be loaded and #here it must be stored. <ut there are bi. 0ne of the reasons I thin) I ha$en't seen it is because in . I0 data from3to re-ister for e=ample.studied it carefull".& !ell I #ill tal) a bit about memor" and Input30utput instructions and some aspects related to memor" emulation. . In . In an" case 8 this is one of the thin)s I #ould li)e to stud" someda" . I0 instructions are also more limited in the number of options and usuall" there is Hust one or a couple of alternati$es. 'he #ords #e ha$e to ta)e into account are. 2 memor" instruction is an instruction #hose purpose is to load data or store data.. 2s man" of the cores out there #ere de$eloped for . 'his can be load data from memor" to a re-ister( store data from a re-ister into memor"( mo$e data from a memor" address to another memor" address or mo$e data bet#een re-isters. I ha$e probabl" missed some topics but I thin) it is rather complete. Sometimes it is also important ho# it #ill be stored. It is $er" interestin..the data from3to a special I0 address space.0S %and later ported to other s"stems& or in . I thin) "ou remember the model of an instruction I #rote in a document some months a-o. data si5e %b"te( #ord( double #ord( . 'hat should be possible and perhaps also much faster in some cases. 2n I0 instruction is the same but -ettin. %#hich means the si5e of the data #e are #or)in#ith&&( source address and destination address.e=ceptions( as #e #ill see. Dere it is a-ain.is ho# "ou -et or store the data..thou-h.a 11..
'here are man" )inds and each processor has different addressin. * re-ister.modes as the" are meant to be simple. ld a(%7=9777& VaW [8 V7=9777W . ld a(7=97 VaW [8 7=97 the $alue 7=97 is stored into re-ister a * absolute. !e ha$e to tal) about addressinmodes. If the arra" is accessed in a loop /9 could be li)e the i inde= in the arra" %iteration $ariable&( but as the data si5e is Q b"tes the inde= re-ister /9 must be incremented b" Q.modes more complicated %"ou #ill find them on +IS+ machines& as base inde=ed #ith offset( postincrement( predecrement. ?et see some e=amples of addressin. #hat the" are used for* You see( Hust #ith a direct mode to address thin-s as could be perhaps re-ister and absolute #e should ha$e enou-h. 0ur 6767 is poor in e=amples because it onl" has re-ister( immediate( absolute and indirect. !ith /IS+ +P. 'hat e=plains #h" /IS+ +P. 'he ones that can be found al#a"s in a processor are immediate( re-ister( absolute and base #ith offset.must be calculated. has to calculate the source or destination address of a memor" instruction.modes %and more comple= ones& it #as easier for the compiler to -enerate code for access comple= data( the code -enerated #as smaller %#hich #as also important in those da"s& and perhaps it #as a bit faster than use man" instructions for calculatin.s because #ith more addressin. 4& In simple #ords the" are for ease the access to comple= data t"pes as arra"s( matri= and structures.the effecti$e address %usin.#ith rO add r9(Q B I thin) it #as more important #ith old +IS+ +P.s doesn't ha$e man" addressin.modes. 'here are other addressin. 2n addressin. mo$ r7(Jarra"0fInts mo$ r9(7 loop A mo$ rO(Vr7Zr9W do somethin. !e #ill see some e=amples. Cor e=ample if "ou #ant to access an arra" of ints %#ell let sa" Q b"tes 4& "ou can load the base address %the address #here the arra" starts& in a re-ister( /7 for e=ample( and use another re-ister as inde=( /9. +ode e=ample. ld a(b %usin.mode is the #a" the +P.special hard#are for calculate addresses&.modes. !h" #e need all of them* 0h@( perhaps "ou alread" )no# about it. 'he final address #e -et after the calculation is usuall" called the effecti$e address. ?et see an e=ample for each. You could ma)e a >uestion.E67 mnemonics& VaW [8 VbW the content of re-ister b is copied in re-ister a * immediate.s that has lost importance( the compilers are no# far better and ha$in.special hard#are for calculate address Hust slo#do#ns the processor.
2t last to end this introduction %introduction@ a bit lar-e introduction 4& I #ill mention some difference bet#een the +IS+ memor" instruction model and the /IS+ instruction model. 'he =6: %T6:Z& is a TO8bit architecture so data si5e can be 9(O or Q b"tes %and if #e also loo) to CP.s( #here the +P. !ell that should be eas" 4&.s ha$e a lar-e re-ister ban)&( but don't in +IS+ +P.. <ut not all data accesses are made b"te b" b"te. ld a(%hl& VaW [8 VVhlWW the b"te pointed b" the $alue stored in hl re-ister is loaded into re-ister a 'here is also another address mode( relati$e( #hich is used in Hump instructions. base re-ister Z inde= re-ister * factor Z offset factor can be 9(O(Q or 6 %the data si5e in b"tes&. 'he Hump address is calculated as an offset from a base re-ister( in this case P+. or 11X 6 b"tes or e$en 97&( called b"te( #ord( and double #ord si5es. Cor more e=amples I #ill sho# the =6: modes and some :6777 modes.the b"te in memor" address 7=9777 is loaded into re-ister a * indirect. oh . In /IS+ the" are usuall" called as load %memor" to re-ister& and store %re-ister to memor"& instructions. In +IS+ +P. In predecrement addressin.. !e #ill see Hump instructions in another doc. predecrement and postincrement %li)e + 8a and aZZ& %an& and %an&Z. Similar happens #ith postincrement but the $alue in 'an' is first used as effecti$e address and later incremented.s.mode&. 'he reasons for it #ere because the +P.. 'he /IS+ +P. 'he data is stored in memor" as b"tes( that is because the smallest access unit is a b"te. I thin) I ha$e for-otten somethin. $s memor" speed difference #asn't so important as it became later and( the most . 'he 6767 has 6 bit %9 b"te& and 9:8bit re-isters %O b"tes& and can perform memor" operations #ith both so there are those t#o data si5es a$ailable. let see ..about 'pure' memor" instructions #hich are onl" related to data mo$ement.s memor" operations are mi=ed #ith calculations in the same instructions( for e=ample an add instruction can -et one of its operands from memor". I ha$en't tal)ed about data si5e. 'he data si5e is determined in most of the cases b" the si5e of the re-ister #here3from it #ill be stored3loaded. 'an' is an address re-ister %indirect addressin.. 2ll the #a" I ha$e been tal)in. So the data si5e is the unit %number of b"tes& of the si5e of the data that is mo$ed in a memor" instruction. 'he" are called b"te and #ord si5es.. 'hat is usuall" true #ith /IS+ +P. 'hat happens in the 6767 #ith the instruction Kadd a(%hl&K. 'he usual #a" an address is calculated in =6: %T6:Z( on earl" =6: +P.the content of 'an' is substracted b" the data si5e %9( O or Q b"tes& and then the result stored in 'an' and used as effecti$e address.s there #ere some limitations( for e=ample in the re-isters used& is as follo#s. memor" unit is rather differentiated from the calculation units %the reason is mainl" related #ith the hea$" cost of a memor" access at hi-h cloc) fre>uencies( and because the /IS+ +P. In the case of the :6777 #e can find t#o address modes reall" interestin-..s ha$e also onl" the more basic addressinmodes.
?et's no# summarise all the steps in$ol$ed in the e=ecution of a memor" instruction and the thin-s #e ha$e to loo) #hile emulatinthem.s suffer from a $er" small re-ister ban) %the fault I find #ith =6: . multidata instructions and stac) instructions.mode is used and( if it is a comple= addressin.condition #hich finishes the instruction althou-h the counter ma" ha$e not arri$ed at 5ero "et. 2n e=ample. 2t this sta-e #e ha$e to loo) at the source data si5e and load the data.#e ha$e to loo) at carefull" is if the memor" instructions ha$e side effects( that is( if it modifies the fla-s.s use to use 'mo$e' as instruction name but not al#a"s. 'he addressin. 'he" use a re-ister as a counter %number of iterations&( another as source address( other as destination address and usuall" there is also an endin.modes. 'here #ill be fla-s that #on't be affected b" a memor" instruction( as carr" and o$erflo#( because the" are related to calculations. <ut fla-s as 5ero( si-n or parit" fla-s are onl" related #ith the $alue itself so the" can be chan-ed b" the data loaded or stored. +IS+ +P.is usuall" made at the same time #ith the instruction decode so usuall" it isn't needed %that happens #ith the 6767&. !hile emulatin. 'he destination data si5e could be different or the data format different so it could be needed to perform some )ind of data transformation. E67 ?.them #e ha$e to loo) carefull" to chec) that the loop and condition testinare correctl" emulated. 2 fe# re-ister number implied "ou needed to be accessin.I/ )ind of instructions and =6: /FP 10IS )ind instructions. Cinall" #e -et the destination address %the same process as #ith the source address& and #e store the data. 'here are t#o cases then. In that case #e ha$e to chan-e them as it is defined in the IS2 definition. F=amples are.calculation is important here. +IS+ +P. preser$e the si-n of the ori-inal data %si-n e=tension& or perform a lo-ical e=tension. 'he more common transformation is from a smaller data si5e to a lar-er data si5e( for e=ample from b"te data to #ord data.mode( to perform the calculation of the effecti$e address. 'here are still t#o )inds of memor" instructions #hich are a bit different. 'he first means cop" the more si-nificant bit %si-n bit& of the source data into the hi-her bits of the tar-et data. 0n modern +IS+s %=6: of course& it has been maintained because of compatibilit". 1ultidata instructions are memor" instructions #hich perform multiple data accesses to consecuti$e memor" addresses. Cirst #e ha$e to -et the source address.% &. . 'he second one means to clear the hi-her tar-et bits.s ha$e man" and comple= addressin.important( because +IS+ +P.$er" fre>uentl" the memor" so it #as lo-ic to inte-rate memor" access to calculation instructions.mode decodin. 'hat means to disco$er #hat addressin. 9M or 7=99 %7779 7779b& 8U 7=7799 %7777 7777 7779 7779b& for both cases 89M 7=ef %9997 9999b& 8U 7=ffef %9999 9999 9997 9999b& si-n e=tended( 7=77ef %7777 7777 9997 9999b& normal e=tension 2nother thin. 'he" al#a"s %or $er" usuall"& chan-e fla-s so fla.
'he code is stored in memor" and #e ha$e to ta)e that into account #hen #e load opcodes and decode them. 2ll the stac) instructions perform accesses( #hich are relati$e to the SP. !hich data is that* 'he first and more important. 'he stac) is usuall" stored startin. . If the" are different and #e are doin. Fach address in the I0 space is also called 'port' because it a port %a #a"& to an e=ternal de$ice. 'hose instructions as usuall" called in %read data from a data port to a re-ister& and out %store data from a re-ister to a data port&.'he stac) instructions are usuall" called push and pop %push to the stac)( pop from the stac)&. Push mo$es data to the top of the stac) and decrements SP( pop increments SP and loads data from the pointed address. 7=9OTQ bi-8endian 7=9O 7=TQ little8endian 7=TQ 7=9O !e ha$e to )no# #hat )ind of endianess of the emulated +P. 2 procedure call pushes data into the stac) and decrements SP( a procedure return -ets data from the stac) and increments SP. it is used for storin.a separated smaller address space. 2ll the data "ou define in the start of a + function %#ith some e=ceptions& is d"namicall" allocated on the top of the current stac) at the start of the function and freed at the end. ?ittle8endian means the opposite the ?S< is stored first and then the 1S<. 'he code is read from the memor" address pointed b" the P+.s are little8endian others bi-8 endian and some ha$e both operation modes.the return address for a procedure call %#e #ill see it a-ain #hen #e tal) about Hump instructions& and to sa$e and restore re-isters and fla-s in procedure calls and interrupt re>uests.from hi-h addresses to lo# addresses but #e still need a pointer to the top of the stac). . 'hat can be bi-8endian or little8endian. 'here is "et another point #e ha$e to ta)e account. 'he :6777 is bi. Cor historical reasons some +P. Fndianness means ho# it is stored multib"te data in memor".their opcodes.special #hile readin. F=amples. It is used for storin. 'his pointer is the Stac) /e-ister( usuall" called SP. and our tar-et machine. endianess. 'he instructions are simpler and the" don't ha$e man" addressin.modes( Hust re-ister( absolute and perhaps re-ister indirect.suall" it #on't be necessar" to do an"thin. Cinall" all 'instructions' perform an access to memor"( that is fetchin. 6767 and famil" are little8endian as #ell as =6:. <i-8endian means that the more si-nificati$e b"te %1S<& is stored in a lo#er address then the ?S<.a multib"te data access #e should ha$e to chan-e the data format bet#een them.temporal data. I0 instructions #or) similar than memor" instructions but usin.endian. 2nd the" all chan-e the SP after %or before& and perform the data mo$ement.code but sometimes that is also important. 'his hard#are assisted data structure is $er" important for pro-rammin-. <ut #hat is the stac)* !ell( a stac) 4&. <ut compilers also use it for store procedure or function local data. It is a ?IC0 data structure( that means ?ast In Cirst 0ut( so the last $alue #e ha$e pushed into the stac) #ill be the one #e #ill -et #ith a ne=t pop instruction.
'he :6P does ha$e a 10IFP %1o$e Peripheral& but is is still not reall" a I0 instruction( Hust a #a" of #ritin.Do#e$er bear in mind that some +P.'s do not ha$e KI0 instructionsK as de$ices are mapped to memor" addresses. Go# our emulated memor" instruction is Hust somethin. 'he document has become a bit lar-e and I #ant to ma)e them small so I #ill >uit here. reor memor"#rite%address(re-& or reor I0#rite%I0address(re-& In the ne=t doc( 1emor" Fmulation %Part II& I #ill tal) about #hat #ill be behind those functions. I ha$e been tal)in.li)e.9: bit data to an 68bit data bus. 8 Pieron I ha$e let the most important topic for the end. Cor e=ample "ou mi-ht Hust use a 10IF instruction to #rite a b"te of data out to a serial port that is mapped to a certain address.about #hat has to do memor" instruction #ith address and data( but I ha$en't tal)ed about ho# #e #ill emulate the memor". It is memor" emulation. I0read%I0address& memor"read%address& . Some e=amples are the :677 and the :6777.
This action might not be possible to undo. Are you sure you want to continue?
We've moved you to where you read on your other device.
Get the full title to continue reading from where you left off, or restart the preview.