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Technical University of Cluj-Napoca

Faculty of Electronics, Telecommunication and Information Technology Bases of Electronics epartment

Systems with Analog Integrated Circuits


Lecture Notes 2013 Assoc. Prof. Marius Neag, PhD

Systems with Analog ICs Lecture notes

Copyright 2013, Marius Neag

Technical University of Cluj-Napoca


Faculty of Electronics, Telecommunication and Information Technology Bases of Electronics epartment

Chapter 4 Instrument Amplifiers


Assoc. Prof. Marius Neag, PhD

Systems with Analog ICs Lecture notes

Copyright 2013, Marius Neag

Instrumentation !Instrument" #mplifiers$ %eneral description & 'arameters

Instrument Amplifiers: General features


Differential input, single-ended output; additional reference in/out port used (usually) for setting the DC level of the output. General functional equation:

Out=Gain In differential +Reference


High value of CMRR and PSRR: typical values 100dB-120dB Gain set/programmed to precisely controlled values; typical range 1-1000 Well defined frequency characteristics with small deviations between parts Low noise and low DC errors (offset voltage and current; input biasing currents). Closely matched input impedances; nearly-ideal values for the input and output impedances: typical values for V-V amplifiers: ZinA= ZinB =109 ; Zout =10-2 Very low sensitivity of main parameters to variations of temperature, supply & ageing Four possible types (V or I @ input / V or I @ output); most popular type is V-V
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(oltage-(oltage Instrument #mplifiers !(-( I#"$ %eneral description & 'arameters

Voltage-input, voltage-output Instrument Amplifier (V-V IA)

VA ZINA VB ZINB
Main equations:

A VO REF B VREF

VO = A (VB VA ) + VREF A = f (Control Element A ) CMRR, PSRR, ZIN , etc f (Control Element A )

ZINA = ZINB

Systems with Analog ICs Lecture notes

Copyright 2013, Marius Neag

(oltage-(oltage Instrument #mplifiers !(-( I#"$ )ain *imitations & 'arameters

Gain = differential voltage-voltage amplification


Errors: - static (independent on signal amplitude) gain error, A; - gain nonlinearity - variation with temperature and ageing vOD= vID[A+A+GainNonlinearitySignal Amplitude+TempGain TempCoefficient] CMRR and PSSR = very large values but inevitably finite; and rolling-off quickly with frequency - Effect of finite CMRR and PSRR values modelled with equivalent voltage sources VOR at output (not at the input as for the OAs)

v OR =

VIN_CM CMRR

VALI PSRR

Offset Voltage: modelled by an equivalent voltage source, VOS, placed at the input - It has two terms, one independent and the other dependent on the gain value; both terms very with temperature

VOS_total = VOSFIX +
Systems with Analog ICs Lecture notes

VOSVAR A

VOSFIX VOSVAR + + A

Copyright 2013, Marius Neag

(oltage-(oltage Instrument #mplifiers !(-( I#"$ )ain *imitations & 'arameters

Input Bias Currents: modelled by equivalent bias current sources between each input and GND and an offset current source placed between the inputs (same as for the OAs) Noise = modelled by equivalent voltage and current noise sources placed at the input (similar to the noise model of OAs); each defined by their spectral densities Input impedances: differential (ZID) = between inputs common-mode (ZIC) between each input and GND Output impedance (resistance): Ro of very low value Input source impedance: RS usually far smaller than input impedances but potentially not well matched in respect to the IA inputs

Systems with Analog ICs Lecture notes

Copyright 2013, Marius Neag

(oltage-(oltage Instrument #mplifiers !(-( I#" )odeling of main non-idealities

Total output voltage

vout = VREF + vOD + vOR + VOUT /VOS , I B , IOS +Vout _ Noise VOUT /VOS , I B , IOS A(VOS + I B RS + 2 RS I OS ) Vout _ Noise A VN 2 + I N 2 RS 2
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(oltage-(oltage Instrument #mplifiers !(-( I#" Connections to a single ended signal source and single ended load

Case a)

R1 VIN V GND1
iGND1 iGND

R2 RCABLE Vo VGND2 a) ZGND2GND2


i

v I efectiv = v I + vGND1

RL VL
iGND3

ZGND1

vL =

RL RL R R ( vO vGND2 ) = ( 2 v I 2 vGND1 vGND2 ) RL + RCABLE RL + RCABLE R1 R1


SENSE VI VGND1 ZGND1 b) IA OUT REF VGND2 ZGND2
Copyright 2013, Marius Neag

Case b)

RCABLE RCABLE RL VL

vL = GainIA v I

Systems with Analog ICs Lecture notes

, #-

+chematic Implementation of the (-( I#$ ifferential #mplifier$ %ain and input impedances

Gain and input impedances - For an ideal OA (VOS=0, IB = 0, RIn , RO 0, a )

vO = vB

R4 R + R1 R 2 vA 2 R3 + R4 R1 R1

- 1st Condition for IA = differential amplifier: VO=AD(VB-VA) =>

R4 R2 + R1 R2 R4 R2 = = =k R3 + R4 R1 R1 R3 R1
- The (error) output voltage due to input bias currents of the OA can be minimized if:

R1 || R2 = R3 || R4 R1 = R3 ; R2 = R4 .
- The resulting output voltage is:

R2 vO = ( vB v A ) = ( vB v A ) k R1
- 2nd Condition for IA: gain value set/adjusted thru one circuit element, withOUT modifying the other parameters Condition NOT met!
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+chematic Implementation of the (-( I#$ ,--# ifferential #mplifier$ C)..

- 3rd Condition for IA: large and equal input impedances:

Z InA = Rl Z InB = R3 + R4 = R1 + R2
-4th condition for IA: large CMRR

Condition NOT met!

Considering OA with finite CMRROA and perfectly matched resistances VA=VB=VICM and R1=R3; R2=R4

R4 R4 1 R1 vic + vic = vic + ( vo vic ) R3 + R4 R3 + R4 CMRRAO R1 + R2


K 1 vic 1 + K + 1 CMRRAO 1 1 1 + = v o 1 1+ K + K

vo Ad K AC = = = vic CMRRAO CMRRAO

CMRR =

Ad = CMRRAO AC

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+chematic Implementation of the (-( I#$ ,--# ifferential #mplifier$ C)..

CMRR - considering an ideal OA (CMRRAO ) and real resistances (with actual value = nominal value (1+/- tolerance) Assuming VIC=VA=VB and

R2 R4 = K (1 + ) ; K 2 = = K (1 ); = 2 K1 = R1 R3
CMRR = 1 + 2 Ad 4

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+chematic Implementation of the (-( I#$ ,--# ifferential #mplifier$ Band/idth

-5th Condition for IA: well-controlled value of the Bandwidth Finite GBW OpAmp:

aOA

a0 a0 1 ; BWOA = ; GBWOA = = 1 + s 2 2

IA Gain:

AIA

1 + s ClosedLoop

A0

IA Bandwidth:

BWIA =

GBWOA R 1+ 2 R1

Systems with Analog ICs Lecture notes

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+chematic Implementation of the (-( I# ,--# ifferential #mplifier$ Conclusions

Conclusion: the one-OA Differential Amplifier cannot be used as an V-V IA

+
Differential amplifier

R2 vO = ( vB v A ) R1
Reference input:

Z InA Z InB
ZINA, ZINB small values Gain adjustment modifying simultaneously 2 resistors Input stage mismatch and input resistors mismatch leads to CMRR decrease

Systems with Analog ICs Lecture notes

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+chematic Implementation of the (-( I# I# implemented /ith t/o -#s

Ad =

vO R = 4 if R1 = R5 and R2 = R3 vB v A R5

Ad =

vO R + R3 R = 1 + 4 (1+ 2 ) vB v A R3 RG

Systems with Analog ICs Lecture notes

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+chematic Implementation of the (-( I# +tandard 0--# I#$ %ain

Gain
- For an ideal OA (a ; RI AO ; RO AO 0 )

A d ideal

vO R1 R 3 = = A d I A d II = 1 + 2 vB vA R G R2

- For a finite gain OA, aAO

a R R a A d = 1 + 2 1 3 AO = A d ideal AO R G R 2 1 + a AO 1 + a AO

Systems with Analog ICs Lecture notes

Copyright 2013, Marius Neag

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+chematic Implementation of the (-( I# +tandard 0--# I#$ C)..

CMRR - OA with finite CMRROA 1. Matched resistors:

CMRR IA

R1 R 3 1 + 2 R A R G R2 = d = = 1 + 2 1 CMRR AO 1 AC 1 R 3 RG R 2 CMRR AO

1. Unmatched resistors:

CMRR IA

R1 CMRR AO CMRR = 1 + 2 R G CMRR AO + CMRR

where CMRR is the finite rejection ratio due to the resistor tolerances.

Systems with Analog ICs Lecture notes

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+chematic Implementation of the (-( I# +tandard 0--# I#$ C)..

CMRR Adjustment

R CMRR =
a) unipolar adjustment

2 1 P 1+ R

b) bipolar adjustment

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+chematic Implementation of the (-( I# +tandard 0--# I#$ Compensation of -# C errors

Compensation of OAs DC errors:

v O = A d ( v B v A ) + VOUT /VOS , I B , IOS + VREF VREF = VOUT /VOS , I B , IOS


Systems with Analog ICs Lecture notes Copyright 2013, Marius Neag 18

+chematic Implementation of the (-( I# +tandard 0--# I#$ Band/idth

Bandwidth
- Cascade of OpAmps:

- OpAmp with finite GBW:


aOA = a0 a 1 ; BWOA = ; GBWOA = 0 1 + s 2 2

BWEQ =

1 1 1 + 2 BW1 BW2 2

- A1 noninverting amplifier GBW=constant


BW1 = GBWOA GBWOA = R ACL 1+ RG 2

BWEQ =

GBWOA RG + 2 R R2 + R3 + R G R2
2 2

- A2 differential amplifier

BWCL =

GBWOA R 1+ 3 R2

Systems with Analog ICs Lecture notes

Copyright 2013, Marius Neag

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+chematic Implementation of the (-( I# +tandard 0--# I#$ Conclusions

Conclusion: the standard 3-OA IA can be used as an V-V IA

+
Differential amplifier
R AD = 1 + 2 1 RG R3 R2

Bandwidth dependent on GBW of the OAs

ZINA,ZINB very large values, usually matched if OA1=OA2 Gain adjustment modifying RG Large CMRR, larger than CMRROA
R CMRR IA = 1 + 2 1 CMRR OA RG

Reference input

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Copyright 2013, Marius Neag

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,st +chematic implementation of (oltage-Current Instrument #mplifiers !(-I I#"$ )ain *imitations & 'arameters

Gain, output resistance, stability


- Output stage is a Howland voltage-current converter: - Transconductance gain:
vID RG Inp !" #!a$% R2 &o R3 REF

iOut = vIn / R2

R2

R3

SENSE OUT

- Output resistance Matched resistors Unmatched resistors


RL vL

ROUT

ROUT =

R2 4

- Stability Is achieved if the transmittance of the negative loop gain is larger than the transmittance of the positive loop gain condition obtained for rn >> rp => R2 || R3>>RL

rn =

R2 ; R2 + R3

rp =

R 2 || R L R 2 || R L + R 3
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Systems with Analog ICs Lecture notes

i R1 1 A IV = O = 1 + 2 v ID RG R2

,st +chematic implementation of (oltage-Current Instrument #mplifiers !(-I I#"$ )ain *imitations & 'arameters

Output voltage swing


-

vID

RG

Inp !" #!a$% R2 &o R3 REF

Systems with Analog ICs Lecture notes

v L max <

R2 v O AOmax R2 + R3

R2

R3

SENSE OUT

RL

vL

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1nd +chematic implementation of (oltage-Current Instrument #mplifiers !(-I I#"$ )ain *imitations & 'arameters

Gain, output resistance, stability


- Transconductance gain:
vID RG Inp !" #!a$% R2 R3 REF

i O = i RS

A IV =

iO R1 R 3 1 R = 1 + 2 v ID RG R 2 RS v - Output resistance ROUT limited by R2 and R3 mismatches, by the output resistance of the IA V-V used and by the input resistance of the external OA used. - Stability Is achieved if the transmittance of the negative loop gain is larger than the transmittance of the positive loop gain condition obtained for RS>0.
L

rn =

R2 R2 RL > R2 + R3 R 2 + R3 R L + RS
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Systems with Analog ICs Lecture notes

R1 R 3 v OUT VREF = 1 + 2 R v ID R G 2

VREF v = OUT RS

R2

R3

SENSE OUT

RS &o

+chematic implementation of Current-(oltage Instrument #mplifiers !I-( I#"$ )ain *imitations & 'arameters

- Transimpedance gain:

A IV =

vO R = 2 RG 3 i ID R2

Gain setting needs the adjustment of two resistors. - Input and output resistances

R ID = 0 ;

RO 0

-Homework schematic implementation of the current-current IA

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+chematic implementation of the Instrument #mplifiers /ith 'assive Current-Feed2ac3$ )ain *imitations & 'arameters

-Gain:

AV =

vO vO R = = 1+ 2 F v id v i1 v i2 RG

- Input impedances

R R ID = r + G || R F 2

R IC = r + R F R
- CMRR

CMRR =

1 r R C R F + AV + AV RF RC RF

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Instrument #mplifiers /ith #ctive Current-Feed2ac3 $ )ain *imitations & 'arameters -Gain: - 1. Ideal OA

A Videal

vO 1 = = VB VA G m R G
T 1 a G = iv m 1 + T G m R G 1 + a iv G m

- 2. Real OA

A V = A Videal
a IV =

a AO R C +1

- Bandwidth Assuming a AO =

a0 1+ s

and >> 1 => 2 BW =

a0 RC Gm

Possibility to control Gain and Bandwidth independently: Wanted Gain => RG Wanted BW => Gm and RG

Systems with Analog ICs Lecture notes

Copyright 2013, Marius Neag

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+chematic implementation of the Instrument #mplifiers /ith #ctive Current-Feed2ac3 $ )ain *imitations & 'arameters

i R G1 =
For

1 i C4 i C2 = i R G2 2

R3 R1 = R 3 + R 4 R1 + R 2
R4 1 = G m vO R 3 + R 4 R G2

i R G1 = i R G2 = v O where G m =
Gain

1 R4 R G2 R 3 + R 4

AV =

vO R R3 1 1+ = = G2 VB VA R G1 G m R G1 R 4

Bandwidth a a R R4 2 BW = 0 R C G m = 0 C R G2 R 3 + R 4

Possibility to control Gain and Bandwidth independently: Wanted Gain => RG1 Wanted BW => RG1 and RG2 with the condition that RG2/RG1=constant
Systems with Analog ICs Lecture notes Copyright 2013, Marius Neag 27

+chematic implementation of the Instrument #mplifiers /ith #ctive Current-Feed2ac3 $ )ain *imitations & 'arameters

Active feedback

+
Minimizing the influence of the unmatched resistors and transistors on the CMRR => CMRR dependent on the output resistances of the current sources that bias the input stage Control of Gain and Bandwidth independently, through two resistors

Static error enhancement the feedback path amplifies the effect of the input stage offset voltages and currents.

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