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Low-Voltage Power Electronics Building Block for Automotive Applications

L. Solero, V. Serrao, P. Taglioni, F. Crescimbini
University ROMA TRE – Dept. of Mechanical and Industrial Engineering Via della Vasca Navale 79 – 00146 Roma, Italy
Abstract-This paper investigates the potential use of the power electronics building block concept in low-voltage fed power converters, such as those being envisaged to be soon utilized on board automobiles being equipped with a 42 V electric power system. Concerning such specific applications, various power converter topologies having input voltage in the range from 24 V to 80 V and rating power from few kW up to 30 kW are likely to be used in order to accomplish bi-directional dc-dc or dc-ac power conversion. Thereby, the envisaged development of a low-voltage power electronics building block module including standardized power, thermal, and control interfaces is of great interest for power converter manufacturers as it would be expected to lead to great simplification in converter design and assembly and thereby should allow substantial reduction of mass-production costs.

I. INTRODUCTION The ongoing integration of safety and convenience functions into the passenger cars calls for an increasing demand of electrical power. The electrification of former mechanic, hydraulic and pneumatic functions like power steering, power brakes, or electronic valve control are about to be introduced into the car, yielding better handling and drive-ability as well as an increase in ICE output power. The 14V system with its alternator as a primary energy source is less and less able to meet the increased power demand. This has led the automotive industries to investigate new electric supply options along with hybrid drive train concepts. The hybrid drive train is further more expected to improve fuel efficiency of the vehicles, helping to achieve aggressive fleet mileage targets suggested by the car makers. A review of power converter topologies being used in a number of 42V automotive drives such as starter/alternator and ultracapacitor-based storage system shows that most converter arrangements are based on the use of the wellknown phase-leg structure including two active switches with their respective anti-parallel diodes. Even though such a standard structure is yet being offered in the market in the form of intelligent power modules, in the case of low-voltage high-current applications such power modules do not completely suit the needs of power converter manufactures and often discrete-component converter arrangements are likely to be used. Over the last twenty years, the fundamental approach to electronic power conversion has steadily moved towards “high-frequency synthesis”, resulting in huge improvement in converter performance, size and weight, and hence the cost. Pulse width modulation and other high-frequency techniques

are already standard in all low- and medium-power applications, and are rapidly penetrating even the highestpower applications. It is important to note, however, that in many high-frequency power conversion technologies, fundamental limits are being reached that will not be overcome without a radical change in the power conversion strategy. The magnitude increase in switching speed, which is possible with new semiconductor device technologies, will require substantial reduction in parasitic capacitances and inductances associated with device and system-level packaging. A major barrier to further advancements in technology and required cost reduction of power electronics products is the striking lack of standardization, as the power electronics industry is often preoccupied with providing partial solutions for specified applications. The idea of a “building block” approach to power electronics design was conceived in the early eighties, influenced by the booming developments in the integrated circuit industry. The approach of constructing different power converters using a smaller number of integrated modules instead of discrete components was initiated by several power semiconductor manufacturers and proposed in some research laboratories. However, the initial attempts were mostly directed towards simplifying packaging of power converters and did not results in a complete shift of the design paradigm, as the concept of integrated circuits did in the signal processing industry. The much more comprehensive concept of the Power Electronics Building Block (PEBB) originated in the nineties. The overall concept is to use intelligent and reconfigurable PEBBs with standardized power, thermal, and control interfaces to develop multitudes of affordable, reliable, and efficient power processing systems. In fact, unlike modern digital technology, which utilizes an array of developed components or cells to build a system, modern power converters still lack a high degree of integration and standardization. As a result, designers are often forced to build entire systems from scratch each time, which is costly in engineering time as well as system reliability. In order to remedy this situation, in the last decade the concept of PEBB has drawn considerable attention and major research centers are being investigating PEBB-based power converter arrangements devoted to a number of applications [1-4]. PEBBs are integrated power modules serving a function that would commonly be found in a wide number of power conversion systems. Depending on the instructions given to the controller, the PEBB would be required to function as, for instance, a dc-dc converter, a voltage-source or current-source

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temperature. a synchronous rectifier. The proposed LV-PEBB configuration is shown in Fig. Example of hybrid power-train. LV-PEBB Power Section The power section of the LV-PEBB is accomplished by means of a 6-pack module based on Mosfet technology. where. the proposed power electronics block includes software active protections for both over-current. thus opening the way for higher quality and efficiency. the PEBB concept removes the low-level design problems and treats converters as a functional assembly. control circuits. the envisaged development of a lowvoltage PEBB (i. the input filter is accomplished by means of a dc-link capacitor CPN and the output filter is achieved with a small inductor LL for each phase. Concerning such specific applications. THE LOW-VOLTAGE PEBB A review of power converter topologies being used in a number of 42V automotive drives such as starter/alternator and ultracapacitor-based storage system shows that most converter arrangements are based on the use of the wellknown phase-leg structure including two active switches with their respective anti-parallel diodes. II. capacitors. 2. The PEBB concept can be also the best choice to minimize both the layout and packaging parasitics. such as those being envisaged to be soon utilized on board automobiles being equipped with a 42 V electric power system including both engine directly-coupled starter/alternator and ultracapacitor-based storage system. A. for dc-ac mode of operation. Thereby. and the busbar would be integrated together as a large power device. The small inductors are included in the LVPEBB with the purpose to make possible a safe parallel connection of two or more switches of the same LV-PEBB or even of two or more LV-PEBBs. As an example the same LV-PEBB topology could be used to assembly each one of the power electronic converters required for the hybrid power-train shown in Fig. The designer is thus concerned with information and control data flowing in and out of PEBBs and between PEBBs in the larger power systems design. overvoltage and over-temperature. Even though such a standard structure is yet being offered in the market in the form of intelligent power modules. greatly reduced design efforts as well as increased system simplicity and reliability are achieved. 6]. The goal of the PEBB development is to create a power-processing component that moves most of the design away from specific circuit topology consideration and moves up to a systems level power electronic switch and associated inductors.e. input and output filters. or a motor controller. The suitable combination of 634 . current and voltage sensors. This means that less specialty training in the field of power electronics is required. The 6-pack module configuration has been chosen in order to form a 5-poles PEBB where the parallel connection of two or more switches can be easily achieved for high current applications. thermal. UltraCap Storage Battery Storage Buck/Boost DC-to-DC 42V Power Net CRPW M Inverter ICE Clutch AFPM Clutch Gear Fig. As PEBB modules can be connected together to form several power system topologies. this paper investigates a LV-PEBB topology suitable to be used as either dc-dc converter or ac inverter or synchronous rectifier. This paper investigates the potential use of the PEBB concept in low-voltage fed power converters. Proposed LV-PEBB configuration. various power converter topologies having input voltage in the range from 24 V to 80 V and rating power from few kW up to 30 kW are likely to be used in order to accomplish bi-directional dc-dc or dc-ac power conversion. 1. In few words. and increased use of power processing technology. The PEBB is envisioned to be scalable in the level of power processing and on-board intelligence. The small inductors are as well responsible of limiting the variation of the phase current in case of short-circuits which are external to the LV-PEBB. and other ancillary components selection. and control interfaces is of great interest for power converter manufacturers as it would be expected to lead to great simplification in converter design and assembly and thereby should allow substantial reduction of mass-production costs [5. maintenance cost is reduced since individual modules are easily replaced and the number of stock spare parts is reduced. Fig. 2. Concerning such particular converter applications.inverter.. 1. because all the power semiconductor devices. LV-PEBB) module including standardized power. In addition. in the case of low-voltage high-current applications such power modules do not completely suit the needs of power converter manufactures and often discrete-component converter arrangements are likely to be used. besides.

g.1mF-115A.the protections’ operating time and phase inductor value makes possible a very small current de-rating for the power switches with respect to traditional power converter design. 635 .is then attached to the power-switching cell to accomplish and supervise these functions.5μH-250A and the dc link capacitor is 3. transducers. 3. level shift. fs is the switching frequency. Vllpk is the peak value of the line-to-line voltage and VPN is the dclink voltage value). in fact the uneven distribution of the currents among the paralleled modules. ILpk is the peak value of the ac-phase current. A local controller . The mathematical expression for the dc-link voltage ripple in three-phase converter topologies is as follow: 3 ⋅ (1 − M ) ⋅ M ⋅ I Lpk ΔVpp = (1) 2 ⋅ fs ⋅ CPN where ΔVpp is the peak-to-peak dc-link voltage ripple. (1) and (2) reach their maximum value for M=0. the PEBB functions as a computer-controlled powerswitching unit or a power processor. To select properly the PEBB capacitor. thanks to the presence of the inductors in case of external short-circuits the phase over-current variation will be limited to less than 100A in 6μs. A/D converters.and other PEBBs as shown in Fig. being this value of over-current compatible with the peak current of the selected Mosfet module. In this sense. LL is the inductance value of the small inductor and Tpr is the protection operating time. The selected 6pack power module is the VWM350-0075P which is based on Mosfet technology.hardware manager (HM) . In the prototypal system being developed these functions are handled by means of a FPGA that also handles the communication to and from higher-level control . protection and diagnostic functions [7. Eq. The proposed LV-PEBB is devoted to applications rated 10kW-42Vdc. As EMI requirement calls for very low inductance capacitor and short connections. and optical and communication interfaces. is limited by the effect of the chosen inductors. the maximum operating time for the protection is estimated in 6μs. The chosen value for the inductors allows a parallel connection of LV-PEBB modules with a very small current de-rating (<10%) for each module. also the rms value of the ripple current in the LV-PEBB dc-link capacitor must be considered during the design: ⎡1 ⎛4 3 ⎞⎤ ⋅ M ⎢ + cos 2 ϕ ⋅ ⎜ − ⋅ M ⎟ ⎥ (2) 2 ⎝π 2 ⎠⎦ ⎣π where ICPNrms is the ripple current in the capacitor tank and cosϕ is the displacement power factor. A certain amount of dc-link capacitance is directly placed in the LV-PEBB in order to meet the requirement for the voltage ripple (e. These components are the gate drivers. the dc-link cap is directly connected to the switching module and then – for safety reason .5 and cosϕ=1. the inductors are rated 1. 3. B. The ac-phase small inductor is sized on the basis of the following equation in order to limit the current variation occurring at external short-circuits for the operating time of the active protection: 2 ⋅ VPN (3) ΔI L = ⋅ Tpr 3 ⋅ LL ICPNrms = I Lpk where ΔIL is the maximum tolerable current variation. ΔVpp=1%VPN) and to reduce harmonics and EMI emissions at the power interface. 8].it must be assured that the total energy stored in the capacitor is not large enough to destroy the power module case when a short-circuit inside the LV-PEBB occurs. isolation. Fig. CPN is the dc-link capacitance for LV-PEBB and M is the modulation index (defined as M = Vllpk VPN . Block scheme for the LV-PEBB system. which is due to non-simultaneous turn-on and turn-off of the switches.application manager (AM) . however the opportunity of parallel connections between two or more LV-PEBBs gives the chance to use this configuration for higher power applications. The HM is responsible for the protection functions and the Spartan 3 FPGA from Xilinx is chosen for this purpose. LV-PEBB Control Section The LV-PEBB is completed with the inclusion of the components necessary to do a set of low-level functions that include signal power amplification.

As a result the ac inductors assure good balancing of phase currents and thus allowing the easy connection in parallel of either two or more LV-PEBBs. HMs is assumed equal to 0μs (i. The resulting maximum over-current is limited at 80A approximately. ideal case). 6 Paralleled LV-PEBB: possible current path when the delay in switches gating is higher than the dead time. SIMULATION RESULTS The proposed LV-PEBB has been simulated by means of PSpice models which were realized on purpose. a Fig. Under this condition. 636 . The worst unbalancing of currents is found when the differential delay in switches gating is higher than the set dead time and it is shown in Fig. lower than the dead time). an example of short circuit path is depicted in Fig. In the ideal case the load phase current sharing is perfectly balanced between the two 5-poles LV-PEBBs.5μs for each test. whilst the differential delay in switches gating of the two Fig. Same calculated duty cycles are provided by the AM to the two paralleled HMs. Operation at 3-phase external short-circuit fault is shown in Fig. 4. b Fig. 1μs (i. The 3phase voltage source inverter topology was considered for simulations of the proposed LV-PEBB. 5. Paralleled LV-PEBBs:load current. Fig. 5. and 2μs (i. Simulation results for two LV-PEBBs in parallel connection have been also accomplished. All PEBB components are modelled in order to include their losses. LV-PEBB external short-circuit: a) phase currents for worst case of failure. as well resistances and inductances of connections and bus-bars were calculated and included during simulations. LV-PEBB1 current. 4. simulations were run in order to investigate modes of operation for two LV-PEBBs in parallel connection and to test the maximum value of over-current under external short-circuit. the current path for each paralleled legs pair shows a very short time (the difference between differential delay and dead time) short circuit. 6. 2μs differential delay in switches gating. where the current path runs through top switch of LV-PEBB2 and bottom switch of LV-PEBB1 which belong to homonym legs. the fault is supposed at the maximum value for one of the ac output phase current as well it is assumed the complete protection process takes 6μs to turn off all the power module switches. uneven balancing of legs currents occurs during switches’ commutation. the dead time in switches gating is set at 1.e. being this value lower than the calculated one (100A) because of the presence of parasitic elements in the achieved model. LV-PEBB2 current.III.e. b) zoomed window.e. 7 shows current sharing between two paralleled LVPEBBs with negligible ac inductance for the same gating condition of Fig. higher than the dead time). 5. whereas when a differential delay in switches gating is present. Of course higher is the difference between differential delay and dead time and higher is the unbalancing of currents. which is the actual situation. by comparing the two simulations it is evident that the ac inductors have the effect to mitigate the current unbalancing during switches commutation.

in the first release of the LV-PEBB prototype.071K/W. The complete mechanical layout design is shown in Fig. 9 Assembling sequence of the LV-PEBB prototypes. Of course.2mF-14.Fig. 2μs delay in switches gating. the current and voltage sensors are respectively LA200-P/SP1 and LV25-P from LEM. the dc link capacitors bank is formed by 10 Evox-Rifa PEH200PB4220M 2.93µH-210A rms. which is formed by the DSP ADSP21992 evaluation board from Analog Devices. IV. 9. whereas appropriately designed bus-bars system was considered for the power connections. The LV-PEBB assembling sequence is shown in Fig. The mechanical layout of the proposed LV-PEBB was designed in order to obtain a reliable and mechanically compact module. the resulting overall dimensions in mm are 200x262x169. The two realized boards communicate with the FPGA and the AM.7A rms each. our ultimate purpose is to design and realize a LV-PEBB module integrating the FPGA in the main HM PCB. In order to correctly design the cooling system a two port transformerlike model for the whole LV-PEBB is derived from power balance considerations [9]. The first step was the design of connection of both power and control pins of the IXYS power module with the PEBB components. 7 Paralleled LV-PEBBs with no ac inductors: load current. 169 262 200 Fig. 8 LV-PEBB mechanical layout design. dimensions in mm. 637 . LV-PEBB1 current. the power inductors are from Schott and are rated 1. LV-PEBB2 current. in this case multiple laminated copper layers which are insulated by dielectric films were used to reduce eddy current losses. gate signal pins are connected through a suitable PCB directly mounted on the power module. the heatsink + fan from PADA is rated 0. The mechanical layout of the prototypes has been designed in order to favor the assembling procedures as well to achieve a compact size. which is required in particular for automotive related applications. is composed of an evaluation board including the FPGA Spartan-3 and two PCBs suitably designed for the measures acquisition and for the power stage driving functions. Results and technical considerations achieved from the carried out design and simulations have been used in order to produce first prototypes of LV-PEBB. 8 for the proposed LV-PEBB with forced-air cooling system. conduction and switching losses in the power Mosfet module can be specifically estimated thus providing valuable information for the cooling system design. Fig. The achieved model allows to simulate the LV-PEBB behavior in any operating condition with inclusion of losses for each component. LV-PEBB PROTOTYPES The HM system.

whereas in Fig. 16 are displayed the total input current together with each of the phase leg current. The LV-PEBB buck converter was supplied at 48V and the output current was set close to 60A for each leg. 11 are displayed the phase current and the dc link voltage. CONCLUSIONS In this paper a LV-PEBB topology suitable to be used as either dc-dc converter or ac inverter or synchronous rectifier has been investigated to be used in a number of low-voltage applications (e. buck mode of operation as well boost configuration have been tested by using an extra inductor rated 50µH. 14 are displayed the total output current together with each of the phase leg current. The proposed 5-poles PEBB is accomplished by means of a 6-pack module based 638 .The designed LV-PEBB with forced air cooling system shows power per volume ratio of 1. 15.13kW/dm3 and power per weight ratio of 1. First experimental tests have been accomplished by using resistors with different values as a load.45kW/kg. it can be remarked the even distribution of the total input current among the three legs of the LV-PEBB prototype. 20V/div) of LV-PEBB Fig. Fig. More considerable values for current and power have been reached by using as a load a 50kVA 3-phase transformer having the secondary winding short circuited. Input and output voltages and currents for the buck configuration are shown in Fig. the LV-PEBB prototypes have been supplied by means of an ac-dc converter MQ200-100 from Magna Power which was connected to the national grid. Also for the boost mode of operation. Fig. Same load and power supply conditions were operated in order to test two paralleled LV-PEBB prototypes when they are called to supply large currents to a 3-phase load. 11 Phase current (red trace. V. which is the rated voltage for the proposed LV-PEBB. LV-PEBB EXPERIMENTAL RESULTS For experimental activity purposes.g. Voltages across the switches exhibit slight overvoltages at turn off. fork-lift drives. The small oscillation of the dc link voltage is related to the mode of operation of the ac-dc converters MQ200-100 in parallel connection. as a consequence the output voltage resulted in nearly 48V. whereas in Fig. 10 Voltages across top (blue trace) and bottom (green trace) switches of LV-PEBB phase legs Fig. Input and output voltages and currents for the boost configuration are shown in Fig. 13. 42V automotive drives such as starter/alternator and ultracapacitor-based storage system). 100A/div) and dc link voltage (blue trace. 12 for the two paralleled LV-PEBBs. The LV-PEBB boost converter was supplied at 24V and the input current was set close to 60A for each leg. the LV-PEBB prototypes have been tested as inverter mode of operation up to 150A as phase peak current when two ac-dc converters MQ200-100 in parallel connection were used to supply the prototype under testing. phase A currents are displayed in Fig. Each LV-PEBB prototype has been investigated also as dcdc converter having the three phase legs in parallel connection. 10 shows the waveforms of voltages across top and bottom switches of the same phase leg for the described load condition when the prototype is driven at 20kHz. 12 Phase A currents for the two paralleled LV-PEBBs (50A/div) VI. the achieved values are in the same range of commercial power converters for industrial applications which have similar power rating but currents 410 times lower. under these conditions the LV-PEBB functionalities have been verified for phase currents up to 30A. wheelchair drives. thus safety of the Mosfet module is reasonably assured even at rated power condition. as a consequence the output voltage resulted in nearly 24V. The lack of suitable loads as well the requirement of significant phase currents forced to increase up to 60V the dc link voltage. whereas in Fig.

Li.P. “Power Electronics Building Blocks and potential power modulator applications.A. Guo. pp. 20V/div). [5] [6] [7] [8] [3] [9] 639 . ACKNOWLEDGMENT The authors would like to acknowledge funding provided through the Italian Ministry for Education. J. vol. 1999. Fig. Fig. R. Dougal. Lee. pp. 1 pp. 2. 2000.” Proc. A.” Conf. “The new paradigm in power electronics design.C. Celanovic. pp. Zhang. “Modeling. Guo. output current (red trace. 497-505. 50A/div). of the IEEE 15th Annual Applied Power Electronics Conference and Exposition. “Design issues in power electronic building block (PEBB) system integration. 2001. R. red trace.C. Cooley.” Conf. T. green trace. 2.L. Tucker. green trace. output voltage (blue trace. “Design of resonant circuit for zero-current-transition techniques in 100kW PEBB applications. 1999. of the IEEE Power Engineering Society Summer Meeting. 50A/div). 20A/div). Boroyevich. Lee. D. Ericsen. D. Thandi. 20V/div). D. Fig. 50A/div). Celanovic. F. Small inductors are included in the LV-PEBB with the purpose to make possible a safe parallel connection of two or more switches of the same LV-PEBB or even of two or more LV-PEBBs. 12-15. vol. pp.” IEEE Transactions on Power Delivery. “A Transformer-like Model for the DC/AC Converter. 772-777. phase leg current (cyan trace. D.on Mosfet technology. 2002. “A new distributed digital controller for the next generation of power electronics building blocks. F. of 37th IEEE Industry Applications Society Annual Meeting. 625-630. Design of the LV-PEBB power section was carried out and two prototypes have been built. vol. 20A/div). Y. 1998 pp. pp. 889894. Mookken. 20V/div). 4. I. J.” Proc. Scapino. output voltage (cyan trace. 2335-2342. of the IEEE ICIT 2003.” Proc. K. 2. vol. 2000. The small inductors are as well responsible of limiting the variation of the phase current in case of short-circuits which are external to the LV-PEBB. J. F. University and Research (MIUR). 1–6. 1998. Milosavljevic. B. Solero. 15 LV-PEBB boost converter: input current (green trace. 50A/div). output current (green trace.T.” Proc. Hudgins. control and stability analysis of a PEBB based DC DPS. Rec. 50A/div). Kornegay.” Proc. I. Boroyevich. vol. The experimental validation of the proposed concept has been carried out through an extensive test campaign. I. Fig. phase leg current (cyan trace. Rec. vol. 20V/div).” Proc. Boroyevich. Beker. red trace. “Power Electronic Building Blocks-a systematic approach to power electronics. of the IEEE International Conference on Power Electronics and Drive Systems. “Distributed software architecture of PEBB-based plug and play power electronics systems. REFERENCES [1] [2] T. of IEEE Computer Society Workshop on System Level Design. Xing. of the 23rd International Power Modulator Symposium. 1216-1218. of the IEEE 16th Annual Applied Power Electronics Conference and Exposition. input voltage (blue trace. 16 LV-PEBB boost converter: total input current (blue trace. pp. 14 LV-PEBB buck converter: total output current (blue trace. 50A/div). K. 13 LV-PEBB buck converter: input current (red trace. J. 14. R. input voltage (cyan trace. G. 48-52.S. Ericsen. [4] L. Boroyevich. pp.