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Analog Electronics-II Laboratory

Model Journal

Experiment No. 1

Objective: To study the effect of frequency on BJT Amplifier circuits. Aim: To study the frequency response of CE Amplifier. Apparatus Required: Sr. No 1 2 3 4 5 6 7 Theory: Frequency response of the RC coupled amplifier is as shown below Instruments Breadboard CRO Power supply BJT Resistors Capacitors Function generator Specification 2 channel/30 MHZ 0-30 V DC/1A BC147B/BC547B 33KΩ,6.8K Ω,1.5 KΩ,1 KΩ 100 µf, 22 µf, 22 µf 3 MHz Quantity 1 1 1 1 -

The frequency response of the R.C. coupled amplifier is divided in three regions i. ii. iii. Low frequency region Mid frequency region High Frequency region

Department of Electronics & Telecommunication

Analog Electronics-II Laboratory

Model Journal

Low Frequency Region: In this region gain of amplifier is less. This is due to effect of and . Since and are coming in serial with signal and output respectively, high reactance offered by these capacitors at low frequencies reduces the gain. Since reactance of capacitor is high, it reduces the net input voltage to the amplifier and hence the output voltage decreases. Similarly because of high reactance offered by net output voltage decreases. Therefore the gain of amplifier decreases at low frequencies. Again at low frequency reactance offered by is also high and because of which is not effectively bypassed, hence there a.c. negative feedback through reducing the input voltage and hence gain of the amplifier. Hence and , determines low frequency response of amplifier. Mid frequency Region: In this mid frequency region the gain of the amplifier remains constant and is maximum. In this region the reactance offered by the coupling capacitors and bypass capacitor is negligible. Thereby increasing the net input voltage and hence output voltage. In this region the amplifier circuit can be considered purely resistive. Here small signal low frequency equivalent circuit is used for transistor analysis. High frequency Region: In the high frequency region, gain of amplifier decreases this is because of internal capacitance of the transistor and external wiring (stray, parasitic) capacitance. The reduction of the high frequency gain is due to…. A. Effect of internal capacitance and

Department of Electronics & Telecommunication

Analog Electronics-II Laboratory

Model Journal

Since the base emitter junction is forward biased and collector emitter junction is reverse biased, these are known as (diffusion capacitance) and (transition Capacitance) respectively. Because of low reactance at high frequency capacitor provides low reactance path to input current and hence effective input current to the base of amplifier reduces and hence causes gain to reduce. Since there is phase shift of between input and output of CE amplifier, and since there exists a feedback path between the collector and base through . The feedback current is out of phase with respect to input current and hence base current to the transistor decreases. This decreases the input voltage and hence output voltage decreases. So the gain of amplifier decreases at high frequencies.

Procedure: 1. Mount the circuit as per circuit diagram on breadboard. 2. Supply input voltage from function generator, Vin= 50 mVpp. 3. Supply 12 V DC from dc regulated power supply. 4. Measure the output voltage at one frequency. 5. Repeat the observation for frequency ranges from 30 Hz to 3MHz. 6. Plot the frequency response on semi-log graph. 7. Calculate fL, fH and bandwidth of CE amplifier.

Result: Sr. No. 1. 2. 3. Parameters Lower cut-off frequency Upper cut-off frequency Bandwidth Theoretical Value (Hz) Practical Value (Hz)

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What effect does the Miller capacitance have on the amplifier bandwidth? Department of Electronics & Telecommunication . and high-frequency ranges. 9. 10. iv. iii. junction and wiring capacitors but the gain is high or maximum at mid frequency range. Human Error Resistance tolerance. Questionnaire 1. The value of lower cut-off frequency. Draw and explain the frequency response of RC coupled CE Amplifier. and high-frequency ranges. Theoretical and practical values are not same due the following reasons: i. Derive the expression for upper cutoff frequency. By plotting the gain versus frequency plot on semi-log graph we have observed that gain is low at low frequency due to blocking. Show the effect of source and load resistance on frequency response of RC coupled CE Amplifier. upper cut-off frequency and bandwidth of CE Amplifier were calculated from graph. coupling and bypass capacitors and the gain is low at higher frequencies due to miller. Describe the general characteristics of the equivalent circuits that apply to the low-frequency. Draw the equivalent circuit of BJT amplifier at high frequency. Show the effect of low frequency and high frequency on coupling and bypass capacitors. mid-band. 6. Describe the general frequency response of an amplifier and define the low frequency. Draw equivalent circuit of BJT amplifier at high frequency for the given amplifier and hence draw low frequency response. 3. mid-band. 4. Describe the short circuit current gain versus frequency response of a BJT and define the cutoff frequency. Describe the Miller effect and the Miller capacitance. 7. 2.Analog Electronics-II Laboratory Model Journal Conclusion: Hence we have studied the frequency response of CE Amplifiers. Instrumental Error. 8. Aging of components. ii. 5.

1 KΩ 47 µf. 2 Objective: To study the effect of frequency on FET Amplifier circuits. 1µf.Analog Electronics-II Laboratory Model Journal Experiment No. Apparatus Required: Sr.1 µf 3 MHz Quantity 1 1 1 1 1 1 1 The frequency response of the R. Low frequency region Mid frequency region High Frequency region Department of Electronics & Telecommunication .5 KΩ. v. No 1 2 3 4 5 6 7 Theory: Frequency response of the RC coupled amplifier is as shown below Instruments Breadboard CRO Power supply FET Resistors Capacitors Function generator Specification 2 channel/30 MHZ 0-30 V DC/1A BFW11 1MΩ. Aim: To study the frequency response of CS Amplifier.C. coupled amplifier is divided in three regions iv.1. vi.

high reactance offered by these capacitors at low frequencies reduces the gain. Again at low frequency reactance offered by is also high and because of which is not effectively bypassed. This is due to effect of and . Mid frequency Region: In this mid frequency region the gain of the amplifier remains constant and is maximum. Since reactance of capacitor is high.c. Similarly because of high reactance offered by net output voltage decreases. B. parasitic) capacitance. Thereby increasing the net input voltage and hence output voltage. Effect of internal capacitance and Department of Electronics & Telecommunication . hence there a.Analog Electronics-II Laboratory Model Journal Low Frequency Region: In this region gain of amplifier is less. gain of amplifier decreases this is because of internal capacitance of the transistor and external wiring (stray. determines low frequency response of amplifier. The reduction of the high frequency gain is due to…. it reduces the net input voltage to the amplifier and hence the output voltage decreases. Hence and . Since and are coming in serial with signal and output respectively. High frequency Region: In the high frequency region. negative feedback through reducing the input voltage and hence gain of the amplifier. In this region the reactance offered by the coupling capacitors and bypass capacitor is negligible. Here small signal low frequency equivalent circuit is used for transistor analysis. In this region the amplifier circuit can be considered purely resistive. Therefore the gain of amplifier decreases at low frequencies.

Supply input voltage from function generator. Parameters Lower cut-off frequency Upper cut-off frequency Bandwidth Theoretical Value (Hz) Practical Value (Hz) Department of Electronics & Telecommunication . 1. 5. 2. 7. Procedure: 1. Vin= 50 mVpp. So the gain of amplifier decreases at high frequencies. Repeat the observation for frequency ranges from 30 Hz to 3MHz. Because of low reactance at high frequency capacitor provides low reactance path to input current and hence effective input current to the base of amplifier reduces and hence causes gain to reduce. these are known as (diffusion capacitance) and (transition Capacitance) respectively. 4. Result: Sr. and since there exists a feedback path between the collector and base through . Calculate fL. 2. Since there is phase shift of between input and output of CS amplifier. The feedback current is out of phase with respect to input current and hence base current to the transistor decreases. Plot the frequency response on semi-log graph. 6.Analog Electronics-II Laboratory Model Journal Since the base emitter junction is forward biased and collector emitter junction is reverse biased. Supply 12 V DC from dc regulated power supply. fH and bandwidth of CS amplifier. Mount the circuit as per circuit diagram on breadboard. 3. 3. Measure the output voltage at one frequency. This decreases the input voltage and hence output voltage decreases. No.

Aging of components. 3. By plotting the gain versus frequency plot on semi-log graph we have observed that gain is low at low frequency due to blocking. 2. 5. and high-frequency ranges. The value of lower cut-off frequency. Questionnaire 1. 4. junction and wiring capacitors but the gain is high or maximum at mid frequency range. mid-band. Describe the short circuit current gain versus frequency response of a FET and define the cutoff frequency. iv. Describe the Miller effect and the Miller capacitance. Draw and explain the frequency response of RC coupled CS Amplifier. iii.What effect does the Miller capacitance have on the amplifier bandwidth? Department of Electronics & Telecommunication . 7. coupling and bypass capacitors and the gain is low at higher frequencies due to miller. ii. Human Error Resistance tolerance. Describe the general characteristics of the equivalent circuits that apply to the low-frequency.Analog Electronics-II Laboratory Model Journal Conclusion: Hence we have studied the frequency response of CS Amplifiers. and high-frequency ranges. 8. 6. 10. Derive the expression for upper cutoff frequency. upper cut-off frequency and bandwidth of CS Amplifier were calculated from graph. Show the effect of source and load resistance on frequency response of RC coupled CS Amplifier. Show the effect of low frequency and high frequency on coupling and bypass capacitors. Instrumental Error. Theoretical and practical values are not same due the following reasons: i. Draw equivalent circuit of FET amplifier at high frequency for the given amplifier and hence draw low frequency response. Draw the equivalent circuit of FET amplifier at high frequency. mid-band. Describe the general frequency response of an amplifier and define the low frequency. 9.

6. No 1 2 3 4 5 6 7 Theory: Multistage Frequency Effects: For a second transistor stage connected directly to the output of a first stage there will be a significant change in the overall frequency response. Apparatus Required: Sr. 33KΩ. 10 µf 3 MHz Quantity 1 1 1 2 1 - Department of Electronics & Telecommunication .7KΩ 47 µf. 3.c analysis of CE-CE amplifier circuit. 4.8K Ω. The low frequency cutoff is primarily determined by that stage having the highest low frequency cutoff frequency. 3 Objective: To study the performance and analysis of two stage BJT Amplifiers Aim: To study the a. 1KΩ. In the high frequency region the output capacitance must now include the wiring capacitance ( ). It is shown in following figure Instruments Breadboard CRO Power supply BJT Resistors Capacitors Function generator Specification 2 channel/30 MHZ 0-30 V DC/1A BC147B/BC547B 56KΩ. If non-identical stages with different lower and higher cutoff frequencies are cascaded then highest among the lower cutoff frequencies will be effective and lowest among higher cutoff frequencies will be effective and hence overall band width decreases. parasitic capacitance ( ) and miller capacitance ( ) of the following stage. For each additional stage the upper cutoff frequency will be determined primarily by that stage having the lowest cutoff frequency.Analog Electronics-II Laboratory Model Journal Experiment No.3KΩ. Further there will be additional low frequency cutoff levels due to the second stage that will further reduce the overall gain of the system in the region. 1 µf. 10 KΩ.

Supply input voltage from function generator. 5.Analog Electronics-II Laboratory Model Journal Procedure: 1. No. Measure the output voltage and calculate its voltage gain. Supply 12 V DC from dc regulated power supply. 6.10 KHz. Result: Sr. 3. 2. Calculate the input and output impedance. 4. Compare the obtained result with theoretical values. Parameters Voltage Gain (AV) Input Impedance (ZI) Output Impedance (Zo) Theoretical Value Practical Value Department of Electronics & Telecommunication . Vin= 50 mVpp. 1. Mount the circuit as per circuit diagram on breadboard. 3. 2.

Department of Electronics & Telecommunication . Questionnaire 1. Explain the various types of coupling methods used in multistage amplifiers. 7. iv. By comparing practically observed values with theoretical values we have concluded that the theoretical and practical values are not same due the following reasons: i. Human Error Resistance tolerance.Analog Electronics-II Laboratory Model Journal Conclusion: Hence we have studied the performance and analysis of two stage BJT Amplifier circuit. 4. List the application of CE-CE amplifier. Instrumental Error. input impedance is fairly high and output impedance is low. 2. Draw and explain frequency response of RC coupled CE-CE amplifier. The gain of CE-CE Amplifier is high. input and output impedance of CE-CE amplifier. What are the advantages of CE-CE amplifier circuits Derive the expression for voltage gain. What is the need of multistage amplifiers. Explain the concept of multistage amplifier circuits. 3. Aging of components. current gain. ii. 6. 5. iii.

22 µf. 22 µf 3 MHz 2 channel/30 MHZ Quantity 1 1 1 1 1 1 1 1 Department of Electronics & Telecommunication . No 1 2 3 4 5 6 7 8 Theory: Multistage Frequency Effects: For a second transistor stage connected directly to the output of a first stage there will be a significant change in the overall frequency response. If non-identical stages with different lower and higher cutoff frequencies are cascaded then highest among the lower cutoff frequencies will be Instruments Breadboard Power supply BJT FET Resistors Capacitors Function Generator CRO Specification 0-30 V DC/1A BC547B BFW11 220 KΩ.Analog Electronics-II Laboratory Model Journal Experiment No.5K Ω. In the high frequency region the output capacitance must now include the wiring capacitance ( ) . Further there will be additional low frequency cutoff levels due to the second stage that will further reduce the overall gain of the system in the region. Aim: To study ac analysis of CS-CE Amplifier circuit. 4 Objective: To study the performance and analysis of multistage amplifier circuits. Apparatus Required: Sr. parasitic capacitance ( ) and ( ) and miller capacitance ( ) of the following stage. For each additional stage the upper cutoff frequency will be determined primarily by that stage having the lowest cutoff frequency.1 KΩ 100 µf. The low frequency cutoff is primarily determined by that stage having the highest low frequency cutoff frequency.1.

4. 1. Supply input voltage from function generator. 6. Vin= 50 mVpp. 3. Calculate the input and output impedance. Result: Sr.10 KHz. No. 2. It is shown in following figure Procedure: 1. 5.Analog Electronics-II Laboratory Model Journal effective and lowest among higher cutoff frequencies will be effective and hence overall band width decreases. Compare the obtained result with theoretical values. 2. Mount the circuit as per circuit diagram on breadboard. Measure the output voltage and calculate its voltage gain. Parameters Voltage Gain (AV) Input Impedance (Zi) Output Impedance (Zo) Theoretical Value Practical Value Department of Electronics & Telecommunication . Supply 12 V DC from dc regulated power supply. 3.

Explain the various types of coupling methods used in multistage amplifiers. iii. 3. 8.Analog Electronics-II Laboratory Model Journal Conclusion: Hence we have studied the performance and analysis of two stage FET-BJT Amplifier circuit. input and output impedance of CS-CE amplifier. Human Error Resistance tolerance. ii. Explain why the input impedance of CS-CE amplifier is very high. 2. 5. The gain of CS-CE Amplifier is moderately high. 7. Instrumental Error. Draw and explain frequency response of RC coupled CS-CE amplifier. input impedance is very high (in mega-ohms range) and output impedance is low. 6. Questionnaire 1. 4. What is the need of multistage amplifiers. Aging of components. current gain. By comparing practically observed values with theoretical values we have concluded that the theoretical and practical values are not same due the following reasons: i. Explain the concept of multistage amplifier circuits. List the application of CS-CE amplifier. iv. Department of Electronics & Telecommunication . What are the advantages of CS-CE amplifier circuits Derive the expression for voltage gain.

Aim: To study ac analysis of Darlington pair amplifier circuit and plot its frequency response. No 1 2 3 4 5 6 7 Theory: In electronics. and the input impedances of the circuit is limited by the current gain that can be achieved using a single transistor.5. 5 Observation: To study the performance and analysis of multistage buffer amplifier circuits or multistage common collector amplifier.Analog Electronics-II Laboratory Model Journal Experiment No.100 KΩ. but particularly as an emitter follower. Instruments Breadboard CRO Power supply BJT Resistors Capacitors Function generator Specification 2 channel/30 MHZ 0-30 V DC/1A BC147B/BC547B 100 K Ω. the level of current gain. This circuit can be used as any single transistor would be in a variety of circuits. the Darlington pair is a compound structure consisting of two bipolar junction transistors (either integrated or separated devices) connected in such a way that the current amplified by the first transistor is amplified further by the second one with much higher current gain. Apparatus Required: Sr.6 KΩ 1µf 3 MHz Quantity 1 1 1 2 1 - Department of Electronics & Telecommunication . The gain of the Darlington transistor pair is that gain of the two individual transistors multiplied together. Current Gain = hfe1 * hfe2 The basic Darlington transistor circuit is formed by taking the emitter of the input transistor and connecting it such that its emitter drives the base of the second and then connecting both collectors together. When using an emitter follower in a circuit.

Compare the obtained result with theoretical values. 2. 7. Supply 12 V DC from dc regulated power supply. 6.Analog Electronics-II Laboratory Model Journal Procedure: 1. Measure the output voltage and calculate its voltage gain. Mount the circuit as per circuit diagram on breadboard. Calculate fL. 9. Vin= 50 mVpp. Repeat the observation for frequency ranges from 30 Hz to 3MHz. 2. 3. 5. Result: Sr. 4. 6.W) Theoretical Value Practical Value Department of Electronics & Telecommunication . 3. 8.10 KHz. 1. Plot the frequency response on semi-log graph. Supply input voltage from function generator. 4. No. 5. Calculate the input and output impedance. Parameters Voltage Gain (AV) Input Impedance (ZI) Output Impedance (Zo) Lower cut-off frequency (fL) Upper cut-off frequency (fH) Bandwidth (B. fH and bandwidth of CE amplifier.

By comparing practically observed values with theoretical values we have concluded that the theoretical and practical values are not same due the following reasons: i. junction and wiring capacitors but the gain is high or maximum at mid frequency range. coupling and bypass capacitors and the gain is low at higher frequencies due to miller. current gain is very high. Ri and Ro. upper cut-off frequency and bandwidth of CC-CC amplifier were calculated from graph. Discuss Darlington pair. 4. The voltage gain of CC-CC amplifier is close to unity. input impedance is high and output impedance is low. iii. 7. The value of lower cut-off frequency. Derive the expression for upper cutoff frequency. ii. 6. Aging of components. Explain the advantages and disadvantages of Darlington pair amplifier. Human Error Resistance tolerance. By plotting the gain versus frequency plot on semi-log graph we have observed that gain is low at low frequency due to blocking. What are its primary features? Obtain expressions for. Department of Electronics & Telecommunication . List the application of Darlington pair amplifier. What is Darlington pair? What is the need of Darlington pair amplifier? 2. List the applications of cascode amplifier. Draw the equivalent circuit of Darlington pair amplifier at high frequency. 5. Instrumental Error.Analog Electronics-II Laboratory Model Journal Conclusion: Hence we have studied the performance and analysis of Darlington pair amplifier. Draw equivalent circuit of Darlington pair amplifier at high frequency for the given amplifier and hence draw low frequency response. iv. 3. Av. Questionnaire 1. Ai and Ri. Explain the practical cascode amplifier and derive the expression for Av.

PNP-CK100 22 KΩ. Aim: To study class B and class AB amplifier. Linearity and power-conversion efficiency of the power amplifier are the main requirements. Instruments Breadboard CRO Power supply BJT Resistors Diode Function generator Specification 2 channel/30 MHZ 0-30 V DC/1A NPN-CL100. a) Harmonic distortion The total harmonic distortion (THD) imposed by the amplifier on the output signal is used to evaluate the power amplifiers after the design.10 KΩ 1N4007 3 MHz Quantity 1 1 1 1 2 2 1 Department of Electronics & Telecommunication . Apparatus Required: Sr. Since the power amplifiers or the derivers deliver a relatively high power signal they are known as large-signal amplifiers. No 1 2 3 4 5 6 7 Theory: The final stage in any analog system is known as output stage. This output stage usually consists of a power amplifier or a driver to deliver a high power output signal to the load without loss of gain.Analog Electronics-II Laboratory Model Journal Experiment No. 6 Objective: To study the performance of Power amplifier circuits. The total harmonic distortion (THD) is expressed in a percentage (measured in rms values) of the harmonic components with respect to the fundamental of the output signal.

class A. The power loss is the portion of power that dissipates or consumes by the active devices ( PD) during the conversion process. The four classes are. The average power dissipated in the class B stage is given by PD  PS  PL where PL is power dissipation in the load R L . because it occurs at point when output stage crosses sourcing and sinking current. This distortion can be so hard that it is objectionable even with large Signal. class B. Class B amplifier consists of driven transistor connected from output to negative power supply signal drive one Department of Electronics & Telecommunication . The above equation satisfies the law of energy conservation. class AB and class C. power amplifiers are classified into classes according to the initial location of the dc operating point Q.Analog Electronics-II Laboratory Model Journal b) Power efficiency Power-conversion efficiency is a measure of the ability of an active device to convert the dc power of the supply into ac (signal) power delivered to the load and is given by: ( ( ) ) According to energy conservation law input power = output power + power losses. Likewise small-signal amplifier classifications. Class B Amplifier Class B Amplifier has major disadvantages of very audible distortion with small signal. the most efficient power amplifier is the one that is capable of converting the power of the dc power source (PS) into the ac power without losses. This distortion is called as cross over distortion.

2. Observe the differences and comment on them in conclusion part. No. while other OFF So in class B amplifier. 4. no power is wasted going from positive to negative power supply. Class AB Amplifier Class AB Amplifiers are almost same to Class B amplifier in that they are two driver transistors. 2. Apply Vin= +5V Observe the cross over distortion On CRO. Class B Class AB Theoretical Value Practical Value Department of Electronics & Telecommunication . Result: Sr.Analog Electronics-II Laboratory Model Journal transistor ON. Parameters 1. Procedure: 1. Apply Vin= +5V Observe the Output On the CRO Screen. 6. Make connections for Class B amplifier as shown in the figure. even when no input signal is provided that idle current slightly increases. 3. 5. 8. Compare the obtained output with expected output. Make Connection for Class AB Amplifier as Shown in the figure. However Class AB Amplifier drifts from Class B amplifier in that they have small current flowing from positive Supply to negative supply. 7.

What is meant by harmonic distortion? 15. 13. iv. there is i. ii. What is a heat sink? Why is it required for power amplifiers? Show the relationship between thermal and electrical analogy with a neat sketch. 3. Resistance tolerance. Define and describe the power de-rating curve for a transistor. Explain harmonic distortion and crossover distortion in power amplifier. v. 10. 11. Explain the concept of crossover distortion. Department of Electronics & Telecommunication . 12. Explain working and analyze class B power amplifier Write a short note on design of Heat Sink. Small difference in practical and theoretical values is observed which is due to the following reasons. Capacitive tolerance. Describe the operation of an ideal class-B output stage. 4. 2. 14. 5. Explain working of transformer less push-pull amplifier. Sketch a class-AB complementary BJT push–pull output stage using a VBE multiplier circuit. 7. Transistor is assumed to be of ideal nature. Power supply variation and calculation error Human error and Faulty instruments are responsible for the difference. Questionnaire 1. How are they overcome? 6. which occurs in Class B Amplifier.Analog Electronics-II Laboratory Model Journal Conclusion Class AB amplifier duo is used to overcome cross over distortion. Describe the safe operating area for a transistor. iii. Differentiate between small signal and large signal amplifier 8. In the calculation. Write a short note on Class AB push-pull power amplifier 9. Explain why a voltage amplifier cannot be used as a good power amplifier. vi.

Analog Electronics-II Laboratory Model Journal Experiment No. 7 Objective: To study the performance of high efficiency power amplifier circuit. The class-C amplifier has two modes of operation: tuned and un-tuned. Aim: To study class C Amplifier circuit.1µf 3 MHz 2 channel/30 MHZ Quantity 1 1 1 1 1 Department of Electronics & Telecommunication . The diagram shows a waveform from a simple class-C circuit without the tuned load.. but high efficiencies (up to 90%) are possible. When the proper load (e. where the distortion is controlled by a tuned load on the amplifier. two things happen. The first is that the output's bias level is clamped with the average output voltage equal to the supply voltage. This is directly related to the second Instruments Breadboard Power supply BJT Resistors Capacitors Inductors Function generator CRO Specification 0-30 V DC/1A NPN CL-100 100 µf.g. This allows the waveform to be restored to its proper shape despite the amplifier having only a one-polarity supply. No 1 2 3 4 5 6 7 8 Theory: Class-C amplifiers conduct less than 50% of the input signal and the distortion at the output is high. This is why tuned operation is sometimes called a clamper. 0. The input signal is used to switch the active device causing pulses of current to flow through a tuned circuit forming part of the load. an inductive-capacitive filter plus a load resistor) is used. Apparatus Required: Sr. and the analysis of the waveforms shows the massive distortion that appears in the signal. The usual application for class-C amplifiers is in RF transmitters operating at a single fixed carrier frequency. This is called un-tuned operation.

Power can be coupled to a load by transformer action with a secondary coil wound on the inductor. The average voltage at the drain is then equal to the supply voltage. and the signal voltage appearing across the tuned circuit varies from near zero to near twice the supply voltage during the RF cycle. Any residual harmonics can be removed using a further filter. and the wanted full signal (sine wave) is extracted by the tuned load. and so the unwanted frequencies are suppressed. to around 120 degrees.Analog Electronics-II Laboratory Model Journal phenomenon: the waveform on the center frequency becomes less distorted. The active element conducts only while the drain voltage is passing through its minimum. and the efficiency is then 6070%. The input circuit is biased so that the active element (e. the fixed carrier frequency. In one common arrangement the resistor shown in the circuit above is replaced with a paralleltuned circuit consisting of an inductor and capacitor in parallel. In practical class-C amplifiers a tuned load is invariably used. The tuned circuit resonates at one frequency. and the pulse must therefore be widened.g. the active element would pass only an instantaneous current pulse while the voltage across it is zero: it then dissipates no power and 100% efficiency is achieved. Department of Electronics & Telecommunication . power dissipation in the active device is minimized. transistor) conducts for only a fraction of the RF cycle. and efficiency increased. but greater attenuation the farther from the tuned frequency that the signal gets. whose components are chosen to resonate at the frequency of the input signal. usually one third (120 degrees) or less. to obtain a reasonable amount of power. By this means. Ideally. However practical devices have a limit to the peak current they can pass. The residual distortion is dependent upon the bandwidth of the tuned load. The signal bandwidth of the amplifier is limited by the Q-factor of the tuned circuit but this is not a serious limitation. with the center frequency seeing very little distortion.

5Vpp amplitude and an operating frequency equal to the center frequency calculated in above step. and change the function generator frequency until a maximum output is obtained. Measure this frequency. Adjust the function generator to a 1. Measure and record the peak to peak input and output signal levels and record these values Vin (with output signal) and Vout. VC. 4. Connect the CRO to the output. adjust the output amplitude of the generator to the largest value that won’t produce an output signal at the collector. 5. 8. 3. Apply DC power to the amplifier.Analog Electronics-II Laboratory Model Journal Procedure: 1. Increase the function generator level while observing the amplifier output. VE. Without changing the function generator frequency. Calculate and record the resonant frequency of the LC circuit (this is the centre or mid frequency of the amplifier). 2. 7. Result: The following results were observed:       VB = ____________ VE = ____________ VC = ____________ VIN (With no output signal ) VIN (With output signal) VOUT (With output signal) = ____________ = ____________ = ____________ Department of Electronics & Telecommunication . Mount the circuit as per circuit diagram on breadboard. Measure and record the values VB. Measure and record this peak to peak minimum signal level Vin (with no input signal). 6. Connect the function generator to the input of the amplifier. Adjust the function generator signal level to the minimum value that just produces a complete sinusoidal output signal.

Analog Electronics-II Laboratory Model Journal Conclusion: Hence we have studied the operation and performance of Class C power amplifier circuit. Resistance tolerance. v. 6. 9. Questionnaire 1. iii. Small difference in practical and theoretical values is observed which is due to the following reasons. Transistor is assumed to be of ideal nature. Power supply variation and calculation error Human error and Faulty instruments are responsible for the difference. ii. 3. In the calculation. iv. 2. Explain working and analyze class C power amplifier Write a short note on design of Heat Sink. Write short notes on Class C amplifier Explain why a voltage amplifier cannot be used as a good power amplifier. Department of Electronics & Telecommunication . vi. Capacitive tolerance. 4. 8. Differentiate between small signal and large signal amplifier What are the advantages of Class C power amplifier? What are the applications of Class C amplifier? Why the efficiency of Class C amplifier is high? Explain the working and region of operation of Class C amplifier. 5. there is i. 7.

The closed-loop voltage gain of operational amplifier is defined as Instruments Breadboard Power supply OP-AMP Resistors Function generator CRO Specification 0-30 V DC/1A IC-741 15KΩ. 1KΩ. i. So V1 must be nearly zero. No 1 2 3 4 5 6 Theory: i. we can write the branch currents Department of Electronics & Telecommunication .. for the large open loop gain the two inputs V1 and V2 must be nearly equal.2. In circuit V2 is connected with ground potential. V1=0 From figure. Aim: To study the OP-AMP based inverting and non inverting voltage amplifiers. it means that the inverting input V1 is essentially be zero volts.Analog Electronics-II Laboratory Model Journal Experiment No. but it does not provide a current path to ground. Inverting Amplifier Inverting amplifier is one of the most basic amplifier circuits. One advantage of this inverting amplifier is that its voltage gain equals the ratio of the feedback resistance to the input resistance.2 KΩ 3 MHz 2 channel/30 MHZ Quantity 1 1 1 1 1 1 We know that the operational amplifier has very large open loop gain A.e. Here the inverting terminal input V1 is said to be virtual ground. 10KΩ. 8 Objective: To study the OP-Amp based voltage amplifiers. Apparatus Required: Sr.

the current i1 must flow through resistor R2. In inverting amplifier if the input voltage is +ve the output must be –ve. As we discussed previously in inverting amplifier. i. the current i2 must flow back into op-amp. Thus. And also note that if the output terminal V0 is open-circuited. Here the input signal V1 is directly applied to the +ve terminal and the other terminal connected to ground through resistor R1. Such a Department of Electronics & Telecommunication . ii. i1=i2 From this. It always depends on the input resistor R1 because op-amp input V1 is virtually ground.e. because op-amp input V1 is virtually ground. we can say that the inverting amplifier closed loop gain is not dependant on transistor parameters. Here the output does not depend on the current i2 and load resistance (feedback resistance R2).. Non-Inverting Amplifier Non-inverting amplifier is another basic op-amp circuit. And the minus sign implies the phase reversal of inverting amplifier. V2=0 and i1=i2=V1/R1. It is the function of the ratio of feedback resistor and input resistor.Analog Electronics-II Laboratory Model Journal assume current in the op-amp is zero. high input impedance and low output impedance. The main advantage of this circuit is stable voltage gain. in this circuit the negative feedback connection forces the terminal voltage V1 and V2 to be equal.

there is no current flow into the input terminals. it means the voltage difference between V1 and V2 is nearly zero. we can write i1=i2 { } * + we can say that the gain of non-inverting amplifier is always greater than unity and the output is in phase with input. Here by using this virtual short concept. Department of Electronics & Telecommunication . V1=Vi and the branch current i1 is given by Branch current i2 is given by By the virtual short. Assume. the ideal non inverting amplifier is analyzed as follows.e..Analog Electronics-II Laboratory Model Journal condition is referred as virtually short. Since V1=V2 i. And also note that the input impedance is very large and the input current is zero because the input signal V1 is connected directly to the non-inverting terminal.

Select the new value of RF and measured the gain again and record the observations. Result: Sr. Repeat the same procedure from step-1 to step-6 also for inverting amplifier circuit. It was observed that the gain of amplifier depends on feedback resistor (RF). Apply DC voltage of ± 15V. 5. Amplifier Value of Feedback resistor (RF) 10 KΩ 15 KΩ 10 KΩ 15 KΩ Voltage gain Theoretical Value Voltage Gain Practical Value Non Inverting Amplifier Inverting Amplifier Conclusion: Hence we have studied the op-amp based inverting and non-inverting voltage amplifier circuits and measure its voltage gain. The output of inverting amplifier is out of phase by 180° while output of non-inverting amplifier is in phase. 1. 2. 7. Compute the gain of non inverting amplifier and compare it with theoretical reading. 200 mVpp from function generator.Analog Electronics-II Laboratory Model Journal Procedure: 1. Theoretical and practical values are not same due the following reasons: Department of Electronics & Telecommunication . 6. Connect the input sine wave of 1 KHz. 3. No. Observe the output waveform and verify that output is in phase with the input. 2. Mount the circuit as per circuit diagram on breadboard. 4.

Analog Electronics-II Laboratory Model Journal i. Design the op-amp circuit which can give the output as VO = 2V1+4V2-V3 5. ii. Explain the working of op amp non inverting amplifier with derivation of voltage gain. Human Error Resistance tolerance.Derive the expression for voltage gain of inverting amplifier 12. 4.Derive the expression for voltage gain of non inverting amplifier Department of Electronics & Telecommunication . Explain the virtual ground concept 10. iv. 6. Instrumental Error. Aging of components. 2. 8. Draw the block diagram of a typical Op-amp and explain the function of each block. Questionnaire 1. Find the output voltage for a difference amplifier 7. List the application of Op-amp 9. 3. List the ideal characteristics of Op-amp. Explain the working of op amp inverting amplifier with derivation of voltage gain. iii.Explain the role of feedback resistance in inverting and non inverting amplifier 11. Compare active filter and passive filter.

Differentiator Differentiator is a circuit that performs a mathematical calculus operation called differentiation and that produces an output voltage proportional to the instantaneous rate of change of the input voltage. An integrator circuit includes an op-amp. No 1 2 3 4 5 6 7 Theory: i. 1K Ω 0.47µf.Analog Electronics-II Laboratory Model Journal Experiment No. 9 Objective: To study and analyze the application of OP-Amp.0. Integrator An integrator is a circuit that performs a mathematical operation called integration and is producing a sine or cosine or ramp of output voltage which is a linearly decreasing or increasing voltage.01µf. In the differentiator circuit resistor and capacitor is used along with the op-amp to obtained differentiating amplifier. the feedback Department of Electronics & Telecommunication . This is also called as miller integrator. Apparatus Required: Sr. Aim: To study the OP-AMP based practical integrator and differentiator circuits. ii. 0.47µf 3 MHz 2 channel/30 MHZ Quantity 1 1 1 1 1 1 1 Thus. the output voltage of differentiator is equal to RC time instantaneous rate of change of input voltage with respect to time. The output of differentiator is given by: Instruments Breadboard Power supply OP-AMP Resistors Capacitors Function generator CRO Specification 0-30 V DC/1A IC-741 10 KΩ.

2 Vpp from function generator. 2. Apply DC voltage of ± 15V. Result: Sr. and RC is called a time constant of integrator. 4. Mount the circuit as per circuit diagram on breadboard. 5. Connect CRO in dual trace mode in order to observe both input and output waveform. Observe the output waveform on CRO.Analog Electronics-II Laboratory Model Journal component resistor is replaced by capacitor. Circuit Type Differentiator Integrator Input Waveform Type Square wave Triangular wave Square wave Triangular wave Output Waveform Peak Voltage Type & Phase Shift Department of Electronics & Telecommunication . Connect the input square wave of 1 KHz. Procedure: 1. No. 6. 2. Repeat the same procedure from step-1 to step-5 for the integrator circuit and observe the input and output waveform on CRO screen. 1. Switch the function generator to triangular waveform mode of 2 Vpp at 1 KHz. 3. The output of integrator is given by: ∫ ( ) Where Vin(0) is the integration constant.

iii. Human Error Resistance tolerance. Questionnaire 1. 2. 3. 5. Draw the circuit of basic differentiator using op-amp. iv. ii. Draw the circuit of basic integrator using op-amp. Give the difference in frequency response of integrator and Low-pass filter. Explain the disadvantages of basic differentiator circuit. What are the practical applications of integrator and differentiator circuits? Department of Electronics & Telecommunication .Analog Electronics-II Laboratory Model Journal Conclusion: Hence we have studied the op-amp based practical differentiator and integrator circuit. Theoretical and practical values are not same due the following reasons: i. Draw and explain the circuit of practical differentiator 9. It was observed that the output of differentiator and integrator is out of phase by 90°. The output of differentiator and integrator is observed for the input triangular and square waveform. 7. List the ideal characteristics of Op-amp. Draw and explain the circuit of practical integrator 8. Explain the disadvantages of basic integrator circuit. Find the expression for the output voltage. Instrumental Error. 4. 6. Find the expression for the output voltage. Aging of components.

Apparatus Required: Sr. depending upon the values of control element is adjusted in order to maintain output voltage. It is called as pass transistor because total current to be regulated passes through it. 10 Objective: To study the performance of regulated power supply. No 1 2 3 4 5 6 Theory: i.Analog Electronics-II Laboratory Model Journal Experiment No. In this set up the transistor behaves like a variable resistor whose resistance is determined by the base current. Aim: To study series and shunt voltage regulators. Series Regulator Instruments Breadboard Power supply Zener Diode Power BJT Resistors Multi-meter Specification 0-30 V DC/1A 6V 100 Ω. Shunt Regulator The zener regulator circuit is modified to obtain the transistor shunt. ransistor act as a shunt control element. The output voltage is given by: Vo = Vz + VBE Department of Electronics & Telecommunication . The sampling network produces feedback voltage which is proportional to the output voltage. The expression for output voltage is given by: Vo = Vin – Vs Vs is the voltage drop across control element.220 Ω Quantity 1 1 1 1 1 1 Series regulator circuit is also known as emitter-follower regulator because the voltage at the emitter follows the base voltage. ii.

Measure the output voltage across RL by using multi-meter.Analog Electronics-II Laboratory Model Journal If the output voltage decreases due to any reason then (Vz + V BE) will also decrease. Input is connected to dc source that is varied form 7V to 15V. the exactly opposite action will take place to regulate output voltage. iii. Better regulation is obtained by zener regulation this is because due to presence of transistor. Theoretical and practical values are not same due the following reasons: i. it is possible to provide temperature compensation without additional circuitry. 5. 1. Result: Sr. 6. Parameters Series Regulator Shunt Regulator Theoretical Value (Sv) Practical Value (Sv) Conclusion: Hence we have studied the series and shunt regulator. Mount the circuit as per circuit diagram on breadboard. Repeat the same procedure for series regulator circuit. the variation in Iz is small. Input is applied across 100 ohm resistor. But VZ is constant so more current will flow through load and will increase. Instrumental Error. 2. Aging of components. Plot the graph and calculate % regulation and line regulation. 3. ii. iv. Procedure: 1. If output voltage increases. 4. No. Human Error Resistance tolerance. 2. Department of Electronics & Telecommunication .

Draw the circuit diagram of shunt regulator. What is load regulation and line regulation? 6. 7. Derive the expression of output impedance and line regulation. 4. What is the application of regulator? 3. Compare series and shunt regulator circuits using BJT. 8. 5. Describe the operation of BJT series regulator and derive the expression for line regulation and load regulation. What are voltage regulators? 2. What are the practical applications of Voltage regulators? Department of Electronics & Telecommunication . Draw the circuit diagram of series regulator. Derive the expression of output impedance and line regulation.Analog Electronics-II Laboratory Model Journal Questionnaire 1.