University of Stuttgart Institute of Industrial Automation and Software Engineering

Prof. Dr.-Ing. Dr. h. c. P. Göhner

30.05.2014

Master Thesis

Himanshu Kevadiya

2576 MT

Design of Multi-core Application with TwinCAT 3 and Real-time Linux

Supervisor: Prof. Dr.-Ing. Dr. h. c. Peter Göhner Prof. Dr.-Ing.Michael Weyrich Dipl.-Ing. Michael Abel (ISW–Universität Stuttgart)

.........................................................................................................................................4................................5.................................................................................................................................................. 21 2................... 9 2.i Table of Contents Table of Figures ................... 10 Operating Systems ...............................................................................................................................4....... 22 2........................................................................... 9 Multi-core Processor.......................................................................................... iii Abbreviations................................................................................................................................ iv Terminology ...........2 Scheduling .......3 Extended Automation Runtime ................. 12 2........ 26 ...............................5.........4 State of the current Research ................................................................................................5......................................................................................................1 Extended Automation Architecture ..................................4................................................3 2... 24 Literature Formatvorlage Ü1Ohne Nummer (aber im Verzeichnis) ...................................... ii Table of Tables .................................................................5 Introduction to TwinCAT 3 ................................................................................... 16 2......................... 9 Introduction to Application Model ............1 2.......1 Processes and Threads .................................................................................................................... v Zusammenfassung ...........4 Memory Management ...................... vi Abstract .....................................................5........................................................................................2 2........................................................3 Synchronization ......... 23 2.................... 12 2... 22 2........................................................................................................................................................ vii 1 2 Introduction ..............................................2 Extended Automation Engineering ...4........... 13 2........................................................................................................... 8 State of the Art and Basics .4 Extended Automation Performance ....................................................................................... 16 2..

.......................................11: Memory Segmetation ..........................................................................................................8: Dynamic Partitioning ....16 Extended Automation Runtime .............9: Memory Paging ............................................12 Finding a Segment in Memory ............................................................................................................ 24 ...............3: Multi-core Processor .................................................4: Parallelism on Multi-core Processor................................................ 17 Figure 2........................... 11 Figure 2................................ 20 Figure 2..............................................................................................................13 Page Fault and Address-Translation Scheme ............................... 13 Figure 2............................. 10 Figure 2................................................................................................ 21 Figure 2......................15: TwinCAT Extended Automation Runtime ............................................................. 11 Figure 2............................... 10 Figure 2...... 23 Figure 2....................................................................................6: Processes and Threads ..............................................................1: Application Model ...........................................................................14: TwinCAT extended Automation Architecture ... 22 Figure 2..... 18 Figure 2....................... 20 Figure 2................5: Operating System Placement .. 19 Figure 2.....................................................................17: Extended Automation Multi-core Performance .........7: Fixed Partitioning of 64-MB Memory.............. 19 Figure 2.. 12 Figure 2...........................................................................2: Submodel Operations ...................10: Memory Paging .............................ii Table of Figures Figure 2......................................................... 23 Figure 2...............................

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iv Abbreviations FCFS CNC I/O VS CPU PC PTP NC OS MS EDF RMS RAM MB LRU PLC First Come First Serve Computer Numerical Control Input Output Visual Studio Central Processing Unit Personal Computer Point to Point Numeric Control Operating Systems Microseconds Earliest Deadline First Rate Monotonic Scheduling Random Access Memory Mega Byte Least Recently Used .

v Terminology Aktor Einheit zur Umsetzung von Stellinformation tragenden Signalen geringer Leistung in leistungsbehaftete Signale einer zur Prozessbeeinflussung notwendigen Energieform Synchronization Internal fragmentation .

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vii Abstract Übersetzung der Zusammenfassung Formatvorlage: Textkörper .

8 1 Introduction .

Figure 2. Calculated data are written to and data is read from these signal locations. multiplier etc. Application and simulation tasks can be distributed among several CPUs to take full advantage of the multi-core platform in TwinCAT 3. Application model has multiple submodels like rectangular signal generator. with cycle time of 1ms.2 Introduction to Application Model To take full advantage multi-core core platform based real-time systems. . Theoretical analysis shows that. Beckhoff Automation GmbH introduced a PC-based automation Technology in the form of TwinCAT 3 automation suite [beck21]. all the three operations of each submodel are executed in the 10s or 100s of microseconds depending on the number of other operating systems task running at that moment.9 2 State of the Art and Basics This chapter illustrates the state of current research of multi-core simulation with TwinCAT and real-time Linux. TwinCAT 3 supports real-time capabilities. A detailed discussion about the execution concept of application model is discussed under the chapter-4 conception. execution load and latencies of the tasks to compare with realtime Linux. The system performance with real-time Linux is considerably efficient and optimum. Sig2. adder adds two signals.2. Submodels perform three operations as shown in figure 2. These operations are repeated cyclically. Rectangular signal generator generates a rectangular signal with specific cycle period and writes it to a memory location known as signal2. A detailed explanation on fundamentals of operating systems real time Linux and TwinCAT 3 is illustrated. Initially it writes data to signals by executing write data operation. integrator. then data is executed in execute data operation and at last new state of the submodel is calculated in calculate new state operation. another possibility of the sequence of operation can also be like the operation execute data is performed first and then calculate new state and at last write data operation. Moreover. no research has been done to analyze system behavior. an application model is designed with multiple operations. As far as real-time applications are concerned on multi-core platform.1 State of the current Research Real-time simulation needs to perform computations in available time slot. Simulations are already being performed with real-time Linux on multi-core platform. 2.1 shows the application model with several submodels. integrator integrates the signal and multiplier multiplies the two signals. adder. The terms CPU and core are used interchangeably throughout the discussion. Several submodels are created like this in a final model two take the advantage of multi-core based real-time system. In the same way. 2. sig3 and so on are the memory locations in global memory.

Hence. On a single core processor.3 Multi-core Processor Processor is a unit or component in an operating system that read the program instructions and executes them. In real-time simulation.1: Application Model Figure 2. single core processor cannot be speed up above certain frequencies. multi-core processors are used. there is a specific time slot available in which number of instructions/tasks must be executed.2: Submodel Operations 2.10 Figure 2. Multi-core processor is a processor with multiple cores. only one instruction can be executed at a time that is known as uniprogramming. Also. . because of heat up of the chip in a processor and transmission delays.

11 Figure 2.3[mcore21] shows a multi-core based processor with 4 cores. Depending on the processor type.3: Multi-core Processor Figure 2. Several factors need to be considered while designing a multi-core based program like data dependencies. there are varied number cores available on a processor. synchronization and several other factors of parallel programming that will be . Multiple tasks/threads can be executed on different cores at the same time that is known as multi-programming.4: Parallelism on Multi-core Processor Figure 2.

keyboard and other peripherals as per the application software. the operating system concepts like processes and threads. only one thread can be executed at a time and hence task1 to task4 are executed sequentially and that can consume many number of CPU cycles. Examples of process are www-browser.5. Global memory is shared among all the cores as shown. all the tasks can be executed.1 Processes and Threads Process is a program in execution. Hence multi-core processor is used for the time-critical tasks. user requests and other application software cannot interact with hardware and computer system becomes meaningless. scheduling. Each core in Figure 2. Operating system allocates processor. Figure 2. OS kernel. four cores executing task1 to task4 and as can be seen. user requests etc. On single-core processor. memory management etc are discussed.12 discussed in chapter 3.4. synchronization between different processes. watch for processor utilization . Interprocess communication. device drivers. Operating system manages hardware devices such as monitor. Operating system manages the processes. mouse. in a short duration of time with less number of cycles as compared to single-core processor. operating system acts as an interface between application software and hardware of the system. I/O modules. Figure 2. On the other hand on a multi-core processor system. 2.4 Operating Systems Operating system is a program that interacts directly with computer hardware to provide computer functionalities and services. main memory. In this section. synchronization. Without operating systems.4[mcore22] shows execution of tasks on a single-core processor and multi-core processor. OS shell etc. As shown in Figure 2. Other off-chip components and I/O devices can be connected using bus interface.5: Operating System Placement 2. Process scheduling mechanism.3 is having its own individual memory. timers etc to process.

operating system shields processes from interfering with other resources.4. Moreover.13 and many other mechanisms of a process are managed by operating system. Thread is a unit of dispatching.2 Scheduling Resource constraint is the main reason because of which operating system selects only one process in ready state for the execution on a single core system. A process has minimum one thread. data. This concept is known as scheduling. Figure 2. Threads are lightweight processes. stack and context that are saved when thread is not running. stack and attribute. 2. Threads have access to the memory and resources of its process. Once resource is allocated. In this section. all the threads under same process share memory and resources of a process. Multiple threads within a single process is known as multithreading.5 shows that it is possible to have multiple threads per process. Therefore multiple threads can be distributed among several processor cores and independent tasks can be executed in parallel to support parallel programming. real-time scheduling and multiprocessor scheduling are discussed. .6: Processes and Threads Figure 2. Communication between threads does not involve kernel. Thread has an execution state. Therefore it requires less time to create and terminate a thread than a process and also switch between two threads within the same process is fast. Process has resource ownership that is virtual address space to hold the process image of program. uniprocessor scheduling. Figure 2.6[OS22] shows one thread per process that is known as single threading.

2. fast context switch and calculation of priorities.    CPU utilization – to keep CPU as busy as possible.4.2. Schedular efficiency – to keep minimum overhead. Fairness – execution as per the priorities of the processes and to avoid starvation.2 Real-time Scheduling When the correctness of result of a system is dependent on functional as well as timethat the result is delivered is known as real-time systems. processes must be scheduled as per the time requirements otherwise the delivered result may be not useful. Some of the priority scheduling methods are highest response ratio next and fair-share scheduling.1 Uniprocessor Scheduling Operating systems allocates resources to a process for execution based on scheduling criteria and optimization goals as described below. Turnaround time – to minimize the total time taken by a process for execution including all the waiting time. That is to minimize total time taken for execution and waiting time in ready queue. In priority scgeduling method. first incoming task is executed first followed by the tasks ub the ready queue.14 2.4. process with heighest priority is allowed to be executed first.  Scheduling Methods Operating system schedules the the process to run based on the scheduling method. . To maximize number of processes that complete their execution per unit time that is to increase the throughput. Time constraints in real-time scheduling may be hard or soft depending on requirement. Response time – to minimize the amount to time from submission of request until the first response. Round-Robin is advanced version of FCFS as it allows a process to run only for a specified time slice or quantum. Shortest process first scheduling method allows process with shortest execution first. operating system can may interrupt the currently running process and move it to the ready state.In this mode.2. It is a not-preemptive scheduling method. There are several scheduling methods and some of them are described here. It is non-preemptive scheduling method. As the name suggests.  Preemptive . Non-preemptive – Operating system cannot interrupt running process until it finishes its execution or blocks itself for I/O. The advantage in this mode is that a single process cannot monopolize the processor for very long. First-Come-First-Serve (FCFS) scheduling method is the simple and easy to implement. In real-time scheduling. Premeption is based on quantum that is generally 10-100 ms.    Decision Mode Decision modes for the scheduling are of two types.

system can not continue to function. It is optimal for static assignment of priorities on uniprocessor platform. it is executed faster because first level cache preserves locality. In the same way. Safety critical are the systems in which serious damage or loss of life may happen. Gang scheduling uses concept of pre-processor ready queues to assign threads to a particular processor. Earliest Dealine First . Load sharing uses global ready queues concept for the migration of process/threads dynamically. Hard constraints – Single time failure makes the computation results useless.2. a task with earliest deadline is scheduled first. online ticket reservation system is the example of soft constrains of real-time systems. Highest priority of a task is defined by deadline. Non crotical system functions with limited performance. For example. Whenever a process is assigned to the same processor. In EDF. T is the time period of the task. Rate Monotonic Scheduling – RM schedules tasks with shortest period first. a process is permanenetaly assigned to a processor. if some frames are missed then it does not entirely affect the result but affects the video streaming continuation. if there is a single process running on multi-processor system then it adds process migration time because of no availability of locality of cache and hence inefficient design may result in bottleneck.  A process is said to be schedulabe on a real-time system with one processor if processor utilization does not exceed 1 as mentioned in following criteria: Where m stands for number of periodic tasks. 2. However the disadvantage is there may be an idle processor while another processor has a backlog. however this may reduce the usefulness of the computation. in video streaming.4. In per-processor ready-queues. C is the computation time of the task.15  Soft constraints – Single time failure may be accepted. However. a process can be assigned to any available processor. There are several other methods available for the real-time scheduling. Complex design issues need to be addressed to achieve multi-processor scheduling.EDF is a method of real-time scheduling. It is optimal for dynamic set of prioroties on uniprocessor platform.3 Multi-processor Scheduling Schduling of tasks on a system with multiple processor cores sharing full or limited access to a common RAM is known as multi-processor scheduling. . In global ready queues. In critical real-time systems.

Requirements for memory management are   Relocation . ideal memory is large. Synchronization barriers are the functions that can be used that act as a barrier for all the threads/processes to wait for one another at the barrier. Moreoften. In the same way mutex variables and condition variables are used to ensure synchronization. mutex variables. shared memory and to ensure consistency is called as Synchronization. locks. Generally.4.3 Synchronization Many processes/threads interact via shared memory or message passing.4. condition variables.4.2 Synchronization Concepts There are various concepts to achieve synchronization. result of interactions is not guaranteed to be deterministic. synchronization barriers etc.4. 2. Cache is a small. Access to the critical section must be an atomic action. message passing. Synchronization concept should ensure that never two processes are allowed to execute in theis critical section at the same time. Operation V(S) increases the value of semaphore variable S by one and operation P(S) decreases the samphore variable value S by one. each process has a code segment known as critical section in which shared data is excessed. A coordination mechnisam between multiple processes/threads to access the data structures. There are two operations V(S) and P(S). processes write to the same addresses concurrently. The sequence of operations should be used in processes in such a way that synchronization is achieved. Solution to critical-section problem is mutual exclusion.3. Once all the processes/threads arrive at the barrier then execution continues. Semaphores are the signal variables that can take 0 or positive integer value. 2.16 2. When only one process is allowed to execute in its critical section is known as mutual exclusion.4 Memory Management In software development.3. fast and non volatile. Main memory is of medium size and speed whereas disk storage is of gigabytes with slow transfer of data and low price. .Access to the physical memory should be restricted bseed on requirement. 2. Popular concepts are using semaphore.1 Mutual Exclusion (Critical-Section) Problem When multiple processes compete to use some shared data or resources then concept of mutual exclusion needs to be addressed. fast and expensive memory. Another criterion that should be satisfied is no process can be prevented forever from entering critical-section. Hence final result depends on the order of the operations. Protection . In this kind os situation.Change of physical placement of a process.

Fixed Partition Any program occupies entire partition of memory irrespective of its size is fixed partitionning. there can be small segments of memory that can not be sufficient enough for the biger size programs even if total free memory is more than the site of programs. danymic partitioning introduces the problem of external fragmentation. Because of this internal fragmentation occurs.4.1 Memory allocation schemes This section discusses memory allocation schemes such as fixed partitioning. paging and segmentation.17    Sharing – Allow processes to share memory location based on requirement.7[OS23] to solve the problem of internal fragmentation in fixed partitioning. It is clearly observed that allocated memory can be larger than the requested memory and that can not be utilized by other processes.7 shows fixed partitioning of entire 64 MB size memory with operating systems taking 8MB. Memory manager must use compaction to shift the processes for defragmentation. Physical Organization . dynamic prtitioning. Figure 2. Figure 2. However. 2.Support to efficient utilization of hardware.Support to organize the computer programs.4. . Because of this.7: Fixed Partitioning of 64-MB Memory Dynamic Partition Dynamic partitioning allocats as much memory as required by the process as in Figure 2. Logical organization .

each process is divided into the same size pages or chunks as indiacted in Figure 2.18 Figure 2.10. . entire memory is partioned into small equal-size frames. C and D is shown in figure 2. In paging. There is alos two-level paging mechanism to obtain large linear address space without having to buy more physical address. processs A and B are already loaded and then process C is loaded. Program references to a memory more than one time. Also. Process B is swap out. In this way. Loading of the process D with higer memory requirement occupies emptied memory of process B plus available memory after process C. Allocation of frames for process A. Operating system maintains page table for each process that contains frame location for each page in the process and memory address that is page number and offset within page.8: Dynamic Partitioning Paging External fragmentation is solved by the paging of memory. B. In the second setp.9. In first step. it prevents external fragmentation. Program contains virtual address that is translated into physical address with the help of paging mechanism.

virtuall address in a program contains segment number and segment offset. Basically.11. With the help of segment number.10: Memory Paging Segmentation Segmentation is a memory management scheme that supports user view of memory/program that is a collection of segments.19 Figure 2. . procedure. function.9: Memory Paging Figure 2. Figure 2. local and global variable. Thus segmentation allows breaking of data and programs into logically independent address spaces and to aid sharing and protection. stack etc as in Figure 2. common block. A segment is a logical unit such as main program. segment table gives length and base to calculate final segment in the main memory. Another advantage of segmentation is that the tables whose size fluctuates can be accommodated easily.12 illustrates how segmentation mechanism finds a segment in mai memory. Total address space can exceed the size of physical memory.

4. The protion of memory that is in main memory is known as Resident set. Generally. operating system brings a few pieces of the program into main memory.4.11: Memory Segmetation Figure 2.12 Finding a Segment in Memory 2. .2 Virtual Memory Memory management mechnisam that is virtual memory maps virtual addresses into physical addresses present in main memory.20 Figure 2.

PLC programming and link to Matlab/Simulink. Here. 2. During address translation. Some of the features of TwinCAT 3 are discussed here in detail as following. As shown in Figure 2. It supports modular and flexible software architecture for the effiecient engineering.13. Generally oftern used page is not choosen for replacement as probability of bringning it back is higher. TwinCAT 3 also supports multi-core applications and 64-bit systems. After this the instruction is restarted. OS place the process in blocking state and issues a disk I/O request. LRU replacement algorithm which results in minimum number of page faults. whenever page fault interrupts OS then OS must get empty frame. if valid-invalid bit in page table entry is 0 then page fault interrupts to OS. All kind of control applications can be realized with TwinCAT 3. And then another process is dispatched. PLC etc. 1 if page is in memory and 0 if page is not in memory. It is integrated into Visual Studio to provide one software programming and configuration tool.5 Introduction to TwinCAT 3 TwinCAT 3 is a PC-based automation control technology introduced by Beckhoff Automation. . page fault forces to remove the page or to make room for incoming page. It supports multiple programming languages like C/C++ for real-time applications. In such case. Figure 2. TwinCAT 3 is used to turn a PC-based system into real-time control system with multiple NC.21 Whenever an address that is needed is not in the main memory.13 Page Fault and Address-Translation Scheme Some page replacement stratagies such as FIFO replacement algorithm. With each page-table entry a valid-invalid bit is associated. Swape in that page into the frame and reset the validation bit in tables. CNC. optimal replacement algorithm. page-fault interrupt is generated.

As shown. TwinCAT 3 has its own real-time kernel that supports real-time capabilities to give higher priority to real-time tasks. The generated modules can be linked to rich set of toolboxes of Matlab/Simulink. .14: TwinCAT extended Automation Architecture 2. it also supports to modules from different programming envirionment and provides capabilities of linkage to Matlab/Simulink. building of control circuits. Non-real time and real-time obect oriented programming makes it easy to use under single platform.22 2.2 Extended Automation Engineering TwinCAT 3 engineering environment is based on visual studio that supports third party programming tools.14[beck22].15[beck22]. The various modules in this environment can exchange information and can call each other independent in which programming language they are written. simulation and optimization of modules. This feature advantages of automatic code generation. Therefore it is an extended automation engineering technology as can be seen in Figure 2. With support to 32/64 bit windows environment. watch lists and call stacks. Figure 2.5.5.1 Extended Automation Architecture TwinCAT 3 supports extended automation architecture as shown in Figure 2. TwinCAT 3 is completely integrated into visual studio to take advantage of well-known system manager for configuration and usage of different programming languages as mentioned earlier. It provides extended support for debugging of C++ programs that run in real-time with use of breakpoints.

15: TwinCAT Extended Automation Runtime 2.3 Extended Automation Runtime Figure 2.5.23 Figure 2.16 Extended Automation Runtime .

there are multiple cores those can be associated to different tasks in TwinCAT 3. 2.16[beck22].4 Extended Automation Performance Multi-core support with real-time capabilities makes TwinCAT 3 a useful PC-based automation tool. real-time tasks call the the generated modules cyclically and other modules can be called from these associated modules. As shown in Figure 2. Each task running on different core makes the tool ideal for complete utilization of available resources. Another advantage is that the generated modules from different programming environment can be compiled with different compilers and can be completely independent of one another.17[beck22]. As in Figure 2. Hence it gives all the advantages of parallel execution for better performance.5.17: Extended Automation Multi-core Performance 2.6 Real-time Linux .24 Extended runtime support is provided in TwinCAT 3. Figure 2.

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beckhoff.html Beckhoff Automation: http://download.beckhoff. Louis: http://www.uk/Dave/C/node29.cs.com/index.htm Washington University in St.html .cse. Ring00b [beck21] [beck22] Beckhoff Automation: http://www.26 Literature Formatvorlage Ü1Ohne Nummer (aber im Verzeichnis) 1 Autor: 2 Autoren: 3 Autoren: 4 Autoren: >4 Autoren: mehr als eine Veröffentlichung pro Jahr 4 Buchstaben Name Jahreszahl 2 Stellen: Ring00 2 Buchstaben pro Name Jahreszahl 2 Stellen: RiFl00 erster Buchstabe pro Name Jahreszahl 2 Stellen: RFD00 erster Buchstabe pro Name Jahreszahl 2 Stellen: RFDB00 erster Buchstabe der ersten 3 Namen „+“ Jahreszahl 2 Stellen: RFD+00 Ring00a.com/english.pdf Cardiff School of Computer Science & Informatics: http://www.edu.html University of Western Australia: http://undergraduate.au/units/CITS1002/lectures/lecture14/06.wustl.beckhoff.cf.com/download/document/catalog/Beckhoff_TwinCAT3_ 042012_e.asp?twincat/twincat-3.ac.edu/~jain/cse567-11/ftp/multcore.pdf [beck03] [mcore21] [OS22] [OS23] Beckhoff Automation: http://infosys.uwa.csse.

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