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QUESTIONS UNITI 1. Explain the CS stage with Resistive load and Diode connected load and also explain the small signal equivalent circuit. 2. Explain the CS stage with current source load, source degeneration and Triode load. 3. Discuss on MOS folded Cascode and MOS active Cascode operational amplifiers 4. With a neat sketch and explain the NMOS Cascode amplifier. 5. Derive the voltage gain equation for source follower using NMOS transistor. 6. Construct common gate stage and derive the voltage gain equation for CG. 7. Derive the equation of source follower input impedance. 8. With necessary diagrams, derive the equation for CMRR of differential amplifier with active load using FET 9. Draw and explain the differential amplifier with MOS loads and calculate its gain 10. Explain the single ended and differential operation. 11. Derive the equation of the small-signal differential voltage gain of Differential pair. 12. Calculate the voltage gain of the following circuits

13. Write a short note on body effect and channel length modulation. 14. Derive an expression for output resistance in CS stage with source degeneration. 15. In the circuit of fig , (W/L )1,2 ,3,4 = 50/0.5 and ISS =1mA . What is the small signal differential gain? For Vin,cm = 1.5 V what is the maxium allowable output swing?

16. Calculate the exact voltage gain of the circuit shown in below figure.

KNCET, TRICHY

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17. Calculate the output resistance (VX/IX) of the following circuits. Assume λ≠0 and γ≠0.

18. In the circuit of fig. ,all transistors have a (W/L ) of 50/0.5 and M 3 and M4 are to operate in deep triode region with an on resistance of 2 Kῼ, Assuming Id5 = 20 µA and λ = ϒ = 0. Calculate the input common mode level that yields such resistance. Sketch Vout1 and Vout2 as Vin1 and Vin2 vary differentially from 0 to VDD.

UNIT-II 1. Explain why Miller’s theorem cannot be applied to calculate the effect of the thermal noise of a floating resistor? 2. Explain the high-frequency model of a Cascode stage. 3. Derive the equations of the input impedance, output impedance and voltage gain of the common source stage. 4. Derive the equations of the input impedance, output impedance and voltage gain of source follower. 5. Construct common gate stage and derive the voltage gain equation for CG. 6. Explain the statistical characteristics of noise. 7. Write a short note on flicker noise. 8. Write a short note on equivalent input noise generators. 9. Find the maximum noise voltage that a single MOSFET can generate. 10. Find the maximum thermal noise voltage that the gate resistance of a single MOSFET can generate and For a NMOS current source; calculate the total thermal and 1/f noise in the drain current for a band from 1 KHz to 1 MHz 11. Explain types of noises and also give detail about noise in single stage amplifiers. 12. Describe the noises in integrated circuits. 13. Derive the expression of noise bandwidth. 14. Calculate the input referred thermal noise voltage and current in fig.. Assume λ = ϒ = 0

KNCET, TRICHY

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15.

Calculate the noise spectrum and the total noise power in Vout.

UNIT-III 1. Explain the four types of feedback topologies. 2. Explain about loading in voltage-voltage feedback and current voltage feedback and derive the voltage gain equation for both circuits. 3. Explain about loading in voltage-current feedback and current-current feedback. 4. Explain the noise in operational amplifiers. 5. Compare the performance of various op amp topologies. 6. Explain the following terms: (i) Gain (ii) Small and Large signal Bandwidth (iii) Output swing (iv) Noise 7. Explain the following terms: (i) Slew rate (ii) PSRR (iii) Unity gain buffer (iv) Gain boosting 8. Discuss about the Input range limitations and gain boosting. 9. The circuit of figure is designed for a nominal gain of 10. i.e., 1+R1/R2=10.Determine the minimum value of A1 for a gain error of 1%.

10. Calculate the gain of the transconductance amplifier shown in fig.

KNCET, TRICHY

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UNIT-IV 1. Construct the root locus and also draw the bode plot of loop gain for a one-pole system and two pole system. 2. Discuss about the need for compensation in op-amp. 3. A two-pole feedback system is designed such that |β H (ωp2)|=1 and | ωP1| << | ωP2|What is the phase margin? 4. Explain in detail Compensation of two-stage op amps. 5. Determine the pole location and bode plot of loop gain for telescopic op amp with single ended output. 6. Compare telescopic op amp with single ended output and fully differential telescopic op amp. What are advantages of fully differential telescopic op amp? 7. Explain about the Compensation technique using a source follower and a CG stage. 8. Explain the following terms (i) Barkhausen’s Criteria (ii) Phase Margin (iii)Gain cross over point (iv) Phase cross over point. 9. Draw the Bode plot of loop gain for unstable and stable systems and also draw the time-domain response of a system verses the position of poles.

KNCET, TRICHY

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UNIT-V 1. Write a short note on Cascode current mirrors. 2. Write a short note on active current mirrors. 3. Present and explain the principle and working of Wilson and widlar current source 4. Explain the large and small signal analysis of differential pair with active current mirror. 5. Prove that the current is independent of the supply voltage and how to eliminate body effect in supply independent biasing. 6. Explain the following terms: (i)Negative TC voltage (ii)Positive TC voltage (iii)Band gap Reference 7. Explain the generation of a PTAT current. 8. Write short notes on constant-Gm Biasing. 9. Calculate in the circuit of figure shown below.

10. The

circuit

of

figure

is

designed

with

(W/L)1-4=50/0.5,ID1=ID2=50µA,R1=1KΩ

and

R2=2KΩ.Assume ƛ=٧=0 and Q3 is identical to Q1 .(a)Determine n and(W/L)5such that Vout has a zero TC at room temperature .(b)Neglecting the noise contribution of Q1-Q3,Calculate the output thermal noise.

11. Consider the circuit of figure shown. Assume K=4,fCK=50MHz,and power budget of 1 mW. Determine the aspect ratio of M1-M4 and the value of CS such that gm1=1/(500Ω).

KNCET, TRICHY

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