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Tech I Semester Academic Dairy For COMPUTER ORGANIZATION

Faculty: Mrs. B. Ujwala

DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING II/IV CSE I SEM (2013-2014) COMPUTER ORGANIZATION UNIT-I Syllabus: Digital Logical Circuits & Components: Decoders, Multiplexers, Registers, Memory Unit. Data Representation: Arithmetic: Data types, and Compliments, subtraction, Fixed point and floating point representation, Error Detection codes. Computer Objectives: 1. To understand the basic components and digital logic circuits of computer. 2. To learn the data types, compliments, data representation and error detection codes in computer. 3. To learn the addition, subtraction, multiplication and division algorithms of fixed and floating point numbers. Lecture plan: S.No 1 2 3 4 5 6 7 8 9 Topic Decoders, Multiplexers Registers, Memory Unit. Data types, Compliments Fixed point and floating point representation Error Detection codes Addition and subtraction Multiplication algorithms Division algorithms Floating point arithmetic operations Total Date No. of lectures 1 1 1 1 1 1 2 2 2 12 Remarks addition multiplication algorithms, division algorithms, floating point arithmetic operations.

Assignment questions: 1. Convert the following numbers to the bases indicated. i. (7562)10 to octal ii. (175)8 to binary iii. (1938)10 to hexadecimal.

iv. (10101011)2 to decimal, octal and hexadecimal. 2. Explain error detection codes. 3. Draw flow chart for booths multiplication algorithm and multiply ( -15) and (-13) using Booths algorithm. 4. Draw the flow chart for floating point numbers multiplication and explain with an example. 5. Explain the algorithm for addition and subtraction of signed binary numbers. Case Study: Construct even parity generator and parity checker circuit for 4 bits of data. UNIT-II Syllabus: Register transfer and Micro operations: Register Transfer language, Register Transfer, Bus and memory transfers, Arithmetic, logic and shift Micro operations, arithmetical and logic shift unit. Basic Computer organization and Design: Instruction codes, computer Registers, computer Instructions, Timing and control, instruction cycle, memory reference instructions, inputoutput and interrupt, complete computer description, design of basic computer, design of accumulator logic.

Objectives: 1. To Understand Register Transfer Language, Bus and memory transfers. 2. To learn Arithmetic Micro operations, logic micro operations and shift micro operations. 3. To learn about Arithmetic logic shift unit. 4. To learn about Instruction codes, computer Instructions, and computer registers. 5. To understand the Instruction cycle, Timing and Control, memory reference instructions, inputoutput and interrupt. 6. To learn complete computer description, design of basic computer and design of accumulator logic.

Lecture plan: S.No 1 2 3 4 5 6 7 8 9 10 11 12 Topic Register Transfer Language , Bus and memory transfers Register Transfer Arithmetic Micro operations, logic micro operations Shift micro operations, Arithmetic logic shift unit Instruction codes. Computer Registers , Computer instructions. Timing and Control Instruction cycle Memory Reference Instructions Input Output and Interrupt Complete computer description. Design of basic computer Design of accumulator logic Total 1 1 1 1 1 11 Date No. of lectures 1 1 1 1 1 Remarks

Assignment questions: 1. Briefly explain about shift micro operations of computer system. 2. Explain Instruction cycle with flowchart and timing control. 3. List out all memory reference instructions. 4. Explain design of basic computer. Case Study: Study and analyze the shift operations and prepare a report when each and every shift operation is useful and explain why? UNIT III Syllabus: Programming the basic computer: Machine language, assembly language, assembler, example programs. Central processing unit: General Register organization, stack organization, instruction formats, addressing modes, Data transfer and manipulations, program control.

Objectives: 1. To learn different types of languages and translation of AL to ML. 2. To understand the functionality of Control unit. 3. To learn about Control memory and Address sequencing.

4. To learn design of Control unit (Hard wired control. Micro programmed control). 5. To understand General register and stack organization. 6. To learn different instruction formats, addressing modes, data transfer, data manipulation and program control instructions. Lecture Plan: S.No 1 2 3 4 5 6 7 8 Topic Machine language, assembly language, assembler Example programs General Register organization Stack organization Instruction formats Addressing modes Data transfer and manipulations program control Total Date No. of lectures 1 1 1 1 1 1 1 1 8 Remarks

Assignment questions: 1. What is an Assembler and explain its working. 2. Explain in how many ways Stack is organized in a Computer. 3. Explain different addressing modes in detail with an example. 4. Explain Data transfer and manipulations instructions. Case Study: How the operation X = (A + B) * (C + D) / (E+F) is performed using: a) Three address instruction b) Two address instruction c) One address instruction d) zero address instruction

UNIT-IV Syllabus: Micro-programmed control: Control memory, address sequencing, micro program Parallel processing, pipelining, arithmetic, instruction,

example, and design of control unit. Pipeline and Vector processing: RISC pipeline, vector processing. Objectives: 1. To understand the functionality of Control unit. 2. To learn about Control memory and Address sequencing. 3. To learn design of Control unit (Hard wired control. Micro programmed control) 4. To understand the concept of Parallel Processing and Pipelining. 5. To learn about Arithmetic Pipeline, Instruction Pipeline and RISC Pipeline. 6. To understand the Vector Processing. Lecture Plan: S.No 1 2 3 4 5 6 7 8 9 Topic MICRO PROGRAMMED CONTROL: Control memory Address sequencing micro program example Design of control unit Hard wired control. Micro programmed control Parallel Processing and pipelining Arithmetic Pipeline, Instruction Pipeline RISC Pipeline Vector Processing Total Date No. of Lectures 1 1 1 1 1 2 2 1 2 12 Remarks

Assignment questions: 1. Define pipelining and explain Instruction pipeline. 2. Explain how microprogram sequencer generates control signals with neat diagram. 3. Differentiate between Hard wired control unit and Micro programmed control. 4. Explain vector processing in detail.

Case Study: Explain the advantages of pipelined processor over non-pipelined processor. UNIT-V Syllabus: Input-output organization: Memory organization: Objectives: 1. To learn about basic peripheral devices and input-output interface. 2. To understand different modes of data transfer, priorities interrupts. 3. To learn how direct memory access takes place in a computer. 1. To understand the memory hierarchy and main memory. 2. To understand the cache memory and associative memory. 3. To learn the Virtual memory concept and Secondary storage. Lecture Plan: S.No 1 2 3 4 5 6 7 8 9 10 11 Topic Peripheral devices Input-output interfaces Asynchronous data transfer modes of transfer priority interrupts direct memory access Date No. of Lectures 1 1 1 1 1 1 1 1 1 1 1 Total 11 Remarks Peripheral devices, input-output interfaces, asynchronous

data transfer, modes of transfer, priority interrupts, direct memory access. Memory hierarchy, main memory, auxiliary memory, associative memory, cache memory, virtual memory.

Memory organization: Memory hierarchy, Main memory Auxiliary memory Associative memory Cache memory Virtual memory

Assignment questions: 1. Explain working of Direct Memory Access Controller. 2. (a) What is a virtual memory technique? Explain different virtual memory techniques (b) Explain Cache memory Mapping Techniques. (c) Give the detailed picture of Memory Hierarchy. 3. What is meant by asynchronous data transfer? Explain Strobe control and Handshaking methods. 4. Explain different modes of transfer. 5. (a) Explain Associative memory. (b) Explain in how many ways the interrupts are handled by CPU. Case Study: Study and analyze different types of memories (RAM, ROM, CACHE, Virtual and Secondary) and prepare a report on performance considerations (speed, access time).