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**Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”
**

Design of CMOS Analog

Integrated Circuits

Franco Maloberti

Current and Voltage Sources

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

2 4/

Current Mirrors

A current mirror gives a replica (if necessary, attenuated or amplified) of a

bias or signal current.

• Simple current mirror

• Wilson current mirror

• Improved Wilson Current Mirror

• Cascode current mirror

• Modified cascode current mirror

• The high compliance current mirror

• The regulated cascode current mirror

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

3 4/

Simple current mirror:

to simplify the calculation let

( ) ( )

1 DS

2

Th 1 GS

1

1 ref

V 1 V V

L

W

2

k

I I λ + −

,

_

¸

¸

· ·

( ) ( )

2 DS

2

Th 2 GS

2

2 out

V 1 V V

L

W

2

k

I I λ + −

,

_

¸

¸

· ·

2 GS 1 GS 1 DS

V V V · ·

( )

2 DS

1

2

ref out

V 1

L

W

L

W

I I λ +

,

_

¸

¸

,

_

¸

¸

⋅ ·

2 ds

out

out

r

I

1

r ·

λ

·

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

4 4/

Factors affecting the mirror accuracy:

• Channel length modulation ( )

• Threshold offset

• Parasitic resistances

• Imperfect geometrical matching and current mobility variation

• Technological parameter mismatch

if:

It can be improved by increasing the output resistance.

2 1

L

W

L

W

,

_

¸

¸

·

,

_

¸

¸

( )

( )

1 DS

2 DS

ref

out

V 1

V 1

I

I

λ +

λ +

·

λ

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

5 4/

The accuracy:

• The threshold mismatch is inversely proportional to the overdrive

• The threshold of the MOS transistors placed in close proximity are

matches within within few mV. By contrast, for MOS transistors which

are hundred of microns apart have threshold voltages that can differ

by few tens of mV.

• The last term refers to a mismatch in V

GS

. It can be derived from

resistive voltage drop. This is due to a parasitic resistance in series

with the source.

• The metal resistance is in the order of 20 -50 mΩ/ with 10 squares it

results in 0.2 - 0.5 Ω. If the current is 10 mA an equivalent offset of 2 -

5 mV.

• and are minimized with closed and centroid common

structures

• and depends on the lithographic proces

µ

δµ

ox

ox

C

C δ

W

W δ

L

L δ

2

Th GS

GS

2

Th GS

Th

2 2

ox

ox

2 2

2

out

out

V V

V

2

V V

V

2

C

C

L

L

W

W

I

I

,

_

¸

¸

−

δ

+

,

_

¸

¸

−

δ

+

,

_

¸

¸

µ

δµ

+

,

_

¸

¸

δ

+

,

_

¸

¸

δ

+

,

_

¸

¸

δ

·

,

_

¸

¸

δ

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

6 4/

• For a large W a good

strategy is to have W

not much larger than

L and to put equal

transistor in parallel

• The common centroid

structures achieves to

reduce the parasitic

capacitances.

1

1

]

1

¸

,

_

¸

¸

δ

+

,

_

¸

¸

δ

+ ⋅ ⋅ ⋅ ·

,

_

¸

¸

δ

2 2

2

out

out

L

L

W

W

n

1

I

I

I

ref

I

Out

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

7 4/

Wilson Current Mirror

Increases the output resistance.

• R

L

must be large

• There is a systematic error because V

DS1

= V

GS3

+ V

DS2

T 2 g 1 m 3 g 2 m x 3 s 2 g

r v g v g / i v v − · · ·

( ) ( )

1

]

1

¸

+ + + · − · ·

T 1 m

2 m

3 m

3 ds

2 m

out 3 ds 3 gs 3 m x

2 m

x

x

r g 1

g

g

1 r

g

1

r r v g i

g

i

v

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

8 4/

Example

Simulate with Spice the Wilson current mirror. Use the following

transistors’ sizing (in µ): M

1

: 50/1 M

3

: 100/1. Find the difference

between reference and generated current as a function of I

ref

in the

range 0 - 200 µ A.

As expected, the output current is less than the reference current.

Moreover, the difference is almost linear with the reference current and

has a slope around 1%.

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

9 4/

Improved Wilson Current Mirror

4 GS 2 DS 3 GS 1 DS

V V V V − + ·

4 GS 3 GS 2 DS 1 DS

V V if V V · ·

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

10 4/

Small signal equivalent analysis:

• The output swing in the Wilson and improved Wilson schemes is limited to

4 m L

4 m L

'

T 2 g 1 m 3 g

g R 1

g R

r V g V

+

− ·

( )

4 m L 1 ds

'

T

g 1 R r r + ·

4 m L

4 m L

'

T 1 m

2 m

3 m

3 ds out

g R 1

g R

r g

g

g

r r

+

≅

3 , sat 1 , sat n , Th 3 , sat 1 GS min , out

V V V V V V + + · + ·

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

11 4/

It increases the output resistance without loop feedback. It has the same

resistance of the cascode load.

• The output swing is limited to:

Cascode Current Mirror

( )

2 ds 3 m 3 ds out x 2 ds 3 m 3 ds x 2 ds x

r g r r i r g 1 r i r v ≅ + + ·

sat Th 3 sat 3 G min , out 3 GS 4 GS 1 GS 3 G

V 2 V V V V V V V V + ≈ + · − + ·

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

12 4/

• The function of the transistor M

4

is to shift the voltage V

DS1

of the amount

enough to bias te gate of M

3

without bringing M

2

out of saturation.

• The use of M

4

(matched with M

3

) allows to get V

DS1

= V

DS2

(this is paid with

the output swing limitation).

• The output swing is improved by the use of a level shift V

sat

< ∆V < V

Th

.

Modified Cascode Current Mirror

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

13 4/

The geometrical dimensions of M

1

,

M

6

, M

4

, M

5

determine, with V

ov,4

,

∆V.

5 ox

5 5

4 ox

4 4

5 GS 4 GS

W C

L I 2

W C

L I 2

V V V

µ

−

µ

· − · ∆

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

14 4/

• All transistors operate in saturation

I = I

1

= I

2

= I

3

= I

4

(current scaling is

possible)

β

1

= β

2

= β

3

= β

V

ov1

= V

ov2

= V

ov3

= V

ov

I

4

= β

4

(V

ov4

)

2

; I

2

= β (V

ov

)

2

; I

3

= β (V

ov

)

2

;

V

ov

= ∆V

V

DS2

= V

ov

V

GS3

= V

TH

+ V

ov

V

GS4

= V

TH

+ 2V

ov

V

ov4

= 2V

ov

Therefore β = 4 β

4

High - Compliance Current Mirror

4 3 2 1

L

W

4

L

W

L

W

L

W

,

_

¸

¸

·

,

_

¸

¸

·

,

_

¸

¸

·

,

_

¸

¸

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

15 4/

• Current gain:

Systematic error due to V

DS1

≠ V

DS2

Systematic error due to body effect on M

3

• Output swing: V

outmin

= 2V

DSsat

• Output impedance: r

out

= r

out4

g

m2

r

out2

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

16 4/

M

1

= M

2

; M

3

= M

4

Therefore I

out

= I

ref

To properly work, we must impose V

DSsatM4

> V

Th1

High - Compliance Current Mirror (II)

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

17 4/

• Output impedance:

R

out

= (g

m3

r

out3

) r

out2

(g

m4

r

out4

)

• Output swing:

V

outmin

= V

GS4

+ V

DSsat3

≈ V

Th

+ 2V

sat

Regulated - Cascode Current Mirror

(possible implementation)

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

18 4/

Most of the analog blocks

require a reference current.

The circuits in the figure

are supply dependent:

The accuracy of a generated current is:

• The global inaccuracy is around 32%

• The dependence on the bias becomes critical when supply lines are

affected by spur signals since the disturbance are transformed in current

spurs.

Current Reference

( )

2

L

L

2

1 GS DD

1 GS DD

2

f Re

f Re

R

R

V V

V V

I

,

_

¸

¸ δ

+

,

_

¸

¸

−

− δ

·

,

_

¸

¸

δ

L

1 GS DD

f Re

R

V V

I

−

·

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

19 4/

• Self biased (or bootstrapped) current reference

Two operating points. It is necessary to use

a start-up circuitry

( )

2

Th GS

1

2 1

V V

L

W

2

k

I I −

,

_

¸

¸

· ·

4 3

L

W

L

W

,

_

¸

¸

·

,

_

¸

¸

Th

1

1

1 GS 1 2

V

W

L

k

I 2

V RI RI +

,

_

¸

¸

· · ·

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

20 4/

• Self biased low current reference generator

• Assume M

3

= M

4

ideal mirror I

3

= I

4

• Assume V

Th1

= V

Th2

For k = 10, VR ≈ 60 mV if it is required

I = 1µA R = 60 kΩ

1 k

W

L

k

W

L

W

L

W

L

2 1

4

3

>

,

_

¸

¸

·

,

_

¸

¸

⋅

,

_

¸

¸

·

,

_

¸

¸

2

2 ox

2 2

1 ox

1 1

RI

W C

L I 2

W C

L I 2

+

µ

·

µ

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

21 4/

• V

T

-based reference generator

For p-well technology, a verticle npn transistor with the collector tied to VDD

is available (the complementary for n-well)

both V

T

and R have positive temperature coefficients

4 3

2

1

W

L

W

L

;

W

L

W

L

,

_

¸

¸

·

,

_

¸

¸

,

_

¸

¸

·

,

_

¸

¸

B A 2 1

V V ; I I I · · ·

SS

1

T 2 BE

SS

1

T 1 BE

nAI

I

ln V V ;

AI

I

ln V V · ·

1

SS

SS

1

T 2 BE 1 BE 1

I

nAI

AI

I

ln V V V RI · − ·

( ) n ln

R

V

I

T

·

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

22 4/

• V

BE

multiplier

• Threshold voltage difference

• Band gap

Voltage References

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

23 4/

• V

BE

-multiplier:

• V

BE

has a negative temperature coefficient

5 2 1

W

L

n

1

W

L

W

L

,

_

¸

¸

·

,

_

¸

¸

·

,

_

¸

¸

4 3

W

L

W

L

,

_

¸

¸

·

,

_

¸

¸

B A

V V ·

R

V

I

1 BE

·

BE DD DD out

nV V nRI V V − · − ·

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

24 4/

• Threshold voltage difference

M

1

and M

2

have different threshold (enhancement and depletion or

enhancement and enhancement)

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

25 4/

• Band gap voltage reference:

In order to have a reference voltage with zero temperature coefficient (in a

defined temperature range) it is necessary to:

• V

BE

has a negative temperature coefficient (-2.2 mV/°C at 300 K)

• V

T

has a positive temperature coefficient (+0.086 mV/°C at 300 K)

m ≈ 25.6

T BE ref

mV V V + ·

F. Maloberti : Design of CMOS Analog Integrated Circuits - “Current and Voltages Sources”

26 4/

For a p-well process:

2 3

1 S

2 S

2

1

T BE

I R

I

I

I

I

ln V V · · ∆

2 Q

1 Q

2 S

1 S

2

1

2

1

A

A

I

I

;

L

W

L

W

I

I

·

,

_

¸

¸

,

_

¸

¸

·

· ∆ − − · − ·

BE

3

2

1 BE 2 2 2 ref

V

R

R

V I R V V

1

1

1

1

]

1

¸

,

_

¸

¸

,

_

¸

¸

+ − ·

1 Q

2 Q

2

1

3

2

T BE

A

A

L

W

L

W

ln

R

R

V V

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