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BL55021

http://www.belling.com.cn - 1 - 8/11/2006
Total 8 Pages Wrote by 2006
LCD Driver for 128 Display Units BL55021

1 General Description
The BL55021 is a 128 pattern (32x4), memory mapping, and multi-function LCD driver.
The S/W configurationfeature of the BL55021 makes it suitable for multiple LCD
applications including LCD modules and display subsystems. Only three or four lines are
required for the interface between the host controller and the BL55021. The BL55021
contains a power down command to reduce power consumption.

2 Features
Operating voltage: 2.4V~5.2V
Built-in 256kHz RC oscillator
External 32.768kHz crystal or 256kHz frequency source input
Selection of 1/2 or 1/3 bias, and selection of 1/2 or 1/3 or 1/4 duty LCD applications
Built-in time base generator and WDT
8 kinds of time base/WDT clock sources
Two selectable tone frequencies (2kHz/4kHz)
32 X 4 LCD driver
Built-in 32x4 bit display RAM
3\4 line serial data interface
Software configuration feature
R/W address auto increment
VLCD for adjusting LCD operating voltage
48-pin SSOP package

3 Pin Assignment 4 Pin Description



Pin NO. Pin Name Pin Function
9 CS
Chip Selection
10 READ
Signal output control(RD)
11 CPW Write Control Pulse(WR)
12 DI Serial DATA Line
13
Vss Minus power terminal
1415 CPOCPI Clock Pulse Out/In(OSC)
16 Vlcd
LCD power source
17 Vdd
Plus power terminal
18 TIS
Test Interrupt
19,20 TB1,TB2
Tone Buzzer
21~24
ROW0~RO
W3 COMmon driving output
1~825~48
DOT0~DOT
31 SEGment driving output
BL55021
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5 Absolute Maximum Rating
Parameter Symbol Rating Unit
Supply Voltage V
DD

-0.35.5
V
Input voltage V
IL

Vss-0.3 V
DD
+0.3
V
Operating temperature Topr
-40 +85
o
C
Storage temperature Tstg
-50 +125
o
C

6 DC Characteristic Ta=25
o
C
Test Condition Symbol Parameter
Vdd condition
Min Typ Max Unit
Vdd Operating voltage ---- ---- 2.4 ---- 5.2 V
3V ---- 150 300
Idd1 5V
Unload/LCD on
On chip RC oscillator ---- 300 600
3V ---- 60 120
Idd2 5V
Unload/LCD on
Crystal oscillator ---- 120 240
3V ---- 100 200
Idd3



Operating current
5V
Unload/LCD on
External clock ---- 200 400



uA
3V ---- 0.1 5
Istb

Standby current 5V
Unload
Standby mode ---- 0.3 10
uA
3V 0 --- 0.6
Vil
Input Low Voltage
5V
DI,CPW,CS,READ
0 --- 1.0

V
3V 2.4 --- 3.0
Vih
Input High Voltage
5V
DI,CPW,CS,READ
4.0 --- 5.0

V
3V Vol=0.3V 0.5 1.2 --- Iol1 DI,TB,TIS
5V Vol=0.5V 1.3 2.5 ---

mA
3V Vol=2.7V -0.4 -0.8 --- Ioh1 DI,TB,TIS
5V Vol=4.5V -0.9 -1.8 ---

mA
3V Vol=0.3V 80 150 --- Iol2 ROW
5V Vol=0.5V 159 250 ---

uA
3V Vol=2.7V -80 -120 --- Ioh2 ROW
5V Vol=4.5V -120 -200 ---

uA
3V Vol=0.3V 60 120 --- Iol3 DOT
5V Vol=0.5V 120 200 ---

uA
3V Vol=0.3V -40 -70 --- Ioh3 DOT
5V Vol=0.5V -70 -100 ---

uA
3V 40 80 150
k
Rph
Pull high resister
5V

DI,CPW,CS,TREAD
30 60 100
k











BL55021
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Total 8 Pages Wrote by 2006
7 AC Characteristic Ta=25
o
C
Test Condition Symbol Parameter
Vd
d
condition
Min Typ Max Unit
3V ---- 256 ----
Fsys1 5V

On chip RC oscillator ---- 256 ----
3V ---- 32.768 ----
Fsys2 5V

Crystal oscillator ---- 32.768 ----
3V ---- 256 ----
Fsys3



System clock
5V

External Clock ---- 256 ----



kHz
---
On chip RC oscillator
---- f
SYS1
/
1024
----
---
Crystal oscillator
---- f
SYS2
/
128
----

Flcd1


LCD scan frequency
---
External Clock
---- f
SYS3
/
1024
----

Hz
Hz

Tcom

ROW period
--- N:Number of COM ---- N/Flcd ---- S
3V ---- ---- 300 Fclk1 CPW clock
5V
50% duty
---- ---- 500
kHz
3V ---- ---- 75 Fclk2 TREAD clock
5V
50% duty
---- ---- 150
kHz
Ftb Tone - On chip RC oscillator ---- 2.0/4.0 --- kHz
Tcs Reset pulde wirth CS ---- 250 ---- ns
Write 3.34 ---- ---- 3V
Read 6.67 ---- ----
Write 1.67 ---- ----
Tclk CPW Pulse width
5V
Read 3.34 ---- ----
us
Tr,Tf Rise/Fall width ---- 120 ---- ns
Tsu DI-clock setup width ---- 120 ---- ns
Th DI-clock hold width ---- 120 ---- ns
Tsu1 CS-clock setup width ---- 100 ---- ns
Th1 CS-clock hold width ---- 100 ---- ns





BL55021
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Total 8 Pages Wrote by 2006
8 Functional Description
Display Memory _ RAM
The static display memory (RAM) is organized into 32 X 4 bits and stores the displayed
data. The contents of the RAM are directly mapped to the contents of the LCD driver. Data in
the RAM can be accessed by the WRITE commands. The following is a mapping from the
RAM to the LCD pattern:









System
Oscillator
The BL55021 system clock is used to generate the time base/Watchdog Timer (WDT)
clock frequency, LCD driving clock, and tone frequency. The source of the clock may be from
an on-chip RC oscillator (256kHz), a crystal oscillator (32.768kHz), or an external 256kHz
clock by the S/W setting. The configuration of the system oscillator is as shown. After the
SYS DIS command is executed, the system clock will stop and the LCD bias generator will
turn off. That command is, however, available only for the on-chip RC oscillator or for the
crystal oscillator. Once the system clock stops, the LCD display will become blank, and the
time base/WDT lose its function as well. The LCD OFF command is used to turn the LCD
bias generator off. After the LCD bias generator switches off by issuing the LCD OFF
command, using the SYS DIS command reduces power consumption, serving as a system
power down command. But if the external clock source is chosen as the system clock, using
the SYS DIS command can neither turn the oscillator off nor carry out the power down mode.
The crystal oscillator option can be applied to connect an external frequency source of 32kHz
to the OSCI pin. In this case, the system fails to enter the power down mode, similar to the
case in the external 256kHz clock source operation. At the initial system power on, the
BL55021 is at the SYS DIS state.
Command Format
The BL55021 can be configured by the S/W setting. There are two mode commands to
configure the BL55021 resources and to transfer the LCD display data. The configuration
mode of the BL55021 is called command mode, and its command mode ID is 1 0 0. The
command mode consists of a system configuration command, a system frequency selection
command, a LCD configuration command, a tone frequency selection command, a
timer/WDT setting command, and an operating command. The data mode, on the other hand,
includes READ, WRITE, and READ-MODIFY-WRITE operations. The following are the
data mode IDs and the command mode ID:
BL55021
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The mode command should be issued before the data or command is transferred. If successive
commands have been issued, the command mode ID, namely 1 0 0, can be omitted. While the
system is operating in the non-successive command or the non-successive address data mode,
the CS pin should be set to 1 and the previous operation mode will be reset also. Once the
CS pin returns to 0 a new operation mode ID should be issued first.

9 Timing Diagrams
Write mode

Write succesive







Write command





BL55021
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Total 8 Pages Wrote by 2006
10 Typical Application Circuit


Note: Adjust R to fit user. The voltage V
LCD
must be lower than V
DD
.





























BL55021
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11 Command Summary

BL55021
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Total 8 Pages Wrote by 2006
12 Package Infoemation
SSOP48: plastic shrink small outline package; 48 leads; body with 7.5 mm