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In the fast paced world human beings require everything to be automated. Our life style
demands everything to be remote controlled. Apart from few things man has made his life automated.
And why not ? In the world of advance electronics, life of human beings should be simpler hence to make
life more simpler and convenient, we have made GSM BASED IRRIGATION SYSTEM. A model of
controlling irrigation facilities to help millions of people. This model uses wireless technology with
microcontroller to make a smart switching device .
The model shows the basic switching mechanism of Water motor/pump using GSM
module and relay circuit from any part of the world by sending message to the GSM module and we can
get the information that at what speed it is rotating for i.e., RPS. Our basic model can be extended to any
level of switching & controlling by using DTMF .

1.1 Problem Statement:
Lack of intelligence in irrigation
1.2 Proposed System:
Irrigation using GSM
1.3 Block diagram:

GSM modem
Micro Controller
Supply Unit
Temp Sensor

Proximity sensor

1.4 Hardware requirement :
PIC Micro controller
GSM modem

1.5 Software requirement :

MPLAB C Compiler
Flash Programmer.
Languages Used: Embedded C.



2.1Block Diagram:

Fig.2.. Block diagram of power supply
The potential transformer will step down the power supply voltage (0-230V) to (0-6V)
level. Then the secondary of the potential transformer will be connected to the precision rectifier, which is
constructed with the help of opamp. The advantages of using precision rectifier are it will give peak
voltage output as DC, rest of the circuits will give only RMS output.
When four diodes are connected as shown in figure, the circuit is called as bridge
rectifier. The input to the circuit is applied to the diagonally opposite corners of the network, and the
output is taken from the remaining two corners.
Let us assume that the transformer is working properly and there is a positive potential,
at point A and a negative potential at point B. the positive potential at point A will forward bias D3 and
reverse bias D4.

The negative potential at point B will forward bias D1 and reverse D2. At this time D3
and D1 are forward biased and will allow current flow to pass through them; D4 and D2 are reverse
biased and will block current flow.
The path for current flow is from point B through D1, up through RL, through D3,
through the secondary of the transformer back to point B. this path is indicated by the solid arrows.
Waveforms (1) and (2) can be observed across D1 and D3.
One-half cycle later the polarity across the secondary of the transformer reverse, forward
biasing D2 and D4 and reverse biasing D1 and D3. Current flow will now be from point A through D4,
up through RL, through D2, through the secondary of T1, and back to point A. This path is indicated by
the broken arrows. Waveforms (3) and (4) can be observed across D2 and D4. The current flow through
RL is always in the same direction.
In flowing through RL this current develops a voltage corresponding to that shown
waveform (5). Since current flows through the load (RL) during both half cycles of the applied voltage,
this bridge rectifier is a full-wave rectifier.

Voltage regulators comprise a class of widely used ICs. Regulator IC units contain the
circuitry for reference source, comparator amplifier, control device, and overload protection all in a single
IC. IC units provide regulation of either a fixed positive voltage, a fixed negative voltage, or an adjustably
set voltage. The regulators can be selected for operation with load currents from hundreds of milli
amperes to tens of amperes, corresponding to power ratings from milli watts to tens of watts.
A fixed three-terminal voltage regulator has an unregulated dc input voltage, Vi, applied
to one input terminal, a regulated dc output voltage, Vo, from a second terminal, with the third terminal
connected to ground.
The series 78 regulators provide fixed positive regulated voltages from 5 to 24 volts.
Similarly, the series 79 regulators provide fixed negative regulated voltages from 5 to 24 volts.
2.1.5. Features & Description of Regulators:
Output Current up to 1A
Output Voltages of 5, 6, 8, 9, 10, 12, 15, 18, 24V
Thermal Overload Protection

Short Circuit Protection
Output Transistor Safe Operating Area Protection

Fig.2.1. Circuit Diagram of Power Supply

The AC voltage, typically 220V rms, is connected to a transformer, which steps that ac
voltage down to the level of the desired DC output. A diode rectifier then provides a full-wave rectified
voltage that is initially filtered by a simple capacitor filter to produce a dc voltage. This resulting dc
voltage usually has some ripple or ac voltage variation.
A regulator circuit removes the ripples and also remains the same dc value even if the
input dc voltage varies, or the load connected to the output dc voltage changes.


ARM LPC 2148

3.1 LPC 2148 BOARD:
The LPC2141/2/4/6/8 microcontrollers are based on a 32/16 bit ARM7TDMI-S CPU
with real-time emulation and embedded trace support, that combines the microcontroller with embedded
high speed flash memory ranging from 32 kB to 512 kB. A 128-bit wide memory interface and a unique
accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical code size
applications, the alternative 16-bit Thumb mode reduces code by more than 30 % with minimal
performance penalty. Due to their tiny size and low power consumption, LPC2141/2/4/6/8 are ideal for
applications where miniaturization is a key requirement, such as access control and point-of-sale. A blend
of serial communications interfaces ranging from a USB 2.0 Full Speed device, multiple UARTs, SPI,
SSP to I2Cs, and on-chip SRAM of 8 kB up to 40 kB, make these devices very well suited for
communication gateways and protocol converters, soft modems, voice recognition and low end imaging,
providing both large buffer size and high processing power. Various 32-bit timers, single or dual 10-bit
ADC(s), 10-bit DAC, PWM channels and 45 fast GPIO lines with up to nine edge or level sensitive
external interrupt pins make these microcontrollers particularly suitable for industrial control and medical

Fig 2.1 LPC 2148 BOARD

3.2 Features
16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package.
8 to 40 kB of on-chip static RAM and 32 to 512 kB of on-chip flash program memory. 128 bit
wide interface/accelerator enables high speed 60 MHz operation.
In-System/In-Application Programming (ISP/IAP) via on-chip boot-loader software. Single flash
sector or full chip erase in 400 ms and programming of 256 bytes in 1 ms.
EmbeddedICE RT and Embedded Trace interfaces offer real-time debugging with the on-chip
RealMonitor software and high speed tracing of instruction execution.
USB 2.0 Full Speed compliant Device Controller with 2 kB of endpoint RAM. In addition, the
LPC2146/8 provide 8 kB of on-chip RAM accessible to USB by DMA.
One or two (LPC2141/2 vs. LPC2144/6/8) 10-bit A/D converters provide a total of 6/14 analog
inputs, with conversion times as low as 2.44 s per channel.
Single 10-bit D/A converter provides variable analog output.
Two 32-bit timers/external event counters (with four capture and four compare channels each),
PWM unit (six outputs) and watchdog.
Low power real-time clock with independent power and dedicated 32 kHz clock input.
Multiple serial interfaces including two UARTs (16C550), two Fast I2C-bus (400 kbit/s), SPI
and SSP with buffering and variable data length capabilities.
Vectored interrupt controller with configurable priorities and vector addresses.
Up to 45 of 5 V tolerant fast general purpose I/O pins in a tiny LQFP64 package.
Up to nine edge or level sensitive external interrupt pins available.
60 MHz maximum CPU clock available from programmable on-chip PLL with settling time of
100 s.
On-chip integrated oscillator operates with an external crystal in range from 1 MHz to 30 MHz
and with an external oscillator up to 50 MHz.
Power saving modes include Idle and Power-down.
Individual enable/disable of peripheral functions as well as peripheral clock scaling for
additional power optimization.
Processor wake-up from Power-down mode via external interrupt, USB, Brown-Out Detect
(BOD) or Real-Time Clock (RTC).
Single power supply chip with Power-On Reset (POR) and BOD circuits: CPU operating
voltage range of 3.0 V to 3.6 V (3.3 V 10 %) with 5 V tolerant I/O pads.


3.3 Applications:
Industrial control
Medical systems
Access control
Communication gateway
Embedded soft modem
General purpose applications
3.4 ARM7TDMI-S processor:
The ARM7TDMI-S is a general purpose 32-bit microprocessor, which offers high
performance and very low power consumption. The ARM architecture is based on Reduced Instruction
Set Computer (RISC) principles, and the instruction set and related decode mechanism are much simpler
than those of microprogrammed Complex Instruction Set Computers. This simplicity results in a high
instruction throughput and impressive real-time interrupt response from a small and cost-effective
processor core. Pipeline techniques are employed so that all parts of the processing and memory systems
can operate continuously. Typically, while one instruction is being executed, its successor is being
decoded, and a third instruction is being fetched from memory. The ARM7TDMI-S processor also
employs a unique architectural strategy known as THUMB, which makes it ideally suited to high-volume
applications with memory restrictions, or applications where code density is an issue.
The key idea behind THUMB is that of a super-reduced instruction set. Essentially, the
ARM7TDMI-S processor has two instruction sets:
The standard 32-bit ARM instruction set.
A 16-bit THUMB instruction set.
The THUMB sets 16-bit instruction length allows it to approach twice the density of
standard ARM code while retaining most of the ARMs performance advantage over a traditional 16-bit
processor using 16-bit registers. This is possible because THUMB code operates on the same 32-bit
register set as ARM code. THUMB code is able to provide up to 65% of the code size of ARM, and 160%
of the performance of an equivalent ARM processor connected to a 16-bit memory system. The
ARM7TDMI-S processor is described in detail in the ARM7TDMI-S Datasheet that can be found on
official ARM website.
3.5 On-Chip Flash Memory System
The LPC2141/2/4/6/8 incorporate a 32 kB, 64 kB, 128 kB, 256 kB, and 512 kB Flash
memory system, respectively. This memory may be used for both code and data storage. Programming of

the Flash memory may be accomplished in several ways: over the serial built-in JTAG interface, using In
System Programming (ISP) and UART0, or by means of In Application Programming (IAP) capabilities.
The application program, using the IAP functions, may also erase and/or program the Flash while the
application is running, allowing a great degree of flexibility for data storage field firmware upgrades, etc.
When the LPC2141/2/4/6/8 on-chip bootloader is used, 32 kB, 64 kB, 128 kB, 256 kB, add 500 kB of
Flash memory is available for user code. The LPC2141/2/4/6/8 Flash memory provides minimum of
100,000 erase/write cycles and 20 years of data-retention.
3.6 On-chip Static RAM (SRAM):
On-chip Static RAM (SRAM) may be used for code and/or data storage. The on-chip
SRAM may be accessed as 8-bits, 16-bits, and 32-bits. The LPC2141/2/4/6/8 provide 8/16/32 kB of static
RAM, respectively.
The LPC2141/2/4/6/8 SRAM is designed to be accessed as a byte-addressed memory.
Word and halfword accesses to the memory ignore the alignment of the address and access the naturally-
aligned value that is addressed (so a memory access ignores address bits 0 and 1 for word accesses, and
ignores bit 0 for halfword accesses). Therefore valid reads and writes require data accessed as halfwords
to originate from addresses with address line 0 being 0 (addresses ending with 0, 2, 4, 6, 8, A, C, and E in
hexadecimal notation) and data accessed as words to originate from addresses with address lines 0 and 1
being 0 (addresses ending with 0, 4, 8, and C in hexadecimal notation). This rule applies to both off and
on-chip memory usage. The SRAM controller incorporates a write-back buffer in order to prevent CPU
stalls during back-to-back writes. The write-back buffer always holds the last data sent by software to the
SRAM. This data is only written to the SRAM when another write is requested by software (the data is
only written to the SRAM when software does another write). If a chip reset occurs, actual SRAM
contents will not reflect the most recent write request. Any software that checks SRAM contents after
reset must take this into account. Two identical writes to a location guarantee that the data will be present
after a Reset. Alternatively, a dummy write operation before entering idle or power-down mode will
similarly guarantee that the last data written will be present in SRAM after a subsequent reset.
3.7 System control block functions:
The System Control Block includes several system features and control registers for a
number of functions that are not related to specific peripheral devices. These include:
Crystal Oscillator
External Interrupt Inputs
Miscellaneous System Controls and Status
Memory Mapping Control

Power Control
APB Divider
Wakeup Timer
Each type of function has its own register(s) if any are required and unneeded bits are
defined as reserved in order to allow future expansion. Unrelated functions never share the same register

fig 2.2 Pin diagram of ARM processor
3.9 Description:
The pin connect block allows selected pins of the microcontroller to have more than one
function. Configuration registers control the multiplexers to allow connection between the pin and the on
chip peripherals. Peripherals should be connected to the appropriate pins prior to being activated, and

prior to any related interrupt(s) being enabled. Selection of a single function on a port pin completely
excludes all other functions otherwise available on the same pin. The only partial exception from the
above rule of exclusion is the case of inputs to the A/D converter. Regardless of the function that is
selected for the port pin that also hosts the A/D input, this A/D input can be read at any time and
variations of the voltage level on this pin will be reflected in the A/D readings. However, valid analog
reading(s) can be obtained if and only if the function of an analog input is selected. Only in this case
proper interface circuit is active in between the physical pin and the A/D module.
Allows individual pin configuration.
The purpose of the Pin connect block is to configure the microcontroller pins to the
desired functions.
The ac Voltage, typically 220V RMS, is connected to a transformer, which steps that
ac voltage down to the level of desired dc output. A diode rectifier then provides a full-wave rectified
voltage that is initially filtered by a simple capacitor filter to produce a dc voltage. This resulting dc
voltage usually has some ripple or ac voltage variation.

Fig2.4 Block diagram of power supply
A regulator circuit removes the ripples and also remains the samw dc value even if the
input dc voltage varies,or the load connected to the output dc voltage changes.This voltage regulation is
usually obtained using one of the popular voltage regular IC units


3.10.2 Working principle
The potential transformer will step down the power supply voltage (0-230)level.Then the
secondary of the potential transformer will be connected to the precision rectifier,which is constructed
with the help of op- amp.The advantages of using precision rectifier are it will give peak voltage output as
dc , rest of the circuit will give omly RMS output
Bridge rectifier
When four diodes are connected as shown in fig.the circuit is called as bridge
rectifier.The input to the circuit applied to the diagonal opposite corners of the network,and the output is
taken from the remaining two corners.Let as assume that the transformer is working properly and there is
a positive potential, at a point A and a negative potential at point B. The positive potential at point a will
forward bias D3 and reverse bias D4.The negative potential at point B will forward bias D1 and reverse
D2.At this time D3 and D1 re forward biased and we allow current flow to pass through them,D4 and D4
are reverse biased and will block current flow.
One advantage of a bridge rectifier over a convenctional full-wave rectifier is that with
a given transformer the bridge rectifier produces a voltage output that is nearly twice that of
convenctional full-wave circuit .
This may be shown by assigning values to some of the components shown in views A
and B.Assume that the same tranformer is used in both circuits the peak voltage developed between
points X and Y is 1000V in both circuits.
IC Voltage Regultors
Voltage regulators comprises a class of widely used Ics.Regulator IC units contain the circuitry for
reference source,comparator mplifier,control device,nd overload protection all in a single IC.IC units
provide regultion of either a fixed positive voltage. The regulators can be selected for operations with
load currents from hundreds of milli amperes to tens of amperes,corresponding to power ratings from
milli watts to tens of watts.


Fig circuit diagram of power supply
A fixed three-terminal voltage regulator has n unregulator dc input voltage, Vi,applied to one input
terminal, a regulator dc output voltge,Vo,from a second terminal,with the third terminal connected to
The series 78 regulators provide fixed positive regulated voltages from 5 to 24 volts. Similarly, the series
79 regulators provide fixed negative regulated voltages from 5 to 24 volts.

There are three memory blocks in each of the PIC16F87XA devices. The program memory
and data memory have separate buses so that concurrent access can occur and is detailed in this section.
The EEPROM data memory block is detailed in Data EEPROM and Flash Program Memory.
Additional information on device memory may be found in the PICmicro Mid-Range MCU Family
Reference Manual (DS33023).
The PIC16F87XA devices have a 13-bit program counter capable of addressing an 8K
word x 14 bit program memory space. The PIC16F876A devices have 8K words x 14 bits of Flash
program memory, while PIC16F873A/874A devices have 4K words x 14 bits. Accessing a location
above the physically implemented address will cause a wrap around. The Reset vector is at 0000h and the
interrupt vector is at 004H.


The data memory is partitioned into multiple banks which contain the General Purpose
Registers and the Special Function Registers. Bits RP1 (Status<6>) and RP0 (Status<5>) are the bank
select bits.

Each bank extends up to 7Fh (128 bytes). The lower locations of each bank are reserved
for the Special Function Registers. Above the Special Function Registers are General Purpose Registers,
implemented as static RAM. All implemented banks contain Special Function Registers. Some frequently
used Special Function Registers from one bank may be mirrored in another bank for code reduction and
quicker access.

Serial communication is basically the transmission or reception of data one bit at a time.
Today's computers generally address data in bytes or some multiple thereof. A byte contains 8 bits. A bit
is basically either a logical 1 or zero. Every character on this page is actually expressed internally as one
byte. The serial port is used to convert each byte to a stream of ones and zeroes as well as to convert a
stream of ones and zeroes to bytes. The serial port contains a electronic chip called a Universal
Asynchronous Receiver/Transmitter (UART) that actually does the conversion.
The serial port has many pins. We will discuss the transmit and receive pin first.
Electrically speaking, whenever the serial port sends a logical one (1) a negative voltage is effected on the
transmit pin. Whenever the serial port sends a logical zero (0) a positive voltage is affected. When no data
is being sent, the serial port's transmit pin's voltage is negative (1) and is said to be in a MARK state.
Note that the serial port can also be forced to keep the transmit pin at a positive voltage (0) and is said to
be the SPACE or BREAK state. (The terms MARK and SPACE are also used to simply denote a negative
voltage (1) or a positive voltage (0) at the transmit pin respectively).
When transmitting a byte, the UART (serial port) first sends a START BIT which is a
positive voltage (0), followed by the data (general 8 bits, but could be 5, 6, 7, or 8 bits) followed by one
or two STOP Bits which is a negative(1) voltage. The sequence is repeated for each byte sent. Figure 1
shows a diagram of what a byte transmission would look like.

At this point you may want to know what the duration of a bit is. In other words, how
long does the signal stay in a particular state to define a bit. The answer is simple. It is dependent on the
baud rate. The baud rate is the number of times the signal can switch states in one second. Therefore, if
the line is operating at 9600 baud, the line can switch states 9,600 times per second. This means each bit
has the duration of 1/9600 of a second or about 100sec.
when transmitting a character there are other characteristics other than the baud rate that
must be known or that must be setup. These characteristics define the entire interpretation of the data
stream. The first characteristic is the length of the byte that will be transmitted. This length in general can
be anywhere from 5 to 8 bits.
The second characteristic is parity. The parity characteristic can be even, odd, mark,
space, or none. If even parity, then the last data bit transmitted will be a logical 1 if the data transmitted

had an even amount of 0 bits. If odd parity, then the last data bit transmitted will be a logical 1 if the data
transmitted had an odd amount of 0 bits. If MARK parity, then the last transmitted data bit will always be
a logical 1. If SPACE parity, then the last transmitted data bit will always be a logical 0. If no parity then
there is no parity bit transmitted.
The third characteristic is the amount of stop bits. This value in general is 1 or 2. Assume
we want to send the letter 'A' over the serial port. The binary representation of the letter 'A' is 01000001.
Remembering that bits are transmitted from least significant bit (LSB) to most significant bit (MSB), the
bit stream transmitted would be as follows for the line characteristics 8 bits, no parity, 1 stop bit and 9600
LSB (0 1 0 0 0 0 0 1 0 1) MSB

The above represents (Start Bit) (Data Bits) (Stop Bit). To calculate the actual byte
transfer rate simply divide the baud rate by the number of bits that must be transferred for each byte of
data. In the case of the above example, each character requires 10 bits to be transmitted for each
character. As such, at 9600 baud, up to 960 bytes can be transferred in one second.
The above discussion was concerned with the "electrical/logical" characteristics of the
data stream. We will expand the discussion to line protocol. Serial communication can be half duplex or
full duplex. Full duplex communication means that a device can receive and transmit data at the same
time. Half duplex means that the device cannot send and receive at the same time. It can do them both,
but not at the same time. Half duplex communication is all but outdated except for a very small focused
set of applications.
Half duplex serial communication needs at a minimum two wires, signal ground and
the data line. Full duplex serial communication needs at a minimum three wires, signal ground, transmit
data line, and receive data line. The RS232 specification governs the physical and electrical
characteristics of serial communications. This specification defines several additional signals that are
asserted (set to logical 1) for information and control beyond the data signal.
These signals are the Carrier Detect Signal (CD), asserted by modems to signal a
successful connection to another modem, Ring Indicator (RI), asserted by modems to signal the phone
ringing, Data Set Ready (DSR), asserted by modems to show their presence, Clear To Send (CTS),
asserted by modems if they can receive data, Data Terminal Ready (DTR), asserted by terminals to show
their presence, Request To Send (RTS), asserted by terminals if they can receive data. The section RS232
Cabling describes these signals and how they are connected.


The above paragraph alluded to hardware flow control. Hardware flow control is a
method that two connected devices use to tell each other electronically when to send or when not to send
data. A modem in general drops (logical 0) its CTS line when it can no longer receive characters. It re-
asserts it when it can receive again. A terminal does the same thing instead with the RTS signal. Another
method of hardware flow control in practice is to perform the same procedure in the previous paragraph
except that the DSR and DTR signals.
Note that hardware flow control requires the use of additional wires. The benefit to this
however is crisp and reliable flow control. Another method of flow control used is known as software
flow control. This method requires a simple 3 wire serial communication link, transmit data, receive data,
and signal ground. If using this method, when a device can no longer receive, it will transmit a character
that the two devices agreed on. This character is known as the XOFF character. This character is
generally a hexadecimal 13. When a device can receive again it transmits an XON character that both
devices agreed to. This character is generally a hexadecimal 11.
Serial communications with RS232. One of the oldest and most widely spread
communication methods in computer world. The way this type of communication can be performed is
pretty well defined in standards. I.e. with one exception. The standards show the use of DTE/DCE
communication, the way a computer should communicate with a peripheral device like a modem. For
your information, DTE means Data Terminal Equipment (computers etc.) where DCE is the abbreviation
of Data Communication Equipment (modems).
One of the main uses of serial communication today where no modem is involveda
serial null modem configuration with DTE/DTE communicationis not so well defined, especially when
it comes to flow control. The terminology null modem for the situation where two computers
communicate directly is so often used nowadays, that most people don't realize anymore the origin of the
phrase and that a null modem connection is an exception, not the rule.
In history, practical solutions were developed to let two computers talk with each other
using a null modem serial communication line. In most situations, the original modem signal lines are
reused to perform some sort of handshaking. Handshaking can increase the maximum allowed
communication speed because it gives the computers the ability to control the flow of information. A high
amount of incoming data is allowed if the computer is capable to handle it, but not if it is busy performing
other tasks. If no flow control is implemented in the null modem connection, communication is only
possible at speeds at which it is sure the receiving side can handle the amount information even under
worst case conditions.

4.3 RS232:
When we look at the connector pin out of the RS232 port, we see two pins which are
certainly used for flow control. These two pins are RTS, request to send and CTS, clear to send. With
DTE/DCE communication (i.e. a computer communicating with a modem device) RTS is an output on
the DTE and input on the DCE. CTS are the answering signal coming from the DCE.
Before sending a character, the DTE asks permission by setting its RTS output. No
information will be sent until the DCE grants permission by using the CTS line.
If the DCE cannot handle new requests, the CTS signal will go low. A simple but useful
mechanism allowing flow control in one direction. The assumption is that the DTE can always handle
incoming information faster than the DCE can send it. In the past, this was true. Modem speeds of 300
baud were common and 1200 baud was seen as a high speed connection.
For further control of the information flow, both devices have the ability to signal their
status to the other side. For this purpose, the DTR data terminal ready and DSR data set ready signals are
present. The DTE uses the DTR signal to signal that it is ready to accept information, whereas the DCE
uses the DSR signal for the same purpose. Using these signals involves not a small protocol of requesting
and answering as with the RTS/CTS handshaking. These signals are in one direction only.
The last flow control signal present in DTE/DCE communication is the CD carrier
detect. It is not used directly for flow control, but mainly an indication of the ability of the modem device
to communicate with its counter part. This signal indicates the existence of a communication link between
two modem devices.
How to use the handshaking lines in a null modem configuration? The simplest way is to
don't use them at all. In that situation, only the data lines and signal ground are cross connected in the null
modem communication cable. All other pins have no connection. An example of such a null modem cable
without handshaking can be seen in the figure below.


Connector 1 Connector 2 Function
2 3 Rx

3 2 TX

5 5 Signal ground

Fig.4.1. Simple null modem without handshaking
If you read about null modems, this three wire null modem cable is often talked about.
Yes, it is simple but can we use it in all circumstances? There is a problem, if either of the two devices
checks the DSR or CD inputs. These signals normally define the ability of the other side to communicate.
As they are not connected, their signal level will never go high. This might cause a problem.
The same holds for the RTS/CTS handshaking sequence. If the software on both sides is
well structured, the RTS output is set high and then a waiting cycle is started until a ready signal is
received on the CTS line. This causes the software to hang because no physical connection is present to
either CTS line to make this possible. The only type of communication which is allowed on such a null
modem line is data-only traffic on the cross connected Rx/TX lines.
This does however not mean that this null modem cable is useless. Communication links
like present in the Norton Commander program can use this null modem cable. This null modem cable
can also be used when communicating with devices which do not have modem control signals like
electronic measuring equipment etc.

As you can imagine, with this simple null modem cable no hardware flow control can be
implemented. The only way to perform flow control is with software flow control using the XOFF and
XON characters.



5.1.1 MPLAB IDE:
MPLAB IDE is a Windows Operating System (OS) software program that runs on a PC to
develop applications for Microchip microcontrollers and digital signal controllers. It is called an
Integrated Development Environment, or IDE, because it provides a single integrated "environment" to
develop code for embedded microcontrollers. Experienced embedded systems designers may want to skip
ahead to Components of MPLAB IDE. It is also recommended that MPLAB IDE On-line Help and
MPLAB IDE Updates and Version Numbering be reviewed. The rest of this chapter briefly explains
embedded systems development and how MPLAB IDE is used.
Description of an "Embedded System"
Differences Between an Embedded Controller and a PC
Components of a Microcontroller
Implementing an Embedded System Design with MPLAB IDE
MPLAB Integrated Development Environment (IDE) is a comprehensive editor, project
manager and design desktop for application development of embedded designs using Microchip PIC
MCUs and dsPIC DSCs.
The initial use of MPLAB IDE is covered here. How to make projects, edit code and test an
application will be the subject of a short tutorial. By going through the tutorial, the basic concepts of the
Project Manager, Editor and Debugger can be quickly learned. The complete feature set of MPLAB IDE
is covered in later chapters.
This section details the installation and uninstall of MPLAB IDE. It is followed by a simple
step-by-step tutorial that creates a project and explains the elementary debug capabilities of MPLAB IDE.
Someone unfamiliar with MPLAB IDE will get a basic understanding of using the system to develop an
application. No previous knowledge is assumed, and comprehensive technical details of MPLAB IDE and
its components are omitted in order to present the basic framework for using MPLAB IDE.


MAX 232

6.1 GSM :
Global system for mobile communication (GSM) is a globally accepted standard for
digital cellular communication. GSM is the name of a standardization group established in 1982 to create
a common European mobile telephone standard that would formulate specifications for a pan-European
mobile cellular radio system operating at 900 MHz.
GSM provides recommendations, not requirements. The GSM specifications define the
functions and interface requirements in detail but do not address the hardware. The reason for this is to
limit the designers as little as possible but still to make it possible for the operators to buy equipment from
different suppliers. The GSM network is divided into three major systems: the switching system (SS), the
base station system (BSS), and the operation and support system (OSS). The basic GSM network
elements are shown in below figure

Fig:6.1 GSM Network Elements

6.1.3 GSM MODEM:
A GSM modem is a wireless modem that works with a GSM wireless network. A
wireless modem behaves like a dial-up modem. The main difference between them is that a dial-up
modem sends and receives data through a fixed telephone line while a wireless modem sends and receives
data through radio waves.
A GSM modem can be an external device or a PC Card / PCMCIA Card. Typically, an
external GSM modem is connected to a computer through a serial cable or a USB cable. A GSM modem
in the form of a PC Card / PCMCIA Card is designed for use with a laptop computer. It should be
inserted into one of the PC Card / PCMCIA Card slots of a laptop computer. Like a GSM mobile phone, a
GSM modem requires a SIM card from a wireless carrier in order to operate.
As mentioned in earlier sections of this SMS tutorial, computers use AT commands to
control modems. Both GSM modems and dial-up modems support a common set of standard AT
commands. You can use a GSM modem just like a dial-up modem.
In addition to the standard AT commands, GSM modems support an extended set of AT
commands. These extended AT commands are defined in the GSM standards. With the extended AT
commands, you can do things like:
Reading, writing and deleting SMS messages.
Sending SMS messages.
Monitoring the signal strength.
Monitoring the charging status and charge level of the battery.
Reading, writing and searching phone book entries.
The number of SMS messages that can be processed by a GSM modem per minute is very
low -- only about six to ten SMS messages per minute.



The GSM/GPRS Modem comes with a serial interface through which the modem can be
controlled using AT command interface. An antenna and a power adapter are provided. The basic
segregation of working of the modem is as under
Voice calls
GSM Data calls


Voice calls:
` Voice calls are not an application area to be targeted. In future if interfaces like a microphone
and speaker are provided for some applications then this can be considered.

SMS is an area where the modem can be used to provide features like:
Pre-stored SMS transmission
These SMS can be transmitted on certain trigger events in an automation system
SMS can also be used in areas where small text information has to be sent. The transmitter can
be an automation system or machines like vending machines, collection machines or applications like
positioning systems where,The navigator keeps on sending SMS at particular time intervals. SMS can be
a solution where GSM data call or GPRS services are not available
Access control devices:
Now access control devices can communicate with servers and security staff through
SMS messaging. Complete log of transaction is available at the head-office Server instantly without any
wiring involved and device can instantly alert security personnel on their mobile phone in case of any
problem. RaviRaj Technologies is introducing this technology in all Fingerprint Access control and time
attendance products.
Transaction terminal:
EDC machines, POS terminals can use SMS messaging to confirm transactions from central servers.
The main benefit is that central server can be anywhere in the world. Today you need local servers in
every city with multiple telephone lines. You save huge infrastructure costs as well as per transaction
Supply Chain Management:
Today SCM require huge IT infrastructure with leased lines, networking devices, data
centre, workstations and still you have large downtimes and high costs. You can do all this at a fraction of
the cost with GSM M2M technology. A central server in your head office with GSM capability is the

answer; you can receive instant transaction data from all your branch officers, warehouses and business
associates with nil downtime, Low cost.
If your application needs one or more of the following features, GSM will be more cost-effective
then other communication systems.
Short Data Size:
You data size per transaction should be small like 1-3 lines. e.g. banking transaction
data, sales/purchase data, consignment tracking data, updates. These small but important transaction data
can be sent through SMS messaging which cost even less then a local telephone call or sometimes free of
cost worldwide. Hence with negligible cost you are able to send critical information to your head office
located anywhere in the world from multiple points.
You can also transfer faxes, large data through GSM but this will be as or more costly
compared to landline networks.
Multiple Remote Data Collection Points:
If you have multiple data collections points situated all over your city, state, country or
worldwide you will benefit the most. The data can be sent from multiple points like your branch offices,
business associates, warehouses, and agents with devices like GSM modems connected to PCs, GSM
electronic terminals and Mobile phones. Many a times some places like warehouses may be situated at
remote location may not have landline or internet but you will have GSM network still available easily.
High Uptime:
If your business require high uptime and availability GSM is best suitable for you as
GSM mobile networks have high uptime compared to landline, internet and other communication
mediums. Also in situations where you expect that someone may sabotage your communication systems
by cutting wires or taping landlines, you can depend on GSM wireless communication.


Large Transaction Volumes:
GSM SMS messaging can handle large number of transaction in a very short time. You
can receive large number SMS messages on your server like e-mails without internet connectivity. E-
mails normally get delayed a lot but SMS messages are almost instantaneous for instant transactions.
Consider situation like shop owners doing credit card transaction with GSM technology instead of
conventional landlines. time you find local transaction servers busy as these servers use multiple
telephone lines to take care of multiple transactions, whereas one GSM connection is enough to handle
hundreds of transaction.
Mobility, Quick Installation:
GSM technology allows mobility, GSM terminals, modems can be just picked and
installed at other location unlike telephone lines. Also you can be mobile with GSM terminals and can
also communicate with server using your mobile phone. You can just purchase the GSM hardware like
modems, terminals and mobile handsets, insert SIM cards, configure software and your are ready for
GSM communication.
6.2 MAX 232:
MAX-232 is primary used for people building electronics with an RS-232 interface.
Serial RS-232 communication works with voltages (-15V ... -3V for high) and +3V ... +15V for low)
which are not compatible with normal computer logic voltages. To receive serial data from an RS-232
interface the voltage has to be reduced, and the low and high voltage level inverted. In the other direction
(sending data from some logic over RS-232) the low logic voltage has to be "bumped up", and a negative
voltage has to be generated, too.


Fig 7.4.1 Pin Diagram Of Max 232

A standard serial interfacing for PC, RS232C, requires negative logic, i.e., logic '1' is -
3V to -12V and logic '0' is +3V to +12V. To convert TTL logic, say, TxD and RxD pins of the uC chips
thus need a converter chip. A MAX232 chip has long been using in many uC boards. It provides 2-
channel RS232C port and requires external 10uF capacitors. Carefully check the polarity of capacitor
when soldering the board.
RS232 is an asynchronous serial communications protocol, widely used on computers.
Asynchronous means it doesn't have any separate synchronizing clock signal, so it has to synchronize
itself to the incoming data - it does this by the use of 'START' and 'STOP' pulses.

The signal itself is slightly unusual for computers, as rather than the normal 0V to 5V
range, it uses +12V to -12V - this is done to improve reliability, and greatly increases the available range
it can work over - it isn't necessary to provide this exact voltage swing, and you can actually use the PIC's
0V to 5V voltage swing with a couple of resistors to make a simple RS232 interface which will usually
work well, but isn't guaranteed to work with all serial ports.

For this reason I've designed the Serial Board to use the MAX232 chip, this is a chip
specially designed to interface between 5V logic levels and the +12V/-12V of RS232 - it generates the
+12V/-12V internally using capacitor charge pumps, and includes four converters, two transmit and two
receive, the Serial Board only makes use of one of each - the other two are clearly marked on the circuit,
and can be used for something else if required.

There are various data types and speeds used for RS232, were going to concentrate on
the most common type in use, known as 8N1 - the 8 signifies '8 Data Bits', the N signifies 'No Parity' (can

also be E 'Even Parity' or O 'Odd Parity'), the final 1 signifies '1 Stop Bit'. The total data sent consists of 1
start bit, 8 data bits, and 1 stop bit - giving a total of 10 bits.
An RS232 to TTL Level Converter:
The RS232/DB9 is designed to convert TTL level signals into RS232 level signals. This
cable allows you to connect a TTL level device, such as the serial port on a Micro-controller, to the serial
port of a personal computer. The conversion circuit is housed inside the DB9 connector shell. Power is
supplied from the micro-controller board.
The board is based on the Maxim MAX3221CAE interface chip. This chip draws a mere
1mA of current when there are no RS-232 signals connected to the part. With the exception of the DB9
connector and the wire, all parts on this board are surface mounted, and require care during assembly. The
mounting of surface mount parts is not difficult, but does require a steady hand. A magnifying glass or
other visual aid may be helpful. You also need some electronic paste flux.

Fig :pin configuration of MAX 232







7.5 MOTOR:



[1] Muhammad Ali Mazidi , The 8051 Microcontroller & Embedded Systems .

[2] Amit Yadav , Automatic plant irrigation system in The Technological Institute of Textile and
Sciences, Bhiwani Maharishi Dayanand University,Rohtak.

[3] Venkata Naga Rohit Gunturi Micro Controller Based Automatic Plant Irrigation System in
International Journal of Advancements in Research & Technology, Volume 2, Issue4, April-2013194
ISSN 2278-7763.

[4] kabir, SMS controlled wireless irrigation system powered by arduino and GSM in spark
fun microcontroller contest.

[5] Rahul Dev GSM based automatic irrigation system in