You are on page 1of 4

In electronics, a logic gate is an idealized or physical device implementing a Boolean

function; that is, it performs a logical operation on one or more logical inputs, and
produces a single logical output. Depending on the context, the term may refer to an
ideal logic gate, one that has for instance zero rise time and unlimited fan-out, or it may
refer to a non-ideal physical device[1 !see Ideal and real op-amps for comparison".
#ogic gates are primarily implemented using diodes or transistors acting as electronic
s$itches, %ut can also %e constructed using electromagnetic relays !relay logic", fluidic
logic, pneumatic logic, optics, molecules, or even mechanical elements. &ith
amplification, logic gates can %e cascaded in the same $ay that Boolean functions can
%e composed, allo$ing the construction of a physical model of all of Boolean logic, and
therefore, all of the algorithms and mathematics that can %e descri%ed $ith Boolean
#ogic circuits include such devices as multiplexers, registers, arithmetic logic units
!'#(s", and computer memory, all the $ay up through complete microprocessors, $hich
may contain more than 1)) million gates. In practice, the gates are made from field-
effect transistors !*+,s", particularly -./*+,s !metal0oxide0semiconductor field-effect
1ompound logic gates '2D-.3-Invert !'.I" and .3-'2D-Invert !.'I" are often
employed in circuit design %ecause their construction using -./*+,s is simpler and
more efficient than the sum of the individual gates.[4
In reversi%le logic, ,offoli gates are used.,o %uild a functionally complete logic system,
relays, valves !vacuum tu%es", or transistors can %e used. ,he simplest family of logic
gates using %ipolar transistors is called resistor-transistor logic !3,#". (nli5e simple
diode logic gates !$hich do not have a gain element", 3,# gates can %e cascaded
indefinitely to produce more complex logic functions. 3,# gates $ere used in early
integrated circuits. *or higher speed and %etter density, the resistors used in 3,# $ere
replaced %y diodes resulting in diode-transistor logic !D,#". ,ransistor-transistor logic
!,,#" then supplanted D,#. 's integrated circuits %ecame more complex, %ipolar
transistors $ere replaced $ith smaller field-effect transistors !-./*+,s"; see 6-./
and 2-./. ,o reduce po$er consumption still further, most contemporary chip
implementations of digital systems no$ use 1-./ logic. 1-./ uses complementary
!%oth n-channel and p-channel" -./*+, devices to achieve a high speed $ith lo$
po$er dissipation.
*or small-scale logic, designers no$ use prefa%ricated logic gates from families of
devices such as the ,,# 78)) series %y ,exas Instruments, the 1-./ 8))) series %y
31', and their more recent descendants. Increasingly, these fixed-function logic gates
are %eing replaced %y programma%le logic devices, $hich allo$ designers to pac5 a
large num%er of mixed logic gates into a single integrated circuit. ,he field-
programma%le nature of programma%le logic devices such as *69's has removed the
:hard: property of hard$are; it is no$ possi%le to change the logic design of a hard$are
system %y reprogramming some of its components, thus allo$ing the features or function
of a hard$are implementation of a logic system to %e changed.
+lectronic logic gates differ significantly from their relay-and-s$itch e;uivalents. ,hey are
much faster, consume much less po$er, and are much smaller !all %y a factor of a
million or more in most cases". 'lso, there is a fundamental structural difference. ,he
s$itch circuit creates a continuous metallic path for current to flo$ !in either direction"
%et$een its input and its output. ,he semiconductor logic gate, on the other hand, acts
as a high-gain voltage amplifier, $hich sin5s a tiny current at its input and produces a
lo$-impedance voltage at its output. It is not possi%le for current to flo$ %et$een the
output and the input of a semiconductor logic gate.
'nother important advantage of standardized integrated circuit logic families, such as
the 78)) and 8))) families, is that they can %e cascaded. ,his means that the output of
one gate can %e $ired to the inputs of one or several other gates, and so on. /ystems
$ith varying degrees of complexity can %e %uilt $ithout great concern of the designer for
the internal $or5ings of the gates, provided the limitations of each integrated circuit are
,he output of one gate can only drive a finite num%er of inputs to other gates, a num%er
called the :fanout limit:. 'lso, there is al$ays a delay, called the :propagation delay:, from
a change in input of a gate to the corresponding change in its output. &hen gates are
cascaded, the total propagation delay is approximately the sum of the individual delays,
an effect $hich can %ecome a pro%lem in high-speed circuits. 'dditional delay can %e
caused $hen a large num%er of inputs are connected to an output, due to the distri%uted
capacitance of all the inputs and $iring and the finite amount of current that each output
can provide.
' synchronous 8-%it up<do$n decade counter sym%ol !78#/1=4" in accordance $ith
'2/I<I+++ /td. =1-1=>8 and I+1 6u%lication ?)?17-14.
,here are t$o sets of sym%ols for elementary logic gates in common use, %oth defined in
'2/I<I+++ /td =1-1=>8 and its supplement '2/I<I+++ /td =1a-1==1. ,he @distinctive
shape@ set, %ased on traditional schematics, is used for simple dra$ings, and derives
from -I#-/,D->)? of the 1=A)s and 1=?)s. It is sometimes unofficially descri%ed as
@military@, reflecting its origin. ,he @rectangular shape@ set, %ased on I+1 ?)?17-14 and
other early industry standards, has rectangular outlines for all types of gate and allo$s
representation of a much $ider range of devices than is possi%le $ith the traditional
sym%ols.[B ,he I+1:s system has %een adopted %y other standards, such as +2 ?)?17-
14C1=== in +urope and B/ +2 ?)?17-14C1=== in the (nited Dingdom.
,he goal of I+++ /td =1-1=>8 $as to provide a uniform method of descri%ing the
complex logic functions of digital circuits $ith schematic sym%ols. ,hese functions $ere
more complex than simple '2D and .3 gates. ,hey could %e medium scale circuits
such as a 8-%it counter to a large scale circuit such as a microprocessor. I+1 ?17-14 and
its successor I+1 ?)?17-14 do not explicitly sho$ the @distinctive shape@ sym%ols, %ut
do not prohi%it them.[B ,hese are, ho$ever, sho$n in '2/I<I+++ =1 !and =1a" $ith this
noteC @,he distinctive-shape sym%ol is, according to I+1 6u%lication ?17, 6art 14, not
preferred, %ut is not considered to %e in contradiction to that standard.@ ,his compromise
$as reached %et$een the respective I+++ and I+1 $or5ing groups to permit the I+++
and I+1 standards to %e in mutual compliance $ith one another.
' third style of sym%ols $as in use in +urope and is still preferred %y some, see the
column @DI2 8)7))@ in the ta%le in the 9erman &i5ipedia.
In the 1=>)s, schematics $ere the predominant method to design %oth circuit %oards
and custom I1s 5no$n as gate arrays. ,oday custom I1s and the field-programma%le
gate array are typically designed $ith Eard$are Description #anguages !ED#" such as
Ferilog or FED#.By use of De -organ:s theorem, an '2D function is identical to an .3
function $ith negated inputs and outputs. #i5e$ise, an .3 function is identical to an
'2D function $ith negated inputs and outputs. ' 2'2D gate is e;uivalent to an .3 gate
$ith negated inputs, and a 2.3 gate is e;uivalent to an '2D gate $ith negated inputs.
,his leads to an alternative set of sym%ols for %asic gates that use the opposite core
sym%ol !'2D or .3" %ut $ith the inputs and outputs negated. (se of these alternative
sym%ols can ma5e logic circuit diagrams much clearer and help to sho$ accidental
connection of an active high output to an active lo$ input or vice-versa. 'ny connection
that has logic negations at %oth ends can %e replaced %y a negationless connection and
a suita%le change of gate or vice-versa. 'ny connection that has a negation at one end
and no negation at the other can %e made easier to interpret %y instead using the De
-organ e;uivalent sym%ol at either of the t$o ends. &hen negation or polarity indicators
on %oth ends of a connection match, there is no logic negation in that path !effectively,
%u%%les @cancel@", ma5ing it easier to follo$ logic states from one sym%ol to the next.
,his is commonly seen in real logic diagrams - thus the reader must not get into the
ha%it of associating the shapes exclusively as .3 or '2D shapes, %ut also ta5e into
account the %u%%les at %oth inputs and outputs in order to determine the @true@ logic
function indicated.
' De -organ sym%ol can sho$ more clearly a gate:s primary logical purpose and the
polarity of its nodes that are considered in the @signaled@ !active, on" state. 1onsider the
simplified case $here a t$o-input 2'2D gate is used to drive a motor $hen either of its
inputs are %rought lo$ %y a s$itch. ,he @signaled@ state !motor on" occurs $hen either
one .3 the other s$itch is on. (nli5e a regular 2'2D sym%ol, $hich suggests '2D
logic, the De -organ version, a t$o negative-input .3 gate, correctly sho$s that .3 is
of interest. ,he regular 2'2D sym%ol has a %u%%le at the output and none at the inputs
!the opposite of the states that $ill turn the motor on", %ut the De -organ sym%ol sho$s
%oth inputs and output in the polarity that $ill drive the motor.
De -organ:s theorem is most commonly used to implement logic gates as com%inations
of only 2'2D gates, or as com%inations of only 2.3 gates, for economic reasons.
Data storage[edit
-ain articleC /e;uential logic
#ogic gates can also %e used to store data. ' storage element can %e constructed %y
connecting several gates in a @latch@ circuit. -ore complicated designs that use cloc5
signals and that change only on a rising or falling edge of the cloc5 are called edge-
triggered @flip-flops@. ,he com%ination of multiple flip-flops in parallel, to store a multiple-
%it value, is 5no$n as a register. &hen using any of these gate setups the overall system
has memory; it is then called a se;uential logic system since its output can %e influenced
%y its previous state!s".
,hese logic circuits are 5no$n as computer memory. ,hey vary in performance, %ased
on factors of speed, complexity, and relia%ility of storage, and many different types of
designs are used %ased on the application.