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**CSE 206 (Digital Logic Design Sessional) Quiz
**

Full Marks – 50 Time: 50 minutes

Student No.: Date:

1. State True/False on the left side of each of the following sentences. 10x1=10

a. Any combinational circuit can be implemented using NAND gates only. T

b. There are 16 output lines in an encoder with 4 input lines. F

c. Any binary number from 0 to 19 can be converted to BCD by adding 6 to the binary number. F

d. IC 74153 is a dual 3x 8 decoder. T

e. For n variables, there are different switching functions. T

f. A sequential circuit may not contain a feedback path. F

g. Flip-flops are used as storage elements in sequential circuits. T

h. A decoder with an enable line can function as a demultiplexer. T

i. IC 7483 represents negative numbers in 1’s complement form. F

j. IC 7447 is a Binary to BCD converter. F

2. Draw a circle (О) around the most appropriate answer for the following MCQs. 10x1=10

i.

The logic circuit above is used to compute two unsigned 2-bit numbers,

X

1

X

0

=X and Y

1

Y

0

=Y, where X

0

and Y

0

are the least significant bits. Which

of the following always makes the output Z have the value 1?

a. X>Y

b. X<Y

c. X>=Y

d. X=Y

ii. It is not possible to invert a signal using only

a. an XOR gate

b. an OR gate

c. a 2 1 MUX

d. a 4 1 MUX

iii. To construct a 32x1 Mux using 4x1 Muxs we need minimum

a. Ten 4x1 Muxs

b. Eleven 4x1 Muxs

c. Twelve 4x1 Muxs

d. Thirteen 4x1 Muxs

iv. if A

B=C, then

a. A

C=C′

b. A

C=B′

c. A

C=B

2

d. B

C=AB

v. Simplified form of

ab+a′c + bc +bcd + d+d′e is

a. ab+a′c + d+e

b. ab+ bc + d+e

c.

ab+a′c + bc + d+ e

d. It cannot be simplified

vi. Suppose a BCD-to-7 segment decoder has 0100 on its inputs. The active outputs are

a. a, c, f, g

b. b, c, f, g

c. b, c ,e, f

d. d, b, f, g

vii. The 7483 IC is a 4-bit full adder. To expand this device to a 8-bit adder you must-

a. Use two adders with no interconnection.

b. Use two adders and connect the sum outputs of one to the bit inputs of the other.

c. User four adders with no interconnection.

d. Use two adders with the carry output of one connected to the carry input of the other.

viii. What does the following circuit do?

a. BCD to Binary

b. BCD to Gray code

c. BCD to Excess-3

d. BCD to Excess-12

ix. What will be the output of a 4 to 2 priority encoder if the given input is 0000.

a. Zero

b. Floating

A

2

A

1

A

3

A

4

B

2

B

1

B

3

B

4

1

0

C

in

C

out

S

2

S

1

S

3

S

4

BCD

input

Output

????

(MSB)

7483

3

c. Unknown

d. Tristate

x. How many clock cycle/ cycles does a master slave JK Flip-flop require to operate?

a) 1

b) 2

c) 3

d) 4

3. Answer the following Short Questions 5x6=30

a. Using two 3 to 8 decoders and basic gates as required, design a circuit that takes as input a number between

0-15 and produces as output 1 if the input is a prime number and 0 otherwise. (The outputs of the decoders

are active low)

b. Design a 3 input NOR gate using only one 4x1 Mux.

4

c. Design an arithmetic unit which takes two 4-bit numbers A &B and performs the following functions based

on the values of S

1

and S

0

.

S

1

S

0

Output function

0 0 A+B'

0 1 A+B

1 0 A+B'+1

1 1 A+B+1

Here “+” means addition operation. Use only one 7483 IC (4-bit adder) and XOR gates.

5

d. Construct a J K flip-flop using D flip-flop, a 2-to-1-line multiplexer and an inverter.

6

e. Assume a system gets series of numbers as input. If an odd number comes after an even number, then output

indicates 1 and vice versa. Otherwise, the output will be 0 (i.e. odd after odd and even after even). Design a

circuit that will fulfill the above requirement.

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